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author | Dave Airlie <airlied@redhat.com> | 2017-10-19 20:47:19 -0400 |
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committer | Dave Airlie <airlied@redhat.com> | 2017-10-19 20:47:19 -0400 |
commit | 6585d4274b0baf1d09318539c4a726a96b51af34 (patch) | |
tree | 179aacc9409db45966595893ae4842104b314442 /drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c | |
parent | 40d86701a625eed9e644281b9af228d6a52d8ed9 (diff) | |
parent | 96687ec0bb478088cb6941a7dca3bb6808a19313 (diff) |
Merge branch 'drm-next-4.15' of git://people.freedesktop.org/~agd5f/linux into drm-next
Last set of features for 4.15. Highlights:
- Add a bo flag to allow buffers to opt out of implicit sync
- Add ctx priority setting interface
- Lots more powerplay cleanups
- Start to plumb through vram lost infrastructure for gpu reset
- ttm support for huge pages
- misc cleanups and bug fixes
* 'drm-next-4.15' of git://people.freedesktop.org/~agd5f/linux: (73 commits)
drm/amd/powerplay: Place the constant on the right side of the test
drm/amd/powerplay: Remove useless variable
drm/amd/powerplay: Don't cast kzalloc() return value
drm/amdgpu: allow GTT overcommit during bind
drm/amdgpu: linear validate first then bind to GART
drm/amd/pp: Fix overflow when setup decf/pix/disp dpm table.
drm/amd/pp: thermal control not enabled on vega10.
drm/amdgpu: busywait KIQ register accessing (v4)
drm/amdgpu: report more amdgpu_fence_info
drm/amdgpu:don't check soft_reset for sriov
drm/amdgpu:fix duplicated setting job's vram_lost
drm/amdgpu:reduce wb to 512 slot
drm/amdgpu: fix regresstion on SR-IOV gpu reset failed
drm/amd/powerplay: Tidy up cz_dpm_powerup_vce()
drm/amd/powerplay: Tidy up cz_dpm_powerdown_vce()
drm/amd/powerplay: Tidy up cz_dpm_update_vce_dpm()
drm/amd/powerplay: Tidy up cz_dpm_update_uvd_dpm()
drm/amd/powerplay: Tidy up cz_dpm_powerup_uvd()
drm/amd/powerplay: Tidy up cz_dpm_powerdown_uvd()
drm/amd/powerplay: Tidy up cz_start_dpm()
...
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c')
-rw-r--r-- | drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c | 63 |
1 files changed, 63 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c index 333bad749067..fb9f88ef6059 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c | |||
@@ -169,6 +169,32 @@ int amdgpu_fence_emit(struct amdgpu_ring *ring, struct dma_fence **f) | |||
169 | } | 169 | } |
170 | 170 | ||
171 | /** | 171 | /** |
172 | * amdgpu_fence_emit_polling - emit a fence on the requeste ring | ||
173 | * | ||
174 | * @ring: ring the fence is associated with | ||
175 | * @s: resulting sequence number | ||
176 | * | ||
177 | * Emits a fence command on the requested ring (all asics). | ||
178 | * Used For polling fence. | ||
179 | * Returns 0 on success, -ENOMEM on failure. | ||
180 | */ | ||
181 | int amdgpu_fence_emit_polling(struct amdgpu_ring *ring, uint32_t *s) | ||
182 | { | ||
183 | uint32_t seq; | ||
184 | |||
185 | if (!s) | ||
186 | return -EINVAL; | ||
187 | |||
188 | seq = ++ring->fence_drv.sync_seq; | ||
189 | amdgpu_ring_emit_fence(ring, ring->fence_drv.gpu_addr, | ||
190 | seq, AMDGPU_FENCE_FLAG_INT); | ||
191 | |||
192 | *s = seq; | ||
193 | |||
194 | return 0; | ||
195 | } | ||
196 | |||
197 | /** | ||
172 | * amdgpu_fence_schedule_fallback - schedule fallback check | 198 | * amdgpu_fence_schedule_fallback - schedule fallback check |
173 | * | 199 | * |
174 | * @ring: pointer to struct amdgpu_ring | 200 | * @ring: pointer to struct amdgpu_ring |
@@ -282,6 +308,30 @@ int amdgpu_fence_wait_empty(struct amdgpu_ring *ring) | |||
282 | } | 308 | } |
283 | 309 | ||
284 | /** | 310 | /** |
311 | * amdgpu_fence_wait_polling - busy wait for givn sequence number | ||
312 | * | ||
313 | * @ring: ring index the fence is associated with | ||
314 | * @wait_seq: sequence number to wait | ||
315 | * @timeout: the timeout for waiting in usecs | ||
316 | * | ||
317 | * Wait for all fences on the requested ring to signal (all asics). | ||
318 | * Returns left time if no timeout, 0 or minus if timeout. | ||
319 | */ | ||
320 | signed long amdgpu_fence_wait_polling(struct amdgpu_ring *ring, | ||
321 | uint32_t wait_seq, | ||
322 | signed long timeout) | ||
323 | { | ||
324 | uint32_t seq; | ||
325 | |||
326 | do { | ||
327 | seq = amdgpu_fence_read(ring); | ||
328 | udelay(5); | ||
329 | timeout -= 5; | ||
330 | } while ((int32_t)(wait_seq - seq) > 0 && timeout > 0); | ||
331 | |||
332 | return timeout > 0 ? timeout : 0; | ||
333 | } | ||
334 | /** | ||
285 | * amdgpu_fence_count_emitted - get the count of emitted fences | 335 | * amdgpu_fence_count_emitted - get the count of emitted fences |
286 | * | 336 | * |
287 | * @ring: ring the fence is associated with | 337 | * @ring: ring the fence is associated with |
@@ -641,6 +691,19 @@ static int amdgpu_debugfs_fence_info(struct seq_file *m, void *data) | |||
641 | atomic_read(&ring->fence_drv.last_seq)); | 691 | atomic_read(&ring->fence_drv.last_seq)); |
642 | seq_printf(m, "Last emitted 0x%08x\n", | 692 | seq_printf(m, "Last emitted 0x%08x\n", |
643 | ring->fence_drv.sync_seq); | 693 | ring->fence_drv.sync_seq); |
694 | |||
695 | if (ring->funcs->type != AMDGPU_RING_TYPE_GFX) | ||
696 | continue; | ||
697 | |||
698 | /* set in CP_VMID_PREEMPT and preemption occurred */ | ||
699 | seq_printf(m, "Last preempted 0x%08x\n", | ||
700 | le32_to_cpu(*(ring->fence_drv.cpu_addr + 2))); | ||
701 | /* set in CP_VMID_RESET and reset occurred */ | ||
702 | seq_printf(m, "Last reset 0x%08x\n", | ||
703 | le32_to_cpu(*(ring->fence_drv.cpu_addr + 4))); | ||
704 | /* Both preemption and reset occurred */ | ||
705 | seq_printf(m, "Last both 0x%08x\n", | ||
706 | le32_to_cpu(*(ring->fence_drv.cpu_addr + 6))); | ||
644 | } | 707 | } |
645 | return 0; | 708 | return 0; |
646 | } | 709 | } |