drm/amdgpu: return the common fence from amdgpu_fence_emit

Try to avoid using the hardware specific fences even more.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>

1 files changed, 14 insertions, 13 deletions

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c
index d94b13ac290f..83599f2a0387 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c
@@ -91,28 +91,29 @@ static u32 amdgpu_fence_read(struct amdgpu_ring *ring)
  * amdgpu_fence_emit - emit a fence on the requested ring
  *
  * @ring: ring the fence is associated with
- * @fence: amdgpu fence object
+ * @f: resulting fence object
  *
  * Emits a fence command on the requested ring (all asics).
  * Returns 0 on success, -ENOMEM on failure.
  */
-int amdgpu_fence_emit(struct amdgpu_ring *ring, struct amdgpu_fence **fence)
+int amdgpu_fence_emit(struct amdgpu_ring *ring, struct fence **f)
 {
         struct amdgpu_device *adev = ring->adev;
+        struct amdgpu_fence *fence;
 
-        *fence = kmem_cache_alloc(amdgpu_fence_slab, GFP_KERNEL);
-        if ((*fence) == NULL) {
+        fence = kmem_cache_alloc(amdgpu_fence_slab, GFP_KERNEL);
+        if (fence == NULL)
                 return -ENOMEM;
-        }
-        (*fence)->seq = ++ring->fence_drv.sync_seq;
-        (*fence)->ring = ring;
-        fence_init(&(*fence)->base, &amdgpu_fence_ops,
-                &ring->fence_drv.fence_queue.lock,
-                adev->fence_context + ring->idx,
-                (*fence)->seq);
+
+        fence->seq = ++ring->fence_drv.sync_seq;
+        fence->ring = ring;
+        fence_init(&fence->base, &amdgpu_fence_ops,
+                   &ring->fence_drv.fence_queue.lock,
+                   adev->fence_context + ring->idx,
+                   fence->seq);
         amdgpu_ring_emit_fence(ring, ring->fence_drv.gpu_addr,
-                               (*fence)->seq,
-                               AMDGPU_FENCE_FLAG_INT);
+                               fence->seq, AMDGPU_FENCE_FLAG_INT);
+        *f = &fence->base;
         return 0;
 }