diff options
author | Alex Deucher <alexander.deucher@amd.com> | 2019-02-14 15:54:57 -0500 |
---|---|---|
committer | Alex Deucher <alexander.deucher@amd.com> | 2019-02-15 11:15:50 -0500 |
commit | 478168e1cbd0b3df52ca223e1d7af3c257588166 (patch) | |
tree | 50b78f334f1311a14cc9d81c640109eedb7280cd /drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c | |
parent | b5bb37eddb63b16b7ab959598d108b1c444be77d (diff) |
drm/amdgpu: remove some old unused dpm helpers
Carried over from radeon, but no longer used.
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c')
-rw-r--r-- | drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c | 88 |
1 files changed, 0 insertions, 88 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c index 1c4595562f8f..344967df3137 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c | |||
@@ -184,61 +184,6 @@ u32 amdgpu_dpm_get_vrefresh(struct amdgpu_device *adev) | |||
184 | return vrefresh; | 184 | return vrefresh; |
185 | } | 185 | } |
186 | 186 | ||
187 | void amdgpu_calculate_u_and_p(u32 i, u32 r_c, u32 p_b, | ||
188 | u32 *p, u32 *u) | ||
189 | { | ||
190 | u32 b_c = 0; | ||
191 | u32 i_c; | ||
192 | u32 tmp; | ||
193 | |||
194 | i_c = (i * r_c) / 100; | ||
195 | tmp = i_c >> p_b; | ||
196 | |||
197 | while (tmp) { | ||
198 | b_c++; | ||
199 | tmp >>= 1; | ||
200 | } | ||
201 | |||
202 | *u = (b_c + 1) / 2; | ||
203 | *p = i_c / (1 << (2 * (*u))); | ||
204 | } | ||
205 | |||
206 | int amdgpu_calculate_at(u32 t, u32 h, u32 fh, u32 fl, u32 *tl, u32 *th) | ||
207 | { | ||
208 | u32 k, a, ah, al; | ||
209 | u32 t1; | ||
210 | |||
211 | if ((fl == 0) || (fh == 0) || (fl > fh)) | ||
212 | return -EINVAL; | ||
213 | |||
214 | k = (100 * fh) / fl; | ||
215 | t1 = (t * (k - 100)); | ||
216 | a = (1000 * (100 * h + t1)) / (10000 + (t1 / 100)); | ||
217 | a = (a + 5) / 10; | ||
218 | ah = ((a * t) + 5000) / 10000; | ||
219 | al = a - ah; | ||
220 | |||
221 | *th = t - ah; | ||
222 | *tl = t + al; | ||
223 | |||
224 | return 0; | ||
225 | } | ||
226 | |||
227 | bool amdgpu_is_uvd_state(u32 class, u32 class2) | ||
228 | { | ||
229 | if (class & ATOM_PPLIB_CLASSIFICATION_UVDSTATE) | ||
230 | return true; | ||
231 | if (class & ATOM_PPLIB_CLASSIFICATION_HD2STATE) | ||
232 | return true; | ||
233 | if (class & ATOM_PPLIB_CLASSIFICATION_HDSTATE) | ||
234 | return true; | ||
235 | if (class & ATOM_PPLIB_CLASSIFICATION_SDSTATE) | ||
236 | return true; | ||
237 | if (class2 & ATOM_PPLIB_CLASSIFICATION2_MVC) | ||
238 | return true; | ||
239 | return false; | ||
240 | } | ||
241 | |||
242 | bool amdgpu_is_internal_thermal_sensor(enum amdgpu_int_thermal_type sensor) | 187 | bool amdgpu_is_internal_thermal_sensor(enum amdgpu_int_thermal_type sensor) |
243 | { | 188 | { |
244 | switch (sensor) { | 189 | switch (sensor) { |
@@ -949,39 +894,6 @@ enum amdgpu_pcie_gen amdgpu_get_pcie_gen_support(struct amdgpu_device *adev, | |||
949 | return AMDGPU_PCIE_GEN1; | 894 | return AMDGPU_PCIE_GEN1; |
950 | } | 895 | } |
951 | 896 | ||
952 | u16 amdgpu_get_pcie_lane_support(struct amdgpu_device *adev, | ||
953 | u16 asic_lanes, | ||
954 | u16 default_lanes) | ||
955 | { | ||
956 | switch (asic_lanes) { | ||
957 | case 0: | ||
958 | default: | ||
959 | return default_lanes; | ||
960 | case 1: | ||
961 | return 1; | ||
962 | case 2: | ||
963 | return 2; | ||
964 | case 4: | ||
965 | return 4; | ||
966 | case 8: | ||
967 | return 8; | ||
968 | case 12: | ||
969 | return 12; | ||
970 | case 16: | ||
971 | return 16; | ||
972 | } | ||
973 | } | ||
974 | |||
975 | u8 amdgpu_encode_pci_lane_width(u32 lanes) | ||
976 | { | ||
977 | u8 encoded_lanes[] = { 0, 1, 2, 0, 3, 0, 0, 0, 4, 0, 0, 0, 5, 0, 0, 0, 6 }; | ||
978 | |||
979 | if (lanes > 16) | ||
980 | return 0; | ||
981 | |||
982 | return encoded_lanes[lanes]; | ||
983 | } | ||
984 | |||
985 | struct amd_vce_state* | 897 | struct amd_vce_state* |
986 | amdgpu_get_vce_clock_state(void *handle, u32 idx) | 898 | amdgpu_get_vce_clock_state(void *handle, u32 idx) |
987 | { | 899 | { |