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authorArindam Nath <arindam.nath@amd.com>2016-10-07 09:31:37 -0400
committerAlex Deucher <alexander.deucher@amd.com>2016-10-12 15:44:15 -0400
commitb0b00ff16f2715562b7ea0dfa3a9c5b33328c8cb (patch)
treedb52e60ad9b8686f54baed06980aa0bc2662de96 /drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
parent113d0f9db7be5a3038d9800ea1dddfb373c2b5a6 (diff)
drm/amd/amdgpu: enable clockgating only after late init
Sometimes during multiple reboots, the system hangs during bootup. The issue is very random and happens once in around 50 reboots or so. It seems if clockgating is enabled before late init, the GFX engine sometimes does not respond. This patch changes the ordering a little so that both powergating and clockgating are enabled only after late init calls. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Arindam Nath <arindam.nath@amd.com> Tested-by: Sunil Uttarwar <Sunil.Uttarwar1@amd.com> Reviewed-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_device.c')
-rw-r--r--drivers/gpu/drm/amd/amdgpu/amdgpu_device.c14
1 files changed, 7 insertions, 7 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index a58513f271e3..928774f5a7e0 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -1411,13 +1411,6 @@ static int amdgpu_late_init(struct amdgpu_device *adev)
1411 if (adev->ip_blocks[i].type == AMD_IP_BLOCK_TYPE_UVD || 1411 if (adev->ip_blocks[i].type == AMD_IP_BLOCK_TYPE_UVD ||
1412 adev->ip_blocks[i].type == AMD_IP_BLOCK_TYPE_VCE) 1412 adev->ip_blocks[i].type == AMD_IP_BLOCK_TYPE_VCE)
1413 continue; 1413 continue;
1414 /* enable clockgating to save power */
1415 r = adev->ip_blocks[i].funcs->set_clockgating_state((void *)adev,
1416 AMD_CG_STATE_GATE);
1417 if (r) {
1418 DRM_ERROR("set_clockgating_state(gate) of IP block <%s> failed %d\n", adev->ip_blocks[i].funcs->name, r);
1419 return r;
1420 }
1421 if (adev->ip_blocks[i].funcs->late_init) { 1414 if (adev->ip_blocks[i].funcs->late_init) {
1422 r = adev->ip_blocks[i].funcs->late_init((void *)adev); 1415 r = adev->ip_blocks[i].funcs->late_init((void *)adev);
1423 if (r) { 1416 if (r) {
@@ -1426,6 +1419,13 @@ static int amdgpu_late_init(struct amdgpu_device *adev)
1426 } 1419 }
1427 adev->ip_block_status[i].late_initialized = true; 1420 adev->ip_block_status[i].late_initialized = true;
1428 } 1421 }
1422 /* enable clockgating to save power */
1423 r = adev->ip_blocks[i].funcs->set_clockgating_state((void *)adev,
1424 AMD_CG_STATE_GATE);
1425 if (r) {
1426 DRM_ERROR("set_clockgating_state(gate) of IP block <%s> failed %d\n", adev->ip_blocks[i].funcs->name, r);
1427 return r;
1428 }
1429 } 1429 }
1430 1430
1431 return 0; 1431 return 0;