drm/amdgpu:fix gfx fence allocate size

1, for sriov, we need 8dw for the gfx fence due to CP
behaviour
2, cleanup wrong logic in wptr/rptr wb alloc and free

Change-Id: Ifbfed17a4621dae57244942ffac7de1743de0294
Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

1 files changed, 32 insertions, 0 deletions

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index a9eeaad49d18..15f55865fcfb 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -602,6 +602,21 @@ int amdgpu_wb_get_64bit(struct amdgpu_device *adev, u32 *wb)
         }
 }
 
+int amdgpu_wb_get_256Bit(struct amdgpu_device *adev, u32 *wb)
+{
+        int i = 0;
+        unsigned long offset = bitmap_find_next_zero_area_off(adev->wb.used,
+                                adev->wb.num_wb, 0, 8, 63, 0);
+        if ((offset + 7) < adev->wb.num_wb) {
+                for (i = 0; i < 8; i++)
+                        __set_bit(offset + i, adev->wb.used);
+                *wb = offset;
+                return 0;
+        } else {
+                return -EINVAL;
+        }
+}
+
 /**
  * amdgpu_wb_free - Free a wb entry
  *
@@ -633,6 +648,23 @@ void amdgpu_wb_free_64bit(struct amdgpu_device *adev, u32 wb)
 }
 
 /**
+ * amdgpu_wb_free_256bit - Free a wb entry
+ *
+ * @adev: amdgpu_device pointer
+ * @wb: wb index
+ *
+ * Free a wb slot allocated for use by the driver (all asics)
+ */
+void amdgpu_wb_free_256bit(struct amdgpu_device *adev, u32 wb)
+{
+        int i = 0;
+
+        if ((wb + 7) < adev->wb.num_wb)
+                for (i = 0; i < 8; i++)
+                        __clear_bit(wb + i, adev->wb.used);
+}
+
+/**
  * amdgpu_vram_location - try to find VRAM location
  * @adev: amdgpu device structure holding all necessary informations
  * @mc: memory controller structure holding memory informations