Merge branch 'drm-next-4.15' of git://people.freedesktop.org/~agd5f/linux into drm-next

More new stuff for 4.15. Highlights:
- Add clock query interface for raven
- Add new FENCE_TO_HANDLE ioctl
- UVD video encode ring support on polaris
- transparent huge page DMA support
- deadlock fixes
- compute pipe lru tweaks
- powerplay cleanups and regression fixes
- fix duplicate symbol issue with radeon and amdgpu
- misc bug fixes

* 'drm-next-4.15' of git://people.freedesktop.org/~agd5f/linux: (72 commits)
  drm/radeon/dp: make radeon_dp_get_dp_link_config static
  drm/radeon: move ci_send_msg_to_smc to where it's used
  drm/amd/sched: fix deadlock caused by unsignaled fences of deleted jobs
  drm/amd/sched: NULL out the s_fence field after run_job
  drm/amd/sched: move adding finish callback to amd_sched_job_begin
  drm/amd/sched: fix an outdated comment
  drm/amd/sched: rename amd_sched_entity_pop_job
  drm/amdgpu: minor coding style fix
  drm/ttm: add transparent huge page support for DMA allocations v2
  drm/ttm: add support for different pool sizes
  drm/ttm: remove unsued options from ttm_mem_global_alloc_page
  drm/amdgpu: add uvd enc irq
  drm/amdgpu: add uvd enc ib test
  drm/amdgpu: add uvd enc ring test
  drm/amdgpu: add uvd enc vm functions (v2)
  drm/amdgpu: add uvd enc into run queue
  drm/amdgpu: add uvd enc rings
  drm/amdgpu: add new uvd enc ring methods
  drm/amdgpu: add uvd enc command in header
  drm/amdgpu: add uvd enc registers in header
  ...

1 files changed, 61 insertions, 0 deletions

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
index c6a214f1e991..ab83dfcabb41 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
@@ -25,6 +25,7 @@
  *    Jerome Glisse <glisse@freedesktop.org>
  */
 #include <linux/pagemap.h>
+#include <linux/sync_file.h>
 #include <drm/drmP.h>
 #include <drm/amdgpu_drm.h>
 #include <drm/drm_syncobj.h>
@@ -1330,6 +1331,66 @@ static struct dma_fence *amdgpu_cs_get_fence(struct amdgpu_device *adev,
         return fence;
 }
 
+int amdgpu_cs_fence_to_handle_ioctl(struct drm_device *dev, void *data,
+                                    struct drm_file *filp)
+{
+        struct amdgpu_device *adev = dev->dev_private;
+        struct amdgpu_fpriv *fpriv = filp->driver_priv;
+        union drm_amdgpu_fence_to_handle *info = data;
+        struct dma_fence *fence;
+        struct drm_syncobj *syncobj;
+        struct sync_file *sync_file;
+        int fd, r;
+
+        if (amdgpu_kms_vram_lost(adev, fpriv))
+                return -ENODEV;
+
+        fence = amdgpu_cs_get_fence(adev, filp, &info->in.fence);
+        if (IS_ERR(fence))
+                return PTR_ERR(fence);
+
+        switch (info->in.what) {
+        case AMDGPU_FENCE_TO_HANDLE_GET_SYNCOBJ:
+                r = drm_syncobj_create(&syncobj, 0, fence);
+                dma_fence_put(fence);
+                if (r)
+                        return r;
+                r = drm_syncobj_get_handle(filp, syncobj, &info->out.handle);
+                drm_syncobj_put(syncobj);
+                return r;
+
+        case AMDGPU_FENCE_TO_HANDLE_GET_SYNCOBJ_FD:
+                r = drm_syncobj_create(&syncobj, 0, fence);
+                dma_fence_put(fence);
+                if (r)
+                        return r;
+                r = drm_syncobj_get_fd(syncobj, (int*)&info->out.handle);
+                drm_syncobj_put(syncobj);
+                return r;
+
+        case AMDGPU_FENCE_TO_HANDLE_GET_SYNC_FILE_FD:
+                fd = get_unused_fd_flags(O_CLOEXEC);
+                if (fd < 0) {
+                        dma_fence_put(fence);
+                        return fd;
+                }
+
+                sync_file = sync_file_create(fence);
+                dma_fence_put(fence);
+                if (!sync_file) {
+                        put_unused_fd(fd);
+                        return -ENOMEM;
+                }
+
+                fd_install(fd, sync_file->file);
+                info->out.handle = fd;
+                return 0;
+
+        default:
+                return -EINVAL;
+        }
+}
+
 /**
  * amdgpu_cs_wait_all_fence - wait on all fences to signal
  *