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authorAndrey Grodzovsky <andrey.grodzovsky@amd.com>2019-01-31 15:44:22 -0500
committerAlex Deucher <alexander.deucher@amd.com>2019-02-05 21:15:46 -0500
commit67dd1a36334ffce82bebeb2d633e152aa436d370 (patch)
treeb4d298fb24593a60d0b77e82f8ff982cc4c639df /drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
parent373e87fc91527124cb8ec21465a6d070a65c56af (diff)
drm/amdgpu: Add AMDGPU_CHUNK_ID_SCHEDULED_DEPENDENCIES
New chunk for dependency on start of job's execution instead on the end. This is used for GPU deadlock prevention when userspace uses mid-IB fences to wait for mid-IB work on other rings. v2: Fix typo in AMDGPU_CHUNK_ID_SCHEDULED_DEPENDENCIES v3: Bump KMS version v4: put old fence AFTER acquiring the scheduled fence. Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com> Suggested-by: Christian Koenig <Christian.Koenig@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c')
-rw-r--r--drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c13
1 files changed, 12 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
index 1c49b8266d69..52a5e4fdc95b 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
@@ -214,6 +214,7 @@ static int amdgpu_cs_parser_init(struct amdgpu_cs_parser *p, union drm_amdgpu_cs
214 case AMDGPU_CHUNK_ID_DEPENDENCIES: 214 case AMDGPU_CHUNK_ID_DEPENDENCIES:
215 case AMDGPU_CHUNK_ID_SYNCOBJ_IN: 215 case AMDGPU_CHUNK_ID_SYNCOBJ_IN:
216 case AMDGPU_CHUNK_ID_SYNCOBJ_OUT: 216 case AMDGPU_CHUNK_ID_SYNCOBJ_OUT:
217 case AMDGPU_CHUNK_ID_SCHEDULED_DEPENDENCIES:
217 break; 218 break;
218 219
219 default: 220 default:
@@ -1090,6 +1091,15 @@ static int amdgpu_cs_process_fence_dep(struct amdgpu_cs_parser *p,
1090 1091
1091 fence = amdgpu_ctx_get_fence(ctx, entity, 1092 fence = amdgpu_ctx_get_fence(ctx, entity,
1092 deps[i].handle); 1093 deps[i].handle);
1094
1095 if (chunk->chunk_id == AMDGPU_CHUNK_ID_SCHEDULED_DEPENDENCIES) {
1096 struct drm_sched_fence *s_fence = to_drm_sched_fence(fence);
1097 struct dma_fence *old = fence;
1098
1099 fence = dma_fence_get(&s_fence->scheduled);
1100 dma_fence_put(old);
1101 }
1102
1093 if (IS_ERR(fence)) { 1103 if (IS_ERR(fence)) {
1094 r = PTR_ERR(fence); 1104 r = PTR_ERR(fence);
1095 amdgpu_ctx_put(ctx); 1105 amdgpu_ctx_put(ctx);
@@ -1177,7 +1187,8 @@ static int amdgpu_cs_dependencies(struct amdgpu_device *adev,
1177 1187
1178 chunk = &p->chunks[i]; 1188 chunk = &p->chunks[i];
1179 1189
1180 if (chunk->chunk_id == AMDGPU_CHUNK_ID_DEPENDENCIES) { 1190 if (chunk->chunk_id == AMDGPU_CHUNK_ID_DEPENDENCIES ||
1191 chunk->chunk_id == AMDGPU_CHUNK_ID_SCHEDULED_DEPENDENCIES) {
1181 r = amdgpu_cs_process_fence_dep(p, chunk); 1192 r = amdgpu_cs_process_fence_dep(p, chunk);
1182 if (r) 1193 if (r)
1183 return r; 1194 return r;