diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2018-12-25 14:48:26 -0500 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2018-12-25 14:48:26 -0500 |
commit | 4971f090aa7f6ce5daa094ce4334f6618f93a7eb (patch) | |
tree | 45d75782b7dedbec76a3ab82d2769f7707668071 /drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c | |
parent | c76cd634eb5bfd497617ea224a54a03b545c8c4d (diff) | |
parent | 2a3c83f5fe0770d13bbb71b23674886ff4111f44 (diff) |
Merge tag 'drm-next-2018-12-14' of git://anongit.freedesktop.org/drm/drm
Pull drm updates from Dave Airlie:
"Core:
- shared fencing staging removal
- drop transactional atomic helpers and move helpers to new location
- DP/MST atomic cleanup
- Leasing cleanups and drop EXPORT_SYMBOL
- Convert drivers to atomic helpers and generic fbdev.
- removed deprecated obj_ref/unref in favour of get/put
- Improve dumb callback documentation
- MODESET_LOCK_BEGIN/END helpers
panels:
- CDTech panels, Banana Pi Panel, DLC1010GIG,
- Olimex LCD-O-LinuXino, Samsung S6D16D0, Truly NT35597 WQXGA,
- Himax HX8357D, simulated RTSM AEMv8.
- GPD Win2 panel
- AUO G101EVN010
vgem:
- render node support
ttm:
- move global init out of drivers
- fix LRU handling for ghost objects
- Support for simultaneous submissions to multiple engines
scheduler:
- timeout/fault handling changes to help GPU recovery
- helpers for hw with preemption support
i915:
- Scaler/Watermark fixes
- DP MST + powerwell fixes
- PSR fixes
- Break long get/put shmemfs pages
- Icelake fixes
- Icelake DSI video mode enablement
- Engine workaround improvements
amdgpu:
- freesync support
- GPU reset enabled on CI, VI, SOC15 dGPUs
- ABM support in DC
- KFD support for vega12/polaris12
- SDMA paging queue on vega
- More amdkfd code sharing
- DCC scanout on GFX9
- DC kerneldoc
- Updated SMU firmware for GFX8 chips
- XGMI PSP + hive reset support
- GPU reset
- DC trace support
- Powerplay updates for newer Polaris
- Cursor plane update fast path
- kfd dma-buf support
virtio-gpu:
- add EDID support
vmwgfx:
- pageflip with damage support
nouveau:
- Initial Turing TU104/TU106 modesetting support
msm:
- a2xx gpu support for apq8060 and imx5
- a2xx gpummu support
- mdp4 display support for apq8060
- DPU fixes and cleanups
- enhanced profiling support
- debug object naming interface
- get_iova/page pinning decoupling
tegra:
- Tegra194 host1x, VIC and display support enabled
- Audio over HDMI for Tegra186 and Tegra194
exynos:
- DMA/IOMMU refactoring
- plane alpha + blend mode support
- Color format fixes for mixer driver
rcar-du:
- R8A7744 and R8A77470 support
- R8A77965 LVDS support
imx:
- fbdev emulation fix
- multi-tiled scalling fixes
- SPDX identifiers
rockchip
- dw_hdmi support
- dw-mipi-dsi + dual dsi support
- mailbox read size fix
qxl:
- fix cursor pinning
vc4:
- YUV support (scaling + cursor)
v3d:
- enable TFU (Texture Formatting Unit)
mali-dp:
- add support for linear tiled formats
sun4i:
- Display Engine 3 support
- H6 DE3 mixer 0 support
- H6 display engine support
- dw-hdmi support
- H6 HDMI phy support
- implicit fence waiting
- BGRX8888 support
meson:
- Overlay plane support
- implicit fence waiting
- HDMI 1.4 4k modes
bridge:
- i2c fixes for sii902x"
* tag 'drm-next-2018-12-14' of git://anongit.freedesktop.org/drm/drm: (1403 commits)
drm/amd/display: Add fast path for cursor plane updates
drm/amdgpu: Enable GPU recovery by default for CI
drm/amd/display: Fix duplicating scaling/underscan connector state
drm/amd/display: Fix unintialized max_bpc state values
Revert "drm/amd/display: Set RMX_ASPECT as default"
drm/amdgpu: Fix stub function name
drm/msm/dpu: Fix clock issue after bind failure
drm/msm/dpu: Clean up dpu_media_info.h static inline functions
drm/msm/dpu: Further cleanups for static inline functions
drm/msm/dpu: Cleanup the debugfs functions
drm/msm/dpu: Remove dpu_irq and unused functions
drm/msm: Make irq_postinstall optional
drm/msm/dpu: Cleanup callers of dpu_hw_blk_init
drm/msm/dpu: Remove unused functions
drm/msm/dpu: Remove dpu_crtc_is_enabled()
drm/msm/dpu: Remove dpu_crtc_get_mixer_height
drm/msm/dpu: Remove dpu_dbg
drm/msm: dpu: Remove crtc_lock
drm/msm: dpu: Remove vblank_requested flag from dpu_crtc
drm/msm: dpu: Separate crtc assignment from vblank enable
...
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c')
-rw-r--r-- | drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c | 30 |
1 files changed, 18 insertions, 12 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c index 0acc8dee2cb8..cf4e190c0a72 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c | |||
@@ -50,7 +50,8 @@ static int amdgpu_cs_user_fence_chunk(struct amdgpu_cs_parser *p, | |||
50 | bo = amdgpu_bo_ref(gem_to_amdgpu_bo(gobj)); | 50 | bo = amdgpu_bo_ref(gem_to_amdgpu_bo(gobj)); |
51 | p->uf_entry.priority = 0; | 51 | p->uf_entry.priority = 0; |
52 | p->uf_entry.tv.bo = &bo->tbo; | 52 | p->uf_entry.tv.bo = &bo->tbo; |
53 | p->uf_entry.tv.shared = true; | 53 | /* One for TTM and one for the CS job */ |
54 | p->uf_entry.tv.num_shared = 2; | ||
54 | p->uf_entry.user_pages = NULL; | 55 | p->uf_entry.user_pages = NULL; |
55 | 56 | ||
56 | drm_gem_object_put_unlocked(gobj); | 57 | drm_gem_object_put_unlocked(gobj); |
@@ -598,6 +599,10 @@ static int amdgpu_cs_parser_bos(struct amdgpu_cs_parser *p, | |||
598 | return r; | 599 | return r; |
599 | } | 600 | } |
600 | 601 | ||
602 | /* One for TTM and one for the CS job */ | ||
603 | amdgpu_bo_list_for_each_entry(e, p->bo_list) | ||
604 | e->tv.num_shared = 2; | ||
605 | |||
601 | amdgpu_bo_list_get_list(p->bo_list, &p->validated); | 606 | amdgpu_bo_list_get_list(p->bo_list, &p->validated); |
602 | if (p->bo_list->first_userptr != p->bo_list->num_entries) | 607 | if (p->bo_list->first_userptr != p->bo_list->num_entries) |
603 | p->mn = amdgpu_mn_get(p->adev, AMDGPU_MN_TYPE_GFX); | 608 | p->mn = amdgpu_mn_get(p->adev, AMDGPU_MN_TYPE_GFX); |
@@ -717,8 +722,14 @@ static int amdgpu_cs_parser_bos(struct amdgpu_cs_parser *p, | |||
717 | gws = p->bo_list->gws_obj; | 722 | gws = p->bo_list->gws_obj; |
718 | oa = p->bo_list->oa_obj; | 723 | oa = p->bo_list->oa_obj; |
719 | 724 | ||
720 | amdgpu_bo_list_for_each_entry(e, p->bo_list) | 725 | amdgpu_bo_list_for_each_entry(e, p->bo_list) { |
721 | e->bo_va = amdgpu_vm_bo_find(vm, ttm_to_amdgpu_bo(e->tv.bo)); | 726 | struct amdgpu_bo *bo = ttm_to_amdgpu_bo(e->tv.bo); |
727 | |||
728 | /* Make sure we use the exclusive slot for shared BOs */ | ||
729 | if (bo->prime_shared_count) | ||
730 | e->tv.num_shared = 0; | ||
731 | e->bo_va = amdgpu_vm_bo_find(vm, bo); | ||
732 | } | ||
722 | 733 | ||
723 | if (gds) { | 734 | if (gds) { |
724 | p->job->gds_base = amdgpu_bo_gpu_offset(gds) >> PAGE_SHIFT; | 735 | p->job->gds_base = amdgpu_bo_gpu_offset(gds) >> PAGE_SHIFT; |
@@ -955,10 +966,6 @@ static int amdgpu_cs_vm_handling(struct amdgpu_cs_parser *p) | |||
955 | if (r) | 966 | if (r) |
956 | return r; | 967 | return r; |
957 | 968 | ||
958 | r = reservation_object_reserve_shared(vm->root.base.bo->tbo.resv); | ||
959 | if (r) | ||
960 | return r; | ||
961 | |||
962 | p->job->vm_pd_addr = amdgpu_gmc_pd_addr(vm->root.base.bo); | 969 | p->job->vm_pd_addr = amdgpu_gmc_pd_addr(vm->root.base.bo); |
963 | 970 | ||
964 | if (amdgpu_vm_debug) { | 971 | if (amdgpu_vm_debug) { |
@@ -1104,7 +1111,7 @@ static int amdgpu_syncobj_lookup_and_add_to_sync(struct amdgpu_cs_parser *p, | |||
1104 | { | 1111 | { |
1105 | int r; | 1112 | int r; |
1106 | struct dma_fence *fence; | 1113 | struct dma_fence *fence; |
1107 | r = drm_syncobj_find_fence(p->filp, handle, 0, &fence); | 1114 | r = drm_syncobj_find_fence(p->filp, handle, 0, 0, &fence); |
1108 | if (r) | 1115 | if (r) |
1109 | return r; | 1116 | return r; |
1110 | 1117 | ||
@@ -1193,7 +1200,7 @@ static void amdgpu_cs_post_dependencies(struct amdgpu_cs_parser *p) | |||
1193 | int i; | 1200 | int i; |
1194 | 1201 | ||
1195 | for (i = 0; i < p->num_post_dep_syncobjs; ++i) | 1202 | for (i = 0; i < p->num_post_dep_syncobjs; ++i) |
1196 | drm_syncobj_replace_fence(p->post_dep_syncobjs[i], 0, p->fence); | 1203 | drm_syncobj_replace_fence(p->post_dep_syncobjs[i], p->fence); |
1197 | } | 1204 | } |
1198 | 1205 | ||
1199 | static int amdgpu_cs_submit(struct amdgpu_cs_parser *p, | 1206 | static int amdgpu_cs_submit(struct amdgpu_cs_parser *p, |
@@ -1260,8 +1267,7 @@ static int amdgpu_cs_submit(struct amdgpu_cs_parser *p, | |||
1260 | return 0; | 1267 | return 0; |
1261 | 1268 | ||
1262 | error_abort: | 1269 | error_abort: |
1263 | dma_fence_put(&job->base.s_fence->finished); | 1270 | drm_sched_job_cleanup(&job->base); |
1264 | job->base.s_fence = NULL; | ||
1265 | amdgpu_mn_unlock(p->mn); | 1271 | amdgpu_mn_unlock(p->mn); |
1266 | 1272 | ||
1267 | error_unlock: | 1273 | error_unlock: |
@@ -1285,7 +1291,7 @@ int amdgpu_cs_ioctl(struct drm_device *dev, void *data, struct drm_file *filp) | |||
1285 | 1291 | ||
1286 | r = amdgpu_cs_parser_init(&parser, data); | 1292 | r = amdgpu_cs_parser_init(&parser, data); |
1287 | if (r) { | 1293 | if (r) { |
1288 | DRM_ERROR("Failed to initialize parser !\n"); | 1294 | DRM_ERROR("Failed to initialize parser %d!\n", r); |
1289 | goto out; | 1295 | goto out; |
1290 | } | 1296 | } |
1291 | 1297 | ||