diff options
author | Alex Deucher <alexander.deucher@amd.com> | 2016-03-29 18:28:50 -0400 |
---|---|---|
committer | Alex Deucher <alexander.deucher@amd.com> | 2017-03-29 23:53:37 -0400 |
commit | d766e6a393383c60a55bdcc72586f21a1ff12509 (patch) | |
tree | 2850bdf21e89a7bd48c8d08cd7ff6463ad955214 /drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c | |
parent | 832be4041d4999e008839d12d1efe118da27bd99 (diff) |
drm/amdgpu: switch ih handling to two levels (v3)
Newer asics have a two levels of irq ids now:
client id - the IP
src id - the interrupt src within the IP
v2: integrated Christian's comments.
v3: fix rebase fail in SI and CIK
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Ken Wang <Qingqing.Wang@amd.com>
Reviewed-by: Ken Wang <Qingqing.Wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c')
-rw-r--r-- | drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c | 24 |
1 files changed, 18 insertions, 6 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c index d9e5aa4a79ef..f0e36240365a 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c | |||
@@ -571,7 +571,9 @@ static const struct amdgpu_irq_src_funcs cgs_irq_funcs = { | |||
571 | .process = cgs_process_irq, | 571 | .process = cgs_process_irq, |
572 | }; | 572 | }; |
573 | 573 | ||
574 | static int amdgpu_cgs_add_irq_source(struct cgs_device *cgs_device, unsigned src_id, | 574 | static int amdgpu_cgs_add_irq_source(void *cgs_device, |
575 | unsigned client_id, | ||
576 | unsigned src_id, | ||
575 | unsigned num_types, | 577 | unsigned num_types, |
576 | cgs_irq_source_set_func_t set, | 578 | cgs_irq_source_set_func_t set, |
577 | cgs_irq_handler_func_t handler, | 579 | cgs_irq_handler_func_t handler, |
@@ -597,7 +599,7 @@ static int amdgpu_cgs_add_irq_source(struct cgs_device *cgs_device, unsigned src | |||
597 | irq_params->handler = handler; | 599 | irq_params->handler = handler; |
598 | irq_params->private_data = private_data; | 600 | irq_params->private_data = private_data; |
599 | source->data = (void *)irq_params; | 601 | source->data = (void *)irq_params; |
600 | ret = amdgpu_irq_add_id(adev, src_id, source); | 602 | ret = amdgpu_irq_add_id(adev, client_id, src_id, source); |
601 | if (ret) { | 603 | if (ret) { |
602 | kfree(irq_params); | 604 | kfree(irq_params); |
603 | kfree(source); | 605 | kfree(source); |
@@ -606,16 +608,26 @@ static int amdgpu_cgs_add_irq_source(struct cgs_device *cgs_device, unsigned src | |||
606 | return ret; | 608 | return ret; |
607 | } | 609 | } |
608 | 610 | ||
609 | static int amdgpu_cgs_irq_get(struct cgs_device *cgs_device, unsigned src_id, unsigned type) | 611 | static int amdgpu_cgs_irq_get(void *cgs_device, unsigned client_id, |
612 | unsigned src_id, unsigned type) | ||
610 | { | 613 | { |
611 | CGS_FUNC_ADEV; | 614 | CGS_FUNC_ADEV; |
612 | return amdgpu_irq_get(adev, adev->irq.sources[src_id], type); | 615 | |
616 | if (!adev->irq.client[client_id].sources) | ||
617 | return -EINVAL; | ||
618 | |||
619 | return amdgpu_irq_get(adev, adev->irq.client[client_id].sources[src_id], type); | ||
613 | } | 620 | } |
614 | 621 | ||
615 | static int amdgpu_cgs_irq_put(struct cgs_device *cgs_device, unsigned src_id, unsigned type) | 622 | static int amdgpu_cgs_irq_put(void *cgs_device, unsigned client_id, |
623 | unsigned src_id, unsigned type) | ||
616 | { | 624 | { |
617 | CGS_FUNC_ADEV; | 625 | CGS_FUNC_ADEV; |
618 | return amdgpu_irq_put(adev, adev->irq.sources[src_id], type); | 626 | |
627 | if (!adev->irq.client[client_id].sources) | ||
628 | return -EINVAL; | ||
629 | |||
630 | return amdgpu_irq_put(adev, adev->irq.client[client_id].sources[src_id], type); | ||
619 | } | 631 | } |
620 | 632 | ||
621 | static int amdgpu_cgs_set_clockgating_state(struct cgs_device *cgs_device, | 633 | static int amdgpu_cgs_set_clockgating_state(struct cgs_device *cgs_device, |