diff options
author | Alex Deucher <alexander.deucher@amd.com> | 2015-10-08 16:30:37 -0400 |
---|---|---|
committer | Alex Deucher <alexander.deucher@amd.com> | 2015-10-14 16:16:36 -0400 |
commit | c113ea1c4f4a7592f17e53d658873b83af0dbb4b (patch) | |
tree | 9c245bfb3b9892a4f1b70b243329acf27e157c12 /drivers/gpu/drm/amd/amdgpu/amdgpu.h | |
parent | 756e6880c51376d2e4d53050582d66d88fc281c7 (diff) |
drm/amdgpu: rework sdma structures
Rework the sdma structures in the driver to
consolidate all of the sdma info into a single
structure and allow for asics that may have
different numbers of sdma instances.
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu.h')
-rw-r--r-- | drivers/gpu/drm/amd/amdgpu/amdgpu.h | 22 |
1 files changed, 14 insertions, 8 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h index 6647fb26ef25..afc984806c4c 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h | |||
@@ -1708,7 +1708,7 @@ struct amdgpu_vce { | |||
1708 | /* | 1708 | /* |
1709 | * SDMA | 1709 | * SDMA |
1710 | */ | 1710 | */ |
1711 | struct amdgpu_sdma { | 1711 | struct amdgpu_sdma_instance { |
1712 | /* SDMA firmware */ | 1712 | /* SDMA firmware */ |
1713 | const struct firmware *fw; | 1713 | const struct firmware *fw; |
1714 | uint32_t fw_version; | 1714 | uint32_t fw_version; |
@@ -1718,6 +1718,13 @@ struct amdgpu_sdma { | |||
1718 | bool burst_nop; | 1718 | bool burst_nop; |
1719 | }; | 1719 | }; |
1720 | 1720 | ||
1721 | struct amdgpu_sdma { | ||
1722 | struct amdgpu_sdma_instance instance[AMDGPU_MAX_SDMA_INSTANCES]; | ||
1723 | struct amdgpu_irq_src trap_irq; | ||
1724 | struct amdgpu_irq_src illegal_inst_irq; | ||
1725 | int num_instances; | ||
1726 | }; | ||
1727 | |||
1721 | /* | 1728 | /* |
1722 | * Firmware | 1729 | * Firmware |
1723 | */ | 1730 | */ |
@@ -2064,9 +2071,7 @@ struct amdgpu_device { | |||
2064 | struct amdgpu_gfx gfx; | 2071 | struct amdgpu_gfx gfx; |
2065 | 2072 | ||
2066 | /* sdma */ | 2073 | /* sdma */ |
2067 | struct amdgpu_sdma sdma[AMDGPU_MAX_SDMA_INSTANCES]; | 2074 | struct amdgpu_sdma sdma; |
2068 | struct amdgpu_irq_src sdma_trap_irq; | ||
2069 | struct amdgpu_irq_src sdma_illegal_inst_irq; | ||
2070 | 2075 | ||
2071 | /* uvd */ | 2076 | /* uvd */ |
2072 | bool has_uvd; | 2077 | bool has_uvd; |
@@ -2203,17 +2208,18 @@ static inline void amdgpu_ring_write(struct amdgpu_ring *ring, uint32_t v) | |||
2203 | ring->ring_free_dw--; | 2208 | ring->ring_free_dw--; |
2204 | } | 2209 | } |
2205 | 2210 | ||
2206 | static inline struct amdgpu_sdma * amdgpu_get_sdma_instance(struct amdgpu_ring *ring) | 2211 | static inline struct amdgpu_sdma_instance * |
2212 | amdgpu_get_sdma_instance(struct amdgpu_ring *ring) | ||
2207 | { | 2213 | { |
2208 | struct amdgpu_device *adev = ring->adev; | 2214 | struct amdgpu_device *adev = ring->adev; |
2209 | int i; | 2215 | int i; |
2210 | 2216 | ||
2211 | for (i = 0; i < AMDGPU_MAX_SDMA_INSTANCES; i++) | 2217 | for (i = 0; i < adev->sdma.num_instances; i++) |
2212 | if (&adev->sdma[i].ring == ring) | 2218 | if (&adev->sdma.instance[i].ring == ring) |
2213 | break; | 2219 | break; |
2214 | 2220 | ||
2215 | if (i < AMDGPU_MAX_SDMA_INSTANCES) | 2221 | if (i < AMDGPU_MAX_SDMA_INSTANCES) |
2216 | return &adev->sdma[i]; | 2222 | return &adev->sdma.instance[i]; |
2217 | else | 2223 | else |
2218 | return NULL; | 2224 | return NULL; |
2219 | } | 2225 | } |