drm/amdgpu: avoid KIQ clashing with compute or KFD queues v2

Instead of picking an arbitrary queue for KIQ, search for one according
to policy. The queue must be unused.

Also report the KIQ as an unavailable resource to KFD.

In testing I ran into KCQ initialization issues when using pipes 2/3 of
MEC2 for the KIQ. Therefore the policy disallows grabbing one of these.

v2: fix (ring.me + 1) to (ring.me -1) in amdgpu_amdkfd_device_init

Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Andres Rodriguez <andresx7@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

1 files changed, 20 insertions, 3 deletions

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index 30ba29adddd5..1135f19c9e9c 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -1803,8 +1803,8 @@ amdgpu_get_sdma_instance(struct amdgpu_ring *ring)
                 return NULL;
 }
 
-static inline bool amdgpu_is_mec_queue_enabled(struct amdgpu_device *adev,
-                                                int mec, int pipe, int queue)
+static inline int amdgpu_queue_to_bit(struct amdgpu_device *adev,
+                                      int mec, int pipe, int queue)
 {
         int bit = 0;
 
@@ -1813,7 +1813,24 @@ static inline bool amdgpu_is_mec_queue_enabled(struct amdgpu_device *adev,
         bit += pipe * adev->gfx.mec.num_queue_per_pipe;
         bit += queue;
 
-        return test_bit(bit, adev->gfx.mec.queue_bitmap);
+        return bit;
+}
+
+static inline void amdgpu_bit_to_queue(struct amdgpu_device *adev, int bit,
+                                       int *mec, int *pipe, int *queue)
+{
+        *queue = bit % adev->gfx.mec.num_queue_per_pipe;
+        *pipe = (bit / adev->gfx.mec.num_queue_per_pipe)
+                % adev->gfx.mec.num_pipe_per_mec;
+        *mec = (bit / adev->gfx.mec.num_queue_per_pipe)
+               / adev->gfx.mec.num_pipe_per_mec;
+
+}
+static inline bool amdgpu_is_mec_queue_enabled(struct amdgpu_device *adev,
+                                               int mec, int pipe, int queue)
+{
+        return test_bit(amdgpu_queue_to_bit(adev, mec, pipe, queue),
+                        adev->gfx.mec.queue_bitmap);
 }
 
 /*