diff options
author | yanyang1 <young.yang@amd.com> | 2015-05-22 14:39:35 -0400 |
---|---|---|
committer | Alex Deucher <alexander.deucher@amd.com> | 2015-06-03 21:03:51 -0400 |
commit | 5fc3aeeb9e553a20ce62544f7176c6c4aca52d71 (patch) | |
tree | 3b05b96a184970166b8e9c61465b47734e65141c /drivers/gpu/drm/amd/amdgpu/amdgpu.h | |
parent | dcc357e63727b63995dd869f015a748c9235eb42 (diff) |
drm/amdgpu: rename amdgpu_ip_funcs to amd_ip_funcs (v2)
The structure is renamed and moved to amd_shared.h to make
the component independent. This makes it easier to add
new components in the future.
v2: fix include path
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: yanyang1 <young.yang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu.h')
-rw-r--r-- | drivers/gpu/drm/amd/amdgpu/amdgpu.h | 75 |
1 files changed, 9 insertions, 66 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h index 411cfb91170f..80f0bea52e33 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h | |||
@@ -44,6 +44,7 @@ | |||
44 | 44 | ||
45 | #include <drm/drm_gem.h> | 45 | #include <drm/drm_gem.h> |
46 | 46 | ||
47 | #include "amd_shared.h" | ||
47 | #include "amdgpu_family.h" | 48 | #include "amdgpu_family.h" |
48 | #include "amdgpu_mode.h" | 49 | #include "amdgpu_mode.h" |
49 | #include "amdgpu_ih.h" | 50 | #include "amdgpu_ih.h" |
@@ -205,86 +206,28 @@ enum amdgpu_thermal_irq { | |||
205 | AMDGPU_THERMAL_IRQ_LAST | 206 | AMDGPU_THERMAL_IRQ_LAST |
206 | }; | 207 | }; |
207 | 208 | ||
208 | /* | ||
209 | * IP block functions | ||
210 | */ | ||
211 | enum amdgpu_ip_block_type { | ||
212 | AMDGPU_IP_BLOCK_TYPE_COMMON, | ||
213 | AMDGPU_IP_BLOCK_TYPE_GMC, | ||
214 | AMDGPU_IP_BLOCK_TYPE_IH, | ||
215 | AMDGPU_IP_BLOCK_TYPE_SMC, | ||
216 | AMDGPU_IP_BLOCK_TYPE_DCE, | ||
217 | AMDGPU_IP_BLOCK_TYPE_GFX, | ||
218 | AMDGPU_IP_BLOCK_TYPE_SDMA, | ||
219 | AMDGPU_IP_BLOCK_TYPE_UVD, | ||
220 | AMDGPU_IP_BLOCK_TYPE_VCE, | ||
221 | }; | ||
222 | |||
223 | enum amdgpu_clockgating_state { | ||
224 | AMDGPU_CG_STATE_GATE = 0, | ||
225 | AMDGPU_CG_STATE_UNGATE, | ||
226 | }; | ||
227 | |||
228 | enum amdgpu_powergating_state { | ||
229 | AMDGPU_PG_STATE_GATE = 0, | ||
230 | AMDGPU_PG_STATE_UNGATE, | ||
231 | }; | ||
232 | |||
233 | struct amdgpu_ip_funcs { | ||
234 | /* sets up early driver state (pre sw_init), does not configure hw - Optional */ | ||
235 | int (*early_init)(struct amdgpu_device *adev); | ||
236 | /* sets up late driver/hw state (post hw_init) - Optional */ | ||
237 | int (*late_init)(struct amdgpu_device *adev); | ||
238 | /* sets up driver state, does not configure hw */ | ||
239 | int (*sw_init)(struct amdgpu_device *adev); | ||
240 | /* tears down driver state, does not configure hw */ | ||
241 | int (*sw_fini)(struct amdgpu_device *adev); | ||
242 | /* sets up the hw state */ | ||
243 | int (*hw_init)(struct amdgpu_device *adev); | ||
244 | /* tears down the hw state */ | ||
245 | int (*hw_fini)(struct amdgpu_device *adev); | ||
246 | /* handles IP specific hw/sw changes for suspend */ | ||
247 | int (*suspend)(struct amdgpu_device *adev); | ||
248 | /* handles IP specific hw/sw changes for resume */ | ||
249 | int (*resume)(struct amdgpu_device *adev); | ||
250 | /* returns current IP block idle status */ | ||
251 | bool (*is_idle)(struct amdgpu_device *adev); | ||
252 | /* poll for idle */ | ||
253 | int (*wait_for_idle)(struct amdgpu_device *adev); | ||
254 | /* soft reset the IP block */ | ||
255 | int (*soft_reset)(struct amdgpu_device *adev); | ||
256 | /* dump the IP block status registers */ | ||
257 | void (*print_status)(struct amdgpu_device *adev); | ||
258 | /* enable/disable cg for the IP block */ | ||
259 | int (*set_clockgating_state)(struct amdgpu_device *adev, | ||
260 | enum amdgpu_clockgating_state state); | ||
261 | /* enable/disable pg for the IP block */ | ||
262 | int (*set_powergating_state)(struct amdgpu_device *adev, | ||
263 | enum amdgpu_powergating_state state); | ||
264 | }; | ||
265 | |||
266 | int amdgpu_set_clockgating_state(struct amdgpu_device *adev, | 209 | int amdgpu_set_clockgating_state(struct amdgpu_device *adev, |
267 | enum amdgpu_ip_block_type block_type, | 210 | enum amd_ip_block_type block_type, |
268 | enum amdgpu_clockgating_state state); | 211 | enum amd_clockgating_state state); |
269 | int amdgpu_set_powergating_state(struct amdgpu_device *adev, | 212 | int amdgpu_set_powergating_state(struct amdgpu_device *adev, |
270 | enum amdgpu_ip_block_type block_type, | 213 | enum amd_ip_block_type block_type, |
271 | enum amdgpu_powergating_state state); | 214 | enum amd_powergating_state state); |
272 | 215 | ||
273 | struct amdgpu_ip_block_version { | 216 | struct amdgpu_ip_block_version { |
274 | enum amdgpu_ip_block_type type; | 217 | enum amd_ip_block_type type; |
275 | u32 major; | 218 | u32 major; |
276 | u32 minor; | 219 | u32 minor; |
277 | u32 rev; | 220 | u32 rev; |
278 | const struct amdgpu_ip_funcs *funcs; | 221 | const struct amd_ip_funcs *funcs; |
279 | }; | 222 | }; |
280 | 223 | ||
281 | int amdgpu_ip_block_version_cmp(struct amdgpu_device *adev, | 224 | int amdgpu_ip_block_version_cmp(struct amdgpu_device *adev, |
282 | enum amdgpu_ip_block_type type, | 225 | enum amd_ip_block_type type, |
283 | u32 major, u32 minor); | 226 | u32 major, u32 minor); |
284 | 227 | ||
285 | const struct amdgpu_ip_block_version * amdgpu_get_ip_block( | 228 | const struct amdgpu_ip_block_version * amdgpu_get_ip_block( |
286 | struct amdgpu_device *adev, | 229 | struct amdgpu_device *adev, |
287 | enum amdgpu_ip_block_type type); | 230 | enum amd_ip_block_type type); |
288 | 231 | ||
289 | /* provided by hw blocks that can move/clear data. e.g., gfx or sdma */ | 232 | /* provided by hw blocks that can move/clear data. e.g., gfx or sdma */ |
290 | struct amdgpu_buffer_funcs { | 233 | struct amdgpu_buffer_funcs { |