aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/gpu/drm/amd/amdgpu/amdgpu.h
diff options
context:
space:
mode:
authormonk.liu <monk.liu@amd.com>2015-09-23 01:49:58 -0400
committerAlex Deucher <alexander.deucher@amd.com>2015-09-23 17:23:45 -0400
commit5c3422b0b135b46c8dca9c1d909c1ae84f3561bd (patch)
tree98bb55830306ee8e9869dc5a474de3732ed6a86c /drivers/gpu/drm/amd/amdgpu/amdgpu.h
parent54ef0b5461c071050c61e501af5544842d61f40a (diff)
drm/amdgpu: sync ce and me with SWITCH_BUFFER(2)
we used to adopt wait_reg_mem to let CE wait before DE finish page updating, but from Tonga+, CE doesn't support wait_reg_mem package so this logic no longer works. so here is another approach to do same thing: Insert two of SWITCH_BUFFER at both front and end of vm_flush can guarantee that CE not go further to process IB_const before vm_flush done. Insert two of SWITCH_BUFFER also works on CI, so remove legency method to sync CE and ME v2: Insert double SWITCH_BUFFER at front of vm flush as well. Signed-off-by: monk.liu <monk.liu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu.h')
-rw-r--r--drivers/gpu/drm/amd/amdgpu/amdgpu.h2
1 files changed, 0 insertions, 2 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index 57b427f958da..6647fb26ef25 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -1202,8 +1202,6 @@ struct amdgpu_gfx {
1202 struct amdgpu_irq_src priv_inst_irq; 1202 struct amdgpu_irq_src priv_inst_irq;
1203 /* gfx status */ 1203 /* gfx status */
1204 uint32_t gfx_current_status; 1204 uint32_t gfx_current_status;
1205 /* sync signal for const engine */
1206 unsigned ce_sync_offs;
1207 /* ce ram size*/ 1205 /* ce ram size*/
1208 unsigned ce_ram_size; 1206 unsigned ce_ram_size;
1209}; 1207};