diff options
author | Rex Zhu <Rex.Zhu@amd.com> | 2015-08-25 03:57:43 -0400 |
---|---|---|
committer | Alex Deucher <alexander.deucher@amd.com> | 2015-12-21 16:42:04 -0500 |
commit | 3a2c788d95a24dc4cf720ddd19c1b115a03f41bf (patch) | |
tree | 19c30041aec015a4642ef754bc23cf4e6c47cea2 /drivers/gpu/drm/amd/amdgpu/amdgpu.h | |
parent | 0eb1c3d4084eeb6fb3a703f88d6ce1521f8fcdd1 (diff) |
drm/amdgpu: share struct amdgpu_pm_state_type with powerplay module
rename amdgpu_pm_state_type to amd_pm_state_type
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Acked-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu.h')
-rw-r--r-- | drivers/gpu/drm/amd/amdgpu/amdgpu.h | 28 |
1 files changed, 2 insertions, 26 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h index d4e9272b60e8..d454ad6ff798 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h | |||
@@ -1299,31 +1299,7 @@ struct amdgpu_wb { | |||
1299 | int amdgpu_wb_get(struct amdgpu_device *adev, u32 *wb); | 1299 | int amdgpu_wb_get(struct amdgpu_device *adev, u32 *wb); |
1300 | void amdgpu_wb_free(struct amdgpu_device *adev, u32 wb); | 1300 | void amdgpu_wb_free(struct amdgpu_device *adev, u32 wb); |
1301 | 1301 | ||
1302 | /** | ||
1303 | * struct amdgpu_pm - power management datas | ||
1304 | * It keeps track of various data needed to take powermanagement decision. | ||
1305 | */ | ||
1306 | 1302 | ||
1307 | enum amdgpu_pm_state_type { | ||
1308 | /* not used for dpm */ | ||
1309 | POWER_STATE_TYPE_DEFAULT, | ||
1310 | POWER_STATE_TYPE_POWERSAVE, | ||
1311 | /* user selectable states */ | ||
1312 | POWER_STATE_TYPE_BATTERY, | ||
1313 | POWER_STATE_TYPE_BALANCED, | ||
1314 | POWER_STATE_TYPE_PERFORMANCE, | ||
1315 | /* internal states */ | ||
1316 | POWER_STATE_TYPE_INTERNAL_UVD, | ||
1317 | POWER_STATE_TYPE_INTERNAL_UVD_SD, | ||
1318 | POWER_STATE_TYPE_INTERNAL_UVD_HD, | ||
1319 | POWER_STATE_TYPE_INTERNAL_UVD_HD2, | ||
1320 | POWER_STATE_TYPE_INTERNAL_UVD_MVC, | ||
1321 | POWER_STATE_TYPE_INTERNAL_BOOT, | ||
1322 | POWER_STATE_TYPE_INTERNAL_THERMAL, | ||
1323 | POWER_STATE_TYPE_INTERNAL_ACPI, | ||
1324 | POWER_STATE_TYPE_INTERNAL_ULV, | ||
1325 | POWER_STATE_TYPE_INTERNAL_3DPERF, | ||
1326 | }; | ||
1327 | 1303 | ||
1328 | enum amdgpu_int_thermal_type { | 1304 | enum amdgpu_int_thermal_type { |
1329 | THERMAL_TYPE_NONE, | 1305 | THERMAL_TYPE_NONE, |
@@ -1605,8 +1581,8 @@ struct amdgpu_dpm { | |||
1605 | /* vce requirements */ | 1581 | /* vce requirements */ |
1606 | struct amdgpu_vce_state vce_states[AMDGPU_MAX_VCE_LEVELS]; | 1582 | struct amdgpu_vce_state vce_states[AMDGPU_MAX_VCE_LEVELS]; |
1607 | enum amdgpu_vce_level vce_level; | 1583 | enum amdgpu_vce_level vce_level; |
1608 | enum amdgpu_pm_state_type state; | 1584 | enum amd_pm_state_type state; |
1609 | enum amdgpu_pm_state_type user_state; | 1585 | enum amd_pm_state_type user_state; |
1610 | u32 platform_caps; | 1586 | u32 platform_caps; |
1611 | u32 voltage_response_time; | 1587 | u32 voltage_response_time; |
1612 | u32 backbias_response_time; | 1588 | u32 backbias_response_time; |