diff options
author | Christian König <christian.koenig@amd.com> | 2016-06-01 04:47:36 -0400 |
---|---|---|
committer | Alex Deucher <alexander.deucher@amd.com> | 2016-07-07 14:51:23 -0400 |
commit | 1fbb2e929902ab6e161ebcfb2f4d6de1c4613473 (patch) | |
tree | 12738147113fb6731365826c1bd5e80d1cdf4079 /drivers/gpu/drm/amd/amdgpu/amdgpu.h | |
parent | 8d76001e0058aca129f599810d4f60e36fb36c5b (diff) |
drm/amdgpu: use a fence array for VMID management
Just wait for any fence to become available, instead
of waiting for the last entry of the LRU.
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu.h')
-rw-r--r-- | drivers/gpu/drm/amd/amdgpu/amdgpu.h | 10 |
1 files changed, 6 insertions, 4 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h index 922a20c972b1..c13023dded8f 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h | |||
@@ -597,10 +597,8 @@ int amdgpu_sync_resv(struct amdgpu_device *adev, | |||
597 | struct amdgpu_sync *sync, | 597 | struct amdgpu_sync *sync, |
598 | struct reservation_object *resv, | 598 | struct reservation_object *resv, |
599 | void *owner); | 599 | void *owner); |
600 | bool amdgpu_sync_is_idle(struct amdgpu_sync *sync, | 600 | struct fence *amdgpu_sync_peek_fence(struct amdgpu_sync *sync, |
601 | struct amdgpu_ring *ring); | 601 | struct amdgpu_ring *ring); |
602 | int amdgpu_sync_cycle_fences(struct amdgpu_sync *dst, struct amdgpu_sync *src, | ||
603 | struct fence *fence); | ||
604 | struct fence *amdgpu_sync_get_fence(struct amdgpu_sync *sync); | 602 | struct fence *amdgpu_sync_get_fence(struct amdgpu_sync *sync); |
605 | void amdgpu_sync_free(struct amdgpu_sync *sync); | 603 | void amdgpu_sync_free(struct amdgpu_sync *sync); |
606 | int amdgpu_sync_init(void); | 604 | int amdgpu_sync_init(void); |
@@ -909,6 +907,10 @@ struct amdgpu_vm_manager { | |||
909 | struct list_head ids_lru; | 907 | struct list_head ids_lru; |
910 | struct amdgpu_vm_id ids[AMDGPU_NUM_VM]; | 908 | struct amdgpu_vm_id ids[AMDGPU_NUM_VM]; |
911 | 909 | ||
910 | /* Handling of VM fences */ | ||
911 | u64 fence_context; | ||
912 | unsigned seqno[AMDGPU_MAX_RINGS]; | ||
913 | |||
912 | uint32_t max_pfn; | 914 | uint32_t max_pfn; |
913 | /* vram base address for page table entry */ | 915 | /* vram base address for page table entry */ |
914 | u64 vram_base_offset; | 916 | u64 vram_base_offset; |