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authorLinus Walleij <linus.walleij@linaro.org>2016-09-27 19:11:10 -0400
committerLinus Walleij <linus.walleij@linaro.org>2016-09-30 12:03:02 -0400
commit4e2678b540bbcd91b2135e13240baa7712eafa33 (patch)
tree98d008d70d16cb217a06c075fd498c6aeae90e83 /drivers/gpio
parent96b2cca64fa3e1a31b573bb308b2944c802aacf3 (diff)
gpio: stmpe: use BIT() macro
Avoid custom (1 << bits) shifting by consequently using the BIT() macro from <linux/bitops.h>. Reviewed-by: Patrice Chotard <patrice.chotard@st.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/gpio')
-rw-r--r--drivers/gpio/gpio-stmpe.c24
1 files changed, 12 insertions, 12 deletions
diff --git a/drivers/gpio/gpio-stmpe.c b/drivers/gpio/gpio-stmpe.c
index 432b2ee173c7..e7d422a6b90b 100644
--- a/drivers/gpio/gpio-stmpe.c
+++ b/drivers/gpio/gpio-stmpe.c
@@ -43,7 +43,7 @@ static int stmpe_gpio_get(struct gpio_chip *chip, unsigned offset)
43 struct stmpe_gpio *stmpe_gpio = gpiochip_get_data(chip); 43 struct stmpe_gpio *stmpe_gpio = gpiochip_get_data(chip);
44 struct stmpe *stmpe = stmpe_gpio->stmpe; 44 struct stmpe *stmpe = stmpe_gpio->stmpe;
45 u8 reg = stmpe->regs[STMPE_IDX_GPMR_LSB + (offset / 8)]; 45 u8 reg = stmpe->regs[STMPE_IDX_GPMR_LSB + (offset / 8)];
46 u8 mask = 1 << (offset % 8); 46 u8 mask = BIT(offset % 8);
47 int ret; 47 int ret;
48 48
49 ret = stmpe_reg_read(stmpe, reg); 49 ret = stmpe_reg_read(stmpe, reg);
@@ -59,7 +59,7 @@ static void stmpe_gpio_set(struct gpio_chip *chip, unsigned offset, int val)
59 struct stmpe *stmpe = stmpe_gpio->stmpe; 59 struct stmpe *stmpe = stmpe_gpio->stmpe;
60 int which = val ? STMPE_IDX_GPSR_LSB : STMPE_IDX_GPCR_LSB; 60 int which = val ? STMPE_IDX_GPSR_LSB : STMPE_IDX_GPCR_LSB;
61 u8 reg = stmpe->regs[which + (offset / 8)]; 61 u8 reg = stmpe->regs[which + (offset / 8)];
62 u8 mask = 1 << (offset % 8); 62 u8 mask = BIT(offset % 8);
63 63
64 /* 64 /*
65 * Some variants have single register for gpio set/clear functionality. 65 * Some variants have single register for gpio set/clear functionality.
@@ -77,7 +77,7 @@ static int stmpe_gpio_get_direction(struct gpio_chip *chip,
77 struct stmpe_gpio *stmpe_gpio = gpiochip_get_data(chip); 77 struct stmpe_gpio *stmpe_gpio = gpiochip_get_data(chip);
78 struct stmpe *stmpe = stmpe_gpio->stmpe; 78 struct stmpe *stmpe = stmpe_gpio->stmpe;
79 u8 reg = stmpe->regs[STMPE_IDX_GPDR_LSB] - (offset / 8); 79 u8 reg = stmpe->regs[STMPE_IDX_GPDR_LSB] - (offset / 8);
80 u8 mask = 1 << (offset % 8); 80 u8 mask = BIT(offset % 8);
81 int ret; 81 int ret;
82 82
83 ret = stmpe_reg_read(stmpe, reg); 83 ret = stmpe_reg_read(stmpe, reg);
@@ -93,7 +93,7 @@ static int stmpe_gpio_direction_output(struct gpio_chip *chip,
93 struct stmpe_gpio *stmpe_gpio = gpiochip_get_data(chip); 93 struct stmpe_gpio *stmpe_gpio = gpiochip_get_data(chip);
94 struct stmpe *stmpe = stmpe_gpio->stmpe; 94 struct stmpe *stmpe = stmpe_gpio->stmpe;
95 u8 reg = stmpe->regs[STMPE_IDX_GPDR_LSB + (offset / 8)]; 95 u8 reg = stmpe->regs[STMPE_IDX_GPDR_LSB + (offset / 8)];
96 u8 mask = 1 << (offset % 8); 96 u8 mask = BIT(offset % 8);
97 97
98 stmpe_gpio_set(chip, offset, val); 98 stmpe_gpio_set(chip, offset, val);
99 99
@@ -106,7 +106,7 @@ static int stmpe_gpio_direction_input(struct gpio_chip *chip,
106 struct stmpe_gpio *stmpe_gpio = gpiochip_get_data(chip); 106 struct stmpe_gpio *stmpe_gpio = gpiochip_get_data(chip);
107 struct stmpe *stmpe = stmpe_gpio->stmpe; 107 struct stmpe *stmpe = stmpe_gpio->stmpe;
108 u8 reg = stmpe->regs[STMPE_IDX_GPDR_LSB + (offset / 8)]; 108 u8 reg = stmpe->regs[STMPE_IDX_GPDR_LSB + (offset / 8)];
109 u8 mask = 1 << (offset % 8); 109 u8 mask = BIT(offset % 8);
110 110
111 return stmpe_set_bits(stmpe, reg, mask, 0); 111 return stmpe_set_bits(stmpe, reg, mask, 0);
112} 112}
@@ -116,10 +116,10 @@ static int stmpe_gpio_request(struct gpio_chip *chip, unsigned offset)
116 struct stmpe_gpio *stmpe_gpio = gpiochip_get_data(chip); 116 struct stmpe_gpio *stmpe_gpio = gpiochip_get_data(chip);
117 struct stmpe *stmpe = stmpe_gpio->stmpe; 117 struct stmpe *stmpe = stmpe_gpio->stmpe;
118 118
119 if (stmpe_gpio->norequest_mask & (1 << offset)) 119 if (stmpe_gpio->norequest_mask & BIT(offset))
120 return -EINVAL; 120 return -EINVAL;
121 121
122 return stmpe_set_altfunc(stmpe, 1 << offset, STMPE_BLOCK_GPIO); 122 return stmpe_set_altfunc(stmpe, BIT(offset), STMPE_BLOCK_GPIO);
123} 123}
124 124
125static const struct gpio_chip template_chip = { 125static const struct gpio_chip template_chip = {
@@ -140,7 +140,7 @@ static int stmpe_gpio_irq_set_type(struct irq_data *d, unsigned int type)
140 struct stmpe_gpio *stmpe_gpio = gpiochip_get_data(gc); 140 struct stmpe_gpio *stmpe_gpio = gpiochip_get_data(gc);
141 int offset = d->hwirq; 141 int offset = d->hwirq;
142 int regoffset = offset / 8; 142 int regoffset = offset / 8;
143 int mask = 1 << (offset % 8); 143 int mask = BIT(offset % 8);
144 144
145 if (type & IRQ_TYPE_LEVEL_LOW || type & IRQ_TYPE_LEVEL_HIGH) 145 if (type & IRQ_TYPE_LEVEL_LOW || type & IRQ_TYPE_LEVEL_HIGH)
146 return -EINVAL; 146 return -EINVAL;
@@ -218,7 +218,7 @@ static void stmpe_gpio_irq_mask(struct irq_data *d)
218 struct stmpe_gpio *stmpe_gpio = gpiochip_get_data(gc); 218 struct stmpe_gpio *stmpe_gpio = gpiochip_get_data(gc);
219 int offset = d->hwirq; 219 int offset = d->hwirq;
220 int regoffset = offset / 8; 220 int regoffset = offset / 8;
221 int mask = 1 << (offset % 8); 221 int mask = BIT(offset % 8);
222 222
223 stmpe_gpio->regs[REG_IE][regoffset] &= ~mask; 223 stmpe_gpio->regs[REG_IE][regoffset] &= ~mask;
224} 224}
@@ -230,7 +230,7 @@ static void stmpe_gpio_irq_unmask(struct irq_data *d)
230 struct stmpe *stmpe = stmpe_gpio->stmpe; 230 struct stmpe *stmpe = stmpe_gpio->stmpe;
231 int offset = d->hwirq; 231 int offset = d->hwirq;
232 int regoffset = offset / 8; 232 int regoffset = offset / 8;
233 int mask = 1 << (offset % 8); 233 int mask = BIT(offset % 8);
234 234
235 stmpe_gpio->regs[REG_IE][regoffset] |= mask; 235 stmpe_gpio->regs[REG_IE][regoffset] |= mask;
236 236
@@ -254,7 +254,7 @@ static void stmpe_dbg_show_one(struct seq_file *s,
254 bool val = !!stmpe_gpio_get(gc, offset); 254 bool val = !!stmpe_gpio_get(gc, offset);
255 u8 bank = offset / 8; 255 u8 bank = offset / 8;
256 u8 dir_reg = stmpe->regs[STMPE_IDX_GPDR_LSB + bank]; 256 u8 dir_reg = stmpe->regs[STMPE_IDX_GPDR_LSB + bank];
257 u8 mask = 1 << (offset % 8); 257 u8 mask = BIT(offset % 8);
258 int ret; 258 int ret;
259 u8 dir; 259 u8 dir;
260 260
@@ -401,7 +401,7 @@ static irqreturn_t stmpe_gpio_irq(int irq, void *dev)
401 line); 401 line);
402 402
403 handle_nested_irq(child_irq); 403 handle_nested_irq(child_irq);
404 stat &= ~(1 << bit); 404 stat &= ~BIT(bit);
405 } 405 }
406 406
407 /* 407 /*