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authorLinus Torvalds <torvalds@linux-foundation.org>2016-12-13 10:54:57 -0500
committerLinus Torvalds <torvalds@linux-foundation.org>2016-12-13 10:54:57 -0500
commit061ad5038ca5ac75419204b216bddc2806008ead (patch)
treeedd48af16a121d6a457f5e29119cac91b3a9c61c /drivers/gpio
parente7aa8c2eb11ba69b1b69099c3c7bd6be3087b0ba (diff)
parentacf1fcf77247efa01d7213f53082451f6c9c8f3b (diff)
Merge tag 'gpio-v4.10-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio
Pull GPIO updates from Luinus Walleij: "Bulk GPIO changes for the v4.10 kernel cycle: Core changes: - Simplify threaded interrupt handling: instead of passing numbed parameters to gpiochip_irqchip_add_chained() we create a new call: gpiochip_irqchip_add_nested() so the two types are clearly semantically different. Also make sure that all nested chips call gpiochip_set_nested_irqchip() which is necessary for IRQ resend to work properly if it happens. - Return error on seek operations for the chardev. - Clamp values set as part of gpio[d]_direction_output() so that anything != 0 will be send down to the driver as "1" not the value passed in. - ACPI can now support naming of GPIO lines, hogs and holes in the GPIO lists. New drivers: - The SX150x driver was deemed unfit for the GPIO subsystem and was moved over to a combined GPIO+pinctrl driver in the pinctrl subsystem. New features: - Various cleanups to various drivers" * tag 'gpio-v4.10-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio: (49 commits) gpio: merrifield: Implement gpio_get_direction callback gpio: merrifield: Add support for hardware debouncer gpio: chardev: Return error for seek operations gpio: arizona: Tidy up probe error path gpio: arizona: Remove pointless set of platform drvdata gpio: pl061: delete platform data handling gpio: pl061: move platform data into driver gpio: pl061: rename variable from chip to pl061 gpio: pl061: rename state container struct gpio: pl061: use local state for parent IRQ storage gpio: set explicit nesting on drivers gpio: simplify adding threaded interrupts gpio: vf610: use builtin_platform_driver gpio: axp209: use correct register for GPIO input status gpio: stmpe: fix interrupt handling bug gpio: em: depnd on ARCH_SHMOBILE gpio: zx: depend on ARCH_ZX gpio: x86: update config dependencies for x86 specific hardware gpio: mb86s7x: use builtin_platform_driver gpio: etraxfs: use builtin_platform_driver ...
Diffstat (limited to 'drivers/gpio')
-rw-r--r--drivers/gpio/Kconfig38
-rw-r--r--drivers/gpio/Makefile3
-rw-r--r--drivers/gpio/gpio-adnp.c12
-rw-r--r--drivers/gpio/gpio-altera-a10sr.c130
-rw-r--r--drivers/gpio/gpio-arizona.c9
-rw-r--r--drivers/gpio/gpio-axp209.c8
-rw-r--r--drivers/gpio/gpio-crystalcove.c6
-rw-r--r--drivers/gpio/gpio-davinci.c7
-rw-r--r--drivers/gpio/gpio-dln2.c1
-rw-r--r--drivers/gpio/gpio-etraxfs.c7
-rw-r--r--drivers/gpio/gpio-htc-egpio.c54
-rw-r--r--drivers/gpio/gpio-intel-mid.c7
-rw-r--r--drivers/gpio/gpio-max732x.c17
-rw-r--r--drivers/gpio/gpio-max77620.c11
-rw-r--r--drivers/gpio/gpio-mb86s7x.c6
-rw-r--r--drivers/gpio/gpio-mcp23s08.c17
-rw-r--r--drivers/gpio/gpio-merrifield.c33
-rw-r--r--drivers/gpio/gpio-mxs.c45
-rw-r--r--drivers/gpio/gpio-pca953x.c18
-rw-r--r--drivers/gpio/gpio-pcf857x.c11
-rw-r--r--drivers/gpio/gpio-pl061.c208
-rw-r--r--drivers/gpio/gpio-stmpe.c19
-rw-r--r--drivers/gpio/gpio-sx150x.c792
-rw-r--r--drivers/gpio/gpio-tc3589x.c17
-rw-r--r--drivers/gpio/gpio-vf610.c6
-rw-r--r--drivers/gpio/gpio-wcove.c6
-rw-r--r--drivers/gpio/gpiolib-acpi.c107
-rw-r--r--drivers/gpio/gpiolib-devprop.c67
-rw-r--r--drivers/gpio/gpiolib-of.c51
-rw-r--r--drivers/gpio/gpiolib.c107
-rw-r--r--drivers/gpio/gpiolib.h2
31 files changed, 670 insertions, 1152 deletions
diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig
index ed37e5908b91..d5d36549ecc1 100644
--- a/drivers/gpio/Kconfig
+++ b/drivers/gpio/Kconfig
@@ -167,7 +167,7 @@ config GPIO_DWAPB
167 167
168config GPIO_EM 168config GPIO_EM
169 tristate "Emma Mobile GPIO" 169 tristate "Emma Mobile GPIO"
170 depends on ARM && OF_GPIO 170 depends on (ARCH_EMEV2 || COMPILE_TEST) && OF_GPIO
171 help 171 help
172 Say yes here to support GPIO on Renesas Emma Mobile SoCs. 172 Say yes here to support GPIO on Renesas Emma Mobile SoCs.
173 173
@@ -451,7 +451,7 @@ config GPIO_VR41XX
451 451
452config GPIO_VX855 452config GPIO_VX855
453 tristate "VIA VX855/VX875 GPIO" 453 tristate "VIA VX855/VX875 GPIO"
454 depends on PCI 454 depends on (X86 || COMPILE_TEST) && PCI
455 select MFD_CORE 455 select MFD_CORE
456 select MFD_VX855 456 select MFD_VX855
457 help 457 help
@@ -520,6 +520,7 @@ config GPIO_ZYNQ
520 520
521config GPIO_ZX 521config GPIO_ZX
522 bool "ZTE ZX GPIO support" 522 bool "ZTE ZX GPIO support"
523 depends on ARCH_ZX || COMPILE_TEST
523 select GPIOLIB_IRQCHIP 524 select GPIOLIB_IRQCHIP
524 help 525 help
525 Say yes here to support the GPIO device on ZTE ZX SoCs. 526 Say yes here to support the GPIO device on ZTE ZX SoCs.
@@ -603,7 +604,7 @@ config GPIO_IT87
603 604
604config GPIO_SCH 605config GPIO_SCH
605 tristate "Intel SCH/TunnelCreek/Centerton/Quark X1000 GPIO" 606 tristate "Intel SCH/TunnelCreek/Centerton/Quark X1000 GPIO"
606 depends on PCI 607 depends on (X86 || COMPILE_TEST) && PCI
607 select MFD_CORE 608 select MFD_CORE
608 select LPC_SCH 609 select LPC_SCH
609 help 610 help
@@ -777,16 +778,13 @@ config GPIO_PCF857X
777 platform-neutral GPIO calls. 778 platform-neutral GPIO calls.
778 779
779config GPIO_SX150X 780config GPIO_SX150X
780 bool "Semtech SX150x I2C GPIO expander" 781 bool "Semtech SX150x I2C GPIO expander (deprecated)"
781 depends on I2C=y 782 depends on PINCTRL && I2C=y
782 select GPIOLIB_IRQCHIP 783 select PINCTRL_SX150X
783 default n 784 default n
784 help 785 help
785 Say yes here to provide support for Semtech SX150-series I2C 786 Say yes here to provide support for Semtech SX150x-series I2C
786 GPIO expanders. Compatible models include: 787 GPIO expanders. The GPIO driver was replaced by a Pinctrl version.
787
788 8 bits: sx1508q
789 16 bits: sx1509q
790 788
791config GPIO_TPIC2810 789config GPIO_TPIC2810
792 tristate "TPIC2810 8-Bit I2C GPO expander" 790 tristate "TPIC2810 8-Bit I2C GPO expander"
@@ -798,6 +796,7 @@ config GPIO_TPIC2810
798 796
799config GPIO_TS4900 797config GPIO_TS4900
800 tristate "Technologic Systems FPGA I2C GPIO" 798 tristate "Technologic Systems FPGA I2C GPIO"
799 depends on SOC_IMX6 || COMPILE_TEST
801 select REGMAP_I2C 800 select REGMAP_I2C
802 help 801 help
803 Say yes here to enabled the GPIO driver for Technologic's FPGA core. 802 Say yes here to enabled the GPIO driver for Technologic's FPGA core.
@@ -814,6 +813,14 @@ config GPIO_ADP5520
814 This option enables support for on-chip GPIO found 813 This option enables support for on-chip GPIO found
815 on Analog Devices ADP5520 PMICs. 814 on Analog Devices ADP5520 PMICs.
816 815
816config GPIO_ALTERA_A10SR
817 tristate "Altera Arria10 System Resource GPIO"
818 depends on MFD_ALTERA_A10SR
819 help
820 Driver for Arria10 Development Kit GPIO expansion which
821 includes reads of pushbuttons and DIP switches as well
822 as writes to LEDs.
823
817config GPIO_ARIZONA 824config GPIO_ARIZONA
818 tristate "Wolfson Microelectronics Arizona class devices" 825 tristate "Wolfson Microelectronics Arizona class devices"
819 depends on MFD_ARIZONA 826 depends on MFD_ARIZONA
@@ -822,7 +829,7 @@ config GPIO_ARIZONA
822 829
823config GPIO_CRYSTAL_COVE 830config GPIO_CRYSTAL_COVE
824 tristate "GPIO support for Crystal Cove PMIC" 831 tristate "GPIO support for Crystal Cove PMIC"
825 depends on INTEL_SOC_PMIC 832 depends on (X86 || COMPILE_TEST) && INTEL_SOC_PMIC
826 select GPIOLIB_IRQCHIP 833 select GPIOLIB_IRQCHIP
827 help 834 help
828 Support for GPIO pins on Crystal Cove PMIC. 835 Support for GPIO pins on Crystal Cove PMIC.
@@ -835,6 +842,7 @@ config GPIO_CRYSTAL_COVE
835 842
836config GPIO_CS5535 843config GPIO_CS5535
837 tristate "AMD CS5535/CS5536 GPIO support" 844 tristate "AMD CS5535/CS5536 GPIO support"
845 depends on X86 || MIPS || COMPILE_TEST
838 depends on MFD_CS5535 846 depends on MFD_CS5535
839 help 847 help
840 The AMD CS5535 and CS5536 southbridges support 28 GPIO pins that 848 The AMD CS5535 and CS5536 southbridges support 28 GPIO pins that
@@ -927,7 +935,7 @@ config GPIO_MAX77620
927 935
928config GPIO_MSIC 936config GPIO_MSIC
929 bool "Intel MSIC mixed signal gpio support" 937 bool "Intel MSIC mixed signal gpio support"
930 depends on MFD_INTEL_MSIC 938 depends on (X86 || COMPILE_TEST) && MFD_INTEL_MSIC
931 help 939 help
932 Enable support for GPIO on intel MSIC controllers found in 940 Enable support for GPIO on intel MSIC controllers found in
933 intel MID devices 941 intel MID devices
@@ -1028,7 +1036,7 @@ config GPIO_UCB1400
1028 1036
1029config GPIO_WHISKEY_COVE 1037config GPIO_WHISKEY_COVE
1030 tristate "GPIO support for Whiskey Cove PMIC" 1038 tristate "GPIO support for Whiskey Cove PMIC"
1031 depends on INTEL_SOC_PMIC 1039 depends on (X86 || COMPILE_TEST) && INTEL_SOC_PMIC
1032 select GPIOLIB_IRQCHIP 1040 select GPIOLIB_IRQCHIP
1033 help 1041 help
1034 Support for GPIO pins on Whiskey Cove PMIC. 1042 Support for GPIO pins on Whiskey Cove PMIC.
@@ -1067,6 +1075,7 @@ menu "PCI GPIO expanders"
1067 1075
1068config GPIO_AMD8111 1076config GPIO_AMD8111
1069 tristate "AMD 8111 GPIO driver" 1077 tristate "AMD 8111 GPIO driver"
1078 depends on X86 || COMPILE_TEST
1070 help 1079 help
1071 The AMD 8111 south bridge contains 32 GPIO pins which can be used. 1080 The AMD 8111 south bridge contains 32 GPIO pins which can be used.
1072 1081
@@ -1108,6 +1117,7 @@ config GPIO_MERRIFIELD
1108 1117
1109config GPIO_ML_IOH 1118config GPIO_ML_IOH
1110 tristate "OKI SEMICONDUCTOR ML7213 IOH GPIO support" 1119 tristate "OKI SEMICONDUCTOR ML7213 IOH GPIO support"
1120 depends on X86 || COMPILE_TEST
1111 select GENERIC_IRQ_CHIP 1121 select GENERIC_IRQ_CHIP
1112 help 1122 help
1113 ML7213 is companion chip for Intel Atom E6xx series. 1123 ML7213 is companion chip for Intel Atom E6xx series.
diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile
index d074c2299393..a7676b82de6f 100644
--- a/drivers/gpio/Makefile
+++ b/drivers/gpio/Makefile
@@ -5,6 +5,7 @@ ccflags-$(CONFIG_DEBUG_GPIO) += -DDEBUG
5obj-$(CONFIG_GPIOLIB) += devres.o 5obj-$(CONFIG_GPIOLIB) += devres.o
6obj-$(CONFIG_GPIOLIB) += gpiolib.o 6obj-$(CONFIG_GPIOLIB) += gpiolib.o
7obj-$(CONFIG_GPIOLIB) += gpiolib-legacy.o 7obj-$(CONFIG_GPIOLIB) += gpiolib-legacy.o
8obj-$(CONFIG_GPIOLIB) += gpiolib-devprop.o
8obj-$(CONFIG_OF_GPIO) += gpiolib-of.o 9obj-$(CONFIG_OF_GPIO) += gpiolib-of.o
9obj-$(CONFIG_GPIO_SYSFS) += gpiolib-sysfs.o 10obj-$(CONFIG_GPIO_SYSFS) += gpiolib-sysfs.o
10obj-$(CONFIG_GPIO_ACPI) += gpiolib-acpi.o 11obj-$(CONFIG_GPIO_ACPI) += gpiolib-acpi.o
@@ -24,6 +25,7 @@ obj-$(CONFIG_GPIO_ADNP) += gpio-adnp.o
24obj-$(CONFIG_GPIO_ADP5520) += gpio-adp5520.o 25obj-$(CONFIG_GPIO_ADP5520) += gpio-adp5520.o
25obj-$(CONFIG_GPIO_ADP5588) += gpio-adp5588.o 26obj-$(CONFIG_GPIO_ADP5588) += gpio-adp5588.o
26obj-$(CONFIG_GPIO_ALTERA) += gpio-altera.o 27obj-$(CONFIG_GPIO_ALTERA) += gpio-altera.o
28obj-$(CONFIG_GPIO_ALTERA_A10SR) += gpio-altera-a10sr.o
27obj-$(CONFIG_GPIO_AMD8111) += gpio-amd8111.o 29obj-$(CONFIG_GPIO_AMD8111) += gpio-amd8111.o
28obj-$(CONFIG_GPIO_AMDPT) += gpio-amdpt.o 30obj-$(CONFIG_GPIO_AMDPT) += gpio-amdpt.o
29obj-$(CONFIG_GPIO_ARIZONA) += gpio-arizona.o 31obj-$(CONFIG_GPIO_ARIZONA) += gpio-arizona.o
@@ -102,7 +104,6 @@ obj-$(CONFIG_GPIO_SPEAR_SPICS) += gpio-spear-spics.o
102obj-$(CONFIG_GPIO_STA2X11) += gpio-sta2x11.o 104obj-$(CONFIG_GPIO_STA2X11) += gpio-sta2x11.o
103obj-$(CONFIG_GPIO_STMPE) += gpio-stmpe.o 105obj-$(CONFIG_GPIO_STMPE) += gpio-stmpe.o
104obj-$(CONFIG_GPIO_STP_XWAY) += gpio-stp-xway.o 106obj-$(CONFIG_GPIO_STP_XWAY) += gpio-stp-xway.o
105obj-$(CONFIG_GPIO_SX150X) += gpio-sx150x.o
106obj-$(CONFIG_GPIO_SYSCON) += gpio-syscon.o 107obj-$(CONFIG_GPIO_SYSCON) += gpio-syscon.o
107obj-$(CONFIG_GPIO_TB10X) += gpio-tb10x.o 108obj-$(CONFIG_GPIO_TB10X) += gpio-tb10x.o
108obj-$(CONFIG_GPIO_TC3589X) += gpio-tc3589x.o 109obj-$(CONFIG_GPIO_TC3589X) += gpio-tc3589x.o
diff --git a/drivers/gpio/gpio-adnp.c b/drivers/gpio/gpio-adnp.c
index 8ff7b0d3eac6..89863ea25de1 100644
--- a/drivers/gpio/gpio-adnp.c
+++ b/drivers/gpio/gpio-adnp.c
@@ -468,17 +468,19 @@ static int adnp_irq_setup(struct adnp *adnp)
468 return err; 468 return err;
469 } 469 }
470 470
471 err = gpiochip_irqchip_add(chip, 471 err = gpiochip_irqchip_add_nested(chip,
472 &adnp_irq_chip, 472 &adnp_irq_chip,
473 0, 473 0,
474 handle_simple_irq, 474 handle_simple_irq,
475 IRQ_TYPE_NONE); 475 IRQ_TYPE_NONE);
476 if (err) { 476 if (err) {
477 dev_err(chip->parent, 477 dev_err(chip->parent,
478 "could not connect irqchip to gpiochip\n"); 478 "could not connect irqchip to gpiochip\n");
479 return err; 479 return err;
480 } 480 }
481 481
482 gpiochip_set_nested_irqchip(chip, &adnp_irq_chip, adnp->client->irq);
483
482 return 0; 484 return 0;
483} 485}
484 486
diff --git a/drivers/gpio/gpio-altera-a10sr.c b/drivers/gpio/gpio-altera-a10sr.c
new file mode 100644
index 000000000000..9e1a138fed53
--- /dev/null
+++ b/drivers/gpio/gpio-altera-a10sr.c
@@ -0,0 +1,130 @@
1/*
2 * Copyright Intel Corporation (C) 2014-2016. All Rights Reserved
3 *
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms and conditions of the GNU General Public License,
6 * version 2, as published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope it will be useful, but WITHOUT
9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
11 * more details.
12 *
13 * You should have received a copy of the GNU General Public License along with
14 * this program. If not, see <http://www.gnu.org/licenses/>.
15 *
16 * GPIO driver for Altera Arria10 MAX5 System Resource Chip
17 *
18 * Adapted from gpio-tps65910.c
19 */
20
21#include <linux/gpio/driver.h>
22#include <linux/mfd/altera-a10sr.h>
23#include <linux/module.h>
24
25/**
26 * struct altr_a10sr_gpio - Altera Max5 GPIO device private data structure
27 * @gp: : instance of the gpio_chip
28 * @regmap: the regmap from the parent device.
29 */
30struct altr_a10sr_gpio {
31 struct gpio_chip gp;
32 struct regmap *regmap;
33};
34
35static int altr_a10sr_gpio_get(struct gpio_chip *chip, unsigned int offset)
36{
37 struct altr_a10sr_gpio *gpio = gpiochip_get_data(chip);
38 int ret, val;
39
40 ret = regmap_read(gpio->regmap, ALTR_A10SR_PBDSW_REG, &val);
41 if (ret < 0)
42 return ret;
43
44 return !!(val & BIT(offset - ALTR_A10SR_LED_VALID_SHIFT));
45}
46
47static void altr_a10sr_gpio_set(struct gpio_chip *chip, unsigned int offset,
48 int value)
49{
50 struct altr_a10sr_gpio *gpio = gpiochip_get_data(chip);
51
52 regmap_update_bits(gpio->regmap, ALTR_A10SR_LED_REG,
53 BIT(ALTR_A10SR_LED_VALID_SHIFT + offset),
54 value ? BIT(ALTR_A10SR_LED_VALID_SHIFT + offset)
55 : 0);
56}
57
58static int altr_a10sr_gpio_direction_input(struct gpio_chip *gc,
59 unsigned int nr)
60{
61 if (nr >= (ALTR_A10SR_IN_VALID_RANGE_LO - ALTR_A10SR_LED_VALID_SHIFT))
62 return 0;
63 return -EINVAL;
64}
65
66static int altr_a10sr_gpio_direction_output(struct gpio_chip *gc,
67 unsigned int nr, int value)
68{
69 if (nr <= (ALTR_A10SR_OUT_VALID_RANGE_HI - ALTR_A10SR_LED_VALID_SHIFT))
70 return 0;
71 return -EINVAL;
72}
73
74static struct gpio_chip altr_a10sr_gc = {
75 .label = "altr_a10sr_gpio",
76 .owner = THIS_MODULE,
77 .get = altr_a10sr_gpio_get,
78 .set = altr_a10sr_gpio_set,
79 .direction_input = altr_a10sr_gpio_direction_input,
80 .direction_output = altr_a10sr_gpio_direction_output,
81 .can_sleep = true,
82 .ngpio = 12,
83 .base = -1,
84};
85
86static int altr_a10sr_gpio_probe(struct platform_device *pdev)
87{
88 struct altr_a10sr_gpio *gpio;
89 int ret;
90 struct altr_a10sr *a10sr = dev_get_drvdata(pdev->dev.parent);
91
92 gpio = devm_kzalloc(&pdev->dev, sizeof(*gpio), GFP_KERNEL);
93 if (!gpio)
94 return -ENOMEM;
95
96 gpio->regmap = a10sr->regmap;
97
98 gpio->gp = altr_a10sr_gc;
99
100 gpio->gp.of_node = pdev->dev.of_node;
101
102 ret = devm_gpiochip_add_data(&pdev->dev, &gpio->gp, gpio);
103 if (ret < 0) {
104 dev_err(&pdev->dev, "Could not register gpiochip, %d\n", ret);
105 return ret;
106 }
107
108 platform_set_drvdata(pdev, gpio);
109
110 return 0;
111}
112
113static const struct of_device_id altr_a10sr_gpio_of_match[] = {
114 { .compatible = "altr,a10sr-gpio" },
115 { },
116};
117MODULE_DEVICE_TABLE(of, altr_a10sr_gpio_of_match);
118
119static struct platform_driver altr_a10sr_gpio_driver = {
120 .probe = altr_a10sr_gpio_probe,
121 .driver = {
122 .name = "altr_a10sr_gpio",
123 .of_match_table = of_match_ptr(altr_a10sr_gpio_of_match),
124 },
125};
126module_platform_driver(altr_a10sr_gpio_driver);
127
128MODULE_LICENSE("GPL v2");
129MODULE_AUTHOR("Thor Thayer <tthayer@opensource.altera.com>");
130MODULE_DESCRIPTION("Altera Arria10 System Resource Chip GPIO");
diff --git a/drivers/gpio/gpio-arizona.c b/drivers/gpio/gpio-arizona.c
index 482462889c8f..1f91557717a6 100644
--- a/drivers/gpio/gpio-arizona.c
+++ b/drivers/gpio/gpio-arizona.c
@@ -137,15 +137,10 @@ static int arizona_gpio_probe(struct platform_device *pdev)
137 if (ret < 0) { 137 if (ret < 0) {
138 dev_err(&pdev->dev, "Could not register gpiochip, %d\n", 138 dev_err(&pdev->dev, "Could not register gpiochip, %d\n",
139 ret); 139 ret);
140 goto err; 140 return ret;
141 } 141 }
142 142
143 platform_set_drvdata(pdev, arizona_gpio); 143 return 0;
144
145 return ret;
146
147err:
148 return ret;
149} 144}
150 145
151static struct platform_driver arizona_gpio_driver = { 146static struct platform_driver arizona_gpio_driver = {
diff --git a/drivers/gpio/gpio-axp209.c b/drivers/gpio/gpio-axp209.c
index d9c2a517c6df..4a346b7b4172 100644
--- a/drivers/gpio/gpio-axp209.c
+++ b/drivers/gpio/gpio-axp209.c
@@ -64,13 +64,9 @@ static int axp20x_gpio_get(struct gpio_chip *chip, unsigned offset)
64{ 64{
65 struct axp20x_gpio *gpio = gpiochip_get_data(chip); 65 struct axp20x_gpio *gpio = gpiochip_get_data(chip);
66 unsigned int val; 66 unsigned int val;
67 int reg, ret; 67 int ret;
68
69 reg = axp20x_gpio_get_reg(offset);
70 if (reg < 0)
71 return reg;
72 68
73 ret = regmap_read(gpio->regmap, reg, &val); 69 ret = regmap_read(gpio->regmap, AXP20X_GPIO20_SS, &val);
74 if (ret) 70 if (ret)
75 return ret; 71 return ret;
76 72
diff --git a/drivers/gpio/gpio-crystalcove.c b/drivers/gpio/gpio-crystalcove.c
index 7c446d118cd6..2197368cc899 100644
--- a/drivers/gpio/gpio-crystalcove.c
+++ b/drivers/gpio/gpio-crystalcove.c
@@ -351,8 +351,8 @@ static int crystalcove_gpio_probe(struct platform_device *pdev)
351 return retval; 351 return retval;
352 } 352 }
353 353
354 gpiochip_irqchip_add(&cg->chip, &crystalcove_irqchip, 0, 354 gpiochip_irqchip_add_nested(&cg->chip, &crystalcove_irqchip, 0,
355 handle_simple_irq, IRQ_TYPE_NONE); 355 handle_simple_irq, IRQ_TYPE_NONE);
356 356
357 retval = request_threaded_irq(irq, NULL, crystalcove_gpio_irq_handler, 357 retval = request_threaded_irq(irq, NULL, crystalcove_gpio_irq_handler,
358 IRQF_ONESHOT, KBUILD_MODNAME, cg); 358 IRQF_ONESHOT, KBUILD_MODNAME, cg);
@@ -362,6 +362,8 @@ static int crystalcove_gpio_probe(struct platform_device *pdev)
362 return retval; 362 return retval;
363 } 363 }
364 364
365 gpiochip_set_nested_irqchip(&cg->chip, &crystalcove_irqchip, irq);
366
365 return 0; 367 return 0;
366} 368}
367 369
diff --git a/drivers/gpio/gpio-davinci.c b/drivers/gpio/gpio-davinci.c
index dd262f00295d..9191056548fe 100644
--- a/drivers/gpio/gpio-davinci.c
+++ b/drivers/gpio/gpio-davinci.c
@@ -40,6 +40,7 @@ struct davinci_gpio_regs {
40typedef struct irq_chip *(*gpio_get_irq_chip_cb_t)(unsigned int irq); 40typedef struct irq_chip *(*gpio_get_irq_chip_cb_t)(unsigned int irq);
41 41
42#define BINTEN 0x8 /* GPIO Interrupt Per-Bank Enable Register */ 42#define BINTEN 0x8 /* GPIO Interrupt Per-Bank Enable Register */
43#define MAX_LABEL_SIZE 20
43 44
44static void __iomem *gpio_base; 45static void __iomem *gpio_base;
45 46
@@ -201,6 +202,7 @@ static int davinci_gpio_probe(struct platform_device *pdev)
201 struct davinci_gpio_regs __iomem *regs; 202 struct davinci_gpio_regs __iomem *regs;
202 struct device *dev = &pdev->dev; 203 struct device *dev = &pdev->dev;
203 struct resource *res; 204 struct resource *res;
205 char label[MAX_LABEL_SIZE];
204 206
205 pdata = davinci_gpio_get_pdata(pdev); 207 pdata = davinci_gpio_get_pdata(pdev);
206 if (!pdata) { 208 if (!pdata) {
@@ -237,7 +239,10 @@ static int davinci_gpio_probe(struct platform_device *pdev)
237 return PTR_ERR(gpio_base); 239 return PTR_ERR(gpio_base);
238 240
239 for (i = 0, base = 0; base < ngpio; i++, base += 32) { 241 for (i = 0, base = 0; base < ngpio; i++, base += 32) {
240 chips[i].chip.label = "DaVinci"; 242 snprintf(label, MAX_LABEL_SIZE, "davinci_gpio.%d", i);
243 chips[i].chip.label = devm_kstrdup(dev, label, GFP_KERNEL);
244 if (!chips[i].chip.label)
245 return -ENOMEM;
241 246
242 chips[i].chip.direction_input = davinci_direction_in; 247 chips[i].chip.direction_input = davinci_direction_in;
243 chips[i].chip.get = davinci_gpio_get; 248 chips[i].chip.get = davinci_gpio_get;
diff --git a/drivers/gpio/gpio-dln2.c b/drivers/gpio/gpio-dln2.c
index f7a60a441e95..5d38b08d1ee2 100644
--- a/drivers/gpio/gpio-dln2.c
+++ b/drivers/gpio/gpio-dln2.c
@@ -467,7 +467,6 @@ static int dln2_gpio_probe(struct platform_device *pdev)
467 dln2->gpio.base = -1; 467 dln2->gpio.base = -1;
468 dln2->gpio.ngpio = pins; 468 dln2->gpio.ngpio = pins;
469 dln2->gpio.can_sleep = true; 469 dln2->gpio.can_sleep = true;
470 dln2->gpio.irq_not_threaded = true;
471 dln2->gpio.set = dln2_gpio_set; 470 dln2->gpio.set = dln2_gpio_set;
472 dln2->gpio.get = dln2_gpio_get; 471 dln2->gpio.get = dln2_gpio_get;
473 dln2->gpio.request = dln2_gpio_request; 472 dln2->gpio.request = dln2_gpio_request;
diff --git a/drivers/gpio/gpio-etraxfs.c b/drivers/gpio/gpio-etraxfs.c
index 00b022c9acb3..a254d5b07b94 100644
--- a/drivers/gpio/gpio-etraxfs.c
+++ b/drivers/gpio/gpio-etraxfs.c
@@ -471,9 +471,4 @@ static struct platform_driver etraxfs_gpio_driver = {
471 .probe = etraxfs_gpio_probe, 471 .probe = etraxfs_gpio_probe,
472}; 472};
473 473
474static int __init etraxfs_gpio_init(void) 474builtin_platform_driver(etraxfs_gpio_driver);
475{
476 return platform_driver_register(&etraxfs_gpio_driver);
477}
478
479device_initcall(etraxfs_gpio_init);
diff --git a/drivers/gpio/gpio-htc-egpio.c b/drivers/gpio/gpio-htc-egpio.c
index 0b4df6051097..271356effb2e 100644
--- a/drivers/gpio/gpio-htc-egpio.c
+++ b/drivers/gpio/gpio-htc-egpio.c
@@ -17,7 +17,7 @@
17#include <linux/platform_data/gpio-htc-egpio.h> 17#include <linux/platform_data/gpio-htc-egpio.h>
18#include <linux/platform_device.h> 18#include <linux/platform_device.h>
19#include <linux/slab.h> 19#include <linux/slab.h>
20#include <linux/module.h> 20#include <linux/init.h>
21 21
22struct egpio_chip { 22struct egpio_chip {
23 int reg_start; 23 int reg_start;
@@ -160,10 +160,14 @@ static int egpio_get(struct gpio_chip *chip, unsigned offset)
160 bit = egpio_bit(ei, offset); 160 bit = egpio_bit(ei, offset);
161 reg = egpio->reg_start + egpio_pos(ei, offset); 161 reg = egpio->reg_start + egpio_pos(ei, offset);
162 162
163 value = egpio_readw(ei, reg); 163 if (test_bit(offset, &egpio->is_out)) {
164 pr_debug("readw(%p + %x) = %x\n", 164 return !!(egpio->cached_values & (1 << offset));
165 ei->base_addr, reg << ei->bus_shift, value); 165 } else {
166 return !!(value & bit); 166 value = egpio_readw(ei, reg);
167 pr_debug("readw(%p + %x) = %x\n",
168 ei->base_addr, reg << ei->bus_shift, value);
169 return !!(value & bit);
170 }
167} 171}
168 172
169static int egpio_direction_input(struct gpio_chip *chip, unsigned offset) 173static int egpio_direction_input(struct gpio_chip *chip, unsigned offset)
@@ -225,6 +229,15 @@ static int egpio_direction_output(struct gpio_chip *chip,
225 } 229 }
226} 230}
227 231
232static int egpio_get_direction(struct gpio_chip *chip, unsigned offset)
233{
234 struct egpio_chip *egpio;
235
236 egpio = gpiochip_get_data(chip);
237
238 return !test_bit(offset, &egpio->is_out);
239}
240
228static void egpio_write_cache(struct egpio_info *ei) 241static void egpio_write_cache(struct egpio_info *ei)
229{ 242{
230 int i; 243 int i;
@@ -327,6 +340,7 @@ static int __init egpio_probe(struct platform_device *pdev)
327 chip->set = egpio_set; 340 chip->set = egpio_set;
328 chip->direction_input = egpio_direction_input; 341 chip->direction_input = egpio_direction_input;
329 chip->direction_output = egpio_direction_output; 342 chip->direction_output = egpio_direction_output;
343 chip->get_direction = egpio_get_direction;
330 chip->base = pdata->chip[i].gpio_base; 344 chip->base = pdata->chip[i].gpio_base;
331 chip->ngpio = pdata->chip[i].num_gpios; 345 chip->ngpio = pdata->chip[i].num_gpios;
332 346
@@ -367,24 +381,6 @@ fail:
367 return ret; 381 return ret;
368} 382}
369 383
370static int __exit egpio_remove(struct platform_device *pdev)
371{
372 struct egpio_info *ei = platform_get_drvdata(pdev);
373 unsigned int irq, irq_end;
374
375 if (ei->chained_irq) {
376 irq_end = ei->irq_start + ei->nirqs;
377 for (irq = ei->irq_start; irq < irq_end; irq++) {
378 irq_set_chip_and_handler(irq, NULL, NULL);
379 irq_set_status_flags(irq, IRQ_NOREQUEST | IRQ_NOPROBE);
380 }
381 irq_set_chained_handler(ei->chained_irq, NULL);
382 device_init_wakeup(&pdev->dev, 0);
383 }
384
385 return 0;
386}
387
388#ifdef CONFIG_PM 384#ifdef CONFIG_PM
389static int egpio_suspend(struct platform_device *pdev, pm_message_t state) 385static int egpio_suspend(struct platform_device *pdev, pm_message_t state)
390{ 386{
@@ -416,8 +412,8 @@ static int egpio_resume(struct platform_device *pdev)
416static struct platform_driver egpio_driver = { 412static struct platform_driver egpio_driver = {
417 .driver = { 413 .driver = {
418 .name = "htc-egpio", 414 .name = "htc-egpio",
415 .suppress_bind_attrs = true,
419 }, 416 },
420 .remove = __exit_p(egpio_remove),
421 .suspend = egpio_suspend, 417 .suspend = egpio_suspend,
422 .resume = egpio_resume, 418 .resume = egpio_resume,
423}; 419};
@@ -426,15 +422,5 @@ static int __init egpio_init(void)
426{ 422{
427 return platform_driver_probe(&egpio_driver, egpio_probe); 423 return platform_driver_probe(&egpio_driver, egpio_probe);
428} 424}
429
430static void __exit egpio_exit(void)
431{
432 platform_driver_unregister(&egpio_driver);
433}
434
435/* start early for dependencies */ 425/* start early for dependencies */
436subsys_initcall(egpio_init); 426subsys_initcall(egpio_init);
437module_exit(egpio_exit)
438
439MODULE_LICENSE("GPL");
440MODULE_AUTHOR("Kevin O'Connor <kevin@koconnor.net>");
diff --git a/drivers/gpio/gpio-intel-mid.c b/drivers/gpio/gpio-intel-mid.c
index 164de64b11fc..a1e44c221f66 100644
--- a/drivers/gpio/gpio-intel-mid.c
+++ b/drivers/gpio/gpio-intel-mid.c
@@ -421,9 +421,4 @@ static struct pci_driver intel_gpio_driver = {
421 }, 421 },
422}; 422};
423 423
424static int __init intel_gpio_init(void) 424builtin_pci_driver(intel_gpio_driver);
425{
426 return pci_register_driver(&intel_gpio_driver);
427}
428
429device_initcall(intel_gpio_init);
diff --git a/drivers/gpio/gpio-max732x.c b/drivers/gpio/gpio-max732x.c
index a9aaf9d822b4..4ea4c6a1313b 100644
--- a/drivers/gpio/gpio-max732x.c
+++ b/drivers/gpio/gpio-max732x.c
@@ -520,20 +520,19 @@ static int max732x_irq_setup(struct max732x_chip *chip,
520 client->irq); 520 client->irq);
521 return ret; 521 return ret;
522 } 522 }
523 ret = gpiochip_irqchip_add(&chip->gpio_chip, 523 ret = gpiochip_irqchip_add_nested(&chip->gpio_chip,
524 &max732x_irq_chip, 524 &max732x_irq_chip,
525 irq_base, 525 irq_base,
526 handle_simple_irq, 526 handle_simple_irq,
527 IRQ_TYPE_NONE); 527 IRQ_TYPE_NONE);
528 if (ret) { 528 if (ret) {
529 dev_err(&client->dev, 529 dev_err(&client->dev,
530 "could not connect irqchip to gpiochip\n"); 530 "could not connect irqchip to gpiochip\n");
531 return ret; 531 return ret;
532 } 532 }
533 gpiochip_set_chained_irqchip(&chip->gpio_chip, 533 gpiochip_set_nested_irqchip(&chip->gpio_chip,
534 &max732x_irq_chip, 534 &max732x_irq_chip,
535 client->irq, 535 client->irq);
536 NULL);
537 } 536 }
538 537
539 return 0; 538 return 0;
diff --git a/drivers/gpio/gpio-max77620.c b/drivers/gpio/gpio-max77620.c
index b46b436cb97f..ec8de4190db9 100644
--- a/drivers/gpio/gpio-max77620.c
+++ b/drivers/gpio/gpio-max77620.c
@@ -21,9 +21,6 @@ struct max77620_gpio {
21 struct gpio_chip gpio_chip; 21 struct gpio_chip gpio_chip;
22 struct regmap *rmap; 22 struct regmap *rmap;
23 struct device *dev; 23 struct device *dev;
24 int gpio_irq;
25 int irq_base;
26 int gpio_base;
27}; 24};
28 25
29static const struct regmap_irq max77620_gpio_irqs[] = { 26static const struct regmap_irq max77620_gpio_irqs[] = {
@@ -254,7 +251,6 @@ static int max77620_gpio_probe(struct platform_device *pdev)
254 251
255 mgpio->rmap = chip->rmap; 252 mgpio->rmap = chip->rmap;
256 mgpio->dev = &pdev->dev; 253 mgpio->dev = &pdev->dev;
257 mgpio->gpio_irq = gpio_irq;
258 254
259 mgpio->gpio_chip.label = pdev->name; 255 mgpio->gpio_chip.label = pdev->name;
260 mgpio->gpio_chip.parent = &pdev->dev; 256 mgpio->gpio_chip.parent = &pdev->dev;
@@ -268,7 +264,6 @@ static int max77620_gpio_probe(struct platform_device *pdev)
268 mgpio->gpio_chip.ngpio = MAX77620_GPIO_NR; 264 mgpio->gpio_chip.ngpio = MAX77620_GPIO_NR;
269 mgpio->gpio_chip.can_sleep = 1; 265 mgpio->gpio_chip.can_sleep = 1;
270 mgpio->gpio_chip.base = -1; 266 mgpio->gpio_chip.base = -1;
271 mgpio->irq_base = -1;
272#ifdef CONFIG_OF_GPIO 267#ifdef CONFIG_OF_GPIO
273 mgpio->gpio_chip.of_node = pdev->dev.parent->of_node; 268 mgpio->gpio_chip.of_node = pdev->dev.parent->of_node;
274#endif 269#endif
@@ -281,9 +276,8 @@ static int max77620_gpio_probe(struct platform_device *pdev)
281 return ret; 276 return ret;
282 } 277 }
283 278
284 mgpio->gpio_base = mgpio->gpio_chip.base; 279 ret = devm_regmap_add_irq_chip(&pdev->dev, chip->rmap, gpio_irq,
285 ret = devm_regmap_add_irq_chip(&pdev->dev, chip->rmap, mgpio->gpio_irq, 280 IRQF_ONESHOT, -1,
286 IRQF_ONESHOT, mgpio->irq_base,
287 &max77620_gpio_irq_chip, 281 &max77620_gpio_irq_chip,
288 &chip->gpio_irq_data); 282 &chip->gpio_irq_data);
289 if (ret < 0) { 283 if (ret < 0) {
@@ -296,6 +290,7 @@ static int max77620_gpio_probe(struct platform_device *pdev)
296 290
297static const struct platform_device_id max77620_gpio_devtype[] = { 291static const struct platform_device_id max77620_gpio_devtype[] = {
298 { .name = "max77620-gpio", }, 292 { .name = "max77620-gpio", },
293 { .name = "max20024-gpio", },
299 {}, 294 {},
300}; 295};
301MODULE_DEVICE_TABLE(platform, max77620_gpio_devtype); 296MODULE_DEVICE_TABLE(platform, max77620_gpio_devtype);
diff --git a/drivers/gpio/gpio-mb86s7x.c b/drivers/gpio/gpio-mb86s7x.c
index d55af50e7034..ffb73f688ae1 100644
--- a/drivers/gpio/gpio-mb86s7x.c
+++ b/drivers/gpio/gpio-mb86s7x.c
@@ -217,8 +217,4 @@ static struct platform_driver mb86s70_gpio_driver = {
217 .remove = mb86s70_gpio_remove, 217 .remove = mb86s70_gpio_remove,
218}; 218};
219 219
220static int __init mb86s70_gpio_init(void) 220builtin_platform_driver(mb86s70_gpio_driver);
221{
222 return platform_driver_register(&mb86s70_gpio_driver);
223}
224device_initcall(mb86s70_gpio_init);
diff --git a/drivers/gpio/gpio-mcp23s08.c b/drivers/gpio/gpio-mcp23s08.c
index 99d37b56c258..504550665091 100644
--- a/drivers/gpio/gpio-mcp23s08.c
+++ b/drivers/gpio/gpio-mcp23s08.c
@@ -473,21 +473,20 @@ static int mcp23s08_irq_setup(struct mcp23s08 *mcp)
473 return err; 473 return err;
474 } 474 }
475 475
476 err = gpiochip_irqchip_add(chip, 476 err = gpiochip_irqchip_add_nested(chip,
477 &mcp23s08_irq_chip, 477 &mcp23s08_irq_chip,
478 0, 478 0,
479 handle_simple_irq, 479 handle_simple_irq,
480 IRQ_TYPE_NONE); 480 IRQ_TYPE_NONE);
481 if (err) { 481 if (err) {
482 dev_err(chip->parent, 482 dev_err(chip->parent,
483 "could not connect irqchip to gpiochip: %d\n", err); 483 "could not connect irqchip to gpiochip: %d\n", err);
484 return err; 484 return err;
485 } 485 }
486 486
487 gpiochip_set_chained_irqchip(chip, 487 gpiochip_set_nested_irqchip(chip,
488 &mcp23s08_irq_chip, 488 &mcp23s08_irq_chip,
489 mcp->irq, 489 mcp->irq);
490 NULL);
491 490
492 return 0; 491 return 0;
493} 492}
diff --git a/drivers/gpio/gpio-merrifield.c b/drivers/gpio/gpio-merrifield.c
index 45b51278b8ee..69e0f4ace465 100644
--- a/drivers/gpio/gpio-merrifield.c
+++ b/drivers/gpio/gpio-merrifield.c
@@ -11,6 +11,7 @@
11 11
12#include <linux/bitops.h> 12#include <linux/bitops.h>
13#include <linux/gpio/driver.h> 13#include <linux/gpio/driver.h>
14#include <linux/gpio.h>
14#include <linux/init.h> 15#include <linux/init.h>
15#include <linux/interrupt.h> 16#include <linux/interrupt.h>
16#include <linux/io.h> 17#include <linux/io.h>
@@ -161,6 +162,34 @@ static int mrfld_gpio_direction_output(struct gpio_chip *chip,
161 return 0; 162 return 0;
162} 163}
163 164
165static int mrfld_gpio_get_direction(struct gpio_chip *chip, unsigned int offset)
166{
167 void __iomem *gpdr = gpio_reg(chip, offset, GPDR);
168
169 return (readl(gpdr) & BIT(offset % 32)) ? GPIOF_DIR_OUT : GPIOF_DIR_IN;
170}
171
172static int mrfld_gpio_set_debounce(struct gpio_chip *chip, unsigned int offset,
173 unsigned int debounce)
174{
175 struct mrfld_gpio *priv = gpiochip_get_data(chip);
176 void __iomem *gfbr = gpio_reg(chip, offset, GFBR);
177 unsigned long flags;
178 u32 value;
179
180 raw_spin_lock_irqsave(&priv->lock, flags);
181
182 if (debounce)
183 value = readl(gfbr) & ~BIT(offset % 32);
184 else
185 value = readl(gfbr) | BIT(offset % 32);
186 writel(value, gfbr);
187
188 raw_spin_unlock_irqrestore(&priv->lock, flags);
189
190 return 0;
191}
192
164static void mrfld_irq_ack(struct irq_data *d) 193static void mrfld_irq_ack(struct irq_data *d)
165{ 194{
166 struct mrfld_gpio *priv = irq_data_get_irq_chip_data(d); 195 struct mrfld_gpio *priv = irq_data_get_irq_chip_data(d);
@@ -384,6 +413,8 @@ static int mrfld_gpio_probe(struct pci_dev *pdev, const struct pci_device_id *id
384 priv->chip.direction_output = mrfld_gpio_direction_output; 413 priv->chip.direction_output = mrfld_gpio_direction_output;
385 priv->chip.get = mrfld_gpio_get; 414 priv->chip.get = mrfld_gpio_get;
386 priv->chip.set = mrfld_gpio_set; 415 priv->chip.set = mrfld_gpio_set;
416 priv->chip.get_direction = mrfld_gpio_get_direction;
417 priv->chip.set_debounce = mrfld_gpio_set_debounce;
387 priv->chip.base = gpio_base; 418 priv->chip.base = gpio_base;
388 priv->chip.ngpio = MRFLD_NGPIO; 419 priv->chip.ngpio = MRFLD_NGPIO;
389 priv->chip.can_sleep = false; 420 priv->chip.can_sleep = false;
@@ -411,7 +442,7 @@ static int mrfld_gpio_probe(struct pci_dev *pdev, const struct pci_device_id *id
411 } 442 }
412 443
413 retval = gpiochip_irqchip_add(&priv->chip, &mrfld_irqchip, irq_base, 444 retval = gpiochip_irqchip_add(&priv->chip, &mrfld_irqchip, irq_base,
414 handle_simple_irq, IRQ_TYPE_NONE); 445 handle_bad_irq, IRQ_TYPE_NONE);
415 if (retval) { 446 if (retval) {
416 dev_err(&pdev->dev, "could not connect irqchip to gpiochip\n"); 447 dev_err(&pdev->dev, "could not connect irqchip to gpiochip\n");
417 return retval; 448 return retval;
diff --git a/drivers/gpio/gpio-mxs.c b/drivers/gpio/gpio-mxs.c
index ee1724806f46..1e8fde8cb803 100644
--- a/drivers/gpio/gpio-mxs.c
+++ b/drivers/gpio/gpio-mxs.c
@@ -87,10 +87,15 @@ static int mxs_gpio_set_irq_type(struct irq_data *d, unsigned int type)
87 u32 val; 87 u32 val;
88 u32 pin_mask = 1 << d->hwirq; 88 u32 pin_mask = 1 << d->hwirq;
89 struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d); 89 struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d);
90 struct irq_chip_type *ct = irq_data_get_chip_type(d);
90 struct mxs_gpio_port *port = gc->private; 91 struct mxs_gpio_port *port = gc->private;
91 void __iomem *pin_addr; 92 void __iomem *pin_addr;
92 int edge; 93 int edge;
93 94
95 if (!(ct->type & type))
96 if (irq_setup_alt_chip(d, type))
97 return -EINVAL;
98
94 port->both_edges &= ~pin_mask; 99 port->both_edges &= ~pin_mask;
95 switch (type) { 100 switch (type) {
96 case IRQ_TYPE_EDGE_BOTH: 101 case IRQ_TYPE_EDGE_BOTH:
@@ -119,10 +124,13 @@ static int mxs_gpio_set_irq_type(struct irq_data *d, unsigned int type)
119 124
120 /* set level or edge */ 125 /* set level or edge */
121 pin_addr = port->base + PINCTRL_IRQLEV(port); 126 pin_addr = port->base + PINCTRL_IRQLEV(port);
122 if (edge & GPIO_INT_LEV_MASK) 127 if (edge & GPIO_INT_LEV_MASK) {
123 writel(pin_mask, pin_addr + MXS_SET); 128 writel(pin_mask, pin_addr + MXS_SET);
124 else 129 writel(pin_mask, port->base + PINCTRL_IRQEN(port) + MXS_SET);
130 } else {
125 writel(pin_mask, pin_addr + MXS_CLR); 131 writel(pin_mask, pin_addr + MXS_CLR);
132 writel(pin_mask, port->base + PINCTRL_PIN2IRQ(port) + MXS_SET);
133 }
126 134
127 /* set polarity */ 135 /* set polarity */
128 pin_addr = port->base + PINCTRL_IRQPOL(port); 136 pin_addr = port->base + PINCTRL_IRQPOL(port);
@@ -202,21 +210,37 @@ static int __init mxs_gpio_init_gc(struct mxs_gpio_port *port, int irq_base)
202 struct irq_chip_generic *gc; 210 struct irq_chip_generic *gc;
203 struct irq_chip_type *ct; 211 struct irq_chip_type *ct;
204 212
205 gc = irq_alloc_generic_chip("gpio-mxs", 1, irq_base, 213 gc = irq_alloc_generic_chip("gpio-mxs", 2, irq_base,
206 port->base, handle_level_irq); 214 port->base, handle_level_irq);
207 if (!gc) 215 if (!gc)
208 return -ENOMEM; 216 return -ENOMEM;
209 217
210 gc->private = port; 218 gc->private = port;
211 219
212 ct = gc->chip_types; 220 ct = &gc->chip_types[0];
221 ct->type = IRQ_TYPE_LEVEL_HIGH | IRQ_TYPE_LEVEL_LOW;
222 ct->chip.irq_ack = irq_gc_ack_set_bit;
223 ct->chip.irq_mask = irq_gc_mask_disable_reg;
224 ct->chip.irq_unmask = irq_gc_unmask_enable_reg;
225 ct->chip.irq_set_type = mxs_gpio_set_irq_type;
226 ct->chip.irq_set_wake = mxs_gpio_set_wake_irq;
227 ct->chip.flags = IRQCHIP_SET_TYPE_MASKED;
228 ct->regs.ack = PINCTRL_IRQSTAT(port) + MXS_CLR;
229 ct->regs.enable = PINCTRL_PIN2IRQ(port) + MXS_SET;
230 ct->regs.disable = PINCTRL_PIN2IRQ(port) + MXS_CLR;
231
232 ct = &gc->chip_types[1];
233 ct->type = IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING;
213 ct->chip.irq_ack = irq_gc_ack_set_bit; 234 ct->chip.irq_ack = irq_gc_ack_set_bit;
214 ct->chip.irq_mask = irq_gc_mask_clr_bit; 235 ct->chip.irq_mask = irq_gc_mask_disable_reg;
215 ct->chip.irq_unmask = irq_gc_mask_set_bit; 236 ct->chip.irq_unmask = irq_gc_unmask_enable_reg;
216 ct->chip.irq_set_type = mxs_gpio_set_irq_type; 237 ct->chip.irq_set_type = mxs_gpio_set_irq_type;
217 ct->chip.irq_set_wake = mxs_gpio_set_wake_irq; 238 ct->chip.irq_set_wake = mxs_gpio_set_wake_irq;
239 ct->chip.flags = IRQCHIP_SET_TYPE_MASKED;
218 ct->regs.ack = PINCTRL_IRQSTAT(port) + MXS_CLR; 240 ct->regs.ack = PINCTRL_IRQSTAT(port) + MXS_CLR;
219 ct->regs.mask = PINCTRL_IRQEN(port); 241 ct->regs.enable = PINCTRL_IRQEN(port) + MXS_SET;
242 ct->regs.disable = PINCTRL_IRQEN(port) + MXS_CLR;
243 ct->handler = handle_level_irq;
220 244
221 irq_setup_generic_chip(gc, IRQ_MSK(32), IRQ_GC_INIT_NESTED_LOCK, 245 irq_setup_generic_chip(gc, IRQ_MSK(32), IRQ_GC_INIT_NESTED_LOCK,
222 IRQ_NOREQUEST, 0); 246 IRQ_NOREQUEST, 0);
@@ -297,11 +321,8 @@ static int mxs_gpio_probe(struct platform_device *pdev)
297 } 321 }
298 port->base = base; 322 port->base = base;
299 323
300 /* 324 /* initially disable the interrupts */
301 * select the pin interrupt functionality but initially 325 writel(0, port->base + PINCTRL_PIN2IRQ(port));
302 * disable the interrupts
303 */
304 writel(~0U, port->base + PINCTRL_PIN2IRQ(port));
305 writel(0, port->base + PINCTRL_IRQEN(port)); 326 writel(0, port->base + PINCTRL_IRQEN(port));
306 327
307 /* clear address has to be used to clear IRQSTAT bits */ 328 /* clear address has to be used to clear IRQSTAT bits */
diff --git a/drivers/gpio/gpio-pca953x.c b/drivers/gpio/gpio-pca953x.c
index fe731f094257..d5d72d84b719 100644
--- a/drivers/gpio/gpio-pca953x.c
+++ b/drivers/gpio/gpio-pca953x.c
@@ -74,6 +74,7 @@ static const struct i2c_device_id pca953x_id[] = {
74 { "max7312", 16 | PCA953X_TYPE | PCA_INT, }, 74 { "max7312", 16 | PCA953X_TYPE | PCA_INT, },
75 { "max7313", 16 | PCA953X_TYPE | PCA_INT, }, 75 { "max7313", 16 | PCA953X_TYPE | PCA_INT, },
76 { "max7315", 8 | PCA953X_TYPE | PCA_INT, }, 76 { "max7315", 8 | PCA953X_TYPE | PCA_INT, },
77 { "max7318", 16 | PCA953X_TYPE | PCA_INT, },
77 { "pca6107", 8 | PCA953X_TYPE | PCA_INT, }, 78 { "pca6107", 8 | PCA953X_TYPE | PCA_INT, },
78 { "tca6408", 8 | PCA953X_TYPE | PCA_INT, }, 79 { "tca6408", 8 | PCA953X_TYPE | PCA_INT, },
79 { "tca6416", 16 | PCA953X_TYPE | PCA_INT, }, 80 { "tca6416", 16 | PCA953X_TYPE | PCA_INT, },
@@ -635,20 +636,20 @@ static int pca953x_irq_setup(struct pca953x_chip *chip,
635 return ret; 636 return ret;
636 } 637 }
637 638
638 ret = gpiochip_irqchip_add(&chip->gpio_chip, 639 ret = gpiochip_irqchip_add_nested(&chip->gpio_chip,
639 &pca953x_irq_chip, 640 &pca953x_irq_chip,
640 irq_base, 641 irq_base,
641 handle_simple_irq, 642 handle_simple_irq,
642 IRQ_TYPE_NONE); 643 IRQ_TYPE_NONE);
643 if (ret) { 644 if (ret) {
644 dev_err(&client->dev, 645 dev_err(&client->dev,
645 "could not connect irqchip to gpiochip\n"); 646 "could not connect irqchip to gpiochip\n");
646 return ret; 647 return ret;
647 } 648 }
648 649
649 gpiochip_set_chained_irqchip(&chip->gpio_chip, 650 gpiochip_set_nested_irqchip(&chip->gpio_chip,
650 &pca953x_irq_chip, 651 &pca953x_irq_chip,
651 client->irq, NULL); 652 client->irq);
652 } 653 }
653 654
654 return 0; 655 return 0;
@@ -907,6 +908,7 @@ static const struct of_device_id pca953x_dt_ids[] = {
907 { .compatible = "maxim,max7312", .data = OF_953X(16, PCA_INT), }, 908 { .compatible = "maxim,max7312", .data = OF_953X(16, PCA_INT), },
908 { .compatible = "maxim,max7313", .data = OF_953X(16, PCA_INT), }, 909 { .compatible = "maxim,max7313", .data = OF_953X(16, PCA_INT), },
909 { .compatible = "maxim,max7315", .data = OF_953X( 8, PCA_INT), }, 910 { .compatible = "maxim,max7315", .data = OF_953X( 8, PCA_INT), },
911 { .compatible = "maxim,max7318", .data = OF_953X(16, PCA_INT), },
910 912
911 { .compatible = "ti,pca6107", .data = OF_953X( 8, PCA_INT), }, 913 { .compatible = "ti,pca6107", .data = OF_953X( 8, PCA_INT), },
912 { .compatible = "ti,pca9536", .data = OF_953X( 4, 0), }, 914 { .compatible = "ti,pca9536", .data = OF_953X( 4, 0), },
diff --git a/drivers/gpio/gpio-pcf857x.c b/drivers/gpio/gpio-pcf857x.c
index d168410e2338..895af42a4513 100644
--- a/drivers/gpio/gpio-pcf857x.c
+++ b/drivers/gpio/gpio-pcf857x.c
@@ -378,9 +378,10 @@ static int pcf857x_probe(struct i2c_client *client,
378 378
379 /* Enable irqchip if we have an interrupt */ 379 /* Enable irqchip if we have an interrupt */
380 if (client->irq) { 380 if (client->irq) {
381 status = gpiochip_irqchip_add(&gpio->chip, &pcf857x_irq_chip, 381 status = gpiochip_irqchip_add_nested(&gpio->chip,
382 0, handle_level_irq, 382 &pcf857x_irq_chip,
383 IRQ_TYPE_NONE); 383 0, handle_level_irq,
384 IRQ_TYPE_NONE);
384 if (status) { 385 if (status) {
385 dev_err(&client->dev, "cannot add irqchip\n"); 386 dev_err(&client->dev, "cannot add irqchip\n");
386 goto fail; 387 goto fail;
@@ -393,8 +394,8 @@ static int pcf857x_probe(struct i2c_client *client,
393 if (status) 394 if (status)
394 goto fail; 395 goto fail;
395 396
396 gpiochip_set_chained_irqchip(&gpio->chip, &pcf857x_irq_chip, 397 gpiochip_set_nested_irqchip(&gpio->chip, &pcf857x_irq_chip,
397 client->irq, NULL); 398 client->irq);
398 gpio->irq_parent = client->irq; 399 gpio->irq_parent = client->irq;
399 } 400 }
400 401
diff --git a/drivers/gpio/gpio-pl061.c b/drivers/gpio/gpio-pl061.c
index 6e3c1430616f..0a6bfd2b06e5 100644
--- a/drivers/gpio/gpio-pl061.c
+++ b/drivers/gpio/gpio-pl061.c
@@ -23,7 +23,6 @@
23#include <linux/gpio.h> 23#include <linux/gpio.h>
24#include <linux/device.h> 24#include <linux/device.h>
25#include <linux/amba/bus.h> 25#include <linux/amba/bus.h>
26#include <linux/amba/pl061.h>
27#include <linux/slab.h> 26#include <linux/slab.h>
28#include <linux/pinctrl/consumer.h> 27#include <linux/pinctrl/consumer.h>
29#include <linux/pm.h> 28#include <linux/pm.h>
@@ -50,11 +49,12 @@ struct pl061_context_save_regs {
50}; 49};
51#endif 50#endif
52 51
53struct pl061_gpio { 52struct pl061 {
54 spinlock_t lock; 53 spinlock_t lock;
55 54
56 void __iomem *base; 55 void __iomem *base;
57 struct gpio_chip gc; 56 struct gpio_chip gc;
57 int parent_irq;
58 58
59#ifdef CONFIG_PM 59#ifdef CONFIG_PM
60 struct pl061_context_save_regs csave_regs; 60 struct pl061_context_save_regs csave_regs;
@@ -63,22 +63,22 @@ struct pl061_gpio {
63 63
64static int pl061_get_direction(struct gpio_chip *gc, unsigned offset) 64static int pl061_get_direction(struct gpio_chip *gc, unsigned offset)
65{ 65{
66 struct pl061_gpio *chip = gpiochip_get_data(gc); 66 struct pl061 *pl061 = gpiochip_get_data(gc);
67 67
68 return !(readb(chip->base + GPIODIR) & BIT(offset)); 68 return !(readb(pl061->base + GPIODIR) & BIT(offset));
69} 69}
70 70
71static int pl061_direction_input(struct gpio_chip *gc, unsigned offset) 71static int pl061_direction_input(struct gpio_chip *gc, unsigned offset)
72{ 72{
73 struct pl061_gpio *chip = gpiochip_get_data(gc); 73 struct pl061 *pl061 = gpiochip_get_data(gc);
74 unsigned long flags; 74 unsigned long flags;
75 unsigned char gpiodir; 75 unsigned char gpiodir;
76 76
77 spin_lock_irqsave(&chip->lock, flags); 77 spin_lock_irqsave(&pl061->lock, flags);
78 gpiodir = readb(chip->base + GPIODIR); 78 gpiodir = readb(pl061->base + GPIODIR);
79 gpiodir &= ~(BIT(offset)); 79 gpiodir &= ~(BIT(offset));
80 writeb(gpiodir, chip->base + GPIODIR); 80 writeb(gpiodir, pl061->base + GPIODIR);
81 spin_unlock_irqrestore(&chip->lock, flags); 81 spin_unlock_irqrestore(&pl061->lock, flags);
82 82
83 return 0; 83 return 0;
84} 84}
@@ -86,44 +86,44 @@ static int pl061_direction_input(struct gpio_chip *gc, unsigned offset)
86static int pl061_direction_output(struct gpio_chip *gc, unsigned offset, 86static int pl061_direction_output(struct gpio_chip *gc, unsigned offset,
87 int value) 87 int value)
88{ 88{
89 struct pl061_gpio *chip = gpiochip_get_data(gc); 89 struct pl061 *pl061 = gpiochip_get_data(gc);
90 unsigned long flags; 90 unsigned long flags;
91 unsigned char gpiodir; 91 unsigned char gpiodir;
92 92
93 spin_lock_irqsave(&chip->lock, flags); 93 spin_lock_irqsave(&pl061->lock, flags);
94 writeb(!!value << offset, chip->base + (BIT(offset + 2))); 94 writeb(!!value << offset, pl061->base + (BIT(offset + 2)));
95 gpiodir = readb(chip->base + GPIODIR); 95 gpiodir = readb(pl061->base + GPIODIR);
96 gpiodir |= BIT(offset); 96 gpiodir |= BIT(offset);
97 writeb(gpiodir, chip->base + GPIODIR); 97 writeb(gpiodir, pl061->base + GPIODIR);
98 98
99 /* 99 /*
100 * gpio value is set again, because pl061 doesn't allow to set value of 100 * gpio value is set again, because pl061 doesn't allow to set value of
101 * a gpio pin before configuring it in OUT mode. 101 * a gpio pin before configuring it in OUT mode.
102 */ 102 */
103 writeb(!!value << offset, chip->base + (BIT(offset + 2))); 103 writeb(!!value << offset, pl061->base + (BIT(offset + 2)));
104 spin_unlock_irqrestore(&chip->lock, flags); 104 spin_unlock_irqrestore(&pl061->lock, flags);
105 105
106 return 0; 106 return 0;
107} 107}
108 108
109static int pl061_get_value(struct gpio_chip *gc, unsigned offset) 109static int pl061_get_value(struct gpio_chip *gc, unsigned offset)
110{ 110{
111 struct pl061_gpio *chip = gpiochip_get_data(gc); 111 struct pl061 *pl061 = gpiochip_get_data(gc);
112 112
113 return !!readb(chip->base + (BIT(offset + 2))); 113 return !!readb(pl061->base + (BIT(offset + 2)));
114} 114}
115 115
116static void pl061_set_value(struct gpio_chip *gc, unsigned offset, int value) 116static void pl061_set_value(struct gpio_chip *gc, unsigned offset, int value)
117{ 117{
118 struct pl061_gpio *chip = gpiochip_get_data(gc); 118 struct pl061 *pl061 = gpiochip_get_data(gc);
119 119
120 writeb(!!value << offset, chip->base + (BIT(offset + 2))); 120 writeb(!!value << offset, pl061->base + (BIT(offset + 2)));
121} 121}
122 122
123static int pl061_irq_type(struct irq_data *d, unsigned trigger) 123static int pl061_irq_type(struct irq_data *d, unsigned trigger)
124{ 124{
125 struct gpio_chip *gc = irq_data_get_irq_chip_data(d); 125 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
126 struct pl061_gpio *chip = gpiochip_get_data(gc); 126 struct pl061 *pl061 = gpiochip_get_data(gc);
127 int offset = irqd_to_hwirq(d); 127 int offset = irqd_to_hwirq(d);
128 unsigned long flags; 128 unsigned long flags;
129 u8 gpiois, gpioibe, gpioiev; 129 u8 gpiois, gpioibe, gpioiev;
@@ -143,11 +143,11 @@ static int pl061_irq_type(struct irq_data *d, unsigned trigger)
143 } 143 }
144 144
145 145
146 spin_lock_irqsave(&chip->lock, flags); 146 spin_lock_irqsave(&pl061->lock, flags);
147 147
148 gpioiev = readb(chip->base + GPIOIEV); 148 gpioiev = readb(pl061->base + GPIOIEV);
149 gpiois = readb(chip->base + GPIOIS); 149 gpiois = readb(pl061->base + GPIOIS);
150 gpioibe = readb(chip->base + GPIOIBE); 150 gpioibe = readb(pl061->base + GPIOIBE);
151 151
152 if (trigger & (IRQ_TYPE_LEVEL_HIGH | IRQ_TYPE_LEVEL_LOW)) { 152 if (trigger & (IRQ_TYPE_LEVEL_HIGH | IRQ_TYPE_LEVEL_LOW)) {
153 bool polarity = trigger & IRQ_TYPE_LEVEL_HIGH; 153 bool polarity = trigger & IRQ_TYPE_LEVEL_HIGH;
@@ -199,11 +199,11 @@ static int pl061_irq_type(struct irq_data *d, unsigned trigger)
199 offset); 199 offset);
200 } 200 }
201 201
202 writeb(gpiois, chip->base + GPIOIS); 202 writeb(gpiois, pl061->base + GPIOIS);
203 writeb(gpioibe, chip->base + GPIOIBE); 203 writeb(gpioibe, pl061->base + GPIOIBE);
204 writeb(gpioiev, chip->base + GPIOIEV); 204 writeb(gpioiev, pl061->base + GPIOIEV);
205 205
206 spin_unlock_irqrestore(&chip->lock, flags); 206 spin_unlock_irqrestore(&pl061->lock, flags);
207 207
208 return 0; 208 return 0;
209} 209}
@@ -213,12 +213,12 @@ static void pl061_irq_handler(struct irq_desc *desc)
213 unsigned long pending; 213 unsigned long pending;
214 int offset; 214 int offset;
215 struct gpio_chip *gc = irq_desc_get_handler_data(desc); 215 struct gpio_chip *gc = irq_desc_get_handler_data(desc);
216 struct pl061_gpio *chip = gpiochip_get_data(gc); 216 struct pl061 *pl061 = gpiochip_get_data(gc);
217 struct irq_chip *irqchip = irq_desc_get_chip(desc); 217 struct irq_chip *irqchip = irq_desc_get_chip(desc);
218 218
219 chained_irq_enter(irqchip, desc); 219 chained_irq_enter(irqchip, desc);
220 220
221 pending = readb(chip->base + GPIOMIS); 221 pending = readb(pl061->base + GPIOMIS);
222 if (pending) { 222 if (pending) {
223 for_each_set_bit(offset, &pending, PL061_GPIO_NR) 223 for_each_set_bit(offset, &pending, PL061_GPIO_NR)
224 generic_handle_irq(irq_find_mapping(gc->irqdomain, 224 generic_handle_irq(irq_find_mapping(gc->irqdomain,
@@ -231,27 +231,27 @@ static void pl061_irq_handler(struct irq_desc *desc)
231static void pl061_irq_mask(struct irq_data *d) 231static void pl061_irq_mask(struct irq_data *d)
232{ 232{
233 struct gpio_chip *gc = irq_data_get_irq_chip_data(d); 233 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
234 struct pl061_gpio *chip = gpiochip_get_data(gc); 234 struct pl061 *pl061 = gpiochip_get_data(gc);
235 u8 mask = BIT(irqd_to_hwirq(d) % PL061_GPIO_NR); 235 u8 mask = BIT(irqd_to_hwirq(d) % PL061_GPIO_NR);
236 u8 gpioie; 236 u8 gpioie;
237 237
238 spin_lock(&chip->lock); 238 spin_lock(&pl061->lock);
239 gpioie = readb(chip->base + GPIOIE) & ~mask; 239 gpioie = readb(pl061->base + GPIOIE) & ~mask;
240 writeb(gpioie, chip->base + GPIOIE); 240 writeb(gpioie, pl061->base + GPIOIE);
241 spin_unlock(&chip->lock); 241 spin_unlock(&pl061->lock);
242} 242}
243 243
244static void pl061_irq_unmask(struct irq_data *d) 244static void pl061_irq_unmask(struct irq_data *d)
245{ 245{
246 struct gpio_chip *gc = irq_data_get_irq_chip_data(d); 246 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
247 struct pl061_gpio *chip = gpiochip_get_data(gc); 247 struct pl061 *pl061 = gpiochip_get_data(gc);
248 u8 mask = BIT(irqd_to_hwirq(d) % PL061_GPIO_NR); 248 u8 mask = BIT(irqd_to_hwirq(d) % PL061_GPIO_NR);
249 u8 gpioie; 249 u8 gpioie;
250 250
251 spin_lock(&chip->lock); 251 spin_lock(&pl061->lock);
252 gpioie = readb(chip->base + GPIOIE) | mask; 252 gpioie = readb(pl061->base + GPIOIE) | mask;
253 writeb(gpioie, chip->base + GPIOIE); 253 writeb(gpioie, pl061->base + GPIOIE);
254 spin_unlock(&chip->lock); 254 spin_unlock(&pl061->lock);
255} 255}
256 256
257/** 257/**
@@ -265,19 +265,20 @@ static void pl061_irq_unmask(struct irq_data *d)
265static void pl061_irq_ack(struct irq_data *d) 265static void pl061_irq_ack(struct irq_data *d)
266{ 266{
267 struct gpio_chip *gc = irq_data_get_irq_chip_data(d); 267 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
268 struct pl061_gpio *chip = gpiochip_get_data(gc); 268 struct pl061 *pl061 = gpiochip_get_data(gc);
269 u8 mask = BIT(irqd_to_hwirq(d) % PL061_GPIO_NR); 269 u8 mask = BIT(irqd_to_hwirq(d) % PL061_GPIO_NR);
270 270
271 spin_lock(&chip->lock); 271 spin_lock(&pl061->lock);
272 writeb(mask, chip->base + GPIOIC); 272 writeb(mask, pl061->base + GPIOIC);
273 spin_unlock(&chip->lock); 273 spin_unlock(&pl061->lock);
274} 274}
275 275
276static int pl061_irq_set_wake(struct irq_data *d, unsigned int state) 276static int pl061_irq_set_wake(struct irq_data *d, unsigned int state)
277{ 277{
278 struct gpio_chip *gc = irq_data_get_irq_chip_data(d); 278 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
279 struct pl061 *pl061 = gpiochip_get_data(gc);
279 280
280 return irq_set_irq_wake(gc->irq_parent, state); 281 return irq_set_irq_wake(pl061->parent_irq, state);
281} 282}
282 283
283static struct irq_chip pl061_irqchip = { 284static struct irq_chip pl061_irqchip = {
@@ -292,81 +293,60 @@ static struct irq_chip pl061_irqchip = {
292static int pl061_probe(struct amba_device *adev, const struct amba_id *id) 293static int pl061_probe(struct amba_device *adev, const struct amba_id *id)
293{ 294{
294 struct device *dev = &adev->dev; 295 struct device *dev = &adev->dev;
295 struct pl061_platform_data *pdata = dev_get_platdata(dev); 296 struct pl061 *pl061;
296 struct pl061_gpio *chip; 297 int ret, irq;
297 int ret, irq, i, irq_base;
298 298
299 chip = devm_kzalloc(dev, sizeof(*chip), GFP_KERNEL); 299 pl061 = devm_kzalloc(dev, sizeof(*pl061), GFP_KERNEL);
300 if (chip == NULL) 300 if (pl061 == NULL)
301 return -ENOMEM; 301 return -ENOMEM;
302 302
303 if (pdata) { 303 pl061->base = devm_ioremap_resource(dev, &adev->res);
304 chip->gc.base = pdata->gpio_base; 304 if (IS_ERR(pl061->base))
305 irq_base = pdata->irq_base; 305 return PTR_ERR(pl061->base);
306 if (irq_base <= 0) {
307 dev_err(&adev->dev, "invalid IRQ base in pdata\n");
308 return -ENODEV;
309 }
310 } else {
311 chip->gc.base = -1;
312 irq_base = 0;
313 }
314
315 chip->base = devm_ioremap_resource(dev, &adev->res);
316 if (IS_ERR(chip->base))
317 return PTR_ERR(chip->base);
318 306
319 spin_lock_init(&chip->lock); 307 spin_lock_init(&pl061->lock);
320 if (of_property_read_bool(dev->of_node, "gpio-ranges")) { 308 if (of_property_read_bool(dev->of_node, "gpio-ranges")) {
321 chip->gc.request = gpiochip_generic_request; 309 pl061->gc.request = gpiochip_generic_request;
322 chip->gc.free = gpiochip_generic_free; 310 pl061->gc.free = gpiochip_generic_free;
323 } 311 }
324 312
325 chip->gc.get_direction = pl061_get_direction; 313 pl061->gc.base = -1;
326 chip->gc.direction_input = pl061_direction_input; 314 pl061->gc.get_direction = pl061_get_direction;
327 chip->gc.direction_output = pl061_direction_output; 315 pl061->gc.direction_input = pl061_direction_input;
328 chip->gc.get = pl061_get_value; 316 pl061->gc.direction_output = pl061_direction_output;
329 chip->gc.set = pl061_set_value; 317 pl061->gc.get = pl061_get_value;
330 chip->gc.ngpio = PL061_GPIO_NR; 318 pl061->gc.set = pl061_set_value;
331 chip->gc.label = dev_name(dev); 319 pl061->gc.ngpio = PL061_GPIO_NR;
332 chip->gc.parent = dev; 320 pl061->gc.label = dev_name(dev);
333 chip->gc.owner = THIS_MODULE; 321 pl061->gc.parent = dev;
334 322 pl061->gc.owner = THIS_MODULE;
335 ret = gpiochip_add_data(&chip->gc, chip); 323
324 ret = gpiochip_add_data(&pl061->gc, pl061);
336 if (ret) 325 if (ret)
337 return ret; 326 return ret;
338 327
339 /* 328 /*
340 * irq_chip support 329 * irq_chip support
341 */ 330 */
342 writeb(0, chip->base + GPIOIE); /* disable irqs */ 331 writeb(0, pl061->base + GPIOIE); /* disable irqs */
343 irq = adev->irq[0]; 332 irq = adev->irq[0];
344 if (irq < 0) { 333 if (irq < 0) {
345 dev_err(&adev->dev, "invalid IRQ\n"); 334 dev_err(&adev->dev, "invalid IRQ\n");
346 return -ENODEV; 335 return -ENODEV;
347 } 336 }
337 pl061->parent_irq = irq;
348 338
349 ret = gpiochip_irqchip_add(&chip->gc, &pl061_irqchip, 339 ret = gpiochip_irqchip_add(&pl061->gc, &pl061_irqchip,
350 irq_base, handle_bad_irq, 340 0, handle_bad_irq,
351 IRQ_TYPE_NONE); 341 IRQ_TYPE_NONE);
352 if (ret) { 342 if (ret) {
353 dev_info(&adev->dev, "could not add irqchip\n"); 343 dev_info(&adev->dev, "could not add irqchip\n");
354 return ret; 344 return ret;
355 } 345 }
356 gpiochip_set_chained_irqchip(&chip->gc, &pl061_irqchip, 346 gpiochip_set_chained_irqchip(&pl061->gc, &pl061_irqchip,
357 irq, pl061_irq_handler); 347 irq, pl061_irq_handler);
358 348
359 for (i = 0; i < PL061_GPIO_NR; i++) { 349 amba_set_drvdata(adev, pl061);
360 if (pdata) {
361 if (pdata->directions & (BIT(i)))
362 pl061_direction_output(&chip->gc, i,
363 pdata->values & (BIT(i)));
364 else
365 pl061_direction_input(&chip->gc, i);
366 }
367 }
368
369 amba_set_drvdata(adev, chip);
370 dev_info(&adev->dev, "PL061 GPIO chip @%pa registered\n", 350 dev_info(&adev->dev, "PL061 GPIO chip @%pa registered\n",
371 &adev->res.start); 351 &adev->res.start);
372 352
@@ -376,20 +356,20 @@ static int pl061_probe(struct amba_device *adev, const struct amba_id *id)
376#ifdef CONFIG_PM 356#ifdef CONFIG_PM
377static int pl061_suspend(struct device *dev) 357static int pl061_suspend(struct device *dev)
378{ 358{
379 struct pl061_gpio *chip = dev_get_drvdata(dev); 359 struct pl061 *pl061 = dev_get_drvdata(dev);
380 int offset; 360 int offset;
381 361
382 chip->csave_regs.gpio_data = 0; 362 pl061->csave_regs.gpio_data = 0;
383 chip->csave_regs.gpio_dir = readb(chip->base + GPIODIR); 363 pl061->csave_regs.gpio_dir = readb(pl061->base + GPIODIR);
384 chip->csave_regs.gpio_is = readb(chip->base + GPIOIS); 364 pl061->csave_regs.gpio_is = readb(pl061->base + GPIOIS);
385 chip->csave_regs.gpio_ibe = readb(chip->base + GPIOIBE); 365 pl061->csave_regs.gpio_ibe = readb(pl061->base + GPIOIBE);
386 chip->csave_regs.gpio_iev = readb(chip->base + GPIOIEV); 366 pl061->csave_regs.gpio_iev = readb(pl061->base + GPIOIEV);
387 chip->csave_regs.gpio_ie = readb(chip->base + GPIOIE); 367 pl061->csave_regs.gpio_ie = readb(pl061->base + GPIOIE);
388 368
389 for (offset = 0; offset < PL061_GPIO_NR; offset++) { 369 for (offset = 0; offset < PL061_GPIO_NR; offset++) {
390 if (chip->csave_regs.gpio_dir & (BIT(offset))) 370 if (pl061->csave_regs.gpio_dir & (BIT(offset)))
391 chip->csave_regs.gpio_data |= 371 pl061->csave_regs.gpio_data |=
392 pl061_get_value(&chip->gc, offset) << offset; 372 pl061_get_value(&pl061->gc, offset) << offset;
393 } 373 }
394 374
395 return 0; 375 return 0;
@@ -397,22 +377,22 @@ static int pl061_suspend(struct device *dev)
397 377
398static int pl061_resume(struct device *dev) 378static int pl061_resume(struct device *dev)
399{ 379{
400 struct pl061_gpio *chip = dev_get_drvdata(dev); 380 struct pl061 *pl061 = dev_get_drvdata(dev);
401 int offset; 381 int offset;
402 382
403 for (offset = 0; offset < PL061_GPIO_NR; offset++) { 383 for (offset = 0; offset < PL061_GPIO_NR; offset++) {
404 if (chip->csave_regs.gpio_dir & (BIT(offset))) 384 if (pl061->csave_regs.gpio_dir & (BIT(offset)))
405 pl061_direction_output(&chip->gc, offset, 385 pl061_direction_output(&pl061->gc, offset,
406 chip->csave_regs.gpio_data & 386 pl061->csave_regs.gpio_data &
407 (BIT(offset))); 387 (BIT(offset)));
408 else 388 else
409 pl061_direction_input(&chip->gc, offset); 389 pl061_direction_input(&pl061->gc, offset);
410 } 390 }
411 391
412 writeb(chip->csave_regs.gpio_is, chip->base + GPIOIS); 392 writeb(pl061->csave_regs.gpio_is, pl061->base + GPIOIS);
413 writeb(chip->csave_regs.gpio_ibe, chip->base + GPIOIBE); 393 writeb(pl061->csave_regs.gpio_ibe, pl061->base + GPIOIBE);
414 writeb(chip->csave_regs.gpio_iev, chip->base + GPIOIEV); 394 writeb(pl061->csave_regs.gpio_iev, pl061->base + GPIOIEV);
415 writeb(chip->csave_regs.gpio_ie, chip->base + GPIOIE); 395 writeb(pl061->csave_regs.gpio_ie, pl061->base + GPIOIE);
416 396
417 return 0; 397 return 0;
418} 398}
diff --git a/drivers/gpio/gpio-stmpe.c b/drivers/gpio/gpio-stmpe.c
index 5b0042776ec7..16cbc5702865 100644
--- a/drivers/gpio/gpio-stmpe.c
+++ b/drivers/gpio/gpio-stmpe.c
@@ -413,7 +413,7 @@ static irqreturn_t stmpe_gpio_irq(int irq, void *dev)
413 stmpe->partnum != STMPE1801) { 413 stmpe->partnum != STMPE1801) {
414 stmpe_reg_write(stmpe, statmsbreg + i, status[i]); 414 stmpe_reg_write(stmpe, statmsbreg + i, status[i]);
415 stmpe_reg_write(stmpe, 415 stmpe_reg_write(stmpe,
416 stmpe->regs[STMPE_IDX_GPEDR_LSB + i], 416 stmpe->regs[STMPE_IDX_GPEDR_MSB] + i,
417 status[i]); 417 status[i]);
418 } 418 }
419 } 419 }
@@ -484,21 +484,20 @@ static int stmpe_gpio_probe(struct platform_device *pdev)
484 if (stmpe_gpio->norequest_mask & BIT(i)) 484 if (stmpe_gpio->norequest_mask & BIT(i))
485 clear_bit(i, stmpe_gpio->chip.irq_valid_mask); 485 clear_bit(i, stmpe_gpio->chip.irq_valid_mask);
486 } 486 }
487 ret = gpiochip_irqchip_add(&stmpe_gpio->chip, 487 ret = gpiochip_irqchip_add_nested(&stmpe_gpio->chip,
488 &stmpe_gpio_irq_chip, 488 &stmpe_gpio_irq_chip,
489 0, 489 0,
490 handle_simple_irq, 490 handle_simple_irq,
491 IRQ_TYPE_NONE); 491 IRQ_TYPE_NONE);
492 if (ret) { 492 if (ret) {
493 dev_err(&pdev->dev, 493 dev_err(&pdev->dev,
494 "could not connect irqchip to gpiochip\n"); 494 "could not connect irqchip to gpiochip\n");
495 goto out_disable; 495 goto out_disable;
496 } 496 }
497 497
498 gpiochip_set_chained_irqchip(&stmpe_gpio->chip, 498 gpiochip_set_nested_irqchip(&stmpe_gpio->chip,
499 &stmpe_gpio_irq_chip, 499 &stmpe_gpio_irq_chip,
500 irq, 500 irq);
501 NULL);
502 } 501 }
503 502
504 platform_set_drvdata(pdev, stmpe_gpio); 503 platform_set_drvdata(pdev, stmpe_gpio);
diff --git a/drivers/gpio/gpio-sx150x.c b/drivers/gpio/gpio-sx150x.c
deleted file mode 100644
index af95de89db01..000000000000
--- a/drivers/gpio/gpio-sx150x.c
+++ /dev/null
@@ -1,792 +0,0 @@
1/* Copyright (c) 2010, Code Aurora Forum. All rights reserved.
2 *
3 * Driver for Semtech SX150X I2C GPIO Expanders
4 *
5 * Author: Gregory Bean <gbean@codeaurora.org>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 and
9 * only version 2 as published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
19 * 02110-1301, USA.
20 */
21#include <linux/gpio.h>
22#include <linux/i2c.h>
23#include <linux/init.h>
24#include <linux/interrupt.h>
25#include <linux/irq.h>
26#include <linux/mutex.h>
27#include <linux/slab.h>
28#include <linux/of.h>
29#include <linux/of_address.h>
30#include <linux/of_irq.h>
31#include <linux/of_gpio.h>
32#include <linux/of_device.h>
33
34#define NO_UPDATE_PENDING -1
35
36/* The chip models of sx150x */
37#define SX150X_123 0
38#define SX150X_456 1
39#define SX150X_789 2
40
41struct sx150x_123_pri {
42 u8 reg_pld_mode;
43 u8 reg_pld_table0;
44 u8 reg_pld_table1;
45 u8 reg_pld_table2;
46 u8 reg_pld_table3;
47 u8 reg_pld_table4;
48 u8 reg_advance;
49};
50
51struct sx150x_456_pri {
52 u8 reg_pld_mode;
53 u8 reg_pld_table0;
54 u8 reg_pld_table1;
55 u8 reg_pld_table2;
56 u8 reg_pld_table3;
57 u8 reg_pld_table4;
58 u8 reg_advance;
59};
60
61struct sx150x_789_pri {
62 u8 reg_drain;
63 u8 reg_polarity;
64 u8 reg_clock;
65 u8 reg_misc;
66 u8 reg_reset;
67 u8 ngpios;
68};
69
70struct sx150x_device_data {
71 u8 model;
72 u8 reg_pullup;
73 u8 reg_pulldn;
74 u8 reg_dir;
75 u8 reg_data;
76 u8 reg_irq_mask;
77 u8 reg_irq_src;
78 u8 reg_sense;
79 u8 ngpios;
80 union {
81 struct sx150x_123_pri x123;
82 struct sx150x_456_pri x456;
83 struct sx150x_789_pri x789;
84 } pri;
85};
86
87/**
88 * struct sx150x_platform_data - config data for SX150x driver
89 * @gpio_base: The index number of the first GPIO assigned to this
90 * GPIO expander. The expander will create a block of
91 * consecutively numbered gpios beginning at the given base,
92 * with the size of the block depending on the model of the
93 * expander chip.
94 * @oscio_is_gpo: If set to true, the driver will configure OSCIO as a GPO
95 * instead of as an oscillator, increasing the size of the
96 * GP(I)O pool created by this expander by one. The
97 * output-only GPO pin will be added at the end of the block.
98 * @io_pullup_ena: A bit-mask which enables or disables the pull-up resistor
99 * for each IO line in the expander. Setting the bit at
100 * position n will enable the pull-up for the IO at
101 * the corresponding offset. For chips with fewer than
102 * 16 IO pins, high-end bits are ignored.
103 * @io_pulldn_ena: A bit-mask which enables-or disables the pull-down
104 * resistor for each IO line in the expander. Setting the
105 * bit at position n will enable the pull-down for the IO at
106 * the corresponding offset. For chips with fewer than
107 * 16 IO pins, high-end bits are ignored.
108 * @io_polarity: A bit-mask which enables polarity inversion for each IO line
109 * in the expander. Setting the bit at position n inverts
110 * the polarity of that IO line, while clearing it results
111 * in normal polarity. For chips with fewer than 16 IO pins,
112 * high-end bits are ignored.
113 * @irq_summary: The 'summary IRQ' line to which the GPIO expander's INT line
114 * is connected, via which it reports interrupt events
115 * across all GPIO lines. This must be a real,
116 * pre-existing IRQ line.
117 * Setting this value < 0 disables the irq_chip functionality
118 * of the driver.
119 * @irq_base: The first 'virtual IRQ' line at which our block of GPIO-based
120 * IRQ lines will appear. Similarly to gpio_base, the expander
121 * will create a block of irqs beginning at this number.
122 * This value is ignored if irq_summary is < 0.
123 * @reset_during_probe: If set to true, the driver will trigger a full
124 * reset of the chip at the beginning of the probe
125 * in order to place it in a known state.
126 */
127struct sx150x_platform_data {
128 unsigned gpio_base;
129 bool oscio_is_gpo;
130 u16 io_pullup_ena;
131 u16 io_pulldn_ena;
132 u16 io_polarity;
133 int irq_summary;
134 unsigned irq_base;
135 bool reset_during_probe;
136};
137
138struct sx150x_chip {
139 struct gpio_chip gpio_chip;
140 struct i2c_client *client;
141 const struct sx150x_device_data *dev_cfg;
142 int irq_summary;
143 int irq_base;
144 int irq_update;
145 u32 irq_sense;
146 u32 irq_masked;
147 u32 dev_sense;
148 u32 dev_masked;
149 struct irq_chip irq_chip;
150 struct mutex lock;
151};
152
153static const struct sx150x_device_data sx150x_devices[] = {
154 [0] = { /* sx1508q */
155 .model = SX150X_789,
156 .reg_pullup = 0x03,
157 .reg_pulldn = 0x04,
158 .reg_dir = 0x07,
159 .reg_data = 0x08,
160 .reg_irq_mask = 0x09,
161 .reg_irq_src = 0x0c,
162 .reg_sense = 0x0b,
163 .pri.x789 = {
164 .reg_drain = 0x05,
165 .reg_polarity = 0x06,
166 .reg_clock = 0x0f,
167 .reg_misc = 0x10,
168 .reg_reset = 0x7d,
169 },
170 .ngpios = 8,
171 },
172 [1] = { /* sx1509q */
173 .model = SX150X_789,
174 .reg_pullup = 0x07,
175 .reg_pulldn = 0x09,
176 .reg_dir = 0x0f,
177 .reg_data = 0x11,
178 .reg_irq_mask = 0x13,
179 .reg_irq_src = 0x19,
180 .reg_sense = 0x17,
181 .pri.x789 = {
182 .reg_drain = 0x0b,
183 .reg_polarity = 0x0d,
184 .reg_clock = 0x1e,
185 .reg_misc = 0x1f,
186 .reg_reset = 0x7d,
187 },
188 .ngpios = 16
189 },
190 [2] = { /* sx1506q */
191 .model = SX150X_456,
192 .reg_pullup = 0x05,
193 .reg_pulldn = 0x07,
194 .reg_dir = 0x03,
195 .reg_data = 0x01,
196 .reg_irq_mask = 0x09,
197 .reg_irq_src = 0x0f,
198 .reg_sense = 0x0d,
199 .pri.x456 = {
200 .reg_pld_mode = 0x21,
201 .reg_pld_table0 = 0x23,
202 .reg_pld_table1 = 0x25,
203 .reg_pld_table2 = 0x27,
204 .reg_pld_table3 = 0x29,
205 .reg_pld_table4 = 0x2b,
206 .reg_advance = 0xad,
207 },
208 .ngpios = 16
209 },
210 [3] = { /* sx1502q */
211 .model = SX150X_123,
212 .reg_pullup = 0x02,
213 .reg_pulldn = 0x03,
214 .reg_dir = 0x01,
215 .reg_data = 0x00,
216 .reg_irq_mask = 0x05,
217 .reg_irq_src = 0x08,
218 .reg_sense = 0x07,
219 .pri.x123 = {
220 .reg_pld_mode = 0x10,
221 .reg_pld_table0 = 0x11,
222 .reg_pld_table1 = 0x12,
223 .reg_pld_table2 = 0x13,
224 .reg_pld_table3 = 0x14,
225 .reg_pld_table4 = 0x15,
226 .reg_advance = 0xad,
227 },
228 .ngpios = 8,
229 },
230};
231
232static const struct i2c_device_id sx150x_id[] = {
233 {"sx1508q", 0},
234 {"sx1509q", 1},
235 {"sx1506q", 2},
236 {"sx1502q", 3},
237 {}
238};
239
240static const struct of_device_id sx150x_of_match[] = {
241 { .compatible = "semtech,sx1508q" },
242 { .compatible = "semtech,sx1509q" },
243 { .compatible = "semtech,sx1506q" },
244 { .compatible = "semtech,sx1502q" },
245 {},
246};
247
248static s32 sx150x_i2c_write(struct i2c_client *client, u8 reg, u8 val)
249{
250 s32 err = i2c_smbus_write_byte_data(client, reg, val);
251
252 if (err < 0)
253 dev_warn(&client->dev,
254 "i2c write fail: can't write %02x to %02x: %d\n",
255 val, reg, err);
256 return err;
257}
258
259static s32 sx150x_i2c_read(struct i2c_client *client, u8 reg, u8 *val)
260{
261 s32 err = i2c_smbus_read_byte_data(client, reg);
262
263 if (err >= 0)
264 *val = err;
265 else
266 dev_warn(&client->dev,
267 "i2c read fail: can't read from %02x: %d\n",
268 reg, err);
269 return err;
270}
271
272static inline bool offset_is_oscio(struct sx150x_chip *chip, unsigned offset)
273{
274 return (chip->dev_cfg->ngpios == offset);
275}
276
277/*
278 * These utility functions solve the common problem of locating and setting
279 * configuration bits. Configuration bits are grouped into registers
280 * whose indexes increase downwards. For example, with eight-bit registers,
281 * sixteen gpios would have their config bits grouped in the following order:
282 * REGISTER N-1 [ f e d c b a 9 8 ]
283 * N [ 7 6 5 4 3 2 1 0 ]
284 *
285 * For multi-bit configurations, the pattern gets wider:
286 * REGISTER N-3 [ f f e e d d c c ]
287 * N-2 [ b b a a 9 9 8 8 ]
288 * N-1 [ 7 7 6 6 5 5 4 4 ]
289 * N [ 3 3 2 2 1 1 0 0 ]
290 *
291 * Given the address of the starting register 'N', the index of the gpio
292 * whose configuration we seek to change, and the width in bits of that
293 * configuration, these functions allow us to locate the correct
294 * register and mask the correct bits.
295 */
296static inline void sx150x_find_cfg(u8 offset, u8 width,
297 u8 *reg, u8 *mask, u8 *shift)
298{
299 *reg -= offset * width / 8;
300 *mask = (1 << width) - 1;
301 *shift = (offset * width) % 8;
302 *mask <<= *shift;
303}
304
305static s32 sx150x_write_cfg(struct sx150x_chip *chip,
306 u8 offset, u8 width, u8 reg, u8 val)
307{
308 u8 mask;
309 u8 data;
310 u8 shift;
311 s32 err;
312
313 sx150x_find_cfg(offset, width, &reg, &mask, &shift);
314 err = sx150x_i2c_read(chip->client, reg, &data);
315 if (err < 0)
316 return err;
317
318 data &= ~mask;
319 data |= (val << shift) & mask;
320 return sx150x_i2c_write(chip->client, reg, data);
321}
322
323static int sx150x_get_io(struct sx150x_chip *chip, unsigned offset)
324{
325 u8 reg = chip->dev_cfg->reg_data;
326 u8 mask;
327 u8 data;
328 u8 shift;
329 s32 err;
330
331 sx150x_find_cfg(offset, 1, &reg, &mask, &shift);
332 err = sx150x_i2c_read(chip->client, reg, &data);
333 if (err >= 0)
334 err = (data & mask) != 0 ? 1 : 0;
335
336 return err;
337}
338
339static void sx150x_set_oscio(struct sx150x_chip *chip, int val)
340{
341 sx150x_i2c_write(chip->client,
342 chip->dev_cfg->pri.x789.reg_clock,
343 (val ? 0x1f : 0x10));
344}
345
346static void sx150x_set_io(struct sx150x_chip *chip, unsigned offset, int val)
347{
348 sx150x_write_cfg(chip,
349 offset,
350 1,
351 chip->dev_cfg->reg_data,
352 (val ? 1 : 0));
353}
354
355static int sx150x_io_input(struct sx150x_chip *chip, unsigned offset)
356{
357 return sx150x_write_cfg(chip,
358 offset,
359 1,
360 chip->dev_cfg->reg_dir,
361 1);
362}
363
364static int sx150x_io_output(struct sx150x_chip *chip, unsigned offset, int val)
365{
366 int err;
367
368 err = sx150x_write_cfg(chip,
369 offset,
370 1,
371 chip->dev_cfg->reg_data,
372 (val ? 1 : 0));
373 if (err >= 0)
374 err = sx150x_write_cfg(chip,
375 offset,
376 1,
377 chip->dev_cfg->reg_dir,
378 0);
379 return err;
380}
381
382static int sx150x_gpio_get(struct gpio_chip *gc, unsigned offset)
383{
384 struct sx150x_chip *chip = gpiochip_get_data(gc);
385 int status = -EINVAL;
386
387 if (!offset_is_oscio(chip, offset)) {
388 mutex_lock(&chip->lock);
389 status = sx150x_get_io(chip, offset);
390 mutex_unlock(&chip->lock);
391 }
392
393 return (status < 0) ? status : !!status;
394}
395
396static void sx150x_gpio_set(struct gpio_chip *gc, unsigned offset, int val)
397{
398 struct sx150x_chip *chip = gpiochip_get_data(gc);
399
400 mutex_lock(&chip->lock);
401 if (offset_is_oscio(chip, offset))
402 sx150x_set_oscio(chip, val);
403 else
404 sx150x_set_io(chip, offset, val);
405 mutex_unlock(&chip->lock);
406}
407
408static int sx150x_gpio_set_single_ended(struct gpio_chip *gc,
409 unsigned offset,
410 enum single_ended_mode mode)
411{
412 struct sx150x_chip *chip = gpiochip_get_data(gc);
413
414 /* On the SX160X 789 we can set open drain */
415 if (chip->dev_cfg->model != SX150X_789)
416 return -ENOTSUPP;
417
418 if (mode == LINE_MODE_PUSH_PULL)
419 return sx150x_write_cfg(chip,
420 offset,
421 1,
422 chip->dev_cfg->pri.x789.reg_drain,
423 0);
424
425 if (mode == LINE_MODE_OPEN_DRAIN)
426 return sx150x_write_cfg(chip,
427 offset,
428 1,
429 chip->dev_cfg->pri.x789.reg_drain,
430 1);
431 return -ENOTSUPP;
432}
433
434static int sx150x_gpio_direction_input(struct gpio_chip *gc, unsigned offset)
435{
436 struct sx150x_chip *chip = gpiochip_get_data(gc);
437 int status = -EINVAL;
438
439 if (!offset_is_oscio(chip, offset)) {
440 mutex_lock(&chip->lock);
441 status = sx150x_io_input(chip, offset);
442 mutex_unlock(&chip->lock);
443 }
444 return status;
445}
446
447static int sx150x_gpio_direction_output(struct gpio_chip *gc,
448 unsigned offset,
449 int val)
450{
451 struct sx150x_chip *chip = gpiochip_get_data(gc);
452 int status = 0;
453
454 if (!offset_is_oscio(chip, offset)) {
455 mutex_lock(&chip->lock);
456 status = sx150x_io_output(chip, offset, val);
457 mutex_unlock(&chip->lock);
458 }
459 return status;
460}
461
462static void sx150x_irq_mask(struct irq_data *d)
463{
464 struct sx150x_chip *chip = gpiochip_get_data(irq_data_get_irq_chip_data(d));
465 unsigned n = d->hwirq;
466
467 chip->irq_masked |= (1 << n);
468 chip->irq_update = n;
469}
470
471static void sx150x_irq_unmask(struct irq_data *d)
472{
473 struct sx150x_chip *chip = gpiochip_get_data(irq_data_get_irq_chip_data(d));
474 unsigned n = d->hwirq;
475
476 chip->irq_masked &= ~(1 << n);
477 chip->irq_update = n;
478}
479
480static int sx150x_irq_set_type(struct irq_data *d, unsigned int flow_type)
481{
482 struct sx150x_chip *chip = gpiochip_get_data(irq_data_get_irq_chip_data(d));
483 unsigned n, val = 0;
484
485 if (flow_type & (IRQ_TYPE_LEVEL_HIGH | IRQ_TYPE_LEVEL_LOW))
486 return -EINVAL;
487
488 n = d->hwirq;
489
490 if (flow_type & IRQ_TYPE_EDGE_RISING)
491 val |= 0x1;
492 if (flow_type & IRQ_TYPE_EDGE_FALLING)
493 val |= 0x2;
494
495 chip->irq_sense &= ~(3UL << (n * 2));
496 chip->irq_sense |= val << (n * 2);
497 chip->irq_update = n;
498 return 0;
499}
500
501static irqreturn_t sx150x_irq_thread_fn(int irq, void *dev_id)
502{
503 struct sx150x_chip *chip = (struct sx150x_chip *)dev_id;
504 unsigned nhandled = 0;
505 unsigned sub_irq;
506 unsigned n;
507 s32 err;
508 u8 val;
509 int i;
510
511 for (i = (chip->dev_cfg->ngpios / 8) - 1; i >= 0; --i) {
512 err = sx150x_i2c_read(chip->client,
513 chip->dev_cfg->reg_irq_src - i,
514 &val);
515 if (err < 0)
516 continue;
517
518 sx150x_i2c_write(chip->client,
519 chip->dev_cfg->reg_irq_src - i,
520 val);
521 for (n = 0; n < 8; ++n) {
522 if (val & (1 << n)) {
523 sub_irq = irq_find_mapping(
524 chip->gpio_chip.irqdomain,
525 (i * 8) + n);
526 handle_nested_irq(sub_irq);
527 ++nhandled;
528 }
529 }
530 }
531
532 return (nhandled > 0 ? IRQ_HANDLED : IRQ_NONE);
533}
534
535static void sx150x_irq_bus_lock(struct irq_data *d)
536{
537 struct sx150x_chip *chip = gpiochip_get_data(irq_data_get_irq_chip_data(d));
538
539 mutex_lock(&chip->lock);
540}
541
542static void sx150x_irq_bus_sync_unlock(struct irq_data *d)
543{
544 struct sx150x_chip *chip = gpiochip_get_data(irq_data_get_irq_chip_data(d));
545 unsigned n;
546
547 if (chip->irq_update == NO_UPDATE_PENDING)
548 goto out;
549
550 n = chip->irq_update;
551 chip->irq_update = NO_UPDATE_PENDING;
552
553 /* Avoid updates if nothing changed */
554 if (chip->dev_sense == chip->irq_sense &&
555 chip->dev_masked == chip->irq_masked)
556 goto out;
557
558 chip->dev_sense = chip->irq_sense;
559 chip->dev_masked = chip->irq_masked;
560
561 if (chip->irq_masked & (1 << n)) {
562 sx150x_write_cfg(chip, n, 1, chip->dev_cfg->reg_irq_mask, 1);
563 sx150x_write_cfg(chip, n, 2, chip->dev_cfg->reg_sense, 0);
564 } else {
565 sx150x_write_cfg(chip, n, 1, chip->dev_cfg->reg_irq_mask, 0);
566 sx150x_write_cfg(chip, n, 2, chip->dev_cfg->reg_sense,
567 chip->irq_sense >> (n * 2));
568 }
569out:
570 mutex_unlock(&chip->lock);
571}
572
573static void sx150x_init_chip(struct sx150x_chip *chip,
574 struct i2c_client *client,
575 kernel_ulong_t driver_data,
576 struct sx150x_platform_data *pdata)
577{
578 mutex_init(&chip->lock);
579
580 chip->client = client;
581 chip->dev_cfg = &sx150x_devices[driver_data];
582 chip->gpio_chip.parent = &client->dev;
583 chip->gpio_chip.label = client->name;
584 chip->gpio_chip.direction_input = sx150x_gpio_direction_input;
585 chip->gpio_chip.direction_output = sx150x_gpio_direction_output;
586 chip->gpio_chip.get = sx150x_gpio_get;
587 chip->gpio_chip.set = sx150x_gpio_set;
588 chip->gpio_chip.set_single_ended = sx150x_gpio_set_single_ended;
589 chip->gpio_chip.base = pdata->gpio_base;
590 chip->gpio_chip.can_sleep = true;
591 chip->gpio_chip.ngpio = chip->dev_cfg->ngpios;
592#ifdef CONFIG_OF_GPIO
593 chip->gpio_chip.of_node = client->dev.of_node;
594 chip->gpio_chip.of_gpio_n_cells = 2;
595#endif
596 if (pdata->oscio_is_gpo)
597 ++chip->gpio_chip.ngpio;
598
599 chip->irq_chip.name = client->name;
600 chip->irq_chip.irq_mask = sx150x_irq_mask;
601 chip->irq_chip.irq_unmask = sx150x_irq_unmask;
602 chip->irq_chip.irq_set_type = sx150x_irq_set_type;
603 chip->irq_chip.irq_bus_lock = sx150x_irq_bus_lock;
604 chip->irq_chip.irq_bus_sync_unlock = sx150x_irq_bus_sync_unlock;
605 chip->irq_summary = -1;
606 chip->irq_base = -1;
607 chip->irq_masked = ~0;
608 chip->irq_sense = 0;
609 chip->dev_masked = ~0;
610 chip->dev_sense = 0;
611 chip->irq_update = NO_UPDATE_PENDING;
612}
613
614static int sx150x_init_io(struct sx150x_chip *chip, u8 base, u16 cfg)
615{
616 int err = 0;
617 unsigned n;
618
619 for (n = 0; err >= 0 && n < (chip->dev_cfg->ngpios / 8); ++n)
620 err = sx150x_i2c_write(chip->client, base - n, cfg >> (n * 8));
621 return err;
622}
623
624static int sx150x_reset(struct sx150x_chip *chip)
625{
626 int err;
627
628 err = i2c_smbus_write_byte_data(chip->client,
629 chip->dev_cfg->pri.x789.reg_reset,
630 0x12);
631 if (err < 0)
632 return err;
633
634 err = i2c_smbus_write_byte_data(chip->client,
635 chip->dev_cfg->pri.x789.reg_reset,
636 0x34);
637 return err;
638}
639
640static int sx150x_init_hw(struct sx150x_chip *chip,
641 struct sx150x_platform_data *pdata)
642{
643 int err = 0;
644
645 if (pdata->reset_during_probe) {
646 err = sx150x_reset(chip);
647 if (err < 0)
648 return err;
649 }
650
651 if (chip->dev_cfg->model == SX150X_789)
652 err = sx150x_i2c_write(chip->client,
653 chip->dev_cfg->pri.x789.reg_misc,
654 0x01);
655 else if (chip->dev_cfg->model == SX150X_456)
656 err = sx150x_i2c_write(chip->client,
657 chip->dev_cfg->pri.x456.reg_advance,
658 0x04);
659 else
660 err = sx150x_i2c_write(chip->client,
661 chip->dev_cfg->pri.x123.reg_advance,
662 0x00);
663 if (err < 0)
664 return err;
665
666 err = sx150x_init_io(chip, chip->dev_cfg->reg_pullup,
667 pdata->io_pullup_ena);
668 if (err < 0)
669 return err;
670
671 err = sx150x_init_io(chip, chip->dev_cfg->reg_pulldn,
672 pdata->io_pulldn_ena);
673 if (err < 0)
674 return err;
675
676 if (chip->dev_cfg->model == SX150X_789) {
677 err = sx150x_init_io(chip,
678 chip->dev_cfg->pri.x789.reg_polarity,
679 pdata->io_polarity);
680 if (err < 0)
681 return err;
682 } else if (chip->dev_cfg->model == SX150X_456) {
683 /* Set all pins to work in normal mode */
684 err = sx150x_init_io(chip,
685 chip->dev_cfg->pri.x456.reg_pld_mode,
686 0);
687 if (err < 0)
688 return err;
689 } else {
690 /* Set all pins to work in normal mode */
691 err = sx150x_init_io(chip,
692 chip->dev_cfg->pri.x123.reg_pld_mode,
693 0);
694 if (err < 0)
695 return err;
696 }
697
698
699 if (pdata->oscio_is_gpo)
700 sx150x_set_oscio(chip, 0);
701
702 return err;
703}
704
705static int sx150x_install_irq_chip(struct sx150x_chip *chip,
706 int irq_summary,
707 int irq_base)
708{
709 int err;
710
711 chip->irq_summary = irq_summary;
712 chip->irq_base = irq_base;
713
714 /* Add gpio chip to irq subsystem */
715 err = gpiochip_irqchip_add(&chip->gpio_chip,
716 &chip->irq_chip, chip->irq_base,
717 handle_edge_irq, IRQ_TYPE_EDGE_BOTH);
718 if (err) {
719 dev_err(&chip->client->dev,
720 "could not connect irqchip to gpiochip\n");
721 return err;
722 }
723
724 err = devm_request_threaded_irq(&chip->client->dev,
725 irq_summary, NULL, sx150x_irq_thread_fn,
726 IRQF_ONESHOT | IRQF_SHARED | IRQF_TRIGGER_FALLING,
727 chip->irq_chip.name, chip);
728 if (err < 0) {
729 chip->irq_summary = -1;
730 chip->irq_base = -1;
731 }
732
733 return err;
734}
735
736static int sx150x_probe(struct i2c_client *client,
737 const struct i2c_device_id *id)
738{
739 static const u32 i2c_funcs = I2C_FUNC_SMBUS_BYTE_DATA |
740 I2C_FUNC_SMBUS_WRITE_WORD_DATA;
741 struct sx150x_platform_data *pdata;
742 struct sx150x_chip *chip;
743 int rc;
744
745 pdata = dev_get_platdata(&client->dev);
746 if (!pdata)
747 return -EINVAL;
748
749 if (!i2c_check_functionality(client->adapter, i2c_funcs))
750 return -ENOSYS;
751
752 chip = devm_kzalloc(&client->dev,
753 sizeof(struct sx150x_chip), GFP_KERNEL);
754 if (!chip)
755 return -ENOMEM;
756
757 sx150x_init_chip(chip, client, id->driver_data, pdata);
758 rc = sx150x_init_hw(chip, pdata);
759 if (rc < 0)
760 return rc;
761
762 rc = devm_gpiochip_add_data(&client->dev, &chip->gpio_chip, chip);
763 if (rc)
764 return rc;
765
766 if (pdata->irq_summary >= 0) {
767 rc = sx150x_install_irq_chip(chip,
768 pdata->irq_summary,
769 pdata->irq_base);
770 if (rc < 0)
771 return rc;
772 }
773
774 i2c_set_clientdata(client, chip);
775
776 return 0;
777}
778
779static struct i2c_driver sx150x_driver = {
780 .driver = {
781 .name = "sx150x",
782 .of_match_table = of_match_ptr(sx150x_of_match),
783 },
784 .probe = sx150x_probe,
785 .id_table = sx150x_id,
786};
787
788static int __init sx150x_init(void)
789{
790 return i2c_add_driver(&sx150x_driver);
791}
792subsys_initcall(sx150x_init);
diff --git a/drivers/gpio/gpio-tc3589x.c b/drivers/gpio/gpio-tc3589x.c
index d6e21f1a70a9..be97101c2c9a 100644
--- a/drivers/gpio/gpio-tc3589x.c
+++ b/drivers/gpio/gpio-tc3589x.c
@@ -337,21 +337,20 @@ static int tc3589x_gpio_probe(struct platform_device *pdev)
337 return ret; 337 return ret;
338 } 338 }
339 339
340 ret = gpiochip_irqchip_add(&tc3589x_gpio->chip, 340 ret = gpiochip_irqchip_add_nested(&tc3589x_gpio->chip,
341 &tc3589x_gpio_irq_chip, 341 &tc3589x_gpio_irq_chip,
342 0, 342 0,
343 handle_simple_irq, 343 handle_simple_irq,
344 IRQ_TYPE_NONE); 344 IRQ_TYPE_NONE);
345 if (ret) { 345 if (ret) {
346 dev_err(&pdev->dev, 346 dev_err(&pdev->dev,
347 "could not connect irqchip to gpiochip\n"); 347 "could not connect irqchip to gpiochip\n");
348 return ret; 348 return ret;
349 } 349 }
350 350
351 gpiochip_set_chained_irqchip(&tc3589x_gpio->chip, 351 gpiochip_set_nested_irqchip(&tc3589x_gpio->chip,
352 &tc3589x_gpio_irq_chip, 352 &tc3589x_gpio_irq_chip,
353 irq, 353 irq);
354 NULL);
355 354
356 platform_set_drvdata(pdev, tc3589x_gpio); 355 platform_set_drvdata(pdev, tc3589x_gpio);
357 356
diff --git a/drivers/gpio/gpio-vf610.c b/drivers/gpio/gpio-vf610.c
index 3edb09cb9ee0..521fbe338589 100644
--- a/drivers/gpio/gpio-vf610.c
+++ b/drivers/gpio/gpio-vf610.c
@@ -283,8 +283,4 @@ static struct platform_driver vf610_gpio_driver = {
283 .probe = vf610_gpio_probe, 283 .probe = vf610_gpio_probe,
284}; 284};
285 285
286static int __init gpio_vf610_init(void) 286builtin_platform_driver(vf610_gpio_driver);
287{
288 return platform_driver_register(&vf610_gpio_driver);
289}
290device_initcall(gpio_vf610_init);
diff --git a/drivers/gpio/gpio-wcove.c b/drivers/gpio/gpio-wcove.c
index d0ddba7a9d08..34baee5b1dd6 100644
--- a/drivers/gpio/gpio-wcove.c
+++ b/drivers/gpio/gpio-wcove.c
@@ -426,8 +426,8 @@ static int wcove_gpio_probe(struct platform_device *pdev)
426 return ret; 426 return ret;
427 } 427 }
428 428
429 ret = gpiochip_irqchip_add(&wg->chip, &wcove_irqchip, 0, 429 ret = gpiochip_irqchip_add_nested(&wg->chip, &wcove_irqchip, 0,
430 handle_simple_irq, IRQ_TYPE_NONE); 430 handle_simple_irq, IRQ_TYPE_NONE);
431 if (ret) { 431 if (ret) {
432 dev_err(dev, "Failed to add irqchip: %d\n", ret); 432 dev_err(dev, "Failed to add irqchip: %d\n", ret);
433 return ret; 433 return ret;
@@ -446,6 +446,8 @@ static int wcove_gpio_probe(struct platform_device *pdev)
446 return ret; 446 return ret;
447 } 447 }
448 448
449 gpiochip_set_nested_irqchip(&wg->chip, &wcove_irqchip, virq);
450
449 return 0; 451 return 0;
450} 452}
451 453
diff --git a/drivers/gpio/gpiolib-acpi.c b/drivers/gpio/gpiolib-acpi.c
index 72a4b326fd0d..a3faefa44f68 100644
--- a/drivers/gpio/gpiolib-acpi.c
+++ b/drivers/gpio/gpiolib-acpi.c
@@ -468,7 +468,8 @@ static int acpi_gpio_property_lookup(struct fwnode_handle *fwnode,
468 int ret; 468 int ret;
469 469
470 memset(&args, 0, sizeof(args)); 470 memset(&args, 0, sizeof(args));
471 ret = acpi_node_get_property_reference(fwnode, propname, index, &args); 471 ret = __acpi_node_get_property_reference(fwnode, propname, index, 3,
472 &args);
472 if (ret) { 473 if (ret) {
473 struct acpi_device *adev = to_acpi_device_node(fwnode); 474 struct acpi_device *adev = to_acpi_device_node(fwnode);
474 475
@@ -483,13 +484,13 @@ static int acpi_gpio_property_lookup(struct fwnode_handle *fwnode,
483 * on returned args. 484 * on returned args.
484 */ 485 */
485 lookup->adev = args.adev; 486 lookup->adev = args.adev;
486 if (args.nargs >= 2) { 487 if (args.nargs != 3)
487 lookup->index = args.args[0]; 488 return -EPROTO;
488 lookup->pin_index = args.args[1]; 489
489 /* 3rd argument, if present is used to specify active_low. */ 490 lookup->index = args.args[0];
490 if (args.nargs >= 3) 491 lookup->pin_index = args.args[1];
491 lookup->active_low = !!args.args[2]; 492 lookup->active_low = !!args.args[2];
492 } 493
493 return 0; 494 return 0;
494} 495}
495 496
@@ -859,6 +860,77 @@ static void acpi_gpiochip_free_regions(struct acpi_gpio_chip *achip)
859 } 860 }
860} 861}
861 862
863static struct gpio_desc *acpi_gpiochip_parse_own_gpio(
864 struct acpi_gpio_chip *achip, struct fwnode_handle *fwnode,
865 const char **name, unsigned int *lflags, unsigned int *dflags)
866{
867 struct gpio_chip *chip = achip->chip;
868 struct gpio_desc *desc;
869 u32 gpios[2];
870 int ret;
871
872 *lflags = 0;
873 *dflags = 0;
874 *name = NULL;
875
876 ret = fwnode_property_read_u32_array(fwnode, "gpios", gpios,
877 ARRAY_SIZE(gpios));
878 if (ret < 0)
879 return ERR_PTR(ret);
880
881 ret = acpi_gpiochip_pin_to_gpio_offset(chip->gpiodev, gpios[0]);
882 if (ret < 0)
883 return ERR_PTR(ret);
884
885 desc = gpiochip_get_desc(chip, ret);
886 if (IS_ERR(desc))
887 return desc;
888
889 if (gpios[1])
890 *lflags |= GPIO_ACTIVE_LOW;
891
892 if (fwnode_property_present(fwnode, "input"))
893 *dflags |= GPIOD_IN;
894 else if (fwnode_property_present(fwnode, "output-low"))
895 *dflags |= GPIOD_OUT_LOW;
896 else if (fwnode_property_present(fwnode, "output-high"))
897 *dflags |= GPIOD_OUT_HIGH;
898 else
899 return ERR_PTR(-EINVAL);
900
901 fwnode_property_read_string(fwnode, "line-name", name);
902
903 return desc;
904}
905
906static void acpi_gpiochip_scan_gpios(struct acpi_gpio_chip *achip)
907{
908 struct gpio_chip *chip = achip->chip;
909 struct fwnode_handle *fwnode;
910
911 device_for_each_child_node(chip->parent, fwnode) {
912 unsigned int lflags, dflags;
913 struct gpio_desc *desc;
914 const char *name;
915 int ret;
916
917 if (!fwnode_property_present(fwnode, "gpio-hog"))
918 continue;
919
920 desc = acpi_gpiochip_parse_own_gpio(achip, fwnode, &name,
921 &lflags, &dflags);
922 if (IS_ERR(desc))
923 continue;
924
925 ret = gpiod_hog(desc, name, lflags, dflags);
926 if (ret) {
927 dev_err(chip->parent, "Failed to hog GPIO\n");
928 fwnode_handle_put(fwnode);
929 return;
930 }
931 }
932}
933
862void acpi_gpiochip_add(struct gpio_chip *chip) 934void acpi_gpiochip_add(struct gpio_chip *chip)
863{ 935{
864 struct acpi_gpio_chip *acpi_gpio; 936 struct acpi_gpio_chip *acpi_gpio;
@@ -889,7 +961,11 @@ void acpi_gpiochip_add(struct gpio_chip *chip)
889 return; 961 return;
890 } 962 }
891 963
964 if (!chip->names)
965 devprop_gpiochip_set_names(chip);
966
892 acpi_gpiochip_request_regions(acpi_gpio); 967 acpi_gpiochip_request_regions(acpi_gpio);
968 acpi_gpiochip_scan_gpios(acpi_gpio);
893 acpi_walk_dep_device_list(handle); 969 acpi_walk_dep_device_list(handle);
894} 970}
895 971
@@ -918,18 +994,27 @@ void acpi_gpiochip_remove(struct gpio_chip *chip)
918 kfree(acpi_gpio); 994 kfree(acpi_gpio);
919} 995}
920 996
921static unsigned int acpi_gpio_package_count(const union acpi_object *obj) 997static int acpi_gpio_package_count(const union acpi_object *obj)
922{ 998{
923 const union acpi_object *element = obj->package.elements; 999 const union acpi_object *element = obj->package.elements;
924 const union acpi_object *end = element + obj->package.count; 1000 const union acpi_object *end = element + obj->package.count;
925 unsigned int count = 0; 1001 unsigned int count = 0;
926 1002
927 while (element < end) { 1003 while (element < end) {
928 if (element->type == ACPI_TYPE_LOCAL_REFERENCE) 1004 switch (element->type) {
1005 case ACPI_TYPE_LOCAL_REFERENCE:
1006 element += 3;
1007 /* Fallthrough */
1008 case ACPI_TYPE_INTEGER:
1009 element++;
929 count++; 1010 count++;
1011 break;
930 1012
931 element++; 1013 default:
1014 return -EPROTO;
1015 }
932 } 1016 }
1017
933 return count; 1018 return count;
934} 1019}
935 1020
diff --git a/drivers/gpio/gpiolib-devprop.c b/drivers/gpio/gpiolib-devprop.c
new file mode 100644
index 000000000000..27f383bda7d9
--- /dev/null
+++ b/drivers/gpio/gpiolib-devprop.c
@@ -0,0 +1,67 @@
1/*
2 * Device property helpers for GPIO chips.
3 *
4 * Copyright (C) 2016, Intel Corporation
5 * Author: Mika Westerberg <mika.westerberg@linux.intel.com>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11
12#include <linux/property.h>
13#include <linux/slab.h>
14#include <linux/gpio/consumer.h>
15#include <linux/gpio/driver.h>
16
17#include "gpiolib.h"
18
19/**
20 * devprop_gpiochip_set_names - Set GPIO line names using device properties
21 * @chip: GPIO chip whose lines should be named, if possible
22 *
23 * Looks for device property "gpio-line-names" and if it exists assigns
24 * GPIO line names for the chip. The memory allocated for the assigned
25 * names belong to the underlying firmware node and should not be released
26 * by the caller.
27 */
28void devprop_gpiochip_set_names(struct gpio_chip *chip)
29{
30 struct gpio_device *gdev = chip->gpiodev;
31 const char **names;
32 int ret, i;
33
34 if (!chip->parent) {
35 dev_warn(&gdev->dev, "GPIO chip parent is NULL\n");
36 return;
37 }
38
39 ret = device_property_read_string_array(chip->parent, "gpio-line-names",
40 NULL, 0);
41 if (ret < 0)
42 return;
43
44 if (ret != gdev->ngpio) {
45 dev_warn(chip->parent,
46 "names %d do not match number of GPIOs %d\n", ret,
47 gdev->ngpio);
48 return;
49 }
50
51 names = kcalloc(gdev->ngpio, sizeof(*names), GFP_KERNEL);
52 if (!names)
53 return;
54
55 ret = device_property_read_string_array(chip->parent, "gpio-line-names",
56 names, gdev->ngpio);
57 if (ret < 0) {
58 dev_warn(chip->parent, "failed to read GPIO line names\n");
59 kfree(names);
60 return;
61 }
62
63 for (i = 0; i < gdev->ngpio; i++)
64 gdev->descs[i].name = names[i];
65
66 kfree(names);
67}
diff --git a/drivers/gpio/gpiolib-of.c b/drivers/gpio/gpiolib-of.c
index 193f15d50bba..92b185f19232 100644
--- a/drivers/gpio/gpiolib-of.c
+++ b/drivers/gpio/gpiolib-of.c
@@ -226,51 +226,6 @@ static struct gpio_desc *of_parse_own_gpio(struct device_node *np,
226} 226}
227 227
228/** 228/**
229 * of_gpiochip_set_names() - set up the names of the lines
230 * @chip: GPIO chip whose lines should be named, if possible
231 */
232static void of_gpiochip_set_names(struct gpio_chip *gc)
233{
234 struct gpio_device *gdev = gc->gpiodev;
235 struct device_node *np = gc->of_node;
236 int i;
237 int nstrings;
238
239 nstrings = of_property_count_strings(np, "gpio-line-names");
240 if (nstrings <= 0)
241 /* Lines names not present */
242 return;
243
244 /* This is normally not what you want */
245 if (gdev->ngpio != nstrings)
246 dev_info(&gdev->dev, "gpio-line-names specifies %d line "
247 "names but there are %d lines on the chip\n",
248 nstrings, gdev->ngpio);
249
250 /*
251 * Make sure to not index beyond the end of the number of descriptors
252 * of the GPIO device.
253 */
254 for (i = 0; i < gdev->ngpio; i++) {
255 const char *name;
256 int ret;
257
258 ret = of_property_read_string_index(np,
259 "gpio-line-names",
260 i,
261 &name);
262 if (ret) {
263 if (ret != -ENODATA)
264 dev_err(&gdev->dev,
265 "unable to name line %d: %d\n",
266 i, ret);
267 break;
268 }
269 gdev->descs[i].name = name;
270 }
271}
272
273/**
274 * of_gpiochip_scan_gpios - Scan gpio-controller for gpio definitions 229 * of_gpiochip_scan_gpios - Scan gpio-controller for gpio definitions
275 * @chip: gpio chip to act on 230 * @chip: gpio chip to act on
276 * 231 *
@@ -296,8 +251,10 @@ static int of_gpiochip_scan_gpios(struct gpio_chip *chip)
296 continue; 251 continue;
297 252
298 ret = gpiod_hog(desc, name, lflags, dflags); 253 ret = gpiod_hog(desc, name, lflags, dflags);
299 if (ret < 0) 254 if (ret < 0) {
255 of_node_put(np);
300 return ret; 256 return ret;
257 }
301 } 258 }
302 259
303 return 0; 260 return 0;
@@ -526,7 +483,7 @@ int of_gpiochip_add(struct gpio_chip *chip)
526 483
527 /* If the chip defines names itself, these take precedence */ 484 /* If the chip defines names itself, these take precedence */
528 if (!chip->names) 485 if (!chip->names)
529 of_gpiochip_set_names(chip); 486 devprop_gpiochip_set_names(chip);
530 487
531 of_node_get(chip->of_node); 488 of_node_get(chip->of_node);
532 489
diff --git a/drivers/gpio/gpiolib.c b/drivers/gpio/gpiolib.c
index 868128a676ba..f4c26c7826cd 100644
--- a/drivers/gpio/gpiolib.c
+++ b/drivers/gpio/gpiolib.c
@@ -986,7 +986,8 @@ static int gpio_chrdev_open(struct inode *inode, struct file *filp)
986 return -ENODEV; 986 return -ENODEV;
987 get_device(&gdev->dev); 987 get_device(&gdev->dev);
988 filp->private_data = gdev; 988 filp->private_data = gdev;
989 return 0; 989
990 return nonseekable_open(inode, filp);
990} 991}
991 992
992/** 993/**
@@ -1011,7 +1012,7 @@ static const struct file_operations gpio_fileops = {
1011 .release = gpio_chrdev_release, 1012 .release = gpio_chrdev_release,
1012 .open = gpio_chrdev_open, 1013 .open = gpio_chrdev_open,
1013 .owner = THIS_MODULE, 1014 .owner = THIS_MODULE,
1014 .llseek = noop_llseek, 1015 .llseek = no_llseek,
1015 .unlocked_ioctl = gpio_ioctl, 1016 .unlocked_ioctl = gpio_ioctl,
1016#ifdef CONFIG_COMPAT 1017#ifdef CONFIG_COMPAT
1017 .compat_ioctl = gpio_ioctl_compat, 1018 .compat_ioctl = gpio_ioctl_compat,
@@ -1512,7 +1513,7 @@ static bool gpiochip_irqchip_irq_valid(const struct gpio_chip *gpiochip,
1512} 1513}
1513 1514
1514/** 1515/**
1515 * gpiochip_set_chained_irqchip() - sets a chained irqchip to a gpiochip 1516 * gpiochip_set_cascaded_irqchip() - connects a cascaded irqchip to a gpiochip
1516 * @gpiochip: the gpiochip to set the irqchip chain to 1517 * @gpiochip: the gpiochip to set the irqchip chain to
1517 * @irqchip: the irqchip to chain to the gpiochip 1518 * @irqchip: the irqchip to chain to the gpiochip
1518 * @parent_irq: the irq number corresponding to the parent IRQ for this 1519 * @parent_irq: the irq number corresponding to the parent IRQ for this
@@ -1521,10 +1522,10 @@ static bool gpiochip_irqchip_irq_valid(const struct gpio_chip *gpiochip,
1521 * coming out of the gpiochip. If the interrupt is nested rather than 1522 * coming out of the gpiochip. If the interrupt is nested rather than
1522 * cascaded, pass NULL in this handler argument 1523 * cascaded, pass NULL in this handler argument
1523 */ 1524 */
1524void gpiochip_set_chained_irqchip(struct gpio_chip *gpiochip, 1525static void gpiochip_set_cascaded_irqchip(struct gpio_chip *gpiochip,
1525 struct irq_chip *irqchip, 1526 struct irq_chip *irqchip,
1526 int parent_irq, 1527 int parent_irq,
1527 irq_flow_handler_t parent_handler) 1528 irq_flow_handler_t parent_handler)
1528{ 1529{
1529 unsigned int offset; 1530 unsigned int offset;
1530 1531
@@ -1548,7 +1549,7 @@ void gpiochip_set_chained_irqchip(struct gpio_chip *gpiochip,
1548 irq_set_chained_handler_and_data(parent_irq, parent_handler, 1549 irq_set_chained_handler_and_data(parent_irq, parent_handler,
1549 gpiochip); 1550 gpiochip);
1550 1551
1551 gpiochip->irq_parent = parent_irq; 1552 gpiochip->irq_chained_parent = parent_irq;
1552 } 1553 }
1553 1554
1554 /* Set the parent IRQ for all affected IRQs */ 1555 /* Set the parent IRQ for all affected IRQs */
@@ -1559,9 +1560,48 @@ void gpiochip_set_chained_irqchip(struct gpio_chip *gpiochip,
1559 parent_irq); 1560 parent_irq);
1560 } 1561 }
1561} 1562}
1563
1564/**
1565 * gpiochip_set_chained_irqchip() - connects a chained irqchip to a gpiochip
1566 * @gpiochip: the gpiochip to set the irqchip chain to
1567 * @irqchip: the irqchip to chain to the gpiochip
1568 * @parent_irq: the irq number corresponding to the parent IRQ for this
1569 * chained irqchip
1570 * @parent_handler: the parent interrupt handler for the accumulated IRQ
1571 * coming out of the gpiochip. If the interrupt is nested rather than
1572 * cascaded, pass NULL in this handler argument
1573 */
1574void gpiochip_set_chained_irqchip(struct gpio_chip *gpiochip,
1575 struct irq_chip *irqchip,
1576 int parent_irq,
1577 irq_flow_handler_t parent_handler)
1578{
1579 gpiochip_set_cascaded_irqchip(gpiochip, irqchip, parent_irq,
1580 parent_handler);
1581}
1562EXPORT_SYMBOL_GPL(gpiochip_set_chained_irqchip); 1582EXPORT_SYMBOL_GPL(gpiochip_set_chained_irqchip);
1563 1583
1564/** 1584/**
1585 * gpiochip_set_nested_irqchip() - connects a nested irqchip to a gpiochip
1586 * @gpiochip: the gpiochip to set the irqchip nested handler to
1587 * @irqchip: the irqchip to nest to the gpiochip
1588 * @parent_irq: the irq number corresponding to the parent IRQ for this
1589 * nested irqchip
1590 */
1591void gpiochip_set_nested_irqchip(struct gpio_chip *gpiochip,
1592 struct irq_chip *irqchip,
1593 int parent_irq)
1594{
1595 if (!gpiochip->irq_nested) {
1596 chip_err(gpiochip, "tried to nest a chained gpiochip\n");
1597 return;
1598 }
1599 gpiochip_set_cascaded_irqchip(gpiochip, irqchip, parent_irq,
1600 NULL);
1601}
1602EXPORT_SYMBOL_GPL(gpiochip_set_nested_irqchip);
1603
1604/**
1565 * gpiochip_irq_map() - maps an IRQ into a GPIO irqchip 1605 * gpiochip_irq_map() - maps an IRQ into a GPIO irqchip
1566 * @d: the irqdomain used by this irqchip 1606 * @d: the irqdomain used by this irqchip
1567 * @irq: the global irq number used by this GPIO irqchip irq 1607 * @irq: the global irq number used by this GPIO irqchip irq
@@ -1583,8 +1623,8 @@ static int gpiochip_irq_map(struct irq_domain *d, unsigned int irq,
1583 */ 1623 */
1584 irq_set_lockdep_class(irq, chip->lock_key); 1624 irq_set_lockdep_class(irq, chip->lock_key);
1585 irq_set_chip_and_handler(irq, chip->irqchip, chip->irq_handler); 1625 irq_set_chip_and_handler(irq, chip->irqchip, chip->irq_handler);
1586 /* Chips that can sleep need nested thread handlers */ 1626 /* Chips that use nested thread handlers have them marked */
1587 if (chip->can_sleep && !chip->irq_not_threaded) 1627 if (chip->irq_nested)
1588 irq_set_nested_thread(irq, 1); 1628 irq_set_nested_thread(irq, 1);
1589 irq_set_noprobe(irq); 1629 irq_set_noprobe(irq);
1590 1630
@@ -1602,7 +1642,7 @@ static void gpiochip_irq_unmap(struct irq_domain *d, unsigned int irq)
1602{ 1642{
1603 struct gpio_chip *chip = d->host_data; 1643 struct gpio_chip *chip = d->host_data;
1604 1644
1605 if (chip->can_sleep) 1645 if (chip->irq_nested)
1606 irq_set_nested_thread(irq, 0); 1646 irq_set_nested_thread(irq, 0);
1607 irq_set_chip_and_handler(irq, NULL, NULL); 1647 irq_set_chip_and_handler(irq, NULL, NULL);
1608 irq_set_chip_data(irq, NULL); 1648 irq_set_chip_data(irq, NULL);
@@ -1657,9 +1697,9 @@ static void gpiochip_irqchip_remove(struct gpio_chip *gpiochip)
1657 1697
1658 acpi_gpiochip_free_interrupts(gpiochip); 1698 acpi_gpiochip_free_interrupts(gpiochip);
1659 1699
1660 if (gpiochip->irq_parent) { 1700 if (gpiochip->irq_chained_parent) {
1661 irq_set_chained_handler(gpiochip->irq_parent, NULL); 1701 irq_set_chained_handler(gpiochip->irq_chained_parent, NULL);
1662 irq_set_handler_data(gpiochip->irq_parent, NULL); 1702 irq_set_handler_data(gpiochip->irq_chained_parent, NULL);
1663 } 1703 }
1664 1704
1665 /* Remove all IRQ mappings and delete the domain */ 1705 /* Remove all IRQ mappings and delete the domain */
@@ -1683,7 +1723,7 @@ static void gpiochip_irqchip_remove(struct gpio_chip *gpiochip)
1683} 1723}
1684 1724
1685/** 1725/**
1686 * gpiochip_irqchip_add() - adds an irqchip to a gpiochip 1726 * _gpiochip_irqchip_add() - adds an irqchip to a gpiochip
1687 * @gpiochip: the gpiochip to add the irqchip to 1727 * @gpiochip: the gpiochip to add the irqchip to
1688 * @irqchip: the irqchip to add to the gpiochip 1728 * @irqchip: the irqchip to add to the gpiochip
1689 * @first_irq: if not dynamically assigned, the base (first) IRQ to 1729 * @first_irq: if not dynamically assigned, the base (first) IRQ to
@@ -1691,6 +1731,8 @@ static void gpiochip_irqchip_remove(struct gpio_chip *gpiochip)
1691 * @handler: the irq handler to use (often a predefined irq core function) 1731 * @handler: the irq handler to use (often a predefined irq core function)
1692 * @type: the default type for IRQs on this irqchip, pass IRQ_TYPE_NONE 1732 * @type: the default type for IRQs on this irqchip, pass IRQ_TYPE_NONE
1693 * to have the core avoid setting up any default type in the hardware. 1733 * to have the core avoid setting up any default type in the hardware.
1734 * @nested: whether this is a nested irqchip calling handle_nested_irq()
1735 * in its IRQ handler
1694 * @lock_key: lockdep class 1736 * @lock_key: lockdep class
1695 * 1737 *
1696 * This function closely associates a certain irqchip with a certain 1738 * This function closely associates a certain irqchip with a certain
@@ -1712,6 +1754,7 @@ int _gpiochip_irqchip_add(struct gpio_chip *gpiochip,
1712 unsigned int first_irq, 1754 unsigned int first_irq,
1713 irq_flow_handler_t handler, 1755 irq_flow_handler_t handler,
1714 unsigned int type, 1756 unsigned int type,
1757 bool nested,
1715 struct lock_class_key *lock_key) 1758 struct lock_class_key *lock_key)
1716{ 1759{
1717 struct device_node *of_node; 1760 struct device_node *of_node;
@@ -1726,6 +1769,7 @@ int _gpiochip_irqchip_add(struct gpio_chip *gpiochip,
1726 pr_err("missing gpiochip .dev parent pointer\n"); 1769 pr_err("missing gpiochip .dev parent pointer\n");
1727 return -EINVAL; 1770 return -EINVAL;
1728 } 1771 }
1772 gpiochip->irq_nested = nested;
1729 of_node = gpiochip->parent->of_node; 1773 of_node = gpiochip->parent->of_node;
1730#ifdef CONFIG_OF_GPIO 1774#ifdef CONFIG_OF_GPIO
1731 /* 1775 /*
@@ -2223,6 +2267,7 @@ EXPORT_SYMBOL_GPL(gpiod_direction_input);
2223static int _gpiod_direction_output_raw(struct gpio_desc *desc, int value) 2267static int _gpiod_direction_output_raw(struct gpio_desc *desc, int value)
2224{ 2268{
2225 struct gpio_chip *gc = desc->gdev->chip; 2269 struct gpio_chip *gc = desc->gdev->chip;
2270 int val = !!value;
2226 int ret; 2271 int ret;
2227 2272
2228 /* GPIOs used for IRQs shall not be set as output */ 2273 /* GPIOs used for IRQs shall not be set as output */
@@ -2242,7 +2287,7 @@ static int _gpiod_direction_output_raw(struct gpio_desc *desc, int value)
2242 goto set_output_value; 2287 goto set_output_value;
2243 } 2288 }
2244 /* Emulate open drain by not actively driving the line high */ 2289 /* Emulate open drain by not actively driving the line high */
2245 if (value) 2290 if (val)
2246 return gpiod_direction_input(desc); 2291 return gpiod_direction_input(desc);
2247 } 2292 }
2248 else if (test_bit(FLAG_OPEN_SOURCE, &desc->flags)) { 2293 else if (test_bit(FLAG_OPEN_SOURCE, &desc->flags)) {
@@ -2253,7 +2298,7 @@ static int _gpiod_direction_output_raw(struct gpio_desc *desc, int value)
2253 goto set_output_value; 2298 goto set_output_value;
2254 } 2299 }
2255 /* Emulate open source by not actively driving the line low */ 2300 /* Emulate open source by not actively driving the line low */
2256 if (!value) 2301 if (!val)
2257 return gpiod_direction_input(desc); 2302 return gpiod_direction_input(desc);
2258 } else { 2303 } else {
2259 /* Make sure to disable open drain/source hardware, if any */ 2304 /* Make sure to disable open drain/source hardware, if any */
@@ -2271,10 +2316,10 @@ set_output_value:
2271 return -EIO; 2316 return -EIO;
2272 } 2317 }
2273 2318
2274 ret = gc->direction_output(gc, gpio_chip_hwgpio(desc), value); 2319 ret = gc->direction_output(gc, gpio_chip_hwgpio(desc), val);
2275 if (!ret) 2320 if (!ret)
2276 set_bit(FLAG_IS_OUT, &desc->flags); 2321 set_bit(FLAG_IS_OUT, &desc->flags);
2277 trace_gpio_value(desc_to_gpio(desc), 0, value); 2322 trace_gpio_value(desc_to_gpio(desc), 0, val);
2278 trace_gpio_direction(desc_to_gpio(desc), 0, ret); 2323 trace_gpio_direction(desc_to_gpio(desc), 0, ret);
2279 return ret; 2324 return ret;
2280} 2325}
@@ -2314,6 +2359,8 @@ int gpiod_direction_output(struct gpio_desc *desc, int value)
2314 VALIDATE_DESC(desc); 2359 VALIDATE_DESC(desc);
2315 if (test_bit(FLAG_ACTIVE_LOW, &desc->flags)) 2360 if (test_bit(FLAG_ACTIVE_LOW, &desc->flags))
2316 value = !value; 2361 value = !value;
2362 else
2363 value = !!value;
2317 return _gpiod_direction_output_raw(desc, value); 2364 return _gpiod_direction_output_raw(desc, value);
2318} 2365}
2319EXPORT_SYMBOL_GPL(gpiod_direction_output); 2366EXPORT_SYMBOL_GPL(gpiod_direction_output);
@@ -2758,6 +2805,15 @@ int gpiochip_lock_as_irq(struct gpio_chip *chip, unsigned int offset)
2758 } 2805 }
2759 2806
2760 set_bit(FLAG_USED_AS_IRQ, &desc->flags); 2807 set_bit(FLAG_USED_AS_IRQ, &desc->flags);
2808
2809 /*
2810 * If the consumer has not set up a label (such as when the
2811 * IRQ is referenced from .to_irq()) we set up a label here
2812 * so it is clear this is used as an interrupt.
2813 */
2814 if (!desc->label)
2815 desc_set_label(desc, "interrupt");
2816
2761 return 0; 2817 return 0;
2762} 2818}
2763EXPORT_SYMBOL_GPL(gpiochip_lock_as_irq); 2819EXPORT_SYMBOL_GPL(gpiochip_lock_as_irq);
@@ -2772,10 +2828,17 @@ EXPORT_SYMBOL_GPL(gpiochip_lock_as_irq);
2772 */ 2828 */
2773void gpiochip_unlock_as_irq(struct gpio_chip *chip, unsigned int offset) 2829void gpiochip_unlock_as_irq(struct gpio_chip *chip, unsigned int offset)
2774{ 2830{
2775 if (offset >= chip->ngpio) 2831 struct gpio_desc *desc;
2832
2833 desc = gpiochip_get_desc(chip, offset);
2834 if (IS_ERR(desc))
2776 return; 2835 return;
2777 2836
2778 clear_bit(FLAG_USED_AS_IRQ, &chip->gpiodev->descs[offset].flags); 2837 clear_bit(FLAG_USED_AS_IRQ, &desc->flags);
2838
2839 /* If we only had this marking, erase it */
2840 if (desc->label && !strcmp(desc->label, "interrupt"))
2841 desc_set_label(desc, NULL);
2779} 2842}
2780EXPORT_SYMBOL_GPL(gpiochip_unlock_as_irq); 2843EXPORT_SYMBOL_GPL(gpiochip_unlock_as_irq);
2781 2844
@@ -3170,7 +3233,7 @@ static int gpiod_configure_flags(struct gpio_desc *desc, const char *con_id,
3170 /* Process flags */ 3233 /* Process flags */
3171 if (dflags & GPIOD_FLAGS_BIT_DIR_OUT) 3234 if (dflags & GPIOD_FLAGS_BIT_DIR_OUT)
3172 status = gpiod_direction_output(desc, 3235 status = gpiod_direction_output(desc,
3173 dflags & GPIOD_FLAGS_BIT_DIR_VAL); 3236 !!(dflags & GPIOD_FLAGS_BIT_DIR_VAL));
3174 else 3237 else
3175 status = gpiod_direction_input(desc); 3238 status = gpiod_direction_input(desc);
3176 3239
diff --git a/drivers/gpio/gpiolib.h b/drivers/gpio/gpiolib.h
index 346fbda39220..d10eaf520860 100644
--- a/drivers/gpio/gpiolib.h
+++ b/drivers/gpio/gpiolib.h
@@ -209,6 +209,8 @@ static int __maybe_unused gpio_chip_hwgpio(const struct gpio_desc *desc)
209 return desc - &desc->gdev->descs[0]; 209 return desc - &desc->gdev->descs[0];
210} 210}
211 211
212void devprop_gpiochip_set_names(struct gpio_chip *chip);
213
212/* With descriptor prefix */ 214/* With descriptor prefix */
213 215
214#define gpiod_emerg(desc, fmt, ...) \ 216#define gpiod_emerg(desc, fmt, ...) \