Merge branch 'next' into for-linus

Prepare first round of input updates for 3.20.

1 files changed, 84 insertions, 11 deletions

diff --git a/drivers/gpio/gpio-syscon.c b/drivers/gpio/gpio-syscon.c
index 30884fbc750d..257e2989215c 100644
--- a/drivers/gpio/gpio-syscon.c
+++ b/drivers/gpio/gpio-syscon.c
@@ -37,6 +37,8 @@
  * dat_bit_offset:      Offset (in bits) to the first GPIO bit.
  * dir_bit_offset:      Optional offset (in bits) to the first bit to switch
  *                      GPIO direction (Used with GPIO_SYSCON_FEAT_DIR flag).
+ * set:         HW specific callback to assigns output value
+ *                      for signal "offset"
  */
 
 struct syscon_gpio_data {
@@ -45,12 +47,16 @@ struct syscon_gpio_data {
         unsigned int    bit_count;
         unsigned int    dat_bit_offset;
         unsigned int    dir_bit_offset;
+        void            (*set)(struct gpio_chip *chip,
+                               unsigned offset, int value);
 };
 
 struct syscon_gpio_priv {
         struct gpio_chip                chip;
         struct regmap                   *syscon;
         const struct syscon_gpio_data   *data;
+        u32                             dreg_offset;
+        u32                             dir_reg_offset;
 };
 
 static inline struct syscon_gpio_priv *to_syscon_gpio(struct gpio_chip *chip)
@@ -61,9 +67,11 @@ static inline struct syscon_gpio_priv *to_syscon_gpio(struct gpio_chip *chip)
 static int syscon_gpio_get(struct gpio_chip *chip, unsigned offset)
 {
         struct syscon_gpio_priv *priv = to_syscon_gpio(chip);
-        unsigned int val, offs = priv->data->dat_bit_offset + offset;
+        unsigned int val, offs;
         int ret;
 
+        offs = priv->dreg_offset + priv->data->dat_bit_offset + offset;
+
         ret = regmap_read(priv->syscon,
                           (offs / SYSCON_REG_BITS) * SYSCON_REG_SIZE, &val);
         if (ret)
@@ -75,7 +83,9 @@ static int syscon_gpio_get(struct gpio_chip *chip, unsigned offset)
 static void syscon_gpio_set(struct gpio_chip *chip, unsigned offset, int val)
 {
         struct syscon_gpio_priv *priv = to_syscon_gpio(chip);
-        unsigned int offs = priv->data->dat_bit_offset + offset;
+        unsigned int offs;
+
+        offs = priv->dreg_offset + priv->data->dat_bit_offset + offset;
 
         regmap_update_bits(priv->syscon,
                            (offs / SYSCON_REG_BITS) * SYSCON_REG_SIZE,
@@ -88,7 +98,10 @@ static int syscon_gpio_dir_in(struct gpio_chip *chip, unsigned offset)
         struct syscon_gpio_priv *priv = to_syscon_gpio(chip);
 
         if (priv->data->flags & GPIO_SYSCON_FEAT_DIR) {
-                unsigned int offs = priv->data->dir_bit_offset + offset;
+                unsigned int offs;
+
+                offs = priv->dir_reg_offset +
+                       priv->data->dir_bit_offset + offset;
 
                 regmap_update_bits(priv->syscon,
                                    (offs / SYSCON_REG_BITS) * SYSCON_REG_SIZE,
@@ -103,7 +116,10 @@ static int syscon_gpio_dir_out(struct gpio_chip *chip, unsigned offset, int val)
         struct syscon_gpio_priv *priv = to_syscon_gpio(chip);
 
         if (priv->data->flags & GPIO_SYSCON_FEAT_DIR) {
-                unsigned int offs = priv->data->dir_bit_offset + offset;
+                unsigned int offs;
+
+                offs = priv->dir_reg_offset +
+                       priv->data->dir_bit_offset + offset;
 
                 regmap_update_bits(priv->syscon,
                                    (offs / SYSCON_REG_BITS) * SYSCON_REG_SIZE,
@@ -111,7 +127,7 @@ static int syscon_gpio_dir_out(struct gpio_chip *chip, unsigned offset, int val)
                                    BIT(offs % SYSCON_REG_BITS));
         }
 
-        syscon_gpio_set(chip, offset, val);
+        priv->data->set(chip, offset, val);
 
         return 0;
 }
@@ -124,11 +140,46 @@ static const struct syscon_gpio_data clps711x_mctrl_gpio = {
         .dat_bit_offset = 0x40 * 8 + 8,
 };
 
+#define KEYSTONE_LOCK_BIT BIT(0)
+
+static void keystone_gpio_set(struct gpio_chip *chip, unsigned offset, int val)
+{
+        struct syscon_gpio_priv *priv = to_syscon_gpio(chip);
+        unsigned int offs;
+        int ret;
+
+        offs = priv->dreg_offset + priv->data->dat_bit_offset + offset;
+
+        if (!val)
+                return;
+
+        ret = regmap_update_bits(
+                        priv->syscon,
+                        (offs / SYSCON_REG_BITS) * SYSCON_REG_SIZE,
+                        BIT(offs % SYSCON_REG_BITS) | KEYSTONE_LOCK_BIT,
+                        BIT(offs % SYSCON_REG_BITS) | KEYSTONE_LOCK_BIT);
+        if (ret < 0)
+                dev_err(chip->dev, "gpio write failed ret(%d)\n", ret);
+}
+
+static const struct syscon_gpio_data keystone_dsp_gpio = {
+        /* ARM Keystone 2 */
+        .compatible     = NULL,
+        .flags          = GPIO_SYSCON_FEAT_OUT,
+        .bit_count      = 28,
+        .dat_bit_offset = 4,
+        .set            = keystone_gpio_set,
+};
+
 static const struct of_device_id syscon_gpio_ids[] = {
         {
                 .compatible     = "cirrus,clps711x-mctrl-gpio",
                 .data           = &clps711x_mctrl_gpio,
         },
+        {
+                .compatible     = "ti,keystone-dsp-gpio",
+                .data           = &keystone_dsp_gpio,
+        },
         { }
 };
 MODULE_DEVICE_TABLE(of, syscon_gpio_ids);
@@ -138,6 +189,8 @@ static int syscon_gpio_probe(struct platform_device *pdev)
         struct device *dev = &pdev->dev;
         const struct of_device_id *of_id = of_match_device(syscon_gpio_ids, dev);
         struct syscon_gpio_priv *priv;
+        struct device_node *np = dev->of_node;
+        int ret;
 
         priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
         if (!priv)
@@ -145,10 +198,31 @@ static int syscon_gpio_probe(struct platform_device *pdev)
 
         priv->data = of_id->data;
 
-        priv->syscon =
-                syscon_regmap_lookup_by_compatible(priv->data->compatible);
-        if (IS_ERR(priv->syscon))
-                return PTR_ERR(priv->syscon);
+        if (priv->data->compatible) {
+                priv->syscon = syscon_regmap_lookup_by_compatible(
+                                        priv->data->compatible);
+                if (IS_ERR(priv->syscon))
+                        return PTR_ERR(priv->syscon);
+        } else {
+                priv->syscon =
+                        syscon_regmap_lookup_by_phandle(np, "gpio,syscon-dev");
+                if (IS_ERR(priv->syscon))
+                        return PTR_ERR(priv->syscon);
+
+                ret = of_property_read_u32_index(np, "gpio,syscon-dev", 1,
+                                                 &priv->dreg_offset);
+                if (ret)
+                        dev_err(dev, "can't read the data register offset!\n");
+
+                priv->dreg_offset <<= 3;
+
+                ret = of_property_read_u32_index(np, "gpio,syscon-dev", 2,
+                                                 &priv->dir_reg_offset);
+                if (ret)
+                        dev_err(dev, "can't read the dir register offset!\n");
+
+                priv->dir_reg_offset <<= 3;
+        }
 
         priv->chip.dev = dev;
         priv->chip.owner = THIS_MODULE;
@@ -159,7 +233,7 @@ static int syscon_gpio_probe(struct platform_device *pdev)
         if (priv->data->flags & GPIO_SYSCON_FEAT_IN)
                 priv->chip.direction_input = syscon_gpio_dir_in;
         if (priv->data->flags & GPIO_SYSCON_FEAT_OUT) {
-                priv->chip.set = syscon_gpio_set;
+                priv->chip.set = priv->data->set ? : syscon_gpio_set;
                 priv->chip.direction_output = syscon_gpio_dir_out;
         }
 
@@ -179,7 +253,6 @@ static int syscon_gpio_remove(struct platform_device *pdev)
 static struct platform_driver syscon_gpio_driver = {
         .driver = {
                 .name           = "gpio-syscon",
-                .owner          = THIS_MODULE,
                 .of_match_table = syscon_gpio_ids,
         },
         .probe  = syscon_gpio_probe,