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authorLinus Torvalds <torvalds@linux-foundation.org>2018-08-16 00:35:38 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2018-08-16 00:35:38 -0400
commit6de4c691eab8f421e34c5250f63bf3f477d30eec (patch)
treedd3deaa163bb478b13778a712afdfccc8cf43f20 /drivers/gpio/gpio-pxa.c
parentc1c2ad82c772966d3cdb9a4852329fa2cf71853a (diff)
parenta5ec96ddfd55c501d451cb310566a1170c267ecb (diff)
Merge tag 'gpio-v4.19-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio
Pull GPIO updates from Linus Walleij: "This is the bulk of GPIO changes for the v4.19 kernel cycle. I don't know if anything in particular stands out. Maybe the Aspeed coprocessor thing from Benji: Aspeed is doing baseboard management chips (BMC's) for servers etc. These Aspeed's are ARM processors that exist inside (I guess) Intel servers, and they are moving forward to using mainline Linux in those. This is one of the pieces of the puzzle to achive that. They are doing OpenBMC, it's pretty cool: https://lwn.net/Articles/683320/ Summary: Core changes: - Add a new API for explicitly naming GPIO consumers, when needed. - Don't let userspace set values on input lines. While we do not think anyone would do this crazy thing we better plug the hole before someone uses it and think it's a nifty feature. - Avoid calling chip->request() for unused GPIOs. New drivers/subdrivers: - The Mediatek MT7621 is supported which is a big win for OpenWRT and similar router distributions using this chip, as it seems every major router manufacturer on the planet has made products using this chip: https://wikidevi.com/wiki/MediaTek_MT7621 - The Tegra 194 is now supported. - The IT87 driver now supports IT8786E and IT8718F super-IO chips. - Add support for Rockchip RK3328 in the syscon GPIO driver. Driver changes: - Handle the get/set_multiple() properly on MMIO chips with inverted direction registers. We didn't have this problem until a new chip appear that has get/set registers AND inverted direction bits, OK now we handle it. - A patch series making more error codes percolate upward properly for different errors on gpiochip_lock_as_irq(). - Get/set multiple for the OMAP driver, accelerating these multiple line operations if possible. - A coprocessor interface for the Aspeed driver. Sometimes a few GPIO lines need to be grabbed by a co-processor for doing automated tasks, sometimes they are available as GPIO lines. By adding an explicit API in this driver we make it possible for the two line consumers to coexist. (This work was made available on the ib-aspeed branch, which may be appearing in other pull requests.) - Implemented .get_direction() and open drain in the SCH311x driver. - Continuing cleanup of included headers in GPIO drivers" * tag 'gpio-v4.19-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio: (80 commits) gpio: it87: Add support for IT8613 gpio: it87: add support for IT8718F Super I/O. gpiolib: Avoid calling chip->request() for unused gpios gpio: tegra: Include the right header gpio: mmio: Fix up inverted direction registers gpio: xilinx: Use the right include gpio: timberdale: Include the right header gpio: tb10x: Use the right include gpiolib: Fix of_node inconsistency gpio: vr41xx: Bail out on gpiochip_lock_as_irq() error gpio: uniphier: Bail out on gpiochip_lock_as_irq() error gpio: xgene-sb: Don't shadow error code of gpiochip_lock_as_irq() gpio: em: Don't shadow error code of gpiochip_lock_as_irq() gpio: dwapb: Don't shadow error code of gpiochip_lock_as_irq() gpio: bcm-kona: Don't shadow error code of gpiochip_lock_as_irq() gpiolib: Don't shadow error code of gpiochip_lock_as_irq() gpio: syscon: rockchip: add GRF GPIO support for rk3328 gpio: omap: Add get/set_multiple() callbacks gpio: pxa: remove set but not used variable 'gpio_offset' gpio-it87: add support for IT8786E Super I/O ...
Diffstat (limited to 'drivers/gpio/gpio-pxa.c')
-rw-r--r--drivers/gpio/gpio-pxa.c42
1 files changed, 30 insertions, 12 deletions
diff --git a/drivers/gpio/gpio-pxa.c b/drivers/gpio/gpio-pxa.c
index 1e66f808051c..c18712dabf93 100644
--- a/drivers/gpio/gpio-pxa.c
+++ b/drivers/gpio/gpio-pxa.c
@@ -241,6 +241,17 @@ int pxa_irq_to_gpio(int irq)
241 return irq_gpio0; 241 return irq_gpio0;
242} 242}
243 243
244static bool pxa_gpio_has_pinctrl(void)
245{
246 switch (gpio_type) {
247 case PXA3XX_GPIO:
248 return false;
249
250 default:
251 return true;
252 }
253}
254
244static int pxa_gpio_to_irq(struct gpio_chip *chip, unsigned offset) 255static int pxa_gpio_to_irq(struct gpio_chip *chip, unsigned offset)
245{ 256{
246 struct pxa_gpio_chip *pchip = chip_to_pxachip(chip); 257 struct pxa_gpio_chip *pchip = chip_to_pxachip(chip);
@@ -255,9 +266,11 @@ static int pxa_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
255 unsigned long flags; 266 unsigned long flags;
256 int ret; 267 int ret;
257 268
258 ret = pinctrl_gpio_direction_input(chip->base + offset); 269 if (pxa_gpio_has_pinctrl()) {
259 if (!ret) 270 ret = pinctrl_gpio_direction_input(chip->base + offset);
260 return 0; 271 if (!ret)
272 return 0;
273 }
261 274
262 spin_lock_irqsave(&gpio_lock, flags); 275 spin_lock_irqsave(&gpio_lock, flags);
263 276
@@ -282,9 +295,11 @@ static int pxa_gpio_direction_output(struct gpio_chip *chip,
282 295
283 writel_relaxed(mask, base + (value ? GPSR_OFFSET : GPCR_OFFSET)); 296 writel_relaxed(mask, base + (value ? GPSR_OFFSET : GPCR_OFFSET));
284 297
285 ret = pinctrl_gpio_direction_output(chip->base + offset); 298 if (pxa_gpio_has_pinctrl()) {
286 if (ret) 299 ret = pinctrl_gpio_direction_output(chip->base + offset);
287 return ret; 300 if (ret)
301 return ret;
302 }
288 303
289 spin_lock_irqsave(&gpio_lock, flags); 304 spin_lock_irqsave(&gpio_lock, flags);
290 305
@@ -348,8 +363,12 @@ static int pxa_init_gpio_chip(struct pxa_gpio_chip *pchip, int ngpio,
348 pchip->chip.set = pxa_gpio_set; 363 pchip->chip.set = pxa_gpio_set;
349 pchip->chip.to_irq = pxa_gpio_to_irq; 364 pchip->chip.to_irq = pxa_gpio_to_irq;
350 pchip->chip.ngpio = ngpio; 365 pchip->chip.ngpio = ngpio;
351 pchip->chip.request = gpiochip_generic_request; 366
352 pchip->chip.free = gpiochip_generic_free; 367 if (pxa_gpio_has_pinctrl()) {
368 pchip->chip.request = gpiochip_generic_request;
369 pchip->chip.free = gpiochip_generic_free;
370 }
371
353#ifdef CONFIG_OF_GPIO 372#ifdef CONFIG_OF_GPIO
354 pchip->chip.of_node = np; 373 pchip->chip.of_node = np;
355 pchip->chip.of_xlate = pxa_gpio_of_xlate; 374 pchip->chip.of_xlate = pxa_gpio_of_xlate;
@@ -607,7 +626,7 @@ static int pxa_gpio_probe(struct platform_device *pdev)
607 struct pxa_gpio_platform_data *info; 626 struct pxa_gpio_platform_data *info;
608 void __iomem *gpio_reg_base; 627 void __iomem *gpio_reg_base;
609 int gpio, ret; 628 int gpio, ret;
610 int irq0 = 0, irq1 = 0, irq_mux, gpio_offset = 0; 629 int irq0 = 0, irq1 = 0, irq_mux;
611 630
612 pchip = devm_kzalloc(&pdev->dev, sizeof(*pchip), GFP_KERNEL); 631 pchip = devm_kzalloc(&pdev->dev, sizeof(*pchip), GFP_KERNEL);
613 if (!pchip) 632 if (!pchip)
@@ -646,14 +665,13 @@ static int pxa_gpio_probe(struct platform_device *pdev)
646 pchip->irq0 = irq0; 665 pchip->irq0 = irq0;
647 pchip->irq1 = irq1; 666 pchip->irq1 = irq1;
648 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 667 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
668 if (!res)
669 return -EINVAL;
649 gpio_reg_base = devm_ioremap(&pdev->dev, res->start, 670 gpio_reg_base = devm_ioremap(&pdev->dev, res->start,
650 resource_size(res)); 671 resource_size(res));
651 if (!gpio_reg_base) 672 if (!gpio_reg_base)
652 return -EINVAL; 673 return -EINVAL;
653 674
654 if (irq0 > 0)
655 gpio_offset = 2;
656
657 clk = clk_get(&pdev->dev, NULL); 675 clk = clk_get(&pdev->dev, NULL);
658 if (IS_ERR(clk)) { 676 if (IS_ERR(clk)) {
659 dev_err(&pdev->dev, "Error %ld to get gpio clock\n", 677 dev_err(&pdev->dev, "Error %ld to get gpio clock\n",