diff options
author | Linus Walleij <linus.walleij@linaro.org> | 2015-07-17 08:45:31 -0400 |
---|---|---|
committer | Linus Walleij <linus.walleij@linaro.org> | 2015-07-17 08:45:31 -0400 |
commit | bcae888039d5f0b522e1588c54f95a7612d1723c (patch) | |
tree | d8039698a3b74223dc94798046049e9bfcf23fe7 /drivers/gpio/gpio-msm-v2.c | |
parent | 3685bbce2ea6142e81c78e6f3d5b2a1cdc37660e (diff) | |
parent | bdac2b6dc7392668a8530d67a5f762366f57f9b4 (diff) |
Merge branch 'queue/irq/gpio' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip into devel
Diffstat (limited to 'drivers/gpio/gpio-msm-v2.c')
-rw-r--r-- | drivers/gpio/gpio-msm-v2.c | 22 |
1 files changed, 7 insertions, 15 deletions
diff --git a/drivers/gpio/gpio-msm-v2.c b/drivers/gpio/gpio-msm-v2.c index 52ff18229fdc..1f0fb19209bf 100644 --- a/drivers/gpio/gpio-msm-v2.c +++ b/drivers/gpio/gpio-msm-v2.c | |||
@@ -187,14 +187,6 @@ static int msm_gpio_to_irq(struct gpio_chip *chip, unsigned offset) | |||
187 | return irq_create_mapping(domain, offset); | 187 | return irq_create_mapping(domain, offset); |
188 | } | 188 | } |
189 | 189 | ||
190 | static inline int msm_irq_to_gpio(struct gpio_chip *chip, unsigned irq) | ||
191 | { | ||
192 | struct irq_data *irq_data = irq_get_irq_data(irq); | ||
193 | |||
194 | return irq_data->hwirq; | ||
195 | } | ||
196 | |||
197 | |||
198 | /* For dual-edge interrupts in software, since the hardware has no | 190 | /* For dual-edge interrupts in software, since the hardware has no |
199 | * such support: | 191 | * such support: |
200 | * | 192 | * |
@@ -238,7 +230,7 @@ static void msm_gpio_update_dual_edge_pos(unsigned gpio) | |||
238 | 230 | ||
239 | static void msm_gpio_irq_ack(struct irq_data *d) | 231 | static void msm_gpio_irq_ack(struct irq_data *d) |
240 | { | 232 | { |
241 | int gpio = msm_irq_to_gpio(&msm_gpio.gpio_chip, d->irq); | 233 | int gpio = d->hwirq; |
242 | 234 | ||
243 | writel(BIT(INTR_STATUS), GPIO_INTR_STATUS(gpio)); | 235 | writel(BIT(INTR_STATUS), GPIO_INTR_STATUS(gpio)); |
244 | if (test_bit(gpio, msm_gpio.dual_edge_irqs)) | 236 | if (test_bit(gpio, msm_gpio.dual_edge_irqs)) |
@@ -247,8 +239,8 @@ static void msm_gpio_irq_ack(struct irq_data *d) | |||
247 | 239 | ||
248 | static void msm_gpio_irq_mask(struct irq_data *d) | 240 | static void msm_gpio_irq_mask(struct irq_data *d) |
249 | { | 241 | { |
250 | int gpio = msm_irq_to_gpio(&msm_gpio.gpio_chip, d->irq); | ||
251 | unsigned long irq_flags; | 242 | unsigned long irq_flags; |
243 | int gpio = d->hwirq; | ||
252 | 244 | ||
253 | spin_lock_irqsave(&tlmm_lock, irq_flags); | 245 | spin_lock_irqsave(&tlmm_lock, irq_flags); |
254 | writel(TARGET_PROC_NONE, GPIO_INTR_CFG_SU(gpio)); | 246 | writel(TARGET_PROC_NONE, GPIO_INTR_CFG_SU(gpio)); |
@@ -259,8 +251,8 @@ static void msm_gpio_irq_mask(struct irq_data *d) | |||
259 | 251 | ||
260 | static void msm_gpio_irq_unmask(struct irq_data *d) | 252 | static void msm_gpio_irq_unmask(struct irq_data *d) |
261 | { | 253 | { |
262 | int gpio = msm_irq_to_gpio(&msm_gpio.gpio_chip, d->irq); | ||
263 | unsigned long irq_flags; | 254 | unsigned long irq_flags; |
255 | int gpio = d->hwirq; | ||
264 | 256 | ||
265 | spin_lock_irqsave(&tlmm_lock, irq_flags); | 257 | spin_lock_irqsave(&tlmm_lock, irq_flags); |
266 | __set_bit(gpio, msm_gpio.enabled_irqs); | 258 | __set_bit(gpio, msm_gpio.enabled_irqs); |
@@ -271,8 +263,8 @@ static void msm_gpio_irq_unmask(struct irq_data *d) | |||
271 | 263 | ||
272 | static int msm_gpio_irq_set_type(struct irq_data *d, unsigned int flow_type) | 264 | static int msm_gpio_irq_set_type(struct irq_data *d, unsigned int flow_type) |
273 | { | 265 | { |
274 | int gpio = msm_irq_to_gpio(&msm_gpio.gpio_chip, d->irq); | ||
275 | unsigned long irq_flags; | 266 | unsigned long irq_flags; |
267 | int gpio = d->hwirq; | ||
276 | uint32_t bits; | 268 | uint32_t bits; |
277 | 269 | ||
278 | spin_lock_irqsave(&tlmm_lock, irq_flags); | 270 | spin_lock_irqsave(&tlmm_lock, irq_flags); |
@@ -281,14 +273,14 @@ static int msm_gpio_irq_set_type(struct irq_data *d, unsigned int flow_type) | |||
281 | 273 | ||
282 | if (flow_type & IRQ_TYPE_EDGE_BOTH) { | 274 | if (flow_type & IRQ_TYPE_EDGE_BOTH) { |
283 | bits |= BIT(INTR_DECT_CTL); | 275 | bits |= BIT(INTR_DECT_CTL); |
284 | __irq_set_handler_locked(d->irq, handle_edge_irq); | 276 | irq_set_handler_locked(d, handle_edge_irq); |
285 | if ((flow_type & IRQ_TYPE_EDGE_BOTH) == IRQ_TYPE_EDGE_BOTH) | 277 | if ((flow_type & IRQ_TYPE_EDGE_BOTH) == IRQ_TYPE_EDGE_BOTH) |
286 | __set_bit(gpio, msm_gpio.dual_edge_irqs); | 278 | __set_bit(gpio, msm_gpio.dual_edge_irqs); |
287 | else | 279 | else |
288 | __clear_bit(gpio, msm_gpio.dual_edge_irqs); | 280 | __clear_bit(gpio, msm_gpio.dual_edge_irqs); |
289 | } else { | 281 | } else { |
290 | bits &= ~BIT(INTR_DECT_CTL); | 282 | bits &= ~BIT(INTR_DECT_CTL); |
291 | __irq_set_handler_locked(d->irq, handle_level_irq); | 283 | irq_set_handler_locked(d, handle_level_irq); |
292 | __clear_bit(gpio, msm_gpio.dual_edge_irqs); | 284 | __clear_bit(gpio, msm_gpio.dual_edge_irqs); |
293 | } | 285 | } |
294 | 286 | ||
@@ -331,7 +323,7 @@ static void msm_summary_irq_handler(unsigned int irq, struct irq_desc *desc) | |||
331 | 323 | ||
332 | static int msm_gpio_irq_set_wake(struct irq_data *d, unsigned int on) | 324 | static int msm_gpio_irq_set_wake(struct irq_data *d, unsigned int on) |
333 | { | 325 | { |
334 | int gpio = msm_irq_to_gpio(&msm_gpio.gpio_chip, d->irq); | 326 | int gpio = d->hwirq; |
335 | 327 | ||
336 | if (on) { | 328 | if (on) { |
337 | if (bitmap_empty(msm_gpio.wake_irqs, MAX_NR_GPIO)) | 329 | if (bitmap_empty(msm_gpio.wake_irqs, MAX_NR_GPIO)) |