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authorMatthew Gerlach <matthew.gerlach@linux.intel.com>2017-04-24 17:34:22 -0400
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2017-04-26 05:38:56 -0400
commitdd17cc7bf8b9447f5612c3887b84a88eeb5e3dff (patch)
tree4a416a8043b686cf86b25e244d5b08824884cdf4 /drivers/fpga
parente73bbf64907c88d3bb811756fc25548131524035 (diff)
fpga fr br: update supported version numbers
The value in the version register of the altera freeze bridge controller changed from the beta value of 2 to the value of 0xad000003 in the official release of the IP. This patch supports the old and new version numbers, and the driver's probe function will fail if neither of the supported versions is found. Signed-off-by: Matthew Gerlach <matthew.gerlach@linux.intel.com> Reviewed-by: Moritz Fischer <mdf@kernel.org> Signed-off-by: Alan Tull <atull@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/fpga')
-rw-r--r--drivers/fpga/altera-freeze-bridge.c30
1 files changed, 19 insertions, 11 deletions
diff --git a/drivers/fpga/altera-freeze-bridge.c b/drivers/fpga/altera-freeze-bridge.c
index 8c1bc7e7ee69..6159cfcf78a2 100644
--- a/drivers/fpga/altera-freeze-bridge.c
+++ b/drivers/fpga/altera-freeze-bridge.c
@@ -28,6 +28,7 @@
28#define FREEZE_CSR_REG_VERSION 12 28#define FREEZE_CSR_REG_VERSION 12
29 29
30#define FREEZE_CSR_SUPPORTED_VERSION 2 30#define FREEZE_CSR_SUPPORTED_VERSION 2
31#define FREEZE_CSR_OFFICIAL_VERSION 0xad000003
31 32
32#define FREEZE_CSR_STATUS_FREEZE_REQ_DONE BIT(0) 33#define FREEZE_CSR_STATUS_FREEZE_REQ_DONE BIT(0)
33#define FREEZE_CSR_STATUS_UNFREEZE_REQ_DONE BIT(1) 34#define FREEZE_CSR_STATUS_UNFREEZE_REQ_DONE BIT(1)
@@ -218,6 +219,7 @@ static int altera_freeze_br_probe(struct platform_device *pdev)
218{ 219{
219 struct device *dev = &pdev->dev; 220 struct device *dev = &pdev->dev;
220 struct device_node *np = pdev->dev.of_node; 221 struct device_node *np = pdev->dev.of_node;
222 void __iomem *base_addr;
221 struct altera_freeze_br_data *priv; 223 struct altera_freeze_br_data *priv;
222 struct resource *res; 224 struct resource *res;
223 u32 status, revision; 225 u32 status, revision;
@@ -225,26 +227,32 @@ static int altera_freeze_br_probe(struct platform_device *pdev)
225 if (!np) 227 if (!np)
226 return -ENODEV; 228 return -ENODEV;
227 229
230 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
231 base_addr = devm_ioremap_resource(dev, res);
232 if (IS_ERR(base_addr))
233 return PTR_ERR(base_addr);
234
235 revision = readl(base_addr + FREEZE_CSR_REG_VERSION);
236 if ((revision != FREEZE_CSR_SUPPORTED_VERSION) &&
237 (revision != FREEZE_CSR_OFFICIAL_VERSION)) {
238 dev_err(dev,
239 "%s unexpected revision 0x%x != 0x%x != 0x%x\n",
240 __func__, revision, FREEZE_CSR_SUPPORTED_VERSION,
241 FREEZE_CSR_OFFICIAL_VERSION);
242 return -EINVAL;
243 }
244
228 priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); 245 priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
229 if (!priv) 246 if (!priv)
230 return -ENOMEM; 247 return -ENOMEM;
231 248
232 priv->dev = dev; 249 priv->dev = dev;
233 250
234 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 251 status = readl(base_addr + FREEZE_CSR_STATUS_OFFSET);
235 priv->base_addr = devm_ioremap_resource(dev, res);
236 if (IS_ERR(priv->base_addr))
237 return PTR_ERR(priv->base_addr);
238
239 status = readl(priv->base_addr + FREEZE_CSR_STATUS_OFFSET);
240 if (status & FREEZE_CSR_STATUS_UNFREEZE_REQ_DONE) 252 if (status & FREEZE_CSR_STATUS_UNFREEZE_REQ_DONE)
241 priv->enable = 1; 253 priv->enable = 1;
242 254
243 revision = readl(priv->base_addr + FREEZE_CSR_REG_VERSION); 255 priv->base_addr = base_addr;
244 if (revision != FREEZE_CSR_SUPPORTED_VERSION)
245 dev_warn(dev,
246 "%s Freeze Controller unexpected revision %d != %d\n",
247 __func__, revision, FREEZE_CSR_SUPPORTED_VERSION);
248 256
249 return fpga_bridge_register(dev, FREEZE_BRIDGE_NAME, 257 return fpga_bridge_register(dev, FREEZE_BRIDGE_NAME,
250 &altera_freeze_br_br_ops, priv); 258 &altera_freeze_br_br_ops, priv);