fpga zynq: Fix incorrect ISR state on bootup

It is best practice to clear and mask all interrupts before
associating the IRQ, and this should be done after the clock
is enabled.

This corrects a bad result from zynq_fpga_ops_state on bootup
where left over latched values in INT_STS_OFFSET caused it to
report an unconfigured FPGA as configured.

After this change the boot up operating state for an unconfigured
FPGA reports 'unknown'.

Signed-off-by: Jason Gunthorpe <jgunthorpe@obsidianresearch.com>
Acked-by: Alan Tull <atull@opensource.altera.com>
Acked-by: Moritz Fischer <moritz.fischer@ettus.com>

1 files changed, 10 insertions, 7 deletions

diff --git a/drivers/fpga/zynq-fpga.c b/drivers/fpga/zynq-fpga.c
index bc8e3ec2b134..1812bf7614e1 100644
--- a/drivers/fpga/zynq-fpga.c
+++ b/drivers/fpga/zynq-fpga.c
@@ -437,13 +437,6 @@ static int zynq_fpga_probe(struct platform_device *pdev)
                 return priv->irq;
         }
 
-        err = devm_request_irq(dev, priv->irq, zynq_fpga_isr, 0,
-                               dev_name(dev), priv);
-        if (err) {
-                dev_err(dev, "unable to request IRQ\n");
-                return err;
-        }
-
         priv->clk = devm_clk_get(dev, "ref_clk");
         if (IS_ERR(priv->clk)) {
                 dev_err(dev, "input clock not found\n");
@@ -459,6 +452,16 @@ static int zynq_fpga_probe(struct platform_device *pdev)
         /* unlock the device */
         zynq_fpga_write(priv, UNLOCK_OFFSET, UNLOCK_MASK);
 
+        zynq_fpga_write(priv, INT_MASK_OFFSET, 0xFFFFFFFF);
+        zynq_fpga_write(priv, INT_STS_OFFSET, IXR_ALL_MASK);
+        err = devm_request_irq(dev, priv->irq, zynq_fpga_isr, 0, dev_name(dev),
+                               priv);
+        if (err) {
+                dev_err(dev, "unable to request IRQ\n");
+                clk_disable_unprepare(priv->clk);
+                return err;
+        }
+
         clk_disable(priv->clk);
 
         err = fpga_mgr_register(dev, "Xilinx Zynq FPGA Manager",