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authorShardar Shariff Md <smohammed@nvidia.com>2016-04-23 05:36:00 -0400
committerVinod Koul <vinod.koul@intel.com>2016-05-02 05:53:56 -0400
commit00ef4490ebfa417094014d19b1e56fde0b6c1685 (patch)
tree7b751757e49eff248bf11d7ffe02e8ad005be73e /drivers/dma
parentf55532a0c0b8bb6148f4e07853b876ef73bc69ca (diff)
dmaengine: tegra-apb: proper default init of channel slave_id
Initialize default channel slave_id(req_sel) to invalid id (i.e max supported slave id + 1) to avoid overwriting of slave_id during tegra_dma_slave_config() with client data if slave_id is not initialized through DT Signed-off-by: Shardar Shariff Md <smohammed@nvidia.com> Reviewed-by: Jon Hunter <jonathanh@nvidia.com> Tested-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Diffstat (limited to 'drivers/dma')
-rw-r--r--drivers/dma/tegra20-apb-dma.c16
1 files changed, 14 insertions, 2 deletions
diff --git a/drivers/dma/tegra20-apb-dma.c b/drivers/dma/tegra20-apb-dma.c
index 3871f29e523d..01e316f73559 100644
--- a/drivers/dma/tegra20-apb-dma.c
+++ b/drivers/dma/tegra20-apb-dma.c
@@ -54,6 +54,7 @@
54#define TEGRA_APBDMA_CSR_ONCE BIT(27) 54#define TEGRA_APBDMA_CSR_ONCE BIT(27)
55#define TEGRA_APBDMA_CSR_FLOW BIT(21) 55#define TEGRA_APBDMA_CSR_FLOW BIT(21)
56#define TEGRA_APBDMA_CSR_REQ_SEL_SHIFT 16 56#define TEGRA_APBDMA_CSR_REQ_SEL_SHIFT 16
57#define TEGRA_APBDMA_CSR_REQ_SEL_MASK 0x1F
57#define TEGRA_APBDMA_CSR_WCOUNT_MASK 0xFFFC 58#define TEGRA_APBDMA_CSR_WCOUNT_MASK 0xFFFC
58 59
59/* STATUS register */ 60/* STATUS register */
@@ -114,6 +115,8 @@
114/* Channel base address offset from APBDMA base address */ 115/* Channel base address offset from APBDMA base address */
115#define TEGRA_APBDMA_CHANNEL_BASE_ADD_OFFSET 0x1000 116#define TEGRA_APBDMA_CHANNEL_BASE_ADD_OFFSET 0x1000
116 117
118#define TEGRA_APBDMA_SLAVE_ID_INVALID (TEGRA_APBDMA_CSR_REQ_SEL_MASK + 1)
119
117struct tegra_dma; 120struct tegra_dma;
118 121
119/* 122/*
@@ -353,8 +356,11 @@ static int tegra_dma_slave_config(struct dma_chan *dc,
353 } 356 }
354 357
355 memcpy(&tdc->dma_sconfig, sconfig, sizeof(*sconfig)); 358 memcpy(&tdc->dma_sconfig, sconfig, sizeof(*sconfig));
356 if (!tdc->slave_id) 359 if (tdc->slave_id == TEGRA_APBDMA_SLAVE_ID_INVALID) {
360 if (sconfig->slave_id > TEGRA_APBDMA_CSR_REQ_SEL_MASK)
361 return -EINVAL;
357 tdc->slave_id = sconfig->slave_id; 362 tdc->slave_id = sconfig->slave_id;
363 }
358 tdc->config_init = true; 364 tdc->config_init = true;
359 return 0; 365 return 0;
360} 366}
@@ -1236,7 +1242,7 @@ static void tegra_dma_free_chan_resources(struct dma_chan *dc)
1236 } 1242 }
1237 pm_runtime_put(tdma->dev); 1243 pm_runtime_put(tdma->dev);
1238 1244
1239 tdc->slave_id = 0; 1245 tdc->slave_id = TEGRA_APBDMA_SLAVE_ID_INVALID;
1240} 1246}
1241 1247
1242static struct dma_chan *tegra_dma_of_xlate(struct of_phandle_args *dma_spec, 1248static struct dma_chan *tegra_dma_of_xlate(struct of_phandle_args *dma_spec,
@@ -1246,6 +1252,11 @@ static struct dma_chan *tegra_dma_of_xlate(struct of_phandle_args *dma_spec,
1246 struct dma_chan *chan; 1252 struct dma_chan *chan;
1247 struct tegra_dma_channel *tdc; 1253 struct tegra_dma_channel *tdc;
1248 1254
1255 if (dma_spec->args[0] > TEGRA_APBDMA_CSR_REQ_SEL_MASK) {
1256 dev_err(tdma->dev, "Invalid slave id: %d\n", dma_spec->args[0]);
1257 return NULL;
1258 }
1259
1249 chan = dma_get_any_slave_channel(&tdma->dma_dev); 1260 chan = dma_get_any_slave_channel(&tdma->dma_dev);
1250 if (!chan) 1261 if (!chan)
1251 return NULL; 1262 return NULL;
@@ -1389,6 +1400,7 @@ static int tegra_dma_probe(struct platform_device *pdev)
1389 &tdma->dma_dev.channels); 1400 &tdma->dma_dev.channels);
1390 tdc->tdma = tdma; 1401 tdc->tdma = tdma;
1391 tdc->id = i; 1402 tdc->id = i;
1403 tdc->slave_id = TEGRA_APBDMA_SLAVE_ID_INVALID;
1392 1404
1393 tasklet_init(&tdc->tasklet, tegra_dma_tasklet, 1405 tasklet_init(&tdc->tasklet, tegra_dma_tasklet,
1394 (unsigned long)tdc); 1406 (unsigned long)tdc);