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| author | Linus Torvalds <torvalds@linux-foundation.org> | 2017-09-07 17:03:05 -0400 |
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2017-09-07 17:03:05 -0400 |
| commit | cd7b34fe1c2d93c54b368c295de88612c0b7120b (patch) | |
| tree | 63e7726e2b437c79a53d1b3528d4dc685d3f84e3 /drivers/dma/ste_dma40.c | |
| parent | 75c727155ce1239c1417ba32a48c796de0d762d4 (diff) | |
| parent | 41bd0314fa3a458bee7ad768d079e681316332e7 (diff) | |
Merge tag 'dmaengine-4.14-rc1' of git://git.infradead.org/users/vkoul/slave-dma
Pull dmaengine updates from Vinod Koul:
"This one features the usual updates to the drivers and one good part
of removing DA_SG from core as it has no users.
Summary:
- Remove DMA_SG support as we have no users for this feature
- New driver for Altera / Intel mSGDMA IP core
- Support for memset in dmatest and qcom_hidma driver
- Update for non cyclic mode in k3dma, bunch of update in bam_dma,
bcm sba-raid
- Constify device ids across drivers"
* tag 'dmaengine-4.14-rc1' of git://git.infradead.org/users/vkoul/slave-dma: (52 commits)
dmaengine: sun6i: support V3s SoC variant
dmaengine: sun6i: make gate bit in sun8i's DMA engines a common quirk
dmaengine: rcar-dmac: document R8A77970 bindings
dmaengine: xilinx_dma: Fix error code format specifier
dmaengine: altera: Use macros instead of structs to describe the registers
dmaengine: ti-dma-crossbar: Fix dra7 reserve function
dmaengine: pl330: constify amba_id
dmaengine: pl08x: constify amba_id
dmaengine: bcm-sba-raid: Remove redundant SBA_REQUEST_STATE_COMPLETED
dmaengine: bcm-sba-raid: Explicitly ACK mailbox message after sending
dmaengine: bcm-sba-raid: Add debugfs support
dmaengine: bcm-sba-raid: Remove redundant SBA_REQUEST_STATE_RECEIVED
dmaengine: bcm-sba-raid: Re-factor sba_process_deferred_requests()
dmaengine: bcm-sba-raid: Pre-ack async tx descriptor
dmaengine: bcm-sba-raid: Peek mbox when we have no free requests
dmaengine: bcm-sba-raid: Alloc resources before registering DMA device
dmaengine: bcm-sba-raid: Improve sba_issue_pending() run duration
dmaengine: bcm-sba-raid: Increase number of free sba_request
dmaengine: bcm-sba-raid: Allow arbitrary number free sba_request
dmaengine: bcm-sba-raid: Remove reqs_free_count from sba_device
...
Diffstat (limited to 'drivers/dma/ste_dma40.c')
| -rw-r--r-- | drivers/dma/ste_dma40.c | 22 |
1 files changed, 2 insertions, 20 deletions
diff --git a/drivers/dma/ste_dma40.c b/drivers/dma/ste_dma40.c index c3052fbfd092..c2b089af0420 100644 --- a/drivers/dma/ste_dma40.c +++ b/drivers/dma/ste_dma40.c | |||
| @@ -79,7 +79,7 @@ static int dma40_memcpy_channels[] = { | |||
| 79 | }; | 79 | }; |
| 80 | 80 | ||
| 81 | /* Default configuration for physcial memcpy */ | 81 | /* Default configuration for physcial memcpy */ |
| 82 | static struct stedma40_chan_cfg dma40_memcpy_conf_phy = { | 82 | static const struct stedma40_chan_cfg dma40_memcpy_conf_phy = { |
| 83 | .mode = STEDMA40_MODE_PHYSICAL, | 83 | .mode = STEDMA40_MODE_PHYSICAL, |
| 84 | .dir = DMA_MEM_TO_MEM, | 84 | .dir = DMA_MEM_TO_MEM, |
| 85 | 85 | ||
| @@ -93,7 +93,7 @@ static struct stedma40_chan_cfg dma40_memcpy_conf_phy = { | |||
| 93 | }; | 93 | }; |
| 94 | 94 | ||
| 95 | /* Default configuration for logical memcpy */ | 95 | /* Default configuration for logical memcpy */ |
| 96 | static struct stedma40_chan_cfg dma40_memcpy_conf_log = { | 96 | static const struct stedma40_chan_cfg dma40_memcpy_conf_log = { |
| 97 | .mode = STEDMA40_MODE_LOGICAL, | 97 | .mode = STEDMA40_MODE_LOGICAL, |
| 98 | .dir = DMA_MEM_TO_MEM, | 98 | .dir = DMA_MEM_TO_MEM, |
| 99 | 99 | ||
| @@ -2485,19 +2485,6 @@ static struct dma_async_tx_descriptor *d40_prep_memcpy(struct dma_chan *chan, | |||
| 2485 | } | 2485 | } |
| 2486 | 2486 | ||
| 2487 | static struct dma_async_tx_descriptor * | 2487 | static struct dma_async_tx_descriptor * |
| 2488 | d40_prep_memcpy_sg(struct dma_chan *chan, | ||
| 2489 | struct scatterlist *dst_sg, unsigned int dst_nents, | ||
| 2490 | struct scatterlist *src_sg, unsigned int src_nents, | ||
| 2491 | unsigned long dma_flags) | ||
| 2492 | { | ||
| 2493 | if (dst_nents != src_nents) | ||
| 2494 | return NULL; | ||
| 2495 | |||
| 2496 | return d40_prep_sg(chan, src_sg, dst_sg, src_nents, | ||
| 2497 | DMA_MEM_TO_MEM, dma_flags); | ||
| 2498 | } | ||
| 2499 | |||
| 2500 | static struct dma_async_tx_descriptor * | ||
| 2501 | d40_prep_slave_sg(struct dma_chan *chan, struct scatterlist *sgl, | 2488 | d40_prep_slave_sg(struct dma_chan *chan, struct scatterlist *sgl, |
| 2502 | unsigned int sg_len, enum dma_transfer_direction direction, | 2489 | unsigned int sg_len, enum dma_transfer_direction direction, |
| 2503 | unsigned long dma_flags, void *context) | 2490 | unsigned long dma_flags, void *context) |
| @@ -2821,9 +2808,6 @@ static void d40_ops_init(struct d40_base *base, struct dma_device *dev) | |||
| 2821 | dev->copy_align = DMAENGINE_ALIGN_4_BYTES; | 2808 | dev->copy_align = DMAENGINE_ALIGN_4_BYTES; |
| 2822 | } | 2809 | } |
| 2823 | 2810 | ||
| 2824 | if (dma_has_cap(DMA_SG, dev->cap_mask)) | ||
| 2825 | dev->device_prep_dma_sg = d40_prep_memcpy_sg; | ||
| 2826 | |||
| 2827 | if (dma_has_cap(DMA_CYCLIC, dev->cap_mask)) | 2811 | if (dma_has_cap(DMA_CYCLIC, dev->cap_mask)) |
| 2828 | dev->device_prep_dma_cyclic = dma40_prep_dma_cyclic; | 2812 | dev->device_prep_dma_cyclic = dma40_prep_dma_cyclic; |
| 2829 | 2813 | ||
| @@ -2865,7 +2849,6 @@ static int __init d40_dmaengine_init(struct d40_base *base, | |||
| 2865 | 2849 | ||
| 2866 | dma_cap_zero(base->dma_memcpy.cap_mask); | 2850 | dma_cap_zero(base->dma_memcpy.cap_mask); |
| 2867 | dma_cap_set(DMA_MEMCPY, base->dma_memcpy.cap_mask); | 2851 | dma_cap_set(DMA_MEMCPY, base->dma_memcpy.cap_mask); |
| 2868 | dma_cap_set(DMA_SG, base->dma_memcpy.cap_mask); | ||
| 2869 | 2852 | ||
| 2870 | d40_ops_init(base, &base->dma_memcpy); | 2853 | d40_ops_init(base, &base->dma_memcpy); |
| 2871 | 2854 | ||
| @@ -2883,7 +2866,6 @@ static int __init d40_dmaengine_init(struct d40_base *base, | |||
| 2883 | dma_cap_zero(base->dma_both.cap_mask); | 2866 | dma_cap_zero(base->dma_both.cap_mask); |
| 2884 | dma_cap_set(DMA_SLAVE, base->dma_both.cap_mask); | 2867 | dma_cap_set(DMA_SLAVE, base->dma_both.cap_mask); |
| 2885 | dma_cap_set(DMA_MEMCPY, base->dma_both.cap_mask); | 2868 | dma_cap_set(DMA_MEMCPY, base->dma_both.cap_mask); |
| 2886 | dma_cap_set(DMA_SG, base->dma_both.cap_mask); | ||
| 2887 | dma_cap_set(DMA_CYCLIC, base->dma_slave.cap_mask); | 2869 | dma_cap_set(DMA_CYCLIC, base->dma_slave.cap_mask); |
| 2888 | 2870 | ||
| 2889 | d40_ops_init(base, &base->dma_both); | 2871 | d40_ops_init(base, &base->dma_both); |
