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authorUlf Hansson <ulf.hansson@linaro.org>2014-04-23 15:52:02 -0400
committerVinod Koul <vinod.koul@intel.com>2014-05-07 02:20:27 -0400
commit2dafca17c8807bc622daf111ec359a4baad550f6 (patch)
treed1e0571bda417b05881f2a10b4e86e5761322c8d /drivers/dma/ste_dma40.c
parent80245216ccbdb4b1dce4db714e0fdc692c81af6d (diff)
dma: ste_dma40: Don't require CONFIG_PM_RUNTIME
While probing, don't rely on CONFIG_PM_RUNTIME to be configured. Instead, let's power up the device and make it fully operational. Update the runtime PM status to reflect the active state. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Diffstat (limited to 'drivers/dma/ste_dma40.c')
-rw-r--r--drivers/dma/ste_dma40.c21
1 files changed, 10 insertions, 11 deletions
diff --git a/drivers/dma/ste_dma40.c b/drivers/dma/ste_dma40.c
index 6e97cf6931f1..45e809f4acda 100644
--- a/drivers/dma/ste_dma40.c
+++ b/drivers/dma/ste_dma40.c
@@ -556,7 +556,6 @@ struct d40_gen_dmac {
556 * later 556 * later
557 * @reg_val_backup_chan: Backup data for standard channel parameter registers. 557 * @reg_val_backup_chan: Backup data for standard channel parameter registers.
558 * @gcc_pwr_off_mask: Mask to maintain the channels that can be turned off. 558 * @gcc_pwr_off_mask: Mask to maintain the channels that can be turned off.
559 * @initialized: true if the dma has been initialized
560 * @gen_dmac: the struct for generic registers values to represent u8500/8540 559 * @gen_dmac: the struct for generic registers values to represent u8500/8540
561 * DMA controller 560 * DMA controller
562 */ 561 */
@@ -594,7 +593,6 @@ struct d40_base {
594 u32 reg_val_backup_v4[BACKUP_REGS_SZ_MAX]; 593 u32 reg_val_backup_v4[BACKUP_REGS_SZ_MAX];
595 u32 *reg_val_backup_chan; 594 u32 *reg_val_backup_chan;
596 u16 gcc_pwr_off_mask; 595 u16 gcc_pwr_off_mask;
597 bool initialized;
598 struct d40_gen_dmac gen_dmac; 596 struct d40_gen_dmac gen_dmac;
599}; 597};
600 598
@@ -3030,8 +3028,7 @@ static int dma40_runtime_resume(struct device *dev)
3030 struct platform_device *pdev = to_platform_device(dev); 3028 struct platform_device *pdev = to_platform_device(dev);
3031 struct d40_base *base = platform_get_drvdata(pdev); 3029 struct d40_base *base = platform_get_drvdata(pdev);
3032 3030
3033 if (base->initialized) 3031 d40_save_restore_registers(base, false);
3034 d40_save_restore_registers(base, false);
3035 3032
3036 writel_relaxed(D40_DREG_GCC_ENABLE_ALL, 3033 writel_relaxed(D40_DREG_GCC_ENABLE_ALL,
3037 base->virtbase + D40_DREG_GCC); 3034 base->virtbase + D40_DREG_GCC);
@@ -3645,12 +3642,6 @@ static int __init d40_probe(struct platform_device *pdev)
3645 goto failure; 3642 goto failure;
3646 } 3643 }
3647 3644
3648 pm_runtime_irq_safe(base->dev);
3649 pm_runtime_set_autosuspend_delay(base->dev, DMA40_AUTOSUSPEND_DELAY);
3650 pm_runtime_use_autosuspend(base->dev);
3651 pm_runtime_enable(base->dev);
3652 pm_runtime_resume(base->dev);
3653
3654 if (base->plat_data->use_esram_lcla) { 3645 if (base->plat_data->use_esram_lcla) {
3655 3646
3656 base->lcpa_regulator = regulator_get(base->dev, "lcla_esram"); 3647 base->lcpa_regulator = regulator_get(base->dev, "lcla_esram");
@@ -3671,7 +3662,15 @@ static int __init d40_probe(struct platform_device *pdev)
3671 } 3662 }
3672 } 3663 }
3673 3664
3674 base->initialized = true; 3665 writel_relaxed(D40_DREG_GCC_ENABLE_ALL, base->virtbase + D40_DREG_GCC);
3666
3667 pm_runtime_irq_safe(base->dev);
3668 pm_runtime_set_autosuspend_delay(base->dev, DMA40_AUTOSUSPEND_DELAY);
3669 pm_runtime_use_autosuspend(base->dev);
3670 pm_runtime_mark_last_busy(base->dev);
3671 pm_runtime_set_active(base->dev);
3672 pm_runtime_enable(base->dev);
3673
3675 ret = d40_dmaengine_init(base, num_reserved_chans); 3674 ret = d40_dmaengine_init(base, num_reserved_chans);
3676 if (ret) 3675 if (ret)
3677 goto failure; 3676 goto failure;