diff options
author | lionel.debieve@st.com <lionel.debieve@st.com> | 2017-07-13 09:06:31 -0400 |
---|---|---|
committer | Herbert Xu <herbert@gondor.apana.org.au> | 2017-07-28 05:55:51 -0400 |
commit | 391775191f38f807efebc1c3e58c79785d8dd526 (patch) | |
tree | ed04cf550643c4de37d07f342ae7acf5be33f981 /drivers/crypto/stm32/stm32_crc32.c | |
parent | 430f13389bdafa6fd9ce2999fed01dca8a5d79ae (diff) |
crypto: stm32 - CRC use relaxed function
In case of arm soc support, readl and writel will
be optimized using relaxed functions
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Reviewed-by: Fabien Dessenne <fabien.dessenne@st.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Diffstat (limited to 'drivers/crypto/stm32/stm32_crc32.c')
-rw-r--r-- | drivers/crypto/stm32/stm32_crc32.c | 15 |
1 files changed, 8 insertions, 7 deletions
diff --git a/drivers/crypto/stm32/stm32_crc32.c b/drivers/crypto/stm32/stm32_crc32.c index ec83b1e6bfe8..04d2f4ba310b 100644 --- a/drivers/crypto/stm32/stm32_crc32.c +++ b/drivers/crypto/stm32/stm32_crc32.c | |||
@@ -107,12 +107,12 @@ static int stm32_crc_init(struct shash_desc *desc) | |||
107 | spin_unlock_bh(&crc_list.lock); | 107 | spin_unlock_bh(&crc_list.lock); |
108 | 108 | ||
109 | /* Reset, set key, poly and configure in bit reverse mode */ | 109 | /* Reset, set key, poly and configure in bit reverse mode */ |
110 | writel(bitrev32(mctx->key), ctx->crc->regs + CRC_INIT); | 110 | writel_relaxed(bitrev32(mctx->key), ctx->crc->regs + CRC_INIT); |
111 | writel(bitrev32(mctx->poly), ctx->crc->regs + CRC_POL); | 111 | writel_relaxed(bitrev32(mctx->poly), ctx->crc->regs + CRC_POL); |
112 | writel(CRC_CR_RESET | CRC_CR_REVERSE, ctx->crc->regs + CRC_CR); | 112 | writel_relaxed(CRC_CR_RESET | CRC_CR_REVERSE, ctx->crc->regs + CRC_CR); |
113 | 113 | ||
114 | /* Store partial result */ | 114 | /* Store partial result */ |
115 | ctx->partial = readl(ctx->crc->regs + CRC_DR); | 115 | ctx->partial = readl_relaxed(ctx->crc->regs + CRC_DR); |
116 | ctx->crc->nb_pending_bytes = 0; | 116 | ctx->crc->nb_pending_bytes = 0; |
117 | 117 | ||
118 | return 0; | 118 | return 0; |
@@ -135,7 +135,8 @@ static int stm32_crc_update(struct shash_desc *desc, const u8 *d8, | |||
135 | 135 | ||
136 | if (crc->nb_pending_bytes == sizeof(u32)) { | 136 | if (crc->nb_pending_bytes == sizeof(u32)) { |
137 | /* Process completed pending data */ | 137 | /* Process completed pending data */ |
138 | writel(*(u32 *)crc->pending_data, crc->regs + CRC_DR); | 138 | writel_relaxed(*(u32 *)crc->pending_data, |
139 | crc->regs + CRC_DR); | ||
139 | crc->nb_pending_bytes = 0; | 140 | crc->nb_pending_bytes = 0; |
140 | } | 141 | } |
141 | } | 142 | } |
@@ -143,10 +144,10 @@ static int stm32_crc_update(struct shash_desc *desc, const u8 *d8, | |||
143 | d32 = (u32 *)d8; | 144 | d32 = (u32 *)d8; |
144 | for (i = 0; i < length >> 2; i++) | 145 | for (i = 0; i < length >> 2; i++) |
145 | /* Process 32 bits data */ | 146 | /* Process 32 bits data */ |
146 | writel(*(d32++), crc->regs + CRC_DR); | 147 | writel_relaxed(*(d32++), crc->regs + CRC_DR); |
147 | 148 | ||
148 | /* Store partial result */ | 149 | /* Store partial result */ |
149 | ctx->partial = readl(crc->regs + CRC_DR); | 150 | ctx->partial = readl_relaxed(crc->regs + CRC_DR); |
150 | 151 | ||
151 | /* Check for pending data (non 32 bits) */ | 152 | /* Check for pending data (non 32 bits) */ |
152 | length &= 3; | 153 | length &= 3; |