diff options
author | Pingchao Yang <pingchao.yang@intel.com> | 2015-07-15 18:28:26 -0400 |
---|---|---|
committer | Herbert Xu <herbert@gondor.apana.org.au> | 2015-07-17 09:20:15 -0400 |
commit | f3dd7e60d2028b8391dea7a3b214e3083dadf6d6 (patch) | |
tree | dbf91be47aecfd8f0af89e07e7e572b2b4aee8cb /drivers/crypto/qat | |
parent | 544c436a8ecec2dc162c63116025da0e4e66ea4e (diff) |
crypto: qat - add support for MMP FW
Load Modular Math Processor(MMP) firmware into QAT devices to support
public key algorithm acceleration.
Signed-off-by: Pingchao Yang <pingchao.yang@intel.com>
Signed-off-by: Tadeusz Struk <tadeusz.struk@intel.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Diffstat (limited to 'drivers/crypto/qat')
-rw-r--r-- | drivers/crypto/qat/qat_common/adf_accel_devices.h | 1 | ||||
-rw-r--r-- | drivers/crypto/qat/qat_common/adf_common_drv.h | 2 | ||||
-rw-r--r-- | drivers/crypto/qat/qat_common/qat_hal.c | 13 | ||||
-rw-r--r-- | drivers/crypto/qat/qat_common/qat_uclo.c | 27 | ||||
-rw-r--r-- | drivers/crypto/qat/qat_dh895xcc/adf_dh895xcc_hw_data.c | 6 | ||||
-rw-r--r-- | drivers/crypto/qat/qat_dh895xcc/adf_dh895xcc_hw_data.h | 1 |
6 files changed, 24 insertions, 26 deletions
diff --git a/drivers/crypto/qat/qat_common/adf_accel_devices.h b/drivers/crypto/qat/qat_common/adf_accel_devices.h index 5fe902967620..91c969eb6e6b 100644 --- a/drivers/crypto/qat/qat_common/adf_accel_devices.h +++ b/drivers/crypto/qat/qat_common/adf_accel_devices.h | |||
@@ -135,6 +135,7 @@ struct adf_hw_device_data { | |||
135 | struct adf_hw_device_class *dev_class; | 135 | struct adf_hw_device_class *dev_class; |
136 | uint32_t (*get_accel_mask)(uint32_t fuse); | 136 | uint32_t (*get_accel_mask)(uint32_t fuse); |
137 | uint32_t (*get_ae_mask)(uint32_t fuse); | 137 | uint32_t (*get_ae_mask)(uint32_t fuse); |
138 | uint32_t (*get_sram_bar_id)(struct adf_hw_device_data *self); | ||
138 | uint32_t (*get_misc_bar_id)(struct adf_hw_device_data *self); | 139 | uint32_t (*get_misc_bar_id)(struct adf_hw_device_data *self); |
139 | uint32_t (*get_etr_bar_id)(struct adf_hw_device_data *self); | 140 | uint32_t (*get_etr_bar_id)(struct adf_hw_device_data *self); |
140 | uint32_t (*get_num_aes)(struct adf_hw_device_data *self); | 141 | uint32_t (*get_num_aes)(struct adf_hw_device_data *self); |
diff --git a/drivers/crypto/qat/qat_common/adf_common_drv.h b/drivers/crypto/qat/qat_common/adf_common_drv.h index 27e16c09230b..1e82ad4bf43d 100644 --- a/drivers/crypto/qat/qat_common/adf_common_drv.h +++ b/drivers/crypto/qat/qat_common/adf_common_drv.h | |||
@@ -196,4 +196,6 @@ int qat_uclo_wr_all_uimage(struct icp_qat_fw_loader_handle *handle); | |||
196 | void qat_uclo_del_uof_obj(struct icp_qat_fw_loader_handle *handle); | 196 | void qat_uclo_del_uof_obj(struct icp_qat_fw_loader_handle *handle); |
197 | int qat_uclo_map_uof_obj(struct icp_qat_fw_loader_handle *handle, | 197 | int qat_uclo_map_uof_obj(struct icp_qat_fw_loader_handle *handle, |
198 | void *addr_ptr, int mem_size); | 198 | void *addr_ptr, int mem_size); |
199 | void qat_uclo_wr_mimage(struct icp_qat_fw_loader_handle *handle, | ||
200 | void *addr_ptr, int mem_size); | ||
199 | #endif | 201 | #endif |
diff --git a/drivers/crypto/qat/qat_common/qat_hal.c b/drivers/crypto/qat/qat_common/qat_hal.c index 274ff7e9de6e..1d6d28916590 100644 --- a/drivers/crypto/qat/qat_common/qat_hal.c +++ b/drivers/crypto/qat/qat_common/qat_hal.c | |||
@@ -679,21 +679,24 @@ int qat_hal_init(struct adf_accel_dev *accel_dev) | |||
679 | struct icp_qat_fw_loader_handle *handle; | 679 | struct icp_qat_fw_loader_handle *handle; |
680 | struct adf_accel_pci *pci_info = &accel_dev->accel_pci_dev; | 680 | struct adf_accel_pci *pci_info = &accel_dev->accel_pci_dev; |
681 | struct adf_hw_device_data *hw_data = accel_dev->hw_device; | 681 | struct adf_hw_device_data *hw_data = accel_dev->hw_device; |
682 | struct adf_bar *bar = | 682 | struct adf_bar *misc_bar = |
683 | &pci_info->pci_bars[hw_data->get_misc_bar_id(hw_data)]; | 683 | &pci_info->pci_bars[hw_data->get_misc_bar_id(hw_data)]; |
684 | struct adf_bar *sram_bar = | ||
685 | &pci_info->pci_bars[hw_data->get_sram_bar_id(hw_data)]; | ||
684 | 686 | ||
685 | handle = kzalloc(sizeof(*handle), GFP_KERNEL); | 687 | handle = kzalloc(sizeof(*handle), GFP_KERNEL); |
686 | if (!handle) | 688 | if (!handle) |
687 | return -ENOMEM; | 689 | return -ENOMEM; |
688 | 690 | ||
689 | handle->hal_cap_g_ctl_csr_addr_v = bar->virt_addr + | 691 | handle->hal_cap_g_ctl_csr_addr_v = misc_bar->virt_addr + |
690 | ICP_DH895XCC_CAP_OFFSET; | 692 | ICP_DH895XCC_CAP_OFFSET; |
691 | handle->hal_cap_ae_xfer_csr_addr_v = bar->virt_addr + | 693 | handle->hal_cap_ae_xfer_csr_addr_v = misc_bar->virt_addr + |
692 | ICP_DH895XCC_AE_OFFSET; | 694 | ICP_DH895XCC_AE_OFFSET; |
693 | handle->hal_ep_csr_addr_v = bar->virt_addr + ICP_DH895XCC_EP_OFFSET; | 695 | handle->hal_ep_csr_addr_v = misc_bar->virt_addr + |
696 | ICP_DH895XCC_EP_OFFSET; | ||
694 | handle->hal_cap_ae_local_csr_addr_v = | 697 | handle->hal_cap_ae_local_csr_addr_v = |
695 | handle->hal_cap_ae_xfer_csr_addr_v + LOCAL_TO_XFER_REG_OFFSET; | 698 | handle->hal_cap_ae_xfer_csr_addr_v + LOCAL_TO_XFER_REG_OFFSET; |
696 | 699 | handle->hal_sram_addr_v = sram_bar->virt_addr; | |
697 | handle->hal_handle = kzalloc(sizeof(*handle->hal_handle), GFP_KERNEL); | 700 | handle->hal_handle = kzalloc(sizeof(*handle->hal_handle), GFP_KERNEL); |
698 | if (!handle->hal_handle) | 701 | if (!handle->hal_handle) |
699 | goto out_hal_handle; | 702 | goto out_hal_handle; |
diff --git a/drivers/crypto/qat/qat_common/qat_uclo.c b/drivers/crypto/qat/qat_common/qat_uclo.c index 1e27f9f7fddf..c48f181e8941 100644 --- a/drivers/crypto/qat/qat_common/qat_uclo.c +++ b/drivers/crypto/qat/qat_common/qat_uclo.c | |||
@@ -359,28 +359,7 @@ static int qat_uclo_init_umem_seg(struct icp_qat_fw_loader_handle *handle, | |||
359 | static int qat_uclo_init_ae_memory(struct icp_qat_fw_loader_handle *handle, | 359 | static int qat_uclo_init_ae_memory(struct icp_qat_fw_loader_handle *handle, |
360 | struct icp_qat_uof_initmem *init_mem) | 360 | struct icp_qat_uof_initmem *init_mem) |
361 | { | 361 | { |
362 | unsigned int i; | ||
363 | struct icp_qat_uof_memvar_attr *mem_val_attr; | ||
364 | |||
365 | mem_val_attr = | ||
366 | (struct icp_qat_uof_memvar_attr *)((unsigned long)init_mem + | ||
367 | sizeof(struct icp_qat_uof_initmem)); | ||
368 | |||
369 | switch (init_mem->region) { | 362 | switch (init_mem->region) { |
370 | case ICP_QAT_UOF_SRAM_REGION: | ||
371 | if ((init_mem->addr + init_mem->num_in_bytes) > | ||
372 | ICP_DH895XCC_PESRAM_BAR_SIZE) { | ||
373 | pr_err("QAT: initmem on SRAM is out of range"); | ||
374 | return -EINVAL; | ||
375 | } | ||
376 | for (i = 0; i < init_mem->val_attr_num; i++) { | ||
377 | qat_uclo_wr_sram_by_words(handle, | ||
378 | init_mem->addr + | ||
379 | mem_val_attr->offset_in_byte, | ||
380 | &mem_val_attr->value, 4); | ||
381 | mem_val_attr++; | ||
382 | } | ||
383 | break; | ||
384 | case ICP_QAT_UOF_LMEM_REGION: | 363 | case ICP_QAT_UOF_LMEM_REGION: |
385 | if (qat_uclo_init_lmem_seg(handle, init_mem)) | 364 | if (qat_uclo_init_lmem_seg(handle, init_mem)) |
386 | return -EINVAL; | 365 | return -EINVAL; |
@@ -990,6 +969,12 @@ out_err: | |||
990 | return -EFAULT; | 969 | return -EFAULT; |
991 | } | 970 | } |
992 | 971 | ||
972 | void qat_uclo_wr_mimage(struct icp_qat_fw_loader_handle *handle, | ||
973 | void *addr_ptr, int mem_size) | ||
974 | { | ||
975 | qat_uclo_wr_sram_by_words(handle, 0, addr_ptr, ALIGN(mem_size, 4)); | ||
976 | } | ||
977 | |||
993 | int qat_uclo_map_uof_obj(struct icp_qat_fw_loader_handle *handle, | 978 | int qat_uclo_map_uof_obj(struct icp_qat_fw_loader_handle *handle, |
994 | void *addr_ptr, int mem_size) | 979 | void *addr_ptr, int mem_size) |
995 | { | 980 | { |
diff --git a/drivers/crypto/qat/qat_dh895xcc/adf_dh895xcc_hw_data.c b/drivers/crypto/qat/qat_dh895xcc/adf_dh895xcc_hw_data.c index b1386922d7a2..7093fc0fe8da 100644 --- a/drivers/crypto/qat/qat_dh895xcc/adf_dh895xcc_hw_data.c +++ b/drivers/crypto/qat/qat_dh895xcc/adf_dh895xcc_hw_data.c | |||
@@ -117,6 +117,11 @@ static uint32_t get_etr_bar_id(struct adf_hw_device_data *self) | |||
117 | return ADF_DH895XCC_ETR_BAR; | 117 | return ADF_DH895XCC_ETR_BAR; |
118 | } | 118 | } |
119 | 119 | ||
120 | static uint32_t get_sram_bar_id(struct adf_hw_device_data *self) | ||
121 | { | ||
122 | return ADF_DH895XCC_SRAM_BAR; | ||
123 | } | ||
124 | |||
120 | static enum dev_sku_info get_sku(struct adf_hw_device_data *self) | 125 | static enum dev_sku_info get_sku(struct adf_hw_device_data *self) |
121 | { | 126 | { |
122 | int sku = (self->fuses & ADF_DH895XCC_FUSECTL_SKU_MASK) | 127 | int sku = (self->fuses & ADF_DH895XCC_FUSECTL_SKU_MASK) |
@@ -219,6 +224,7 @@ void adf_init_hw_data_dh895xcc(struct adf_hw_device_data *hw_data) | |||
219 | hw_data->get_num_aes = get_num_aes; | 224 | hw_data->get_num_aes = get_num_aes; |
220 | hw_data->get_etr_bar_id = get_etr_bar_id; | 225 | hw_data->get_etr_bar_id = get_etr_bar_id; |
221 | hw_data->get_misc_bar_id = get_misc_bar_id; | 226 | hw_data->get_misc_bar_id = get_misc_bar_id; |
227 | hw_data->get_sram_bar_id = get_sram_bar_id; | ||
222 | hw_data->get_sku = get_sku; | 228 | hw_data->get_sku = get_sku; |
223 | hw_data->fw_name = ADF_DH895XCC_FW; | 229 | hw_data->fw_name = ADF_DH895XCC_FW; |
224 | hw_data->init_admin_comms = adf_init_admin_comms; | 230 | hw_data->init_admin_comms = adf_init_admin_comms; |
diff --git a/drivers/crypto/qat/qat_dh895xcc/adf_dh895xcc_hw_data.h b/drivers/crypto/qat/qat_dh895xcc/adf_dh895xcc_hw_data.h index 25269a9f24a2..87fb1fadb4b2 100644 --- a/drivers/crypto/qat/qat_dh895xcc/adf_dh895xcc_hw_data.h +++ b/drivers/crypto/qat/qat_dh895xcc/adf_dh895xcc_hw_data.h | |||
@@ -48,6 +48,7 @@ | |||
48 | #define ADF_DH895x_HW_DATA_H_ | 48 | #define ADF_DH895x_HW_DATA_H_ |
49 | 49 | ||
50 | /* PCIe configuration space */ | 50 | /* PCIe configuration space */ |
51 | #define ADF_DH895XCC_SRAM_BAR 0 | ||
51 | #define ADF_DH895XCC_PMISC_BAR 1 | 52 | #define ADF_DH895XCC_PMISC_BAR 1 |
52 | #define ADF_DH895XCC_ETR_BAR 2 | 53 | #define ADF_DH895XCC_ETR_BAR 2 |
53 | #define ADF_DH895XCC_RX_RINGS_OFFSET 8 | 54 | #define ADF_DH895XCC_RX_RINGS_OFFSET 8 |