diff options
author | Ezequiel Garcia <ezequiel.garcia@free-electrons.com> | 2013-08-13 10:43:10 -0400 |
---|---|---|
committer | Daniel Lezcano <daniel.lezcano@linaro.org> | 2013-09-02 15:40:05 -0400 |
commit | ad48bd618f3761922c53f08e05fe00f3c85ca275 (patch) | |
tree | 593d78fd4b677b8a7fe3b3fe44e9a81cdb72b501 /drivers/clocksource | |
parent | 887708f0ac7641e7d5131409cedf6774f26f0cb6 (diff) |
clocksource: armada-370-xp: Use BIT()
This is a purely cosmetic commit: we replace hardcoded values that
representing bits by BIT(), which is slightly more readable.
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Diffstat (limited to 'drivers/clocksource')
-rw-r--r-- | drivers/clocksource/time-armada-370-xp.c | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/drivers/clocksource/time-armada-370-xp.c b/drivers/clocksource/time-armada-370-xp.c index 1b04b7e1d39b..a3d273943bce 100644 --- a/drivers/clocksource/time-armada-370-xp.c +++ b/drivers/clocksource/time-armada-370-xp.c | |||
@@ -35,13 +35,13 @@ | |||
35 | * Timer block registers. | 35 | * Timer block registers. |
36 | */ | 36 | */ |
37 | #define TIMER_CTRL_OFF 0x0000 | 37 | #define TIMER_CTRL_OFF 0x0000 |
38 | #define TIMER0_EN 0x0001 | 38 | #define TIMER0_EN BIT(0) |
39 | #define TIMER0_RELOAD_EN 0x0002 | 39 | #define TIMER0_RELOAD_EN BIT(1) |
40 | #define TIMER0_25MHZ 0x0800 | 40 | #define TIMER0_25MHZ BIT(11) |
41 | #define TIMER0_DIV(div) ((div) << 19) | 41 | #define TIMER0_DIV(div) ((div) << 19) |
42 | #define TIMER1_EN 0x0004 | 42 | #define TIMER1_EN BIT(2) |
43 | #define TIMER1_RELOAD_EN 0x0008 | 43 | #define TIMER1_RELOAD_EN BIT(3) |
44 | #define TIMER1_25MHZ 0x1000 | 44 | #define TIMER1_25MHZ BIT(12) |
45 | #define TIMER1_DIV(div) ((div) << 22) | 45 | #define TIMER1_DIV(div) ((div) << 22) |
46 | #define TIMER_EVENTS_STATUS 0x0004 | 46 | #define TIMER_EVENTS_STATUS 0x0004 |
47 | #define TIMER0_CLR_MASK (~0x1) | 47 | #define TIMER0_CLR_MASK (~0x1) |