diff options
| author | Joel Stanley <joel@jms.id.au> | 2016-07-21 09:43:51 -0400 |
|---|---|---|
| committer | Daniel Lezcano <daniel.lezcano@linaro.org> | 2016-09-09 08:15:21 -0400 |
| commit | 70164742783c371516199271d923731afc40e25e (patch) | |
| tree | b76b01857aaf96a4c3f89782c443724539a41fc2 /drivers/clocksource | |
| parent | 950d8381d915ee293a5b57f91e59dd8115684af1 (diff) | |
clocksource/drivers/moxart: Refactor enable/disable
This patch abstracts the enable and disable register writes into their
own functions in preparation for future changes to use SoC specific
values for the writes.
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Diffstat (limited to 'drivers/clocksource')
| -rw-r--r-- | drivers/clocksource/moxart_timer.c | 22 |
1 files changed, 16 insertions, 6 deletions
diff --git a/drivers/clocksource/moxart_timer.c b/drivers/clocksource/moxart_timer.c index 841454417acd..a3aaa5658a49 100644 --- a/drivers/clocksource/moxart_timer.c +++ b/drivers/clocksource/moxart_timer.c | |||
| @@ -58,15 +58,25 @@ | |||
| 58 | static void __iomem *base; | 58 | static void __iomem *base; |
| 59 | static unsigned int clock_count_per_tick; | 59 | static unsigned int clock_count_per_tick; |
| 60 | 60 | ||
| 61 | static int moxart_shutdown(struct clock_event_device *evt) | 61 | static inline void moxart_disable(struct clock_event_device *evt) |
| 62 | { | 62 | { |
| 63 | writel(TIMER1_DISABLE, base + TIMER_CR); | 63 | writel(TIMER1_DISABLE, base + TIMER_CR); |
| 64 | } | ||
| 65 | |||
| 66 | static inline void moxart_enable(struct clock_event_device *evt) | ||
| 67 | { | ||
| 68 | writel(TIMER1_ENABLE, base + TIMER_CR); | ||
| 69 | } | ||
| 70 | |||
| 71 | static int moxart_shutdown(struct clock_event_device *evt) | ||
| 72 | { | ||
| 73 | moxart_disable(evt); | ||
| 64 | return 0; | 74 | return 0; |
| 65 | } | 75 | } |
| 66 | 76 | ||
| 67 | static int moxart_set_oneshot(struct clock_event_device *evt) | 77 | static int moxart_set_oneshot(struct clock_event_device *evt) |
| 68 | { | 78 | { |
| 69 | writel(TIMER1_DISABLE, base + TIMER_CR); | 79 | moxart_disable(evt); |
| 70 | writel(~0, base + TIMER1_BASE + REG_LOAD); | 80 | writel(~0, base + TIMER1_BASE + REG_LOAD); |
| 71 | return 0; | 81 | return 0; |
| 72 | } | 82 | } |
| @@ -74,21 +84,21 @@ static int moxart_set_oneshot(struct clock_event_device *evt) | |||
| 74 | static int moxart_set_periodic(struct clock_event_device *evt) | 84 | static int moxart_set_periodic(struct clock_event_device *evt) |
| 75 | { | 85 | { |
| 76 | writel(clock_count_per_tick, base + TIMER1_BASE + REG_LOAD); | 86 | writel(clock_count_per_tick, base + TIMER1_BASE + REG_LOAD); |
| 77 | writel(TIMER1_ENABLE, base + TIMER_CR); | 87 | moxart_enable(evt); |
| 78 | return 0; | 88 | return 0; |
| 79 | } | 89 | } |
| 80 | 90 | ||
| 81 | static int moxart_clkevt_next_event(unsigned long cycles, | 91 | static int moxart_clkevt_next_event(unsigned long cycles, |
| 82 | struct clock_event_device *unused) | 92 | struct clock_event_device *evt) |
| 83 | { | 93 | { |
| 84 | u32 u; | 94 | u32 u; |
| 85 | 95 | ||
| 86 | writel(TIMER1_DISABLE, base + TIMER_CR); | 96 | moxart_disable(evt); |
| 87 | 97 | ||
| 88 | u = readl(base + TIMER1_BASE + REG_COUNT) - cycles; | 98 | u = readl(base + TIMER1_BASE + REG_COUNT) - cycles; |
| 89 | writel(u, base + TIMER1_BASE + REG_MATCH1); | 99 | writel(u, base + TIMER1_BASE + REG_MATCH1); |
| 90 | 100 | ||
| 91 | writel(TIMER1_ENABLE, base + TIMER_CR); | 101 | moxart_enable(evt); |
| 92 | 102 | ||
| 93 | return 0; | 103 | return 0; |
| 94 | } | 104 | } |
