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authorDaniel Lezcano <daniel.lezcano@linaro.org>2016-06-06 11:58:27 -0400
committerDaniel Lezcano <daniel.lezcano@linaro.org>2016-06-28 04:19:25 -0400
commitbe3aff842d646f64c1c82e3ee8a0ba14c0319a30 (patch)
tree9c8e3e55fe6aaba7170df683fdccfa15ab90357a /drivers/clocksource/pxa_timer.c
parente46105aff5e53b27844541ebe0de5089268c6692 (diff)
clocksource/drivers/pxa: Convert init function to return error
The init functions do not return any error. They behave as the following: - panic, thus leading to a kernel crash while another timer may work and make the system boot up correctly or - print an error and let the caller unaware if the state of the system Change that by converting the init functions to return an error conforming to the CLOCKSOURCE_OF_RET prototype. Proper error handling (rollback, errno value) will be changed later case by case, thus this change just return back an error or success in the init function. Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Diffstat (limited to 'drivers/clocksource/pxa_timer.c')
-rw-r--r--drivers/clocksource/pxa_timer.c46
1 files changed, 33 insertions, 13 deletions
diff --git a/drivers/clocksource/pxa_timer.c b/drivers/clocksource/pxa_timer.c
index 45b6a4999713..59af75cc4c74 100644
--- a/drivers/clocksource/pxa_timer.c
+++ b/drivers/clocksource/pxa_timer.c
@@ -150,8 +150,10 @@ static struct irqaction pxa_ost0_irq = {
150 .dev_id = &ckevt_pxa_osmr0, 150 .dev_id = &ckevt_pxa_osmr0,
151}; 151};
152 152
153static void __init pxa_timer_common_init(int irq, unsigned long clock_tick_rate) 153static int __init pxa_timer_common_init(int irq, unsigned long clock_tick_rate)
154{ 154{
155 int ret;
156
155 timer_writel(0, OIER); 157 timer_writel(0, OIER);
156 timer_writel(OSSR_M0 | OSSR_M1 | OSSR_M2 | OSSR_M3, OSSR); 158 timer_writel(OSSR_M0 | OSSR_M1 | OSSR_M2 | OSSR_M3, OSSR);
157 159
@@ -159,41 +161,59 @@ static void __init pxa_timer_common_init(int irq, unsigned long clock_tick_rate)
159 161
160 ckevt_pxa_osmr0.cpumask = cpumask_of(0); 162 ckevt_pxa_osmr0.cpumask = cpumask_of(0);
161 163
162 setup_irq(irq, &pxa_ost0_irq); 164 ret = setup_irq(irq, &pxa_ost0_irq);
165 if (ret) {
166 pr_err("Failed to setup irq");
167 return ret;
168 }
169
170 ret = clocksource_mmio_init(timer_base + OSCR, "oscr0", clock_tick_rate, 200,
171 32, clocksource_mmio_readl_up);
172 if (ret) {
173 pr_err("Failed to init clocksource");
174 return ret;
175 }
163 176
164 clocksource_mmio_init(timer_base + OSCR, "oscr0", clock_tick_rate, 200,
165 32, clocksource_mmio_readl_up);
166 clockevents_config_and_register(&ckevt_pxa_osmr0, clock_tick_rate, 177 clockevents_config_and_register(&ckevt_pxa_osmr0, clock_tick_rate,
167 MIN_OSCR_DELTA * 2, 0x7fffffff); 178 MIN_OSCR_DELTA * 2, 0x7fffffff);
179
180 return 0;
168} 181}
169 182
170static void __init pxa_timer_dt_init(struct device_node *np) 183static int __init pxa_timer_dt_init(struct device_node *np)
171{ 184{
172 struct clk *clk; 185 struct clk *clk;
173 int irq; 186 int irq, ret;
174 187
175 /* timer registers are shared with watchdog timer */ 188 /* timer registers are shared with watchdog timer */
176 timer_base = of_iomap(np, 0); 189 timer_base = of_iomap(np, 0);
177 if (!timer_base) 190 if (!timer_base) {
178 panic("%s: unable to map resource\n", np->name); 191 pr_err("%s: unable to map resource\n", np->name);
192 return -ENXIO;
193 }
179 194
180 clk = of_clk_get(np, 0); 195 clk = of_clk_get(np, 0);
181 if (IS_ERR(clk)) { 196 if (IS_ERR(clk)) {
182 pr_crit("%s: unable to get clk\n", np->name); 197 pr_crit("%s: unable to get clk\n", np->name);
183 return; 198 return PTR_ERR(clk);
199 }
200
201 ret = clk_prepare_enable(clk);
202 if (ret) {
203 pr_crit("Failed to prepare clock");
204 return ret;
184 } 205 }
185 clk_prepare_enable(clk);
186 206
187 /* we are only interested in OS-timer0 irq */ 207 /* we are only interested in OS-timer0 irq */
188 irq = irq_of_parse_and_map(np, 0); 208 irq = irq_of_parse_and_map(np, 0);
189 if (irq <= 0) { 209 if (irq <= 0) {
190 pr_crit("%s: unable to parse OS-timer0 irq\n", np->name); 210 pr_crit("%s: unable to parse OS-timer0 irq\n", np->name);
191 return; 211 return -EINVAL;
192 } 212 }
193 213
194 pxa_timer_common_init(irq, clk_get_rate(clk)); 214 return pxa_timer_common_init(irq, clk_get_rate(clk));
195} 215}
196CLOCKSOURCE_OF_DECLARE(pxa_timer, "marvell,pxa-timer", pxa_timer_dt_init); 216CLOCKSOURCE_OF_DECLARE_RET(pxa_timer, "marvell,pxa-timer", pxa_timer_dt_init);
197 217
198/* 218/*
199 * Legacy timer init for non device-tree boards. 219 * Legacy timer init for non device-tree boards.