diff options
| author | Chanwoo Choi <cw00.choi@samsung.com> | 2016-08-24 09:49:05 -0400 |
|---|---|---|
| committer | Krzysztof Kozlowski <k.kozlowski@samsung.com> | 2016-09-16 07:07:53 -0400 |
| commit | f1a4c1f33319e9d826df0ec040665501c6e8dca8 (patch) | |
| tree | 7dd5253c09b1f5481645ad77d1755aab717b9402 /drivers/clocksource/exynos_mct.c | |
| parent | 29b4817d4018df78086157ea3a55c1d9424a7cfc (diff) | |
clocksource: exynos_mct: Add the support for ARM64
This patch allows building and compile-testing the driver also for
ARM64. The delay_timer is only supported on ARMv7.
Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Kukjin Kim <kgene@kernel.org>
Cc: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org>
[k.kozlowski: Adjusted commit msg]
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Diffstat (limited to 'drivers/clocksource/exynos_mct.c')
| -rw-r--r-- | drivers/clocksource/exynos_mct.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/drivers/clocksource/exynos_mct.c b/drivers/clocksource/exynos_mct.c index 41840d02c331..8f3488b80896 100644 --- a/drivers/clocksource/exynos_mct.c +++ b/drivers/clocksource/exynos_mct.c | |||
| @@ -223,6 +223,7 @@ static u64 notrace exynos4_read_sched_clock(void) | |||
| 223 | return exynos4_read_count_32(); | 223 | return exynos4_read_count_32(); |
| 224 | } | 224 | } |
| 225 | 225 | ||
| 226 | #if defined(CONFIG_ARM) | ||
| 226 | static struct delay_timer exynos4_delay_timer; | 227 | static struct delay_timer exynos4_delay_timer; |
| 227 | 228 | ||
| 228 | static cycles_t exynos4_read_current_timer(void) | 229 | static cycles_t exynos4_read_current_timer(void) |
| @@ -231,14 +232,17 @@ static cycles_t exynos4_read_current_timer(void) | |||
| 231 | "cycles_t needs to move to 32-bit for ARM64 usage"); | 232 | "cycles_t needs to move to 32-bit for ARM64 usage"); |
| 232 | return exynos4_read_count_32(); | 233 | return exynos4_read_count_32(); |
| 233 | } | 234 | } |
| 235 | #endif | ||
| 234 | 236 | ||
| 235 | static int __init exynos4_clocksource_init(void) | 237 | static int __init exynos4_clocksource_init(void) |
| 236 | { | 238 | { |
| 237 | exynos4_mct_frc_start(); | 239 | exynos4_mct_frc_start(); |
| 238 | 240 | ||
| 241 | #if defined(CONFIG_ARM) | ||
| 239 | exynos4_delay_timer.read_current_timer = &exynos4_read_current_timer; | 242 | exynos4_delay_timer.read_current_timer = &exynos4_read_current_timer; |
| 240 | exynos4_delay_timer.freq = clk_rate; | 243 | exynos4_delay_timer.freq = clk_rate; |
| 241 | register_current_timer_delay(&exynos4_delay_timer); | 244 | register_current_timer_delay(&exynos4_delay_timer); |
| 245 | #endif | ||
| 242 | 246 | ||
| 243 | if (clocksource_register_hz(&mct_frc, clk_rate)) | 247 | if (clocksource_register_hz(&mct_frc, clk_rate)) |
| 244 | panic("%s: can't register clocksource\n", mct_frc.name); | 248 | panic("%s: can't register clocksource\n", mct_frc.name); |
