diff options
author | Vincent Guittot <vincent.guittot@linaro.org> | 2014-05-02 09:27:01 -0400 |
---|---|---|
committer | Kukjin Kim <kgene.kim@samsung.com> | 2014-05-02 09:27:01 -0400 |
commit | 93bfb769752babdc4d3665a1fb166bb4e3ff927b (patch) | |
tree | 688ed1499913e8fdedf70caa46c0d3c225786c4c /drivers/clocksource/exynos_mct.c | |
parent | c9eaa447e77efe77b7fa4c953bd62de8297fd6c5 (diff) |
clocksource: exynos_mct: register sched_clock callback
Use the clocksource mct-frc for sched_clock
Signed-off-by: Vincent Guittot <vincent.guittot@linaro.org>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'drivers/clocksource/exynos_mct.c')
-rw-r--r-- | drivers/clocksource/exynos_mct.c | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/drivers/clocksource/exynos_mct.c b/drivers/clocksource/exynos_mct.c index a6ee6d7cd63f..ea4dfc097790 100644 --- a/drivers/clocksource/exynos_mct.c +++ b/drivers/clocksource/exynos_mct.c | |||
@@ -24,6 +24,7 @@ | |||
24 | #include <linux/of_irq.h> | 24 | #include <linux/of_irq.h> |
25 | #include <linux/of_address.h> | 25 | #include <linux/of_address.h> |
26 | #include <linux/clocksource.h> | 26 | #include <linux/clocksource.h> |
27 | #include <linux/sched_clock.h> | ||
27 | 28 | ||
28 | #define EXYNOS4_MCTREG(x) (x) | 29 | #define EXYNOS4_MCTREG(x) (x) |
29 | #define EXYNOS4_MCT_G_CNT_L EXYNOS4_MCTREG(0x100) | 30 | #define EXYNOS4_MCT_G_CNT_L EXYNOS4_MCTREG(0x100) |
@@ -192,12 +193,19 @@ struct clocksource mct_frc = { | |||
192 | .resume = exynos4_frc_resume, | 193 | .resume = exynos4_frc_resume, |
193 | }; | 194 | }; |
194 | 195 | ||
196 | static u64 notrace exynos4_read_sched_clock(void) | ||
197 | { | ||
198 | return exynos4_frc_read(&mct_frc); | ||
199 | } | ||
200 | |||
195 | static void __init exynos4_clocksource_init(void) | 201 | static void __init exynos4_clocksource_init(void) |
196 | { | 202 | { |
197 | exynos4_mct_frc_start(0, 0); | 203 | exynos4_mct_frc_start(0, 0); |
198 | 204 | ||
199 | if (clocksource_register_hz(&mct_frc, clk_rate)) | 205 | if (clocksource_register_hz(&mct_frc, clk_rate)) |
200 | panic("%s: can't register clocksource\n", mct_frc.name); | 206 | panic("%s: can't register clocksource\n", mct_frc.name); |
207 | |||
208 | sched_clock_register(exynos4_read_sched_clock, 64, clk_rate); | ||
201 | } | 209 | } |
202 | 210 | ||
203 | static void exynos4_mct_comp0_stop(void) | 211 | static void exynos4_mct_comp0_stop(void) |