arm_arch_timer: Expose event stream status

The arch timer configuration for a CPU might get reset after suspending
said CPU.

In order to reliably use the event stream in the kernel (e.g. for delays),
we keep track of the state where we can safely consider the event stream as
properly configured. After writing to cntkctl, we issue an ISB to ensure
that subsequent delay loops can rely on the event stream being enabled.

Signed-off-by: Julien Thierry <julien.thierry@arm.com>
Acked-by: Mark Rutland <mark.rutland@arm.com>
Cc: Marc Zyngier <marc.zyngier@arm.com>
Cc: Russell King <linux@armlinux.org.uk>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>

1 files changed, 22 insertions, 3 deletions

diff --git a/drivers/clocksource/arm_arch_timer.c b/drivers/clocksource/arm_arch_timer.c
index fd4b7f684bd0..13e6baa13a89 100644
--- a/drivers/clocksource/arm_arch_timer.c
+++ b/drivers/clocksource/arm_arch_timer.c
@@ -77,6 +77,7 @@ static bool arch_timer_mem_use_virtual;
 static bool arch_counter_suspend_stop;
 static bool vdso_default = true;
 
+static cpumask_t evtstrm_available = CPU_MASK_NONE;
 static bool evtstrm_enable = IS_ENABLED(CONFIG_ARM_ARCH_TIMER_EVTSTREAM);
 
 static int __init early_evtstrm_cfg(char *buf)
@@ -740,6 +741,7 @@ static void arch_timer_evtstrm_enable(int divider)
 #ifdef CONFIG_COMPAT
         compat_elf_hwcap |= COMPAT_HWCAP_EVTSTRM;
 #endif
+        cpumask_set_cpu(smp_processor_id(), &evtstrm_available);
 }
 
 static void arch_timer_configure_evtstream(void)
@@ -864,6 +866,16 @@ u32 arch_timer_get_rate(void)
         return arch_timer_rate;
 }
 
+bool arch_timer_evtstrm_available(void)
+{
+        /*
+         * We might get called from a preemptible context. This is fine
+         * because availability of the event stream should be always the same
+         * for a preemptible context and context where we might resume a task.
+         */
+        return cpumask_test_cpu(raw_smp_processor_id(), &evtstrm_available);
+}
+
 static u64 arch_counter_get_cntvct_mem(void)
 {
         u32 vct_lo, vct_hi, tmp_hi;
@@ -929,6 +941,8 @@ static int arch_timer_dying_cpu(unsigned int cpu)
 {
         struct clock_event_device *clk = this_cpu_ptr(arch_timer_evt);
 
+        cpumask_clear_cpu(smp_processor_id(), &evtstrm_available);
+
         arch_timer_stop(clk);
         return 0;
 }
@@ -938,10 +952,16 @@ static DEFINE_PER_CPU(unsigned long, saved_cntkctl);
 static int arch_timer_cpu_pm_notify(struct notifier_block *self,
                                     unsigned long action, void *hcpu)
 {
-        if (action == CPU_PM_ENTER)
+        if (action == CPU_PM_ENTER) {
                 __this_cpu_write(saved_cntkctl, arch_timer_get_cntkctl());
-        else if (action == CPU_PM_ENTER_FAILED || action == CPU_PM_EXIT)
+
+                cpumask_clear_cpu(smp_processor_id(), &evtstrm_available);
+        } else if (action == CPU_PM_ENTER_FAILED || action == CPU_PM_EXIT) {
                 arch_timer_set_cntkctl(__this_cpu_read(saved_cntkctl));
+
+                if (elf_hwcap & HWCAP_EVTSTRM)
+                        cpumask_set_cpu(smp_processor_id(), &evtstrm_available);
+        }
         return NOTIFY_OK;
 }
 
@@ -1017,7 +1037,6 @@ static int __init arch_timer_register(void)
         if (err)
                 goto out_unreg_notify;
 
-
         /* Register and immediately configure the timer on the boot CPU */
         err = cpuhp_setup_state(CPUHP_AP_ARM_ARCH_TIMER_STARTING,
                                 "clockevents/arm/arch_timer:starting",