arm64: Restrict ARM64_ERRATUM_1188873 mitigation to AArch32

We currently deal with ARM64_ERRATUM_1188873 by always trapping EL0
accesses for both instruction sets. Although nothing wrong comes out
of that, people trying to squeeze the last drop of performance from
buggy HW find this over the top. Oh well.

Let's change the mitigation by flipping the counter enable bit
on return to userspace. Non-broken HW gets an extra branch on
the fast path, which is hopefully not the end of the world.
The arch timer workaround is also removed.

Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>

1 files changed, 0 insertions, 15 deletions

diff --git a/drivers/clocksource/arm_arch_timer.c b/drivers/clocksource/arm_arch_timer.c
index aa4ec53281ce..da11a9508b77 100644
--- a/drivers/clocksource/arm_arch_timer.c
+++ b/drivers/clocksource/arm_arch_timer.c
@@ -319,13 +319,6 @@ static u64 notrace arm64_858921_read_cntvct_el0(void)
 }
 #endif
 
-#ifdef CONFIG_ARM64_ERRATUM_1188873
-static u64 notrace arm64_1188873_read_cntvct_el0(void)
-{
-        return read_sysreg(cntvct_el0);
-}
-#endif
-
 #ifdef CONFIG_SUN50I_ERRATUM_UNKNOWN1
 /*
  * The low bits of the counter registers are indeterminate while bit 10 or
@@ -457,14 +450,6 @@ static const struct arch_timer_erratum_workaround ool_workarounds[] = {
                 .read_cntvct_el0 = arm64_858921_read_cntvct_el0,
         },
 #endif
-#ifdef CONFIG_ARM64_ERRATUM_1188873
-        {
-                .match_type = ate_match_local_cap_id,
-                .id = (void *)ARM64_WORKAROUND_1188873,
-                .desc = "ARM erratum 1188873",
-                .read_cntvct_el0 = arm64_1188873_read_cntvct_el0,
-        },
-#endif
 #ifdef CONFIG_SUN50I_ERRATUM_UNKNOWN1
         {
                 .match_type = ate_match_dt,