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authorStephen Boyd <sboyd@codeaurora.org>2016-03-01 13:59:52 -0500
committerStephen Boyd <sboyd@codeaurora.org>2016-04-15 19:50:01 -0400
commit536630ddbffb97e5a9de76a2d793ec118413e758 (patch)
tree8f43bef946c98bf4ba952bf521f59ee29f58806b /drivers/clk
parentf2d32b623c774ee63151a308a6bd79b4e543a4ee (diff)
clk: mmp: Remove CLK_IS_ROOT
This flag is a no-op now. Remove usage of the flag. Cc: Chao Xie <chao.xie@marvell.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Diffstat (limited to 'drivers/clk')
-rw-r--r--drivers/clk/mmp/clk-mmp2.c14
-rw-r--r--drivers/clk/mmp/clk-of-mmp2.c10
-rw-r--r--drivers/clk/mmp/clk-of-pxa168.c8
-rw-r--r--drivers/clk/mmp/clk-of-pxa1928.c12
-rw-r--r--drivers/clk/mmp/clk-of-pxa910.c8
-rw-r--r--drivers/clk/mmp/clk-pxa168.c8
-rw-r--r--drivers/clk/mmp/clk-pxa910.c8
7 files changed, 30 insertions, 38 deletions
diff --git a/drivers/clk/mmp/clk-mmp2.c b/drivers/clk/mmp/clk-mmp2.c
index 38931dbd1eff..383f6a4f64f0 100644
--- a/drivers/clk/mmp/clk-mmp2.c
+++ b/drivers/clk/mmp/clk-mmp2.c
@@ -99,23 +99,19 @@ void __init mmp2_clk_init(phys_addr_t mpmu_phys, phys_addr_t apmu_phys,
99 return; 99 return;
100 } 100 }
101 101
102 clk = clk_register_fixed_rate(NULL, "clk32", NULL, CLK_IS_ROOT, 3200); 102 clk = clk_register_fixed_rate(NULL, "clk32", NULL, 0, 3200);
103 clk_register_clkdev(clk, "clk32", NULL); 103 clk_register_clkdev(clk, "clk32", NULL);
104 104
105 vctcxo = clk_register_fixed_rate(NULL, "vctcxo", NULL, CLK_IS_ROOT, 105 vctcxo = clk_register_fixed_rate(NULL, "vctcxo", NULL, 0, 26000000);
106 26000000);
107 clk_register_clkdev(vctcxo, "vctcxo", NULL); 106 clk_register_clkdev(vctcxo, "vctcxo", NULL);
108 107
109 clk = clk_register_fixed_rate(NULL, "pll1", NULL, CLK_IS_ROOT, 108 clk = clk_register_fixed_rate(NULL, "pll1", NULL, 0, 800000000);
110 800000000);
111 clk_register_clkdev(clk, "pll1", NULL); 109 clk_register_clkdev(clk, "pll1", NULL);
112 110
113 clk = clk_register_fixed_rate(NULL, "usb_pll", NULL, CLK_IS_ROOT, 111 clk = clk_register_fixed_rate(NULL, "usb_pll", NULL, 0, 480000000);
114 480000000);
115 clk_register_clkdev(clk, "usb_pll", NULL); 112 clk_register_clkdev(clk, "usb_pll", NULL);
116 113
117 clk = clk_register_fixed_rate(NULL, "pll2", NULL, CLK_IS_ROOT, 114 clk = clk_register_fixed_rate(NULL, "pll2", NULL, 0, 960000000);
118 960000000);
119 clk_register_clkdev(clk, "pll2", NULL); 115 clk_register_clkdev(clk, "pll2", NULL);
120 116
121 clk = clk_register_fixed_factor(NULL, "pll1_2", "pll1", 117 clk = clk_register_fixed_factor(NULL, "pll1_2", "pll1",
diff --git a/drivers/clk/mmp/clk-of-mmp2.c b/drivers/clk/mmp/clk-of-mmp2.c
index 251533d87c65..3a51fff1b0e7 100644
--- a/drivers/clk/mmp/clk-of-mmp2.c
+++ b/drivers/clk/mmp/clk-of-mmp2.c
@@ -63,11 +63,11 @@ struct mmp2_clk_unit {
63}; 63};
64 64
65static struct mmp_param_fixed_rate_clk fixed_rate_clks[] = { 65static struct mmp_param_fixed_rate_clk fixed_rate_clks[] = {
66 {MMP2_CLK_CLK32, "clk32", NULL, CLK_IS_ROOT, 32768}, 66 {MMP2_CLK_CLK32, "clk32", NULL, 0, 32768},
67 {MMP2_CLK_VCTCXO, "vctcxo", NULL, CLK_IS_ROOT, 26000000}, 67 {MMP2_CLK_VCTCXO, "vctcxo", NULL, 0, 26000000},
68 {MMP2_CLK_PLL1, "pll1", NULL, CLK_IS_ROOT, 800000000}, 68 {MMP2_CLK_PLL1, "pll1", NULL, 0, 800000000},
69 {MMP2_CLK_PLL2, "pll2", NULL, CLK_IS_ROOT, 960000000}, 69 {MMP2_CLK_PLL2, "pll2", NULL, 0, 960000000},
70 {MMP2_CLK_USB_PLL, "usb_pll", NULL, CLK_IS_ROOT, 480000000}, 70 {MMP2_CLK_USB_PLL, "usb_pll", NULL, 0, 480000000},
71}; 71};
72 72
73static struct mmp_param_fixed_factor_clk fixed_factor_clks[] = { 73static struct mmp_param_fixed_factor_clk fixed_factor_clks[] = {
diff --git a/drivers/clk/mmp/clk-of-pxa168.c b/drivers/clk/mmp/clk-of-pxa168.c
index 64eaf4141c69..87f2317b2a00 100644
--- a/drivers/clk/mmp/clk-of-pxa168.c
+++ b/drivers/clk/mmp/clk-of-pxa168.c
@@ -56,10 +56,10 @@ struct pxa168_clk_unit {
56}; 56};
57 57
58static struct mmp_param_fixed_rate_clk fixed_rate_clks[] = { 58static struct mmp_param_fixed_rate_clk fixed_rate_clks[] = {
59 {PXA168_CLK_CLK32, "clk32", NULL, CLK_IS_ROOT, 32768}, 59 {PXA168_CLK_CLK32, "clk32", NULL, 0, 32768},
60 {PXA168_CLK_VCTCXO, "vctcxo", NULL, CLK_IS_ROOT, 26000000}, 60 {PXA168_CLK_VCTCXO, "vctcxo", NULL, 0, 26000000},
61 {PXA168_CLK_PLL1, "pll1", NULL, CLK_IS_ROOT, 624000000}, 61 {PXA168_CLK_PLL1, "pll1", NULL, 0, 624000000},
62 {PXA168_CLK_USB_PLL, "usb_pll", NULL, CLK_IS_ROOT, 480000000}, 62 {PXA168_CLK_USB_PLL, "usb_pll", NULL, 0, 480000000},
63}; 63};
64 64
65static struct mmp_param_fixed_factor_clk fixed_factor_clks[] = { 65static struct mmp_param_fixed_factor_clk fixed_factor_clks[] = {
diff --git a/drivers/clk/mmp/clk-of-pxa1928.c b/drivers/clk/mmp/clk-of-pxa1928.c
index 433a5ae1eae0..e478ff44e170 100644
--- a/drivers/clk/mmp/clk-of-pxa1928.c
+++ b/drivers/clk/mmp/clk-of-pxa1928.c
@@ -34,12 +34,12 @@ struct pxa1928_clk_unit {
34}; 34};
35 35
36static struct mmp_param_fixed_rate_clk fixed_rate_clks[] = { 36static struct mmp_param_fixed_rate_clk fixed_rate_clks[] = {
37 {0, "clk32", NULL, CLK_IS_ROOT, 32768}, 37 {0, "clk32", NULL, 0, 32768},
38 {0, "vctcxo", NULL, CLK_IS_ROOT, 26000000}, 38 {0, "vctcxo", NULL, 0, 26000000},
39 {0, "pll1_624", NULL, CLK_IS_ROOT, 624000000}, 39 {0, "pll1_624", NULL, 0, 624000000},
40 {0, "pll5p", NULL, CLK_IS_ROOT, 832000000}, 40 {0, "pll5p", NULL, 0, 832000000},
41 {0, "pll5", NULL, CLK_IS_ROOT, 1248000000}, 41 {0, "pll5", NULL, 0, 1248000000},
42 {0, "usb_pll", NULL, CLK_IS_ROOT, 480000000}, 42 {0, "usb_pll", NULL, 0, 480000000},
43}; 43};
44 44
45static struct mmp_param_fixed_factor_clk fixed_factor_clks[] = { 45static struct mmp_param_fixed_factor_clk fixed_factor_clks[] = {
diff --git a/drivers/clk/mmp/clk-of-pxa910.c b/drivers/clk/mmp/clk-of-pxa910.c
index 13d6173326a4..e22a67f76d93 100644
--- a/drivers/clk/mmp/clk-of-pxa910.c
+++ b/drivers/clk/mmp/clk-of-pxa910.c
@@ -56,10 +56,10 @@ struct pxa910_clk_unit {
56}; 56};
57 57
58static struct mmp_param_fixed_rate_clk fixed_rate_clks[] = { 58static struct mmp_param_fixed_rate_clk fixed_rate_clks[] = {
59 {PXA910_CLK_CLK32, "clk32", NULL, CLK_IS_ROOT, 32768}, 59 {PXA910_CLK_CLK32, "clk32", NULL, 0, 32768},
60 {PXA910_CLK_VCTCXO, "vctcxo", NULL, CLK_IS_ROOT, 26000000}, 60 {PXA910_CLK_VCTCXO, "vctcxo", NULL, 0, 26000000},
61 {PXA910_CLK_PLL1, "pll1", NULL, CLK_IS_ROOT, 624000000}, 61 {PXA910_CLK_PLL1, "pll1", NULL, 0, 624000000},
62 {PXA910_CLK_USB_PLL, "usb_pll", NULL, CLK_IS_ROOT, 480000000}, 62 {PXA910_CLK_USB_PLL, "usb_pll", NULL, 0, 480000000},
63}; 63};
64 64
65static struct mmp_param_fixed_factor_clk fixed_factor_clks[] = { 65static struct mmp_param_fixed_factor_clk fixed_factor_clks[] = {
diff --git a/drivers/clk/mmp/clk-pxa168.c b/drivers/clk/mmp/clk-pxa168.c
index 0dd83fb950c9..a9ef9209532a 100644
--- a/drivers/clk/mmp/clk-pxa168.c
+++ b/drivers/clk/mmp/clk-pxa168.c
@@ -92,15 +92,13 @@ void __init pxa168_clk_init(phys_addr_t mpmu_phys, phys_addr_t apmu_phys,
92 return; 92 return;
93 } 93 }
94 94
95 clk = clk_register_fixed_rate(NULL, "clk32", NULL, CLK_IS_ROOT, 3200); 95 clk = clk_register_fixed_rate(NULL, "clk32", NULL, 0, 3200);
96 clk_register_clkdev(clk, "clk32", NULL); 96 clk_register_clkdev(clk, "clk32", NULL);
97 97
98 clk = clk_register_fixed_rate(NULL, "vctcxo", NULL, CLK_IS_ROOT, 98 clk = clk_register_fixed_rate(NULL, "vctcxo", NULL, 0, 26000000);
99 26000000);
100 clk_register_clkdev(clk, "vctcxo", NULL); 99 clk_register_clkdev(clk, "vctcxo", NULL);
101 100
102 clk = clk_register_fixed_rate(NULL, "pll1", NULL, CLK_IS_ROOT, 101 clk = clk_register_fixed_rate(NULL, "pll1", NULL, 0, 624000000);
103 624000000);
104 clk_register_clkdev(clk, "pll1", NULL); 102 clk_register_clkdev(clk, "pll1", NULL);
105 103
106 clk = clk_register_fixed_factor(NULL, "pll1_2", "pll1", 104 clk = clk_register_fixed_factor(NULL, "pll1_2", "pll1",
diff --git a/drivers/clk/mmp/clk-pxa910.c b/drivers/clk/mmp/clk-pxa910.c
index e1d2ce22cdf1..a520cf7702a1 100644
--- a/drivers/clk/mmp/clk-pxa910.c
+++ b/drivers/clk/mmp/clk-pxa910.c
@@ -97,15 +97,13 @@ void __init pxa910_clk_init(phys_addr_t mpmu_phys, phys_addr_t apmu_phys,
97 return; 97 return;
98 } 98 }
99 99
100 clk = clk_register_fixed_rate(NULL, "clk32", NULL, CLK_IS_ROOT, 3200); 100 clk = clk_register_fixed_rate(NULL, "clk32", NULL, 0, 3200);
101 clk_register_clkdev(clk, "clk32", NULL); 101 clk_register_clkdev(clk, "clk32", NULL);
102 102
103 clk = clk_register_fixed_rate(NULL, "vctcxo", NULL, CLK_IS_ROOT, 103 clk = clk_register_fixed_rate(NULL, "vctcxo", NULL, 0, 26000000);
104 26000000);
105 clk_register_clkdev(clk, "vctcxo", NULL); 104 clk_register_clkdev(clk, "vctcxo", NULL);
106 105
107 clk = clk_register_fixed_rate(NULL, "pll1", NULL, CLK_IS_ROOT, 106 clk = clk_register_fixed_rate(NULL, "pll1", NULL, 0, 624000000);
108 624000000);
109 clk_register_clkdev(clk, "pll1", NULL); 107 clk_register_clkdev(clk, "pll1", NULL);
110 108
111 clk = clk_register_fixed_factor(NULL, "pll1_2", "pll1", 109 clk = clk_register_fixed_factor(NULL, "pll1_2", "pll1",