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authorStephen Boyd <sboyd@codeaurora.org>2016-03-01 13:59:57 -0500
committerStephen Boyd <sboyd@codeaurora.org>2016-03-04 15:53:53 -0500
commit81925c5eaad1c9eb33f0a0458612dcdfd05379bb (patch)
treefb600af55798367b87914f75d5feef43d3fdd416 /drivers/clk/qcom
parent782fa5201a660874951a515190530c1b200ca904 (diff)
clk: qcom: Remove CLK_IS_ROOT
This flag is a no-op now. Remove usage of the flag. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Diffstat (limited to 'drivers/clk/qcom')
-rw-r--r--drivers/clk/qcom/common.c1
-rw-r--r--drivers/clk/qcom/gcc-ipq806x.c37
-rw-r--r--drivers/clk/qcom/gcc-msm8660.c32
-rw-r--r--drivers/clk/qcom/gcc-msm8960.c42
-rw-r--r--drivers/clk/qcom/gcc-msm8974.c1
-rw-r--r--drivers/clk/qcom/gcc-msm8996.c6
-rw-r--r--drivers/clk/qcom/mmcc-msm8960.c35
7 files changed, 2 insertions, 152 deletions
diff --git a/drivers/clk/qcom/common.c b/drivers/clk/qcom/common.c
index cc8a06534362..f7c226ab4307 100644
--- a/drivers/clk/qcom/common.c
+++ b/drivers/clk/qcom/common.c
@@ -119,7 +119,6 @@ static int _qcom_cc_register_board_clk(struct device *dev, const char *path,
119 fixed->hw.init = &init_data; 119 fixed->hw.init = &init_data;
120 120
121 init_data.name = path; 121 init_data.name = path;
122 init_data.flags = CLK_IS_ROOT;
123 init_data.ops = &clk_fixed_rate_ops; 122 init_data.ops = &clk_fixed_rate_ops;
124 123
125 clk = devm_clk_register(dev, &fixed->hw); 124 clk = devm_clk_register(dev, &fixed->hw);
diff --git a/drivers/clk/qcom/gcc-ipq806x.c b/drivers/clk/qcom/gcc-ipq806x.c
index dd5402bac620..52a7d3959875 100644
--- a/drivers/clk/qcom/gcc-ipq806x.c
+++ b/drivers/clk/qcom/gcc-ipq806x.c
@@ -890,7 +890,6 @@ static struct clk_branch gsbi1_h_clk = {
890 .hw.init = &(struct clk_init_data){ 890 .hw.init = &(struct clk_init_data){
891 .name = "gsbi1_h_clk", 891 .name = "gsbi1_h_clk",
892 .ops = &clk_branch_ops, 892 .ops = &clk_branch_ops,
893 .flags = CLK_IS_ROOT,
894 }, 893 },
895 }, 894 },
896}; 895};
@@ -906,7 +905,6 @@ static struct clk_branch gsbi2_h_clk = {
906 .hw.init = &(struct clk_init_data){ 905 .hw.init = &(struct clk_init_data){
907 .name = "gsbi2_h_clk", 906 .name = "gsbi2_h_clk",
908 .ops = &clk_branch_ops, 907 .ops = &clk_branch_ops,
909 .flags = CLK_IS_ROOT,
910 }, 908 },
911 }, 909 },
912}; 910};
@@ -922,7 +920,6 @@ static struct clk_branch gsbi4_h_clk = {
922 .hw.init = &(struct clk_init_data){ 920 .hw.init = &(struct clk_init_data){
923 .name = "gsbi4_h_clk", 921 .name = "gsbi4_h_clk",
924 .ops = &clk_branch_ops, 922 .ops = &clk_branch_ops,
925 .flags = CLK_IS_ROOT,
926 }, 923 },
927 }, 924 },
928}; 925};
@@ -938,7 +935,6 @@ static struct clk_branch gsbi5_h_clk = {
938 .hw.init = &(struct clk_init_data){ 935 .hw.init = &(struct clk_init_data){
939 .name = "gsbi5_h_clk", 936 .name = "gsbi5_h_clk",
940 .ops = &clk_branch_ops, 937 .ops = &clk_branch_ops,
941 .flags = CLK_IS_ROOT,
942 }, 938 },
943 }, 939 },
944}; 940};
@@ -954,7 +950,6 @@ static struct clk_branch gsbi6_h_clk = {
954 .hw.init = &(struct clk_init_data){ 950 .hw.init = &(struct clk_init_data){
955 .name = "gsbi6_h_clk", 951 .name = "gsbi6_h_clk",
956 .ops = &clk_branch_ops, 952 .ops = &clk_branch_ops,
957 .flags = CLK_IS_ROOT,
958 }, 953 },
959 }, 954 },
960}; 955};
@@ -970,7 +965,6 @@ static struct clk_branch gsbi7_h_clk = {
970 .hw.init = &(struct clk_init_data){ 965 .hw.init = &(struct clk_init_data){
971 .name = "gsbi7_h_clk", 966 .name = "gsbi7_h_clk",
972 .ops = &clk_branch_ops, 967 .ops = &clk_branch_ops,
973 .flags = CLK_IS_ROOT,
974 }, 968 },
975 }, 969 },
976}; 970};
@@ -1144,7 +1138,6 @@ static struct clk_branch pmem_clk = {
1144 .hw.init = &(struct clk_init_data){ 1138 .hw.init = &(struct clk_init_data){
1145 .name = "pmem_clk", 1139 .name = "pmem_clk",
1146 .ops = &clk_branch_ops, 1140 .ops = &clk_branch_ops,
1147 .flags = CLK_IS_ROOT,
1148 }, 1141 },
1149 }, 1142 },
1150}; 1143};
@@ -1308,7 +1301,6 @@ static struct clk_branch sdc1_h_clk = {
1308 .hw.init = &(struct clk_init_data){ 1301 .hw.init = &(struct clk_init_data){
1309 .name = "sdc1_h_clk", 1302 .name = "sdc1_h_clk",
1310 .ops = &clk_branch_ops, 1303 .ops = &clk_branch_ops,
1311 .flags = CLK_IS_ROOT,
1312 }, 1304 },
1313 }, 1305 },
1314}; 1306};
@@ -1324,7 +1316,6 @@ static struct clk_branch sdc3_h_clk = {
1324 .hw.init = &(struct clk_init_data){ 1316 .hw.init = &(struct clk_init_data){
1325 .name = "sdc3_h_clk", 1317 .name = "sdc3_h_clk",
1326 .ops = &clk_branch_ops, 1318 .ops = &clk_branch_ops,
1327 .flags = CLK_IS_ROOT,
1328 }, 1319 },
1329 }, 1320 },
1330}; 1321};
@@ -1394,7 +1385,6 @@ static struct clk_branch tsif_h_clk = {
1394 .hw.init = &(struct clk_init_data){ 1385 .hw.init = &(struct clk_init_data){
1395 .name = "tsif_h_clk", 1386 .name = "tsif_h_clk",
1396 .ops = &clk_branch_ops, 1387 .ops = &clk_branch_ops,
1397 .flags = CLK_IS_ROOT,
1398 }, 1388 },
1399 }, 1389 },
1400}; 1390};
@@ -1410,7 +1400,6 @@ static struct clk_branch dma_bam_h_clk = {
1410 .hw.init = &(struct clk_init_data){ 1400 .hw.init = &(struct clk_init_data){
1411 .name = "dma_bam_h_clk", 1401 .name = "dma_bam_h_clk",
1412 .ops = &clk_branch_ops, 1402 .ops = &clk_branch_ops,
1413 .flags = CLK_IS_ROOT,
1414 }, 1403 },
1415 }, 1404 },
1416}; 1405};
@@ -1425,7 +1414,6 @@ static struct clk_branch adm0_clk = {
1425 .hw.init = &(struct clk_init_data){ 1414 .hw.init = &(struct clk_init_data){
1426 .name = "adm0_clk", 1415 .name = "adm0_clk",
1427 .ops = &clk_branch_ops, 1416 .ops = &clk_branch_ops,
1428 .flags = CLK_IS_ROOT,
1429 }, 1417 },
1430 }, 1418 },
1431}; 1419};
@@ -1442,7 +1430,6 @@ static struct clk_branch adm0_pbus_clk = {
1442 .hw.init = &(struct clk_init_data){ 1430 .hw.init = &(struct clk_init_data){
1443 .name = "adm0_pbus_clk", 1431 .name = "adm0_pbus_clk",
1444 .ops = &clk_branch_ops, 1432 .ops = &clk_branch_ops,
1445 .flags = CLK_IS_ROOT,
1446 }, 1433 },
1447 }, 1434 },
1448}; 1435};
@@ -1457,7 +1444,6 @@ static struct clk_branch pmic_arb0_h_clk = {
1457 .hw.init = &(struct clk_init_data){ 1444 .hw.init = &(struct clk_init_data){
1458 .name = "pmic_arb0_h_clk", 1445 .name = "pmic_arb0_h_clk",
1459 .ops = &clk_branch_ops, 1446 .ops = &clk_branch_ops,
1460 .flags = CLK_IS_ROOT,
1461 }, 1447 },
1462 }, 1448 },
1463}; 1449};
@@ -1472,7 +1458,6 @@ static struct clk_branch pmic_arb1_h_clk = {
1472 .hw.init = &(struct clk_init_data){ 1458 .hw.init = &(struct clk_init_data){
1473 .name = "pmic_arb1_h_clk", 1459 .name = "pmic_arb1_h_clk",
1474 .ops = &clk_branch_ops, 1460 .ops = &clk_branch_ops,
1475 .flags = CLK_IS_ROOT,
1476 }, 1461 },
1477 }, 1462 },
1478}; 1463};
@@ -1487,7 +1472,6 @@ static struct clk_branch pmic_ssbi2_clk = {
1487 .hw.init = &(struct clk_init_data){ 1472 .hw.init = &(struct clk_init_data){
1488 .name = "pmic_ssbi2_clk", 1473 .name = "pmic_ssbi2_clk",
1489 .ops = &clk_branch_ops, 1474 .ops = &clk_branch_ops,
1490 .flags = CLK_IS_ROOT,
1491 }, 1475 },
1492 }, 1476 },
1493}; 1477};
@@ -1504,7 +1488,6 @@ static struct clk_branch rpm_msg_ram_h_clk = {
1504 .hw.init = &(struct clk_init_data){ 1488 .hw.init = &(struct clk_init_data){
1505 .name = "rpm_msg_ram_h_clk", 1489 .name = "rpm_msg_ram_h_clk",
1506 .ops = &clk_branch_ops, 1490 .ops = &clk_branch_ops,
1507 .flags = CLK_IS_ROOT,
1508 }, 1491 },
1509 }, 1492 },
1510}; 1493};
@@ -1563,7 +1546,6 @@ static struct clk_branch pcie_a_clk = {
1563 .hw.init = &(struct clk_init_data){ 1546 .hw.init = &(struct clk_init_data){
1564 .name = "pcie_a_clk", 1547 .name = "pcie_a_clk",
1565 .ops = &clk_branch_ops, 1548 .ops = &clk_branch_ops,
1566 .flags = CLK_IS_ROOT,
1567 }, 1549 },
1568 }, 1550 },
1569}; 1551};
@@ -1577,7 +1559,6 @@ static struct clk_branch pcie_aux_clk = {
1577 .hw.init = &(struct clk_init_data){ 1559 .hw.init = &(struct clk_init_data){
1578 .name = "pcie_aux_clk", 1560 .name = "pcie_aux_clk",
1579 .ops = &clk_branch_ops, 1561 .ops = &clk_branch_ops,
1580 .flags = CLK_IS_ROOT,
1581 }, 1562 },
1582 }, 1563 },
1583}; 1564};
@@ -1591,7 +1572,6 @@ static struct clk_branch pcie_h_clk = {
1591 .hw.init = &(struct clk_init_data){ 1572 .hw.init = &(struct clk_init_data){
1592 .name = "pcie_h_clk", 1573 .name = "pcie_h_clk",
1593 .ops = &clk_branch_ops, 1574 .ops = &clk_branch_ops,
1594 .flags = CLK_IS_ROOT,
1595 }, 1575 },
1596 }, 1576 },
1597}; 1577};
@@ -1605,7 +1585,6 @@ static struct clk_branch pcie_phy_clk = {
1605 .hw.init = &(struct clk_init_data){ 1585 .hw.init = &(struct clk_init_data){
1606 .name = "pcie_phy_clk", 1586 .name = "pcie_phy_clk",
1607 .ops = &clk_branch_ops, 1587 .ops = &clk_branch_ops,
1608 .flags = CLK_IS_ROOT,
1609 }, 1588 },
1610 }, 1589 },
1611}; 1590};
@@ -1659,7 +1638,6 @@ static struct clk_branch pcie1_a_clk = {
1659 .hw.init = &(struct clk_init_data){ 1638 .hw.init = &(struct clk_init_data){
1660 .name = "pcie1_a_clk", 1639 .name = "pcie1_a_clk",
1661 .ops = &clk_branch_ops, 1640 .ops = &clk_branch_ops,
1662 .flags = CLK_IS_ROOT,
1663 }, 1641 },
1664 }, 1642 },
1665}; 1643};
@@ -1673,7 +1651,6 @@ static struct clk_branch pcie1_aux_clk = {
1673 .hw.init = &(struct clk_init_data){ 1651 .hw.init = &(struct clk_init_data){
1674 .name = "pcie1_aux_clk", 1652 .name = "pcie1_aux_clk",
1675 .ops = &clk_branch_ops, 1653 .ops = &clk_branch_ops,
1676 .flags = CLK_IS_ROOT,
1677 }, 1654 },
1678 }, 1655 },
1679}; 1656};
@@ -1687,7 +1664,6 @@ static struct clk_branch pcie1_h_clk = {
1687 .hw.init = &(struct clk_init_data){ 1664 .hw.init = &(struct clk_init_data){
1688 .name = "pcie1_h_clk", 1665 .name = "pcie1_h_clk",
1689 .ops = &clk_branch_ops, 1666 .ops = &clk_branch_ops,
1690 .flags = CLK_IS_ROOT,
1691 }, 1667 },
1692 }, 1668 },
1693}; 1669};
@@ -1701,7 +1677,6 @@ static struct clk_branch pcie1_phy_clk = {
1701 .hw.init = &(struct clk_init_data){ 1677 .hw.init = &(struct clk_init_data){
1702 .name = "pcie1_phy_clk", 1678 .name = "pcie1_phy_clk",
1703 .ops = &clk_branch_ops, 1679 .ops = &clk_branch_ops,
1704 .flags = CLK_IS_ROOT,
1705 }, 1680 },
1706 }, 1681 },
1707}; 1682};
@@ -1755,7 +1730,6 @@ static struct clk_branch pcie2_a_clk = {
1755 .hw.init = &(struct clk_init_data){ 1730 .hw.init = &(struct clk_init_data){
1756 .name = "pcie2_a_clk", 1731 .name = "pcie2_a_clk",
1757 .ops = &clk_branch_ops, 1732 .ops = &clk_branch_ops,
1758 .flags = CLK_IS_ROOT,
1759 }, 1733 },
1760 }, 1734 },
1761}; 1735};
@@ -1769,7 +1743,6 @@ static struct clk_branch pcie2_aux_clk = {
1769 .hw.init = &(struct clk_init_data){ 1743 .hw.init = &(struct clk_init_data){
1770 .name = "pcie2_aux_clk", 1744 .name = "pcie2_aux_clk",
1771 .ops = &clk_branch_ops, 1745 .ops = &clk_branch_ops,
1772 .flags = CLK_IS_ROOT,
1773 }, 1746 },
1774 }, 1747 },
1775}; 1748};
@@ -1783,7 +1756,6 @@ static struct clk_branch pcie2_h_clk = {
1783 .hw.init = &(struct clk_init_data){ 1756 .hw.init = &(struct clk_init_data){
1784 .name = "pcie2_h_clk", 1757 .name = "pcie2_h_clk",
1785 .ops = &clk_branch_ops, 1758 .ops = &clk_branch_ops,
1786 .flags = CLK_IS_ROOT,
1787 }, 1759 },
1788 }, 1760 },
1789}; 1761};
@@ -1797,7 +1769,6 @@ static struct clk_branch pcie2_phy_clk = {
1797 .hw.init = &(struct clk_init_data){ 1769 .hw.init = &(struct clk_init_data){
1798 .name = "pcie2_phy_clk", 1770 .name = "pcie2_phy_clk",
1799 .ops = &clk_branch_ops, 1771 .ops = &clk_branch_ops,
1800 .flags = CLK_IS_ROOT,
1801 }, 1772 },
1802 }, 1773 },
1803}; 1774};
@@ -1887,7 +1858,6 @@ static struct clk_branch sata_a_clk = {
1887 .hw.init = &(struct clk_init_data){ 1858 .hw.init = &(struct clk_init_data){
1888 .name = "sata_a_clk", 1859 .name = "sata_a_clk",
1889 .ops = &clk_branch_ops, 1860 .ops = &clk_branch_ops,
1890 .flags = CLK_IS_ROOT,
1891 }, 1861 },
1892 }, 1862 },
1893}; 1863};
@@ -1901,7 +1871,6 @@ static struct clk_branch sata_h_clk = {
1901 .hw.init = &(struct clk_init_data){ 1871 .hw.init = &(struct clk_init_data){
1902 .name = "sata_h_clk", 1872 .name = "sata_h_clk",
1903 .ops = &clk_branch_ops, 1873 .ops = &clk_branch_ops,
1904 .flags = CLK_IS_ROOT,
1905 }, 1874 },
1906 }, 1875 },
1907}; 1876};
@@ -1915,7 +1884,6 @@ static struct clk_branch sfab_sata_s_h_clk = {
1915 .hw.init = &(struct clk_init_data){ 1884 .hw.init = &(struct clk_init_data){
1916 .name = "sfab_sata_s_h_clk", 1885 .name = "sfab_sata_s_h_clk",
1917 .ops = &clk_branch_ops, 1886 .ops = &clk_branch_ops,
1918 .flags = CLK_IS_ROOT,
1919 }, 1887 },
1920 }, 1888 },
1921}; 1889};
@@ -1929,7 +1897,6 @@ static struct clk_branch sata_phy_cfg_clk = {
1929 .hw.init = &(struct clk_init_data){ 1897 .hw.init = &(struct clk_init_data){
1930 .name = "sata_phy_cfg_clk", 1898 .name = "sata_phy_cfg_clk",
1931 .ops = &clk_branch_ops, 1899 .ops = &clk_branch_ops,
1932 .flags = CLK_IS_ROOT,
1933 }, 1900 },
1934 }, 1901 },
1935}; 1902};
@@ -2139,7 +2106,6 @@ static struct clk_branch usb_hs1_h_clk = {
2139 .hw.init = &(struct clk_init_data){ 2106 .hw.init = &(struct clk_init_data){
2140 .name = "usb_hs1_h_clk", 2107 .name = "usb_hs1_h_clk",
2141 .ops = &clk_branch_ops, 2108 .ops = &clk_branch_ops,
2142 .flags = CLK_IS_ROOT,
2143 }, 2109 },
2144 }, 2110 },
2145}; 2111};
@@ -2218,7 +2184,6 @@ static struct clk_branch usb_fs1_h_clk = {
2218 .hw.init = &(struct clk_init_data){ 2184 .hw.init = &(struct clk_init_data){
2219 .name = "usb_fs1_h_clk", 2185 .name = "usb_fs1_h_clk",
2220 .ops = &clk_branch_ops, 2186 .ops = &clk_branch_ops,
2221 .flags = CLK_IS_ROOT,
2222 }, 2187 },
2223 }, 2188 },
2224}; 2189};
@@ -2234,7 +2199,6 @@ static struct clk_branch ebi2_clk = {
2234 .hw.init = &(struct clk_init_data){ 2199 .hw.init = &(struct clk_init_data){
2235 .name = "ebi2_clk", 2200 .name = "ebi2_clk",
2236 .ops = &clk_branch_ops, 2201 .ops = &clk_branch_ops,
2237 .flags = CLK_IS_ROOT,
2238 }, 2202 },
2239 }, 2203 },
2240}; 2204};
@@ -2248,7 +2212,6 @@ static struct clk_branch ebi2_aon_clk = {
2248 .hw.init = &(struct clk_init_data){ 2212 .hw.init = &(struct clk_init_data){
2249 .name = "ebi2_always_on_clk", 2213 .name = "ebi2_always_on_clk",
2250 .ops = &clk_branch_ops, 2214 .ops = &clk_branch_ops,
2251 .flags = CLK_IS_ROOT,
2252 }, 2215 },
2253 }, 2216 },
2254}; 2217};
diff --git a/drivers/clk/qcom/gcc-msm8660.c b/drivers/clk/qcom/gcc-msm8660.c
index ad413036f7c7..6dc55864979c 100644
--- a/drivers/clk/qcom/gcc-msm8660.c
+++ b/drivers/clk/qcom/gcc-msm8660.c
@@ -1479,7 +1479,6 @@ static struct clk_branch pmem_clk = {
1479 .hw.init = &(struct clk_init_data){ 1479 .hw.init = &(struct clk_init_data){
1480 .name = "pmem_clk", 1480 .name = "pmem_clk",
1481 .ops = &clk_branch_ops, 1481 .ops = &clk_branch_ops,
1482 .flags = CLK_IS_ROOT,
1483 }, 1482 },
1484 }, 1483 },
1485}; 1484};
@@ -2027,7 +2026,6 @@ static struct clk_branch gsbi1_h_clk = {
2027 .hw.init = &(struct clk_init_data){ 2026 .hw.init = &(struct clk_init_data){
2028 .name = "gsbi1_h_clk", 2027 .name = "gsbi1_h_clk",
2029 .ops = &clk_branch_ops, 2028 .ops = &clk_branch_ops,
2030 .flags = CLK_IS_ROOT,
2031 }, 2029 },
2032 }, 2030 },
2033}; 2031};
@@ -2041,7 +2039,6 @@ static struct clk_branch gsbi2_h_clk = {
2041 .hw.init = &(struct clk_init_data){ 2039 .hw.init = &(struct clk_init_data){
2042 .name = "gsbi2_h_clk", 2040 .name = "gsbi2_h_clk",
2043 .ops = &clk_branch_ops, 2041 .ops = &clk_branch_ops,
2044 .flags = CLK_IS_ROOT,
2045 }, 2042 },
2046 }, 2043 },
2047}; 2044};
@@ -2055,7 +2052,6 @@ static struct clk_branch gsbi3_h_clk = {
2055 .hw.init = &(struct clk_init_data){ 2052 .hw.init = &(struct clk_init_data){
2056 .name = "gsbi3_h_clk", 2053 .name = "gsbi3_h_clk",
2057 .ops = &clk_branch_ops, 2054 .ops = &clk_branch_ops,
2058 .flags = CLK_IS_ROOT,
2059 }, 2055 },
2060 }, 2056 },
2061}; 2057};
@@ -2069,7 +2065,6 @@ static struct clk_branch gsbi4_h_clk = {
2069 .hw.init = &(struct clk_init_data){ 2065 .hw.init = &(struct clk_init_data){
2070 .name = "gsbi4_h_clk", 2066 .name = "gsbi4_h_clk",
2071 .ops = &clk_branch_ops, 2067 .ops = &clk_branch_ops,
2072 .flags = CLK_IS_ROOT,
2073 }, 2068 },
2074 }, 2069 },
2075}; 2070};
@@ -2083,7 +2078,6 @@ static struct clk_branch gsbi5_h_clk = {
2083 .hw.init = &(struct clk_init_data){ 2078 .hw.init = &(struct clk_init_data){
2084 .name = "gsbi5_h_clk", 2079 .name = "gsbi5_h_clk",
2085 .ops = &clk_branch_ops, 2080 .ops = &clk_branch_ops,
2086 .flags = CLK_IS_ROOT,
2087 }, 2081 },
2088 }, 2082 },
2089}; 2083};
@@ -2097,7 +2091,6 @@ static struct clk_branch gsbi6_h_clk = {
2097 .hw.init = &(struct clk_init_data){ 2091 .hw.init = &(struct clk_init_data){
2098 .name = "gsbi6_h_clk", 2092 .name = "gsbi6_h_clk",
2099 .ops = &clk_branch_ops, 2093 .ops = &clk_branch_ops,
2100 .flags = CLK_IS_ROOT,
2101 }, 2094 },
2102 }, 2095 },
2103}; 2096};
@@ -2111,7 +2104,6 @@ static struct clk_branch gsbi7_h_clk = {
2111 .hw.init = &(struct clk_init_data){ 2104 .hw.init = &(struct clk_init_data){
2112 .name = "gsbi7_h_clk", 2105 .name = "gsbi7_h_clk",
2113 .ops = &clk_branch_ops, 2106 .ops = &clk_branch_ops,
2114 .flags = CLK_IS_ROOT,
2115 }, 2107 },
2116 }, 2108 },
2117}; 2109};
@@ -2125,7 +2117,6 @@ static struct clk_branch gsbi8_h_clk = {
2125 .hw.init = &(struct clk_init_data){ 2117 .hw.init = &(struct clk_init_data){
2126 .name = "gsbi8_h_clk", 2118 .name = "gsbi8_h_clk",
2127 .ops = &clk_branch_ops, 2119 .ops = &clk_branch_ops,
2128 .flags = CLK_IS_ROOT,
2129 }, 2120 },
2130 }, 2121 },
2131}; 2122};
@@ -2139,7 +2130,6 @@ static struct clk_branch gsbi9_h_clk = {
2139 .hw.init = &(struct clk_init_data){ 2130 .hw.init = &(struct clk_init_data){
2140 .name = "gsbi9_h_clk", 2131 .name = "gsbi9_h_clk",
2141 .ops = &clk_branch_ops, 2132 .ops = &clk_branch_ops,
2142 .flags = CLK_IS_ROOT,
2143 }, 2133 },
2144 }, 2134 },
2145}; 2135};
@@ -2153,7 +2143,6 @@ static struct clk_branch gsbi10_h_clk = {
2153 .hw.init = &(struct clk_init_data){ 2143 .hw.init = &(struct clk_init_data){
2154 .name = "gsbi10_h_clk", 2144 .name = "gsbi10_h_clk",
2155 .ops = &clk_branch_ops, 2145 .ops = &clk_branch_ops,
2156 .flags = CLK_IS_ROOT,
2157 }, 2146 },
2158 }, 2147 },
2159}; 2148};
@@ -2167,7 +2156,6 @@ static struct clk_branch gsbi11_h_clk = {
2167 .hw.init = &(struct clk_init_data){ 2156 .hw.init = &(struct clk_init_data){
2168 .name = "gsbi11_h_clk", 2157 .name = "gsbi11_h_clk",
2169 .ops = &clk_branch_ops, 2158 .ops = &clk_branch_ops,
2170 .flags = CLK_IS_ROOT,
2171 }, 2159 },
2172 }, 2160 },
2173}; 2161};
@@ -2181,7 +2169,6 @@ static struct clk_branch gsbi12_h_clk = {
2181 .hw.init = &(struct clk_init_data){ 2169 .hw.init = &(struct clk_init_data){
2182 .name = "gsbi12_h_clk", 2170 .name = "gsbi12_h_clk",
2183 .ops = &clk_branch_ops, 2171 .ops = &clk_branch_ops,
2184 .flags = CLK_IS_ROOT,
2185 }, 2172 },
2186 }, 2173 },
2187}; 2174};
@@ -2195,7 +2182,6 @@ static struct clk_branch tsif_h_clk = {
2195 .hw.init = &(struct clk_init_data){ 2182 .hw.init = &(struct clk_init_data){
2196 .name = "tsif_h_clk", 2183 .name = "tsif_h_clk",
2197 .ops = &clk_branch_ops, 2184 .ops = &clk_branch_ops,
2198 .flags = CLK_IS_ROOT,
2199 }, 2185 },
2200 }, 2186 },
2201}; 2187};
@@ -2209,7 +2195,6 @@ static struct clk_branch usb_fs1_h_clk = {
2209 .hw.init = &(struct clk_init_data){ 2195 .hw.init = &(struct clk_init_data){
2210 .name = "usb_fs1_h_clk", 2196 .name = "usb_fs1_h_clk",
2211 .ops = &clk_branch_ops, 2197 .ops = &clk_branch_ops,
2212 .flags = CLK_IS_ROOT,
2213 }, 2198 },
2214 }, 2199 },
2215}; 2200};
@@ -2223,7 +2208,6 @@ static struct clk_branch usb_fs2_h_clk = {
2223 .hw.init = &(struct clk_init_data){ 2208 .hw.init = &(struct clk_init_data){
2224 .name = "usb_fs2_h_clk", 2209 .name = "usb_fs2_h_clk",
2225 .ops = &clk_branch_ops, 2210 .ops = &clk_branch_ops,
2226 .flags = CLK_IS_ROOT,
2227 }, 2211 },
2228 }, 2212 },
2229}; 2213};
@@ -2237,7 +2221,6 @@ static struct clk_branch usb_hs1_h_clk = {
2237 .hw.init = &(struct clk_init_data){ 2221 .hw.init = &(struct clk_init_data){
2238 .name = "usb_hs1_h_clk", 2222 .name = "usb_hs1_h_clk",
2239 .ops = &clk_branch_ops, 2223 .ops = &clk_branch_ops,
2240 .flags = CLK_IS_ROOT,
2241 }, 2224 },
2242 }, 2225 },
2243}; 2226};
@@ -2251,7 +2234,6 @@ static struct clk_branch sdc1_h_clk = {
2251 .hw.init = &(struct clk_init_data){ 2234 .hw.init = &(struct clk_init_data){
2252 .name = "sdc1_h_clk", 2235 .name = "sdc1_h_clk",
2253 .ops = &clk_branch_ops, 2236 .ops = &clk_branch_ops,
2254 .flags = CLK_IS_ROOT,
2255 }, 2237 },
2256 }, 2238 },
2257}; 2239};
@@ -2265,7 +2247,6 @@ static struct clk_branch sdc2_h_clk = {
2265 .hw.init = &(struct clk_init_data){ 2247 .hw.init = &(struct clk_init_data){
2266 .name = "sdc2_h_clk", 2248 .name = "sdc2_h_clk",
2267 .ops = &clk_branch_ops, 2249 .ops = &clk_branch_ops,
2268 .flags = CLK_IS_ROOT,
2269 }, 2250 },
2270 }, 2251 },
2271}; 2252};
@@ -2279,7 +2260,6 @@ static struct clk_branch sdc3_h_clk = {
2279 .hw.init = &(struct clk_init_data){ 2260 .hw.init = &(struct clk_init_data){
2280 .name = "sdc3_h_clk", 2261 .name = "sdc3_h_clk",
2281 .ops = &clk_branch_ops, 2262 .ops = &clk_branch_ops,
2282 .flags = CLK_IS_ROOT,
2283 }, 2263 },
2284 }, 2264 },
2285}; 2265};
@@ -2293,7 +2273,6 @@ static struct clk_branch sdc4_h_clk = {
2293 .hw.init = &(struct clk_init_data){ 2273 .hw.init = &(struct clk_init_data){
2294 .name = "sdc4_h_clk", 2274 .name = "sdc4_h_clk",
2295 .ops = &clk_branch_ops, 2275 .ops = &clk_branch_ops,
2296 .flags = CLK_IS_ROOT,
2297 }, 2276 },
2298 }, 2277 },
2299}; 2278};
@@ -2307,7 +2286,6 @@ static struct clk_branch sdc5_h_clk = {
2307 .hw.init = &(struct clk_init_data){ 2286 .hw.init = &(struct clk_init_data){
2308 .name = "sdc5_h_clk", 2287 .name = "sdc5_h_clk",
2309 .ops = &clk_branch_ops, 2288 .ops = &clk_branch_ops,
2310 .flags = CLK_IS_ROOT,
2311 }, 2289 },
2312 }, 2290 },
2313}; 2291};
@@ -2322,7 +2300,6 @@ static struct clk_branch adm0_clk = {
2322 .hw.init = &(struct clk_init_data){ 2300 .hw.init = &(struct clk_init_data){
2323 .name = "adm0_clk", 2301 .name = "adm0_clk",
2324 .ops = &clk_branch_ops, 2302 .ops = &clk_branch_ops,
2325 .flags = CLK_IS_ROOT,
2326 }, 2303 },
2327 }, 2304 },
2328}; 2305};
@@ -2337,7 +2314,6 @@ static struct clk_branch adm0_pbus_clk = {
2337 .hw.init = &(struct clk_init_data){ 2314 .hw.init = &(struct clk_init_data){
2338 .name = "adm0_pbus_clk", 2315 .name = "adm0_pbus_clk",
2339 .ops = &clk_branch_ops, 2316 .ops = &clk_branch_ops,
2340 .flags = CLK_IS_ROOT,
2341 }, 2317 },
2342 }, 2318 },
2343}; 2319};
@@ -2352,7 +2328,6 @@ static struct clk_branch adm1_clk = {
2352 .hw.init = &(struct clk_init_data){ 2328 .hw.init = &(struct clk_init_data){
2353 .name = "adm1_clk", 2329 .name = "adm1_clk",
2354 .ops = &clk_branch_ops, 2330 .ops = &clk_branch_ops,
2355 .flags = CLK_IS_ROOT,
2356 }, 2331 },
2357 }, 2332 },
2358}; 2333};
@@ -2367,7 +2342,6 @@ static struct clk_branch adm1_pbus_clk = {
2367 .hw.init = &(struct clk_init_data){ 2342 .hw.init = &(struct clk_init_data){
2368 .name = "adm1_pbus_clk", 2343 .name = "adm1_pbus_clk",
2369 .ops = &clk_branch_ops, 2344 .ops = &clk_branch_ops,
2370 .flags = CLK_IS_ROOT,
2371 }, 2345 },
2372 }, 2346 },
2373}; 2347};
@@ -2382,7 +2356,6 @@ static struct clk_branch modem_ahb1_h_clk = {
2382 .hw.init = &(struct clk_init_data){ 2356 .hw.init = &(struct clk_init_data){
2383 .name = "modem_ahb1_h_clk", 2357 .name = "modem_ahb1_h_clk",
2384 .ops = &clk_branch_ops, 2358 .ops = &clk_branch_ops,
2385 .flags = CLK_IS_ROOT,
2386 }, 2359 },
2387 }, 2360 },
2388}; 2361};
@@ -2397,7 +2370,6 @@ static struct clk_branch modem_ahb2_h_clk = {
2397 .hw.init = &(struct clk_init_data){ 2370 .hw.init = &(struct clk_init_data){
2398 .name = "modem_ahb2_h_clk", 2371 .name = "modem_ahb2_h_clk",
2399 .ops = &clk_branch_ops, 2372 .ops = &clk_branch_ops,
2400 .flags = CLK_IS_ROOT,
2401 }, 2373 },
2402 }, 2374 },
2403}; 2375};
@@ -2412,7 +2384,6 @@ static struct clk_branch pmic_arb0_h_clk = {
2412 .hw.init = &(struct clk_init_data){ 2384 .hw.init = &(struct clk_init_data){
2413 .name = "pmic_arb0_h_clk", 2385 .name = "pmic_arb0_h_clk",
2414 .ops = &clk_branch_ops, 2386 .ops = &clk_branch_ops,
2415 .flags = CLK_IS_ROOT,
2416 }, 2387 },
2417 }, 2388 },
2418}; 2389};
@@ -2427,7 +2398,6 @@ static struct clk_branch pmic_arb1_h_clk = {
2427 .hw.init = &(struct clk_init_data){ 2398 .hw.init = &(struct clk_init_data){
2428 .name = "pmic_arb1_h_clk", 2399 .name = "pmic_arb1_h_clk",
2429 .ops = &clk_branch_ops, 2400 .ops = &clk_branch_ops,
2430 .flags = CLK_IS_ROOT,
2431 }, 2401 },
2432 }, 2402 },
2433}; 2403};
@@ -2442,7 +2412,6 @@ static struct clk_branch pmic_ssbi2_clk = {
2442 .hw.init = &(struct clk_init_data){ 2412 .hw.init = &(struct clk_init_data){
2443 .name = "pmic_ssbi2_clk", 2413 .name = "pmic_ssbi2_clk",
2444 .ops = &clk_branch_ops, 2414 .ops = &clk_branch_ops,
2445 .flags = CLK_IS_ROOT,
2446 }, 2415 },
2447 }, 2416 },
2448}; 2417};
@@ -2459,7 +2428,6 @@ static struct clk_branch rpm_msg_ram_h_clk = {
2459 .hw.init = &(struct clk_init_data){ 2428 .hw.init = &(struct clk_init_data){
2460 .name = "rpm_msg_ram_h_clk", 2429 .name = "rpm_msg_ram_h_clk",
2461 .ops = &clk_branch_ops, 2430 .ops = &clk_branch_ops,
2462 .flags = CLK_IS_ROOT,
2463 }, 2431 },
2464 }, 2432 },
2465}; 2433};
diff --git a/drivers/clk/qcom/gcc-msm8960.c b/drivers/clk/qcom/gcc-msm8960.c
index 0a0c1f533249..eb551c75fba6 100644
--- a/drivers/clk/qcom/gcc-msm8960.c
+++ b/drivers/clk/qcom/gcc-msm8960.c
@@ -1546,7 +1546,6 @@ static struct clk_branch pmem_clk = {
1546 .hw.init = &(struct clk_init_data){ 1546 .hw.init = &(struct clk_init_data){
1547 .name = "pmem_clk", 1547 .name = "pmem_clk",
1548 .ops = &clk_branch_ops, 1548 .ops = &clk_branch_ops,
1549 .flags = CLK_IS_ROOT,
1550 }, 1549 },
1551 }, 1550 },
1552}; 1551};
@@ -2143,7 +2142,6 @@ static struct clk_branch usb_hsic_hsio_cal_clk = {
2143 .hw.init = &(struct clk_init_data){ 2142 .hw.init = &(struct clk_init_data){
2144 .name = "usb_hsic_hsio_cal_clk", 2143 .name = "usb_hsic_hsio_cal_clk",
2145 .ops = &clk_branch_ops, 2144 .ops = &clk_branch_ops,
2146 .flags = CLK_IS_ROOT,
2147 }, 2145 },
2148 }, 2146 },
2149}; 2147};
@@ -2293,7 +2291,6 @@ static struct clk_branch ce1_core_clk = {
2293 .hw.init = &(struct clk_init_data){ 2291 .hw.init = &(struct clk_init_data){
2294 .name = "ce1_core_clk", 2292 .name = "ce1_core_clk",
2295 .ops = &clk_branch_ops, 2293 .ops = &clk_branch_ops,
2296 .flags = CLK_IS_ROOT,
2297 }, 2294 },
2298 }, 2295 },
2299}; 2296};
@@ -2307,7 +2304,6 @@ static struct clk_branch ce1_h_clk = {
2307 .hw.init = &(struct clk_init_data){ 2304 .hw.init = &(struct clk_init_data){
2308 .name = "ce1_h_clk", 2305 .name = "ce1_h_clk",
2309 .ops = &clk_branch_ops, 2306 .ops = &clk_branch_ops,
2310 .flags = CLK_IS_ROOT,
2311 }, 2307 },
2312 }, 2308 },
2313}; 2309};
@@ -2323,7 +2319,6 @@ static struct clk_branch dma_bam_h_clk = {
2323 .hw.init = &(struct clk_init_data){ 2319 .hw.init = &(struct clk_init_data){
2324 .name = "dma_bam_h_clk", 2320 .name = "dma_bam_h_clk",
2325 .ops = &clk_branch_ops, 2321 .ops = &clk_branch_ops,
2326 .flags = CLK_IS_ROOT,
2327 }, 2322 },
2328 }, 2323 },
2329}; 2324};
@@ -2339,7 +2334,6 @@ static struct clk_branch gsbi1_h_clk = {
2339 .hw.init = &(struct clk_init_data){ 2334 .hw.init = &(struct clk_init_data){
2340 .name = "gsbi1_h_clk", 2335 .name = "gsbi1_h_clk",
2341 .ops = &clk_branch_ops, 2336 .ops = &clk_branch_ops,
2342 .flags = CLK_IS_ROOT,
2343 }, 2337 },
2344 }, 2338 },
2345}; 2339};
@@ -2355,7 +2349,6 @@ static struct clk_branch gsbi2_h_clk = {
2355 .hw.init = &(struct clk_init_data){ 2349 .hw.init = &(struct clk_init_data){
2356 .name = "gsbi2_h_clk", 2350 .name = "gsbi2_h_clk",
2357 .ops = &clk_branch_ops, 2351 .ops = &clk_branch_ops,
2358 .flags = CLK_IS_ROOT,
2359 }, 2352 },
2360 }, 2353 },
2361}; 2354};
@@ -2371,7 +2364,6 @@ static struct clk_branch gsbi3_h_clk = {
2371 .hw.init = &(struct clk_init_data){ 2364 .hw.init = &(struct clk_init_data){
2372 .name = "gsbi3_h_clk", 2365 .name = "gsbi3_h_clk",
2373 .ops = &clk_branch_ops, 2366 .ops = &clk_branch_ops,
2374 .flags = CLK_IS_ROOT,
2375 }, 2367 },
2376 }, 2368 },
2377}; 2369};
@@ -2387,7 +2379,6 @@ static struct clk_branch gsbi4_h_clk = {
2387 .hw.init = &(struct clk_init_data){ 2379 .hw.init = &(struct clk_init_data){
2388 .name = "gsbi4_h_clk", 2380 .name = "gsbi4_h_clk",
2389 .ops = &clk_branch_ops, 2381 .ops = &clk_branch_ops,
2390 .flags = CLK_IS_ROOT,
2391 }, 2382 },
2392 }, 2383 },
2393}; 2384};
@@ -2403,7 +2394,6 @@ static struct clk_branch gsbi5_h_clk = {
2403 .hw.init = &(struct clk_init_data){ 2394 .hw.init = &(struct clk_init_data){
2404 .name = "gsbi5_h_clk", 2395 .name = "gsbi5_h_clk",
2405 .ops = &clk_branch_ops, 2396 .ops = &clk_branch_ops,
2406 .flags = CLK_IS_ROOT,
2407 }, 2397 },
2408 }, 2398 },
2409}; 2399};
@@ -2419,7 +2409,6 @@ static struct clk_branch gsbi6_h_clk = {
2419 .hw.init = &(struct clk_init_data){ 2409 .hw.init = &(struct clk_init_data){
2420 .name = "gsbi6_h_clk", 2410 .name = "gsbi6_h_clk",
2421 .ops = &clk_branch_ops, 2411 .ops = &clk_branch_ops,
2422 .flags = CLK_IS_ROOT,
2423 }, 2412 },
2424 }, 2413 },
2425}; 2414};
@@ -2435,7 +2424,6 @@ static struct clk_branch gsbi7_h_clk = {
2435 .hw.init = &(struct clk_init_data){ 2424 .hw.init = &(struct clk_init_data){
2436 .name = "gsbi7_h_clk", 2425 .name = "gsbi7_h_clk",
2437 .ops = &clk_branch_ops, 2426 .ops = &clk_branch_ops,
2438 .flags = CLK_IS_ROOT,
2439 }, 2427 },
2440 }, 2428 },
2441}; 2429};
@@ -2451,7 +2439,6 @@ static struct clk_branch gsbi8_h_clk = {
2451 .hw.init = &(struct clk_init_data){ 2439 .hw.init = &(struct clk_init_data){
2452 .name = "gsbi8_h_clk", 2440 .name = "gsbi8_h_clk",
2453 .ops = &clk_branch_ops, 2441 .ops = &clk_branch_ops,
2454 .flags = CLK_IS_ROOT,
2455 }, 2442 },
2456 }, 2443 },
2457}; 2444};
@@ -2467,7 +2454,6 @@ static struct clk_branch gsbi9_h_clk = {
2467 .hw.init = &(struct clk_init_data){ 2454 .hw.init = &(struct clk_init_data){
2468 .name = "gsbi9_h_clk", 2455 .name = "gsbi9_h_clk",
2469 .ops = &clk_branch_ops, 2456 .ops = &clk_branch_ops,
2470 .flags = CLK_IS_ROOT,
2471 }, 2457 },
2472 }, 2458 },
2473}; 2459};
@@ -2483,7 +2469,6 @@ static struct clk_branch gsbi10_h_clk = {
2483 .hw.init = &(struct clk_init_data){ 2469 .hw.init = &(struct clk_init_data){
2484 .name = "gsbi10_h_clk", 2470 .name = "gsbi10_h_clk",
2485 .ops = &clk_branch_ops, 2471 .ops = &clk_branch_ops,
2486 .flags = CLK_IS_ROOT,
2487 }, 2472 },
2488 }, 2473 },
2489}; 2474};
@@ -2499,7 +2484,6 @@ static struct clk_branch gsbi11_h_clk = {
2499 .hw.init = &(struct clk_init_data){ 2484 .hw.init = &(struct clk_init_data){
2500 .name = "gsbi11_h_clk", 2485 .name = "gsbi11_h_clk",
2501 .ops = &clk_branch_ops, 2486 .ops = &clk_branch_ops,
2502 .flags = CLK_IS_ROOT,
2503 }, 2487 },
2504 }, 2488 },
2505}; 2489};
@@ -2515,7 +2499,6 @@ static struct clk_branch gsbi12_h_clk = {
2515 .hw.init = &(struct clk_init_data){ 2499 .hw.init = &(struct clk_init_data){
2516 .name = "gsbi12_h_clk", 2500 .name = "gsbi12_h_clk",
2517 .ops = &clk_branch_ops, 2501 .ops = &clk_branch_ops,
2518 .flags = CLK_IS_ROOT,
2519 }, 2502 },
2520 }, 2503 },
2521}; 2504};
@@ -2531,7 +2514,6 @@ static struct clk_branch tsif_h_clk = {
2531 .hw.init = &(struct clk_init_data){ 2514 .hw.init = &(struct clk_init_data){
2532 .name = "tsif_h_clk", 2515 .name = "tsif_h_clk",
2533 .ops = &clk_branch_ops, 2516 .ops = &clk_branch_ops,
2534 .flags = CLK_IS_ROOT,
2535 }, 2517 },
2536 }, 2518 },
2537}; 2519};
@@ -2545,7 +2527,6 @@ static struct clk_branch usb_fs1_h_clk = {
2545 .hw.init = &(struct clk_init_data){ 2527 .hw.init = &(struct clk_init_data){
2546 .name = "usb_fs1_h_clk", 2528 .name = "usb_fs1_h_clk",
2547 .ops = &clk_branch_ops, 2529 .ops = &clk_branch_ops,
2548 .flags = CLK_IS_ROOT,
2549 }, 2530 },
2550 }, 2531 },
2551}; 2532};
@@ -2559,7 +2540,6 @@ static struct clk_branch usb_fs2_h_clk = {
2559 .hw.init = &(struct clk_init_data){ 2540 .hw.init = &(struct clk_init_data){
2560 .name = "usb_fs2_h_clk", 2541 .name = "usb_fs2_h_clk",
2561 .ops = &clk_branch_ops, 2542 .ops = &clk_branch_ops,
2562 .flags = CLK_IS_ROOT,
2563 }, 2543 },
2564 }, 2544 },
2565}; 2545};
@@ -2575,7 +2555,6 @@ static struct clk_branch usb_hs1_h_clk = {
2575 .hw.init = &(struct clk_init_data){ 2555 .hw.init = &(struct clk_init_data){
2576 .name = "usb_hs1_h_clk", 2556 .name = "usb_hs1_h_clk",
2577 .ops = &clk_branch_ops, 2557 .ops = &clk_branch_ops,
2578 .flags = CLK_IS_ROOT,
2579 }, 2558 },
2580 }, 2559 },
2581}; 2560};
@@ -2589,7 +2568,6 @@ static struct clk_branch usb_hs3_h_clk = {
2589 .hw.init = &(struct clk_init_data){ 2568 .hw.init = &(struct clk_init_data){
2590 .name = "usb_hs3_h_clk", 2569 .name = "usb_hs3_h_clk",
2591 .ops = &clk_branch_ops, 2570 .ops = &clk_branch_ops,
2592 .flags = CLK_IS_ROOT,
2593 }, 2571 },
2594 }, 2572 },
2595}; 2573};
@@ -2603,7 +2581,6 @@ static struct clk_branch usb_hs4_h_clk = {
2603 .hw.init = &(struct clk_init_data){ 2581 .hw.init = &(struct clk_init_data){
2604 .name = "usb_hs4_h_clk", 2582 .name = "usb_hs4_h_clk",
2605 .ops = &clk_branch_ops, 2583 .ops = &clk_branch_ops,
2606 .flags = CLK_IS_ROOT,
2607 }, 2584 },
2608 }, 2585 },
2609}; 2586};
@@ -2617,7 +2594,6 @@ static struct clk_branch usb_hsic_h_clk = {
2617 .hw.init = &(struct clk_init_data){ 2594 .hw.init = &(struct clk_init_data){
2618 .name = "usb_hsic_h_clk", 2595 .name = "usb_hsic_h_clk",
2619 .ops = &clk_branch_ops, 2596 .ops = &clk_branch_ops,
2620 .flags = CLK_IS_ROOT,
2621 }, 2597 },
2622 }, 2598 },
2623}; 2599};
@@ -2633,7 +2609,6 @@ static struct clk_branch sdc1_h_clk = {
2633 .hw.init = &(struct clk_init_data){ 2609 .hw.init = &(struct clk_init_data){
2634 .name = "sdc1_h_clk", 2610 .name = "sdc1_h_clk",
2635 .ops = &clk_branch_ops, 2611 .ops = &clk_branch_ops,
2636 .flags = CLK_IS_ROOT,
2637 }, 2612 },
2638 }, 2613 },
2639}; 2614};
@@ -2649,7 +2624,6 @@ static struct clk_branch sdc2_h_clk = {
2649 .hw.init = &(struct clk_init_data){ 2624 .hw.init = &(struct clk_init_data){
2650 .name = "sdc2_h_clk", 2625 .name = "sdc2_h_clk",
2651 .ops = &clk_branch_ops, 2626 .ops = &clk_branch_ops,
2652 .flags = CLK_IS_ROOT,
2653 }, 2627 },
2654 }, 2628 },
2655}; 2629};
@@ -2665,7 +2639,6 @@ static struct clk_branch sdc3_h_clk = {
2665 .hw.init = &(struct clk_init_data){ 2639 .hw.init = &(struct clk_init_data){
2666 .name = "sdc3_h_clk", 2640 .name = "sdc3_h_clk",
2667 .ops = &clk_branch_ops, 2641 .ops = &clk_branch_ops,
2668 .flags = CLK_IS_ROOT,
2669 }, 2642 },
2670 }, 2643 },
2671}; 2644};
@@ -2681,7 +2654,6 @@ static struct clk_branch sdc4_h_clk = {
2681 .hw.init = &(struct clk_init_data){ 2654 .hw.init = &(struct clk_init_data){
2682 .name = "sdc4_h_clk", 2655 .name = "sdc4_h_clk",
2683 .ops = &clk_branch_ops, 2656 .ops = &clk_branch_ops,
2684 .flags = CLK_IS_ROOT,
2685 }, 2657 },
2686 }, 2658 },
2687}; 2659};
@@ -2697,7 +2669,6 @@ static struct clk_branch sdc5_h_clk = {
2697 .hw.init = &(struct clk_init_data){ 2669 .hw.init = &(struct clk_init_data){
2698 .name = "sdc5_h_clk", 2670 .name = "sdc5_h_clk",
2699 .ops = &clk_branch_ops, 2671 .ops = &clk_branch_ops,
2700 .flags = CLK_IS_ROOT,
2701 }, 2672 },
2702 }, 2673 },
2703}; 2674};
@@ -2712,7 +2683,6 @@ static struct clk_branch adm0_clk = {
2712 .hw.init = &(struct clk_init_data){ 2683 .hw.init = &(struct clk_init_data){
2713 .name = "adm0_clk", 2684 .name = "adm0_clk",
2714 .ops = &clk_branch_ops, 2685 .ops = &clk_branch_ops,
2715 .flags = CLK_IS_ROOT,
2716 }, 2686 },
2717 }, 2687 },
2718}; 2688};
@@ -2729,7 +2699,6 @@ static struct clk_branch adm0_pbus_clk = {
2729 .hw.init = &(struct clk_init_data){ 2699 .hw.init = &(struct clk_init_data){
2730 .name = "adm0_pbus_clk", 2700 .name = "adm0_pbus_clk",
2731 .ops = &clk_branch_ops, 2701 .ops = &clk_branch_ops,
2732 .flags = CLK_IS_ROOT,
2733 }, 2702 },
2734 }, 2703 },
2735}; 2704};
@@ -2883,7 +2852,6 @@ static struct clk_branch sata_a_clk = {
2883 .hw.init = &(struct clk_init_data){ 2852 .hw.init = &(struct clk_init_data){
2884 .name = "sata_a_clk", 2853 .name = "sata_a_clk",
2885 .ops = &clk_branch_ops, 2854 .ops = &clk_branch_ops,
2886 .flags = CLK_IS_ROOT,
2887 }, 2855 },
2888 }, 2856 },
2889}; 2857};
@@ -2897,7 +2865,6 @@ static struct clk_branch sata_h_clk = {
2897 .hw.init = &(struct clk_init_data){ 2865 .hw.init = &(struct clk_init_data){
2898 .name = "sata_h_clk", 2866 .name = "sata_h_clk",
2899 .ops = &clk_branch_ops, 2867 .ops = &clk_branch_ops,
2900 .flags = CLK_IS_ROOT,
2901 }, 2868 },
2902 }, 2869 },
2903}; 2870};
@@ -2911,7 +2878,6 @@ static struct clk_branch sfab_sata_s_h_clk = {
2911 .hw.init = &(struct clk_init_data){ 2878 .hw.init = &(struct clk_init_data){
2912 .name = "sfab_sata_s_h_clk", 2879 .name = "sfab_sata_s_h_clk",
2913 .ops = &clk_branch_ops, 2880 .ops = &clk_branch_ops,
2914 .flags = CLK_IS_ROOT,
2915 }, 2881 },
2916 }, 2882 },
2917}; 2883};
@@ -2925,7 +2891,6 @@ static struct clk_branch sata_phy_cfg_clk = {
2925 .hw.init = &(struct clk_init_data){ 2891 .hw.init = &(struct clk_init_data){
2926 .name = "sata_phy_cfg_clk", 2892 .name = "sata_phy_cfg_clk",
2927 .ops = &clk_branch_ops, 2893 .ops = &clk_branch_ops,
2928 .flags = CLK_IS_ROOT,
2929 }, 2894 },
2930 }, 2895 },
2931}; 2896};
@@ -2939,7 +2904,6 @@ static struct clk_branch pcie_phy_ref_clk = {
2939 .hw.init = &(struct clk_init_data){ 2904 .hw.init = &(struct clk_init_data){
2940 .name = "pcie_phy_ref_clk", 2905 .name = "pcie_phy_ref_clk",
2941 .ops = &clk_branch_ops, 2906 .ops = &clk_branch_ops,
2942 .flags = CLK_IS_ROOT,
2943 }, 2907 },
2944 }, 2908 },
2945}; 2909};
@@ -2953,7 +2917,6 @@ static struct clk_branch pcie_h_clk = {
2953 .hw.init = &(struct clk_init_data){ 2917 .hw.init = &(struct clk_init_data){
2954 .name = "pcie_h_clk", 2918 .name = "pcie_h_clk",
2955 .ops = &clk_branch_ops, 2919 .ops = &clk_branch_ops,
2956 .flags = CLK_IS_ROOT,
2957 }, 2920 },
2958 }, 2921 },
2959}; 2922};
@@ -2967,7 +2930,6 @@ static struct clk_branch pcie_a_clk = {
2967 .hw.init = &(struct clk_init_data){ 2930 .hw.init = &(struct clk_init_data){
2968 .name = "pcie_a_clk", 2931 .name = "pcie_a_clk",
2969 .ops = &clk_branch_ops, 2932 .ops = &clk_branch_ops,
2970 .flags = CLK_IS_ROOT,
2971 }, 2933 },
2972 }, 2934 },
2973}; 2935};
@@ -2982,7 +2944,6 @@ static struct clk_branch pmic_arb0_h_clk = {
2982 .hw.init = &(struct clk_init_data){ 2944 .hw.init = &(struct clk_init_data){
2983 .name = "pmic_arb0_h_clk", 2945 .name = "pmic_arb0_h_clk",
2984 .ops = &clk_branch_ops, 2946 .ops = &clk_branch_ops,
2985 .flags = CLK_IS_ROOT,
2986 }, 2947 },
2987 }, 2948 },
2988}; 2949};
@@ -2997,7 +2958,6 @@ static struct clk_branch pmic_arb1_h_clk = {
2997 .hw.init = &(struct clk_init_data){ 2958 .hw.init = &(struct clk_init_data){
2998 .name = "pmic_arb1_h_clk", 2959 .name = "pmic_arb1_h_clk",
2999 .ops = &clk_branch_ops, 2960 .ops = &clk_branch_ops,
3000 .flags = CLK_IS_ROOT,
3001 }, 2961 },
3002 }, 2962 },
3003}; 2963};
@@ -3012,7 +2972,6 @@ static struct clk_branch pmic_ssbi2_clk = {
3012 .hw.init = &(struct clk_init_data){ 2972 .hw.init = &(struct clk_init_data){
3013 .name = "pmic_ssbi2_clk", 2973 .name = "pmic_ssbi2_clk",
3014 .ops = &clk_branch_ops, 2974 .ops = &clk_branch_ops,
3015 .flags = CLK_IS_ROOT,
3016 }, 2975 },
3017 }, 2976 },
3018}; 2977};
@@ -3029,7 +2988,6 @@ static struct clk_branch rpm_msg_ram_h_clk = {
3029 .hw.init = &(struct clk_init_data){ 2988 .hw.init = &(struct clk_init_data){
3030 .name = "rpm_msg_ram_h_clk", 2989 .name = "rpm_msg_ram_h_clk",
3031 .ops = &clk_branch_ops, 2990 .ops = &clk_branch_ops,
3032 .flags = CLK_IS_ROOT,
3033 }, 2991 },
3034 }, 2992 },
3035}; 2993};
diff --git a/drivers/clk/qcom/gcc-msm8974.c b/drivers/clk/qcom/gcc-msm8974.c
index 335952db309b..00915209e7c5 100644
--- a/drivers/clk/qcom/gcc-msm8974.c
+++ b/drivers/clk/qcom/gcc-msm8974.c
@@ -1965,7 +1965,6 @@ static struct clk_branch gcc_mss_q6_bimc_axi_clk = {
1965 .enable_mask = BIT(0), 1965 .enable_mask = BIT(0),
1966 .hw.init = &(struct clk_init_data){ 1966 .hw.init = &(struct clk_init_data){
1967 .name = "gcc_mss_q6_bimc_axi_clk", 1967 .name = "gcc_mss_q6_bimc_axi_clk",
1968 .flags = CLK_IS_ROOT,
1969 .ops = &clk_branch2_ops, 1968 .ops = &clk_branch2_ops,
1970 }, 1969 },
1971 }, 1970 },
diff --git a/drivers/clk/qcom/gcc-msm8996.c b/drivers/clk/qcom/gcc-msm8996.c
index bb8c61ff0176..c9b96f318d9c 100644
--- a/drivers/clk/qcom/gcc-msm8996.c
+++ b/drivers/clk/qcom/gcc-msm8996.c
@@ -1321,7 +1321,7 @@ static struct clk_branch gcc_mmss_bimc_gfx_clk = {
1321 .enable_mask = BIT(0), 1321 .enable_mask = BIT(0),
1322 .hw.init = &(struct clk_init_data){ 1322 .hw.init = &(struct clk_init_data){
1323 .name = "gcc_mmss_bimc_gfx_clk", 1323 .name = "gcc_mmss_bimc_gfx_clk",
1324 .flags = CLK_SET_RATE_PARENT | CLK_IS_ROOT, 1324 .flags = CLK_SET_RATE_PARENT,
1325 .ops = &clk_branch2_ops, 1325 .ops = &clk_branch2_ops,
1326 }, 1326 },
1327 }, 1327 },
@@ -2315,7 +2315,7 @@ static struct clk_branch gcc_bimc_gfx_clk = {
2315 .enable_mask = BIT(0), 2315 .enable_mask = BIT(0),
2316 .hw.init = &(struct clk_init_data){ 2316 .hw.init = &(struct clk_init_data){
2317 .name = "gcc_bimc_gfx_clk", 2317 .name = "gcc_bimc_gfx_clk",
2318 .flags = CLK_SET_RATE_PARENT | CLK_IS_ROOT, 2318 .flags = CLK_SET_RATE_PARENT,
2319 .ops = &clk_branch2_ops, 2319 .ops = &clk_branch2_ops,
2320 }, 2320 },
2321 }, 2321 },
@@ -2815,7 +2815,6 @@ static struct clk_branch gcc_ufs_sys_clk_core_clk = {
2815 .hw.init = &(struct clk_init_data){ 2815 .hw.init = &(struct clk_init_data){
2816 .name = "gcc_ufs_sys_clk_core_clk", 2816 .name = "gcc_ufs_sys_clk_core_clk",
2817 .ops = &clk_branch2_ops, 2817 .ops = &clk_branch2_ops,
2818 .flags = CLK_IS_ROOT,
2819 }, 2818 },
2820 }, 2819 },
2821}; 2820};
@@ -2828,7 +2827,6 @@ static struct clk_branch gcc_ufs_tx_symbol_clk_core_clk = {
2828 .hw.init = &(struct clk_init_data){ 2827 .hw.init = &(struct clk_init_data){
2829 .name = "gcc_ufs_tx_symbol_clk_core_clk", 2828 .name = "gcc_ufs_tx_symbol_clk_core_clk",
2830 .ops = &clk_branch2_ops, 2829 .ops = &clk_branch2_ops,
2831 .flags = CLK_IS_ROOT,
2832 }, 2830 },
2833 }, 2831 },
2834}; 2832};
diff --git a/drivers/clk/qcom/mmcc-msm8960.c b/drivers/clk/qcom/mmcc-msm8960.c
index 00e36192a1de..7f21421c87d6 100644
--- a/drivers/clk/qcom/mmcc-msm8960.c
+++ b/drivers/clk/qcom/mmcc-msm8960.c
@@ -1789,7 +1789,6 @@ static struct clk_branch gmem_axi_clk = {
1789 .hw.init = &(struct clk_init_data){ 1789 .hw.init = &(struct clk_init_data){
1790 .name = "gmem_axi_clk", 1790 .name = "gmem_axi_clk",
1791 .ops = &clk_branch_ops, 1791 .ops = &clk_branch_ops,
1792 .flags = CLK_IS_ROOT,
1793 }, 1792 },
1794 }, 1793 },
1795}; 1794};
@@ -1805,7 +1804,6 @@ static struct clk_branch ijpeg_axi_clk = {
1805 .hw.init = &(struct clk_init_data){ 1804 .hw.init = &(struct clk_init_data){
1806 .name = "ijpeg_axi_clk", 1805 .name = "ijpeg_axi_clk",
1807 .ops = &clk_branch_ops, 1806 .ops = &clk_branch_ops,
1808 .flags = CLK_IS_ROOT,
1809 }, 1807 },
1810 }, 1808 },
1811}; 1809};
@@ -1821,7 +1819,6 @@ static struct clk_branch mmss_imem_axi_clk = {
1821 .hw.init = &(struct clk_init_data){ 1819 .hw.init = &(struct clk_init_data){
1822 .name = "mmss_imem_axi_clk", 1820 .name = "mmss_imem_axi_clk",
1823 .ops = &clk_branch_ops, 1821 .ops = &clk_branch_ops,
1824 .flags = CLK_IS_ROOT,
1825 }, 1822 },
1826 }, 1823 },
1827}; 1824};
@@ -1835,7 +1832,6 @@ static struct clk_branch jpegd_axi_clk = {
1835 .hw.init = &(struct clk_init_data){ 1832 .hw.init = &(struct clk_init_data){
1836 .name = "jpegd_axi_clk", 1833 .name = "jpegd_axi_clk",
1837 .ops = &clk_branch_ops, 1834 .ops = &clk_branch_ops,
1838 .flags = CLK_IS_ROOT,
1839 }, 1835 },
1840 }, 1836 },
1841}; 1837};
@@ -1851,7 +1847,6 @@ static struct clk_branch vcodec_axi_b_clk = {
1851 .hw.init = &(struct clk_init_data){ 1847 .hw.init = &(struct clk_init_data){
1852 .name = "vcodec_axi_b_clk", 1848 .name = "vcodec_axi_b_clk",
1853 .ops = &clk_branch_ops, 1849 .ops = &clk_branch_ops,
1854 .flags = CLK_IS_ROOT,
1855 }, 1850 },
1856 }, 1851 },
1857}; 1852};
@@ -1867,7 +1862,6 @@ static struct clk_branch vcodec_axi_a_clk = {
1867 .hw.init = &(struct clk_init_data){ 1862 .hw.init = &(struct clk_init_data){
1868 .name = "vcodec_axi_a_clk", 1863 .name = "vcodec_axi_a_clk",
1869 .ops = &clk_branch_ops, 1864 .ops = &clk_branch_ops,
1870 .flags = CLK_IS_ROOT,
1871 }, 1865 },
1872 }, 1866 },
1873}; 1867};
@@ -1883,7 +1877,6 @@ static struct clk_branch vcodec_axi_clk = {
1883 .hw.init = &(struct clk_init_data){ 1877 .hw.init = &(struct clk_init_data){
1884 .name = "vcodec_axi_clk", 1878 .name = "vcodec_axi_clk",
1885 .ops = &clk_branch_ops, 1879 .ops = &clk_branch_ops,
1886 .flags = CLK_IS_ROOT,
1887 }, 1880 },
1888 }, 1881 },
1889}; 1882};
@@ -1897,7 +1890,6 @@ static struct clk_branch vfe_axi_clk = {
1897 .hw.init = &(struct clk_init_data){ 1890 .hw.init = &(struct clk_init_data){
1898 .name = "vfe_axi_clk", 1891 .name = "vfe_axi_clk",
1899 .ops = &clk_branch_ops, 1892 .ops = &clk_branch_ops,
1900 .flags = CLK_IS_ROOT,
1901 }, 1893 },
1902 }, 1894 },
1903}; 1895};
@@ -1913,7 +1905,6 @@ static struct clk_branch mdp_axi_clk = {
1913 .hw.init = &(struct clk_init_data){ 1905 .hw.init = &(struct clk_init_data){
1914 .name = "mdp_axi_clk", 1906 .name = "mdp_axi_clk",
1915 .ops = &clk_branch_ops, 1907 .ops = &clk_branch_ops,
1916 .flags = CLK_IS_ROOT,
1917 }, 1908 },
1918 }, 1909 },
1919}; 1910};
@@ -1929,7 +1920,6 @@ static struct clk_branch rot_axi_clk = {
1929 .hw.init = &(struct clk_init_data){ 1920 .hw.init = &(struct clk_init_data){
1930 .name = "rot_axi_clk", 1921 .name = "rot_axi_clk",
1931 .ops = &clk_branch_ops, 1922 .ops = &clk_branch_ops,
1932 .flags = CLK_IS_ROOT,
1933 }, 1923 },
1934 }, 1924 },
1935}; 1925};
@@ -1945,7 +1935,6 @@ static struct clk_branch vcap_axi_clk = {
1945 .hw.init = &(struct clk_init_data){ 1935 .hw.init = &(struct clk_init_data){
1946 .name = "vcap_axi_clk", 1936 .name = "vcap_axi_clk",
1947 .ops = &clk_branch_ops, 1937 .ops = &clk_branch_ops,
1948 .flags = CLK_IS_ROOT,
1949 }, 1938 },
1950 }, 1939 },
1951}; 1940};
@@ -1961,7 +1950,6 @@ static struct clk_branch vpe_axi_clk = {
1961 .hw.init = &(struct clk_init_data){ 1950 .hw.init = &(struct clk_init_data){
1962 .name = "vpe_axi_clk", 1951 .name = "vpe_axi_clk",
1963 .ops = &clk_branch_ops, 1952 .ops = &clk_branch_ops,
1964 .flags = CLK_IS_ROOT,
1965 }, 1953 },
1966 }, 1954 },
1967}; 1955};
@@ -1977,7 +1965,6 @@ static struct clk_branch gfx3d_axi_clk = {
1977 .hw.init = &(struct clk_init_data){ 1965 .hw.init = &(struct clk_init_data){
1978 .name = "gfx3d_axi_clk", 1966 .name = "gfx3d_axi_clk",
1979 .ops = &clk_branch_ops, 1967 .ops = &clk_branch_ops,
1980 .flags = CLK_IS_ROOT,
1981 }, 1968 },
1982 }, 1969 },
1983}; 1970};
@@ -1991,7 +1978,6 @@ static struct clk_branch amp_ahb_clk = {
1991 .hw.init = &(struct clk_init_data){ 1978 .hw.init = &(struct clk_init_data){
1992 .name = "amp_ahb_clk", 1979 .name = "amp_ahb_clk",
1993 .ops = &clk_branch_ops, 1980 .ops = &clk_branch_ops,
1994 .flags = CLK_IS_ROOT,
1995 }, 1981 },
1996 }, 1982 },
1997}; 1983};
@@ -2005,7 +1991,6 @@ static struct clk_branch csi_ahb_clk = {
2005 .hw.init = &(struct clk_init_data){ 1991 .hw.init = &(struct clk_init_data){
2006 .name = "csi_ahb_clk", 1992 .name = "csi_ahb_clk",
2007 .ops = &clk_branch_ops, 1993 .ops = &clk_branch_ops,
2008 .flags = CLK_IS_ROOT
2009 }, 1994 },
2010 }, 1995 },
2011}; 1996};
@@ -2019,7 +2004,6 @@ static struct clk_branch dsi_m_ahb_clk = {
2019 .hw.init = &(struct clk_init_data){ 2004 .hw.init = &(struct clk_init_data){
2020 .name = "dsi_m_ahb_clk", 2005 .name = "dsi_m_ahb_clk",
2021 .ops = &clk_branch_ops, 2006 .ops = &clk_branch_ops,
2022 .flags = CLK_IS_ROOT,
2023 }, 2007 },
2024 }, 2008 },
2025}; 2009};
@@ -2035,7 +2019,6 @@ static struct clk_branch dsi_s_ahb_clk = {
2035 .hw.init = &(struct clk_init_data){ 2019 .hw.init = &(struct clk_init_data){
2036 .name = "dsi_s_ahb_clk", 2020 .name = "dsi_s_ahb_clk",
2037 .ops = &clk_branch_ops, 2021 .ops = &clk_branch_ops,
2038 .flags = CLK_IS_ROOT,
2039 }, 2022 },
2040 }, 2023 },
2041}; 2024};
@@ -2049,7 +2032,6 @@ static struct clk_branch dsi2_m_ahb_clk = {
2049 .hw.init = &(struct clk_init_data){ 2032 .hw.init = &(struct clk_init_data){
2050 .name = "dsi2_m_ahb_clk", 2033 .name = "dsi2_m_ahb_clk",
2051 .ops = &clk_branch_ops, 2034 .ops = &clk_branch_ops,
2052 .flags = CLK_IS_ROOT
2053 }, 2035 },
2054 }, 2036 },
2055}; 2037};
@@ -2065,7 +2047,6 @@ static struct clk_branch dsi2_s_ahb_clk = {
2065 .hw.init = &(struct clk_init_data){ 2047 .hw.init = &(struct clk_init_data){
2066 .name = "dsi2_s_ahb_clk", 2048 .name = "dsi2_s_ahb_clk",
2067 .ops = &clk_branch_ops, 2049 .ops = &clk_branch_ops,
2068 .flags = CLK_IS_ROOT,
2069 }, 2050 },
2070 }, 2051 },
2071}; 2052};
@@ -2425,7 +2406,6 @@ static struct clk_branch gfx2d0_ahb_clk = {
2425 .hw.init = &(struct clk_init_data){ 2406 .hw.init = &(struct clk_init_data){
2426 .name = "gfx2d0_ahb_clk", 2407 .name = "gfx2d0_ahb_clk",
2427 .ops = &clk_branch_ops, 2408 .ops = &clk_branch_ops,
2428 .flags = CLK_IS_ROOT,
2429 }, 2409 },
2430 }, 2410 },
2431}; 2411};
@@ -2441,7 +2421,6 @@ static struct clk_branch gfx2d1_ahb_clk = {
2441 .hw.init = &(struct clk_init_data){ 2421 .hw.init = &(struct clk_init_data){
2442 .name = "gfx2d1_ahb_clk", 2422 .name = "gfx2d1_ahb_clk",
2443 .ops = &clk_branch_ops, 2423 .ops = &clk_branch_ops,
2444 .flags = CLK_IS_ROOT,
2445 }, 2424 },
2446 }, 2425 },
2447}; 2426};
@@ -2457,7 +2436,6 @@ static struct clk_branch gfx3d_ahb_clk = {
2457 .hw.init = &(struct clk_init_data){ 2436 .hw.init = &(struct clk_init_data){
2458 .name = "gfx3d_ahb_clk", 2437 .name = "gfx3d_ahb_clk",
2459 .ops = &clk_branch_ops, 2438 .ops = &clk_branch_ops,
2460 .flags = CLK_IS_ROOT,
2461 }, 2439 },
2462 }, 2440 },
2463}; 2441};
@@ -2473,7 +2451,6 @@ static struct clk_branch hdmi_m_ahb_clk = {
2473 .hw.init = &(struct clk_init_data){ 2451 .hw.init = &(struct clk_init_data){
2474 .name = "hdmi_m_ahb_clk", 2452 .name = "hdmi_m_ahb_clk",
2475 .ops = &clk_branch_ops, 2453 .ops = &clk_branch_ops,
2476 .flags = CLK_IS_ROOT,
2477 }, 2454 },
2478 }, 2455 },
2479}; 2456};
@@ -2489,7 +2466,6 @@ static struct clk_branch hdmi_s_ahb_clk = {
2489 .hw.init = &(struct clk_init_data){ 2466 .hw.init = &(struct clk_init_data){
2490 .name = "hdmi_s_ahb_clk", 2467 .name = "hdmi_s_ahb_clk",
2491 .ops = &clk_branch_ops, 2468 .ops = &clk_branch_ops,
2492 .flags = CLK_IS_ROOT,
2493 }, 2469 },
2494 }, 2470 },
2495}; 2471};
@@ -2503,7 +2479,6 @@ static struct clk_branch ijpeg_ahb_clk = {
2503 .hw.init = &(struct clk_init_data){ 2479 .hw.init = &(struct clk_init_data){
2504 .name = "ijpeg_ahb_clk", 2480 .name = "ijpeg_ahb_clk",
2505 .ops = &clk_branch_ops, 2481 .ops = &clk_branch_ops,
2506 .flags = CLK_IS_ROOT
2507 }, 2482 },
2508 }, 2483 },
2509}; 2484};
@@ -2519,7 +2494,6 @@ static struct clk_branch mmss_imem_ahb_clk = {
2519 .hw.init = &(struct clk_init_data){ 2494 .hw.init = &(struct clk_init_data){
2520 .name = "mmss_imem_ahb_clk", 2495 .name = "mmss_imem_ahb_clk",
2521 .ops = &clk_branch_ops, 2496 .ops = &clk_branch_ops,
2522 .flags = CLK_IS_ROOT
2523 }, 2497 },
2524 }, 2498 },
2525}; 2499};
@@ -2533,7 +2507,6 @@ static struct clk_branch jpegd_ahb_clk = {
2533 .hw.init = &(struct clk_init_data){ 2507 .hw.init = &(struct clk_init_data){
2534 .name = "jpegd_ahb_clk", 2508 .name = "jpegd_ahb_clk",
2535 .ops = &clk_branch_ops, 2509 .ops = &clk_branch_ops,
2536 .flags = CLK_IS_ROOT,
2537 }, 2510 },
2538 }, 2511 },
2539}; 2512};
@@ -2547,7 +2520,6 @@ static struct clk_branch mdp_ahb_clk = {
2547 .hw.init = &(struct clk_init_data){ 2520 .hw.init = &(struct clk_init_data){
2548 .name = "mdp_ahb_clk", 2521 .name = "mdp_ahb_clk",
2549 .ops = &clk_branch_ops, 2522 .ops = &clk_branch_ops,
2550 .flags = CLK_IS_ROOT,
2551 }, 2523 },
2552 }, 2524 },
2553}; 2525};
@@ -2561,7 +2533,6 @@ static struct clk_branch rot_ahb_clk = {
2561 .hw.init = &(struct clk_init_data){ 2533 .hw.init = &(struct clk_init_data){
2562 .name = "rot_ahb_clk", 2534 .name = "rot_ahb_clk",
2563 .ops = &clk_branch_ops, 2535 .ops = &clk_branch_ops,
2564 .flags = CLK_IS_ROOT
2565 }, 2536 },
2566 }, 2537 },
2567}; 2538};
@@ -2577,7 +2548,6 @@ static struct clk_branch smmu_ahb_clk = {
2577 .hw.init = &(struct clk_init_data){ 2548 .hw.init = &(struct clk_init_data){
2578 .name = "smmu_ahb_clk", 2549 .name = "smmu_ahb_clk",
2579 .ops = &clk_branch_ops, 2550 .ops = &clk_branch_ops,
2580 .flags = CLK_IS_ROOT,
2581 }, 2551 },
2582 }, 2552 },
2583}; 2553};
@@ -2591,7 +2561,6 @@ static struct clk_branch tv_enc_ahb_clk = {
2591 .hw.init = &(struct clk_init_data){ 2561 .hw.init = &(struct clk_init_data){
2592 .name = "tv_enc_ahb_clk", 2562 .name = "tv_enc_ahb_clk",
2593 .ops = &clk_branch_ops, 2563 .ops = &clk_branch_ops,
2594 .flags = CLK_IS_ROOT,
2595 }, 2564 },
2596 }, 2565 },
2597}; 2566};
@@ -2605,7 +2574,6 @@ static struct clk_branch vcap_ahb_clk = {
2605 .hw.init = &(struct clk_init_data){ 2574 .hw.init = &(struct clk_init_data){
2606 .name = "vcap_ahb_clk", 2575 .name = "vcap_ahb_clk",
2607 .ops = &clk_branch_ops, 2576 .ops = &clk_branch_ops,
2608 .flags = CLK_IS_ROOT,
2609 }, 2577 },
2610 }, 2578 },
2611}; 2579};
@@ -2621,7 +2589,6 @@ static struct clk_branch vcodec_ahb_clk = {
2621 .hw.init = &(struct clk_init_data){ 2589 .hw.init = &(struct clk_init_data){
2622 .name = "vcodec_ahb_clk", 2590 .name = "vcodec_ahb_clk",
2623 .ops = &clk_branch_ops, 2591 .ops = &clk_branch_ops,
2624 .flags = CLK_IS_ROOT,
2625 }, 2592 },
2626 }, 2593 },
2627}; 2594};
@@ -2635,7 +2602,6 @@ static struct clk_branch vfe_ahb_clk = {
2635 .hw.init = &(struct clk_init_data){ 2602 .hw.init = &(struct clk_init_data){
2636 .name = "vfe_ahb_clk", 2603 .name = "vfe_ahb_clk",
2637 .ops = &clk_branch_ops, 2604 .ops = &clk_branch_ops,
2638 .flags = CLK_IS_ROOT,
2639 }, 2605 },
2640 }, 2606 },
2641}; 2607};
@@ -2649,7 +2615,6 @@ static struct clk_branch vpe_ahb_clk = {
2649 .hw.init = &(struct clk_init_data){ 2615 .hw.init = &(struct clk_init_data){
2650 .name = "vpe_ahb_clk", 2616 .name = "vpe_ahb_clk",
2651 .ops = &clk_branch_ops, 2617 .ops = &clk_branch_ops,
2652 .flags = CLK_IS_ROOT,
2653 }, 2618 },
2654 }, 2619 },
2655}; 2620};
generated by cgit v1.2.2 (git 2.25.0) at 2025-09-02 01:23:25 -0400