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authorDong Aisheng <aisheng.dong@nxp.com>2016-06-30 05:31:16 -0400
committerStephen Boyd <sboyd@codeaurora.org>2016-07-01 20:43:19 -0400
commit39c29498ce7fbf9c28962775ed3e798a4ff68b78 (patch)
tree433685df10fbc4ffbdbd256f4d7bc8ad1a27a871 /drivers/clk/imx
parent5afc99417fc37f9eaee10b132511051b41e434bf (diff)
clk: imx: add clk api for supporting CLK_OPS_PARENT_ENABLE clocks
IMX SoCs like i.MX7D requires using CLK_OPS_PARENT_ENABLE flags, adding the corresponding clock APIs variants for easily to use. Cc: Michael Turquette <mturquette@baylibre.com> Cc: Stephen Boyd <sboyd@codeaurora.org> Cc: Shawn Guo <shawnguo@kernel.org> Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Diffstat (limited to 'drivers/clk/imx')
-rw-r--r--drivers/clk/imx/clk.h32
1 files changed, 32 insertions, 0 deletions
diff --git a/drivers/clk/imx/clk.h b/drivers/clk/imx/clk.h
index 936e235f7c04..a81c0385ed64 100644
--- a/drivers/clk/imx/clk.h
+++ b/drivers/clk/imx/clk.h
@@ -97,6 +97,14 @@ static inline struct clk *imx_clk_divider_flags(const char *name,
97 reg, shift, width, 0, &imx_ccm_lock); 97 reg, shift, width, 0, &imx_ccm_lock);
98} 98}
99 99
100static inline struct clk *imx_clk_divider2(const char *name, const char *parent,
101 void __iomem *reg, u8 shift, u8 width)
102{
103 return clk_register_divider(NULL, name, parent,
104 CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE,
105 reg, shift, width, 0, &imx_ccm_lock);
106}
107
100static inline struct clk *imx_clk_gate(const char *name, const char *parent, 108static inline struct clk *imx_clk_gate(const char *name, const char *parent,
101 void __iomem *reg, u8 shift) 109 void __iomem *reg, u8 shift)
102{ 110{
@@ -133,6 +141,22 @@ static inline struct clk *imx_clk_gate2_cgr(const char *name,
133 shift, cgr_val, 0, &imx_ccm_lock, NULL); 141 shift, cgr_val, 0, &imx_ccm_lock, NULL);
134} 142}
135 143
144static inline struct clk *imx_clk_gate3(const char *name, const char *parent,
145 void __iomem *reg, u8 shift)
146{
147 return clk_register_gate(NULL, name, parent,
148 CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE,
149 reg, shift, 0, &imx_ccm_lock);
150}
151
152static inline struct clk *imx_clk_gate4(const char *name, const char *parent,
153 void __iomem *reg, u8 shift)
154{
155 return clk_register_gate2(NULL, name, parent,
156 CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE,
157 reg, shift, 0x3, 0, &imx_ccm_lock, NULL);
158}
159
136static inline struct clk *imx_clk_mux(const char *name, void __iomem *reg, 160static inline struct clk *imx_clk_mux(const char *name, void __iomem *reg,
137 u8 shift, u8 width, const char **parents, int num_parents) 161 u8 shift, u8 width, const char **parents, int num_parents)
138{ 162{
@@ -141,6 +165,14 @@ static inline struct clk *imx_clk_mux(const char *name, void __iomem *reg,
141 width, 0, &imx_ccm_lock); 165 width, 0, &imx_ccm_lock);
142} 166}
143 167
168static inline struct clk *imx_clk_mux2(const char *name, void __iomem *reg,
169 u8 shift, u8 width, const char **parents, int num_parents)
170{
171 return clk_register_mux(NULL, name, parents, num_parents,
172 CLK_SET_RATE_NO_REPARENT | CLK_OPS_PARENT_ENABLE,
173 reg, shift, width, 0, &imx_ccm_lock);
174}
175
144static inline struct clk *imx_clk_mux_flags(const char *name, 176static inline struct clk *imx_clk_mux_flags(const char *name,
145 void __iomem *reg, u8 shift, u8 width, const char **parents, 177 void __iomem *reg, u8 shift, u8 width, const char **parents,
146 int num_parents, unsigned long flags) 178 int num_parents, unsigned long flags)