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authorStephen Warren <swarren@nvidia.com>2012-04-09 15:40:24 -0400
committerMark Brown <broonie@opensource.wolfsonmicro.com>2012-04-10 06:01:18 -0400
commitf01ee60fffa4dc6c77122121233a793f7f696e67 (patch)
tree5072955487b9e4c80f5c6f6454358d80e8f23a48 /drivers/base/regmap/regmap-mmio.c
parentc0cc6fe1d09e3f1baecbdf8922473c8e7d3a5317 (diff)
regmap: implement register striding
regmap_config.reg_stride is introduced. All extant register addresses are a multiple of this value. Users of serial-oriented regmap busses will typically set this to 1. Users of the MMIO regmap bus will typically set this based on the value size of their registers, in bytes, so 4 for a 32-bit register. Throughout the regmap code, actual register addresses are used. Wherever the register address is used to index some array of values, the address is divided by the stride to determine the index, or vice-versa. Error- checking is added to all entry-points for register address data to ensure that register addresses actually satisfy the specified stride. The MMIO bus ensures that the specified stride is large enough for the register size. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Diffstat (limited to 'drivers/base/regmap/regmap-mmio.c')
-rw-r--r--drivers/base/regmap/regmap-mmio.c13
1 files changed, 13 insertions, 0 deletions
diff --git a/drivers/base/regmap/regmap-mmio.c b/drivers/base/regmap/regmap-mmio.c
index bdf4dc865293..febd6de6c8ac 100644
--- a/drivers/base/regmap/regmap-mmio.c
+++ b/drivers/base/regmap/regmap-mmio.c
@@ -130,6 +130,7 @@ struct regmap_mmio_context *regmap_mmio_gen_context(void __iomem *regs,
130 const struct regmap_config *config) 130 const struct regmap_config *config)
131{ 131{
132 struct regmap_mmio_context *ctx; 132 struct regmap_mmio_context *ctx;
133 int min_stride;
133 134
134 if (config->reg_bits != 32) 135 if (config->reg_bits != 32)
135 return ERR_PTR(-EINVAL); 136 return ERR_PTR(-EINVAL);
@@ -139,16 +140,28 @@ struct regmap_mmio_context *regmap_mmio_gen_context(void __iomem *regs,
139 140
140 switch (config->val_bits) { 141 switch (config->val_bits) {
141 case 8: 142 case 8:
143 /* The core treats 0 as 1 */
144 min_stride = 0;
145 break;
142 case 16: 146 case 16:
147 min_stride = 2;
148 break;
143 case 32: 149 case 32:
150 min_stride = 4;
151 break;
144#ifdef CONFIG_64BIT 152#ifdef CONFIG_64BIT
145 case 64: 153 case 64:
154 min_stride = 8;
155 break;
146#endif 156#endif
147 break; 157 break;
148 default: 158 default:
149 return ERR_PTR(-EINVAL); 159 return ERR_PTR(-EINVAL);
150 } 160 }
151 161
162 if (config->reg_stride < min_stride)
163 return ERR_PTR(-EINVAL);
164
152 ctx = kzalloc(GFP_KERNEL, sizeof(*ctx)); 165 ctx = kzalloc(GFP_KERNEL, sizeof(*ctx));
153 if (!ctx) 166 if (!ctx)
154 return ERR_PTR(-ENOMEM); 167 return ERR_PTR(-ENOMEM);