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authorGeorge Cherian <george.cherian@cavium.com>2018-02-20 06:16:03 -0500
committerRafael J. Wysocki <rafael.j.wysocki@intel.com>2018-02-22 16:54:00 -0500
commitd29abc836843b8c9537b4d778eb2d429a804a5ed (patch)
tree0d45b583d7fe5a36cf193ab6c6b1f6ec1ee3565e /drivers/acpi/cppc_acpi.c
parent91ab883eb21325ad80f3473633f794c78ac87f51 (diff)
ACPI / CPPC: Update all pr_(debug/err) messages to log the susbspace id
CPPC dirver is aware of multiple PCC subspace IDs. Enhance the debug and error messages in the driver to print the subspace id. In case of error it will be helpful to find which particular subspace is failing. Signed-off-by: George Cherian <george.cherian@cavium.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Diffstat (limited to 'drivers/acpi/cppc_acpi.c')
-rw-r--r--drivers/acpi/cppc_acpi.c27
1 files changed, 16 insertions, 11 deletions
diff --git a/drivers/acpi/cppc_acpi.c b/drivers/acpi/cppc_acpi.c
index 0afbb2658cbc..735c74a4cbdb 100644
--- a/drivers/acpi/cppc_acpi.c
+++ b/drivers/acpi/cppc_acpi.c
@@ -227,7 +227,8 @@ static int check_pcc_chan(int pcc_ss_id, bool chk_err_bit)
227 if (likely(!ret)) 227 if (likely(!ret))
228 pcc_ss_data->platform_owns_pcc = false; 228 pcc_ss_data->platform_owns_pcc = false;
229 else 229 else
230 pr_err("PCC check channel failed. Status=%x\n", status); 230 pr_err("PCC check channel failed for ss: %d. Status=%x\n",
231 pcc_ss_id, status);
231 232
232 return ret; 233 return ret;
233} 234}
@@ -291,7 +292,8 @@ static int send_pcc_cmd(int pcc_ss_id, u16 cmd)
291 time_delta = ktime_ms_delta(ktime_get(), 292 time_delta = ktime_ms_delta(ktime_get(),
292 pcc_ss_data->last_mpar_reset); 293 pcc_ss_data->last_mpar_reset);
293 if ((time_delta < 60 * MSEC_PER_SEC) && pcc_ss_data->last_mpar_reset) { 294 if ((time_delta < 60 * MSEC_PER_SEC) && pcc_ss_data->last_mpar_reset) {
294 pr_debug("PCC cmd not sent due to MPAR limit"); 295 pr_debug("PCC cmd for subspace %d not sent due to MPAR limit",
296 pcc_ss_id);
295 ret = -EIO; 297 ret = -EIO;
296 goto end; 298 goto end;
297 } 299 }
@@ -312,8 +314,8 @@ static int send_pcc_cmd(int pcc_ss_id, u16 cmd)
312 /* Ring doorbell */ 314 /* Ring doorbell */
313 ret = mbox_send_message(pcc_ss_data->pcc_channel, &cmd); 315 ret = mbox_send_message(pcc_ss_data->pcc_channel, &cmd);
314 if (ret < 0) { 316 if (ret < 0) {
315 pr_err("Err sending PCC mbox message. cmd:%d, ret:%d\n", 317 pr_err("Err sending PCC mbox message. ss: %d cmd:%d, ret:%d\n",
316 cmd, ret); 318 pcc_ss_id, cmd, ret);
317 goto end; 319 goto end;
318 } 320 }
319 321
@@ -553,7 +555,8 @@ static int register_pcc_channel(int pcc_ss_idx)
553 pcc_mbox_request_channel(&cppc_mbox_cl, pcc_ss_idx); 555 pcc_mbox_request_channel(&cppc_mbox_cl, pcc_ss_idx);
554 556
555 if (IS_ERR(pcc_data[pcc_ss_idx]->pcc_channel)) { 557 if (IS_ERR(pcc_data[pcc_ss_idx]->pcc_channel)) {
556 pr_err("Failed to find PCC communication channel\n"); 558 pr_err("Failed to find PCC channel for subspace %d\n",
559 pcc_ss_idx);
557 return -ENODEV; 560 return -ENODEV;
558 } 561 }
559 562
@@ -566,7 +569,8 @@ static int register_pcc_channel(int pcc_ss_idx)
566 cppc_ss = (pcc_data[pcc_ss_idx]->pcc_channel)->con_priv; 569 cppc_ss = (pcc_data[pcc_ss_idx]->pcc_channel)->con_priv;
567 570
568 if (!cppc_ss) { 571 if (!cppc_ss) {
569 pr_err("No PCC subspace found for CPPC\n"); 572 pr_err("No PCC subspace found for %d CPPC\n",
573 pcc_ss_idx);
570 return -ENODEV; 574 return -ENODEV;
571 } 575 }
572 576
@@ -584,7 +588,8 @@ static int register_pcc_channel(int pcc_ss_idx)
584 pcc_data[pcc_ss_idx]->pcc_comm_addr = 588 pcc_data[pcc_ss_idx]->pcc_comm_addr =
585 acpi_os_ioremap(cppc_ss->base_address, cppc_ss->length); 589 acpi_os_ioremap(cppc_ss->base_address, cppc_ss->length);
586 if (!pcc_data[pcc_ss_idx]->pcc_comm_addr) { 590 if (!pcc_data[pcc_ss_idx]->pcc_comm_addr) {
587 pr_err("Failed to ioremap PCC comm region mem\n"); 591 pr_err("Failed to ioremap PCC comm region mem for %d\n",
592 pcc_ss_idx);
588 return -ENOMEM; 593 return -ENOMEM;
589 } 594 }
590 595
@@ -973,8 +978,8 @@ static int cpc_read(int cpu, struct cpc_register_resource *reg_res, u64 *val)
973 *val = readq_relaxed(vaddr); 978 *val = readq_relaxed(vaddr);
974 break; 979 break;
975 default: 980 default:
976 pr_debug("Error: Cannot read %u bit width from PCC\n", 981 pr_debug("Error: Cannot read %u bit width from PCC for ss: %d\n",
977 reg->bit_width); 982 reg->bit_width, pcc_ss_id);
978 ret_val = -EFAULT; 983 ret_val = -EFAULT;
979 } 984 }
980 985
@@ -1012,8 +1017,8 @@ static int cpc_write(int cpu, struct cpc_register_resource *reg_res, u64 val)
1012 writeq_relaxed(val, vaddr); 1017 writeq_relaxed(val, vaddr);
1013 break; 1018 break;
1014 default: 1019 default:
1015 pr_debug("Error: Cannot write %u bit width to PCC\n", 1020 pr_debug("Error: Cannot write %u bit width to PCC for ss: %d\n",
1016 reg->bit_width); 1021 reg->bit_width, pcc_ss_id);
1017 ret_val = -EFAULT; 1022 ret_val = -EFAULT;
1018 break; 1023 break;
1019 } 1024 }