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authorOlof Johansson <olof@lixom.net>2013-11-15 18:17:59 -0500
committerOlof Johansson <olof@lixom.net>2013-11-15 18:17:59 -0500
commit6886059f2ef5d62c73e87a905e84fa4f87d56074 (patch)
treedfe6e1611d7c50057df52db7b55eafbfb8e33a93 /arch
parentca439c9b983ffa14e9eae6030e3ee80ad039388f (diff)
parent26273e02a0cf18eb72416559310d3294390a9024 (diff)
Merge tag 'omap-for-v3.13/fixes-for-merge-window-take2' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into fixes
Few clock fixes, a runtime PM fix, and pinctrl-single fix along with few other fixes that popped up during the merge window. * tag 'omap-for-v3.13/fixes-for-merge-window-take2' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: ARM: OMAP2+: Fix build for dra7xx without omap4 and 5 ARM: OMAP2+: omap_device: maintain sane runtime pm status around suspend/resume doc: devicetree: Add bindings documentation for omap-des driver ARM: dts: doc: Document missing compatible property for omap-sham driver ARM: OMAP3: Beagle: fix return value check in beagle_opp_init() ARM: OMAP: devicetree: fix SPI node compatible property syntax items pinctrl: single: call pcs_soc->rearm() whenever IRQ mask is changed ARM: OMAP2+: smsc911x: fix return value check in gpmc_smsc911x_init() + sync with newer trunk
Diffstat (limited to 'arch')
-rw-r--r--arch/Kconfig22
-rw-r--r--arch/alpha/include/asm/Kbuild1
-rw-r--r--arch/arc/include/asm/Kbuild1
-rw-r--r--arch/arc/include/asm/mach_desc.h17
-rw-r--r--arch/arc/include/asm/prom.h14
-rw-r--r--arch/arc/kernel/devtree.c97
-rw-r--r--arch/arc/kernel/setup.c6
-rw-r--r--arch/arc/mm/init.c7
-rw-r--r--arch/arm/Kconfig8
-rw-r--r--arch/arm/boot/dts/atlas6.dtsi12
-rw-r--r--arch/arm/boot/dts/prima2.dtsi42
-rw-r--r--arch/arm/boot/dts/testcases/tests-interrupts.dtsi58
-rw-r--r--arch/arm/boot/dts/testcases/tests.dtsi1
-rw-r--r--arch/arm/boot/dts/versatile-ab.dts2
-rw-r--r--arch/arm/boot/dts/versatile-pb.dts2
-rw-r--r--arch/arm/boot/dts/zynq-7000.dtsi8
-rw-r--r--arch/arm/include/asm/Kbuild1
-rw-r--r--arch/arm/include/asm/arch_timer.h36
-rw-r--r--arch/arm/include/asm/hardware/iop3xx-gpio.h75
-rw-r--r--arch/arm/include/asm/hardware/iop3xx.h12
-rw-r--r--arch/arm/include/asm/prom.h2
-rw-r--r--arch/arm/include/uapi/asm/hwcap.h1
-rw-r--r--arch/arm/kernel/arch_timer.c14
-rw-r--r--arch/arm/kernel/devtree.c57
-rw-r--r--arch/arm/kernel/setup.c1
-rw-r--r--arch/arm/mach-bcm2835/bcm2835.c5
-rw-r--r--arch/arm/mach-gemini/gpio.c2
-rw-r--r--arch/arm/mach-gemini/include/mach/gpio.h20
-rw-r--r--arch/arm/mach-integrator/pci_v3.c18
-rw-r--r--arch/arm/mach-iop32x/em7210.c2
-rw-r--r--arch/arm/mach-iop32x/glantank.c2
-rw-r--r--arch/arm/mach-iop32x/gpio-iop32x.h10
-rw-r--r--arch/arm/mach-iop32x/include/mach/gpio.h6
-rw-r--r--arch/arm/mach-iop32x/include/mach/iop32x.h1
-rw-r--r--arch/arm/mach-iop32x/iq31244.c2
-rw-r--r--arch/arm/mach-iop32x/iq80321.c2
-rw-r--r--arch/arm/mach-iop32x/n2100.c47
-rw-r--r--arch/arm/mach-iop33x/include/mach/gpio.h6
-rw-r--r--arch/arm/mach-iop33x/include/mach/iop33x.h1
-rw-r--r--arch/arm/mach-iop33x/iq80331.c7
-rw-r--r--arch/arm/mach-iop33x/iq80332.c7
-rw-r--r--arch/arm/mach-ixp4xx/common.c49
-rw-r--r--arch/arm/mach-ixp4xx/dsmg600-setup.c65
-rw-r--r--arch/arm/mach-ixp4xx/include/mach/platform.h39
-rw-r--r--arch/arm/mach-ixp4xx/ixdp425-setup.c8
-rw-r--r--arch/arm/mach-ixp4xx/nas100d-setup.c49
-rw-r--r--arch/arm/mach-ixp4xx/nslu2-setup.c17
-rw-r--r--arch/arm/mach-keystone/platsmp.c1
-rw-r--r--arch/arm/mach-mmp/include/mach/gpio.h8
-rw-r--r--arch/arm/mach-msm/timer.c1
-rw-r--r--arch/arm/mach-omap2/Makefile2
-rw-r--r--arch/arm/mach-omap2/board-omap3beagle.c2
-rw-r--r--arch/arm/mach-omap2/board-rx51-peripherals.c20
-rw-r--r--arch/arm/mach-omap2/cclock3xxx_data.c58
-rw-r--r--arch/arm/mach-omap2/cclock44xx_data.c3
-rw-r--r--arch/arm/mach-omap2/gpmc-smsc911x.c2
-rw-r--r--arch/arm/mach-omap2/omap_device.c13
-rw-r--r--arch/arm/mach-omap2/prm44xx_54xx.h3
-rw-r--r--arch/arm/mach-pxa/include/mach/gpio.h32
-rw-r--r--arch/arm/mach-s3c64xx/mach-crag6410.c12
-rw-r--r--arch/arm/mach-u300/timer.c9
-rw-r--r--arch/arm/mach-w90x900/include/mach/gpio.h30
-rw-r--r--arch/arm/mach-zynq/Kconfig1
-rw-r--r--arch/arm/mm/init.c13
-rw-r--r--arch/arm/plat-iop/Makefile2
-rw-r--r--arch/arm/plat-iop/gpio.c93
-rw-r--r--arch/arm64/Kconfig1
-rw-r--r--arch/arm64/boot/dts/apm-storm.dtsi75
-rw-r--r--arch/arm64/include/asm/Kbuild1
-rw-r--r--arch/arm64/include/asm/arch_timer.h42
-rw-r--r--arch/arm64/include/asm/hwcap.h11
-rw-r--r--arch/arm64/include/asm/prom.h1
-rw-r--r--arch/arm64/include/uapi/asm/hwcap.h1
-rw-r--r--arch/arm64/kernel/setup.c71
-rw-r--r--arch/arm64/kernel/time.c10
-rw-r--r--arch/arm64/mm/init.c25
-rw-r--r--arch/avr32/include/asm/Kbuild1
-rw-r--r--arch/blackfin/Kconfig11
-rw-r--r--arch/blackfin/include/asm/Kbuild1
-rw-r--r--arch/blackfin/include/asm/gpio.h157
-rw-r--r--arch/blackfin/include/asm/portmux.h19
-rw-r--r--arch/blackfin/kernel/Makefile3
-rw-r--r--arch/blackfin/mach-bf548/include/mach/portmux.h2
-rw-r--r--arch/blackfin/mach-bf609/include/mach/portmux.h2
-rw-r--r--arch/c6x/include/asm/Kbuild1
-rw-r--r--arch/c6x/include/asm/prom.h1
-rw-r--r--arch/c6x/include/asm/setup.h2
-rw-r--r--arch/c6x/kernel/devicetree.c29
-rw-r--r--arch/c6x/kernel/setup.c13
-rw-r--r--arch/c6x/kernel/vmlinux.lds.S6
-rw-r--r--arch/cris/include/asm/Kbuild1
-rw-r--r--arch/frv/include/asm/Kbuild1
-rw-r--r--arch/h8300/Kconfig108
-rw-r--r--arch/h8300/Kconfig.cpu171
-rw-r--r--arch/h8300/Kconfig.debug68
-rw-r--r--arch/h8300/Kconfig.ide44
-rw-r--r--arch/h8300/Makefile71
-rw-r--r--arch/h8300/README38
-rw-r--r--arch/h8300/boot/Makefile22
-rw-r--r--arch/h8300/boot/compressed/Makefile37
-rw-r--r--arch/h8300/boot/compressed/head.S47
-rw-r--r--arch/h8300/boot/compressed/misc.c180
-rw-r--r--arch/h8300/boot/compressed/vmlinux.lds32
-rw-r--r--arch/h8300/boot/compressed/vmlinux.scr9
-rw-r--r--arch/h8300/defconfig42
-rw-r--r--arch/h8300/include/asm/Kbuild8
-rw-r--r--arch/h8300/include/asm/asm-offsets.h1
-rw-r--r--arch/h8300/include/asm/atomic.h146
-rw-r--r--arch/h8300/include/asm/barrier.h29
-rw-r--r--arch/h8300/include/asm/bitops.h211
-rw-r--r--arch/h8300/include/asm/bootinfo.h2
-rw-r--r--arch/h8300/include/asm/bug.h12
-rw-r--r--arch/h8300/include/asm/bugs.h16
-rw-r--r--arch/h8300/include/asm/cache.h13
-rw-r--r--arch/h8300/include/asm/cachectl.h14
-rw-r--r--arch/h8300/include/asm/cacheflush.h40
-rw-r--r--arch/h8300/include/asm/checksum.h102
-rw-r--r--arch/h8300/include/asm/cmpxchg.h60
-rw-r--r--arch/h8300/include/asm/cputime.h6
-rw-r--r--arch/h8300/include/asm/current.h25
-rw-r--r--arch/h8300/include/asm/dbg.h2
-rw-r--r--arch/h8300/include/asm/delay.h38
-rw-r--r--arch/h8300/include/asm/device.h7
-rw-r--r--arch/h8300/include/asm/div64.h1
-rw-r--r--arch/h8300/include/asm/dma.h15
-rw-r--r--arch/h8300/include/asm/elf.h101
-rw-r--r--arch/h8300/include/asm/emergency-restart.h6
-rw-r--r--arch/h8300/include/asm/fb.h12
-rw-r--r--arch/h8300/include/asm/flat.h26
-rw-r--r--arch/h8300/include/asm/fpu.h1
-rw-r--r--arch/h8300/include/asm/ftrace.h1
-rw-r--r--arch/h8300/include/asm/futex.h6
-rw-r--r--arch/h8300/include/asm/gpio-internal.h52
-rw-r--r--arch/h8300/include/asm/hardirq.h19
-rw-r--r--arch/h8300/include/asm/hw_irq.h1
-rw-r--r--arch/h8300/include/asm/io.h358
-rw-r--r--arch/h8300/include/asm/irq.h49
-rw-r--r--arch/h8300/include/asm/irq_regs.h1
-rw-r--r--arch/h8300/include/asm/irqflags.h43
-rw-r--r--arch/h8300/include/asm/kdebug.h1
-rw-r--r--arch/h8300/include/asm/kmap_types.h6
-rw-r--r--arch/h8300/include/asm/local.h6
-rw-r--r--arch/h8300/include/asm/local64.h1
-rw-r--r--arch/h8300/include/asm/mc146818rtc.h9
-rw-r--r--arch/h8300/include/asm/mmu_context.h32
-rw-r--r--arch/h8300/include/asm/mutex.h9
-rw-r--r--arch/h8300/include/asm/page.h78
-rw-r--r--arch/h8300/include/asm/page_offset.h3
-rw-r--r--arch/h8300/include/asm/param.h9
-rw-r--r--arch/h8300/include/asm/pci.h19
-rw-r--r--arch/h8300/include/asm/percpu.h6
-rw-r--r--arch/h8300/include/asm/pgalloc.h8
-rw-r--r--arch/h8300/include/asm/pgtable.h73
-rw-r--r--arch/h8300/include/asm/processor.h139
-rw-r--r--arch/h8300/include/asm/ptrace.h33
-rw-r--r--arch/h8300/include/asm/regs267x.h336
-rw-r--r--arch/h8300/include/asm/regs306x.h212
-rw-r--r--arch/h8300/include/asm/scatterlist.h6
-rw-r--r--arch/h8300/include/asm/sections.h6
-rw-r--r--arch/h8300/include/asm/segment.h49
-rw-r--r--arch/h8300/include/asm/sh_bios.h29
-rw-r--r--arch/h8300/include/asm/shm.h31
-rw-r--r--arch/h8300/include/asm/shmparam.h6
-rw-r--r--arch/h8300/include/asm/signal.h24
-rw-r--r--arch/h8300/include/asm/smp.h1
-rw-r--r--arch/h8300/include/asm/spinlock.h6
-rw-r--r--arch/h8300/include/asm/string.h44
-rw-r--r--arch/h8300/include/asm/switch_to.h50
-rw-r--r--arch/h8300/include/asm/target_time.h4
-rw-r--r--arch/h8300/include/asm/termios.h50
-rw-r--r--arch/h8300/include/asm/thread_info.h103
-rw-r--r--arch/h8300/include/asm/timer.h25
-rw-r--r--arch/h8300/include/asm/timex.h19
-rw-r--r--arch/h8300/include/asm/tlb.h8
-rw-r--r--arch/h8300/include/asm/tlbflush.h55
-rw-r--r--arch/h8300/include/asm/topology.h6
-rw-r--r--arch/h8300/include/asm/traps.h37
-rw-r--r--arch/h8300/include/asm/types.h9
-rw-r--r--arch/h8300/include/asm/uaccess.h163
-rw-r--r--arch/h8300/include/asm/ucontext.h12
-rw-r--r--arch/h8300/include/asm/unaligned.h11
-rw-r--r--arch/h8300/include/asm/unistd.h36
-rw-r--r--arch/h8300/include/asm/user.h75
-rw-r--r--arch/h8300/include/asm/virtconvert.h20
-rw-r--r--arch/h8300/include/uapi/asm/Kbuild34
-rw-r--r--arch/h8300/include/uapi/asm/auxvec.h4
-rw-r--r--arch/h8300/include/uapi/asm/bitsperlong.h1
-rw-r--r--arch/h8300/include/uapi/asm/byteorder.h6
-rw-r--r--arch/h8300/include/uapi/asm/errno.h6
-rw-r--r--arch/h8300/include/uapi/asm/fcntl.h11
-rw-r--r--arch/h8300/include/uapi/asm/ioctl.h1
-rw-r--r--arch/h8300/include/uapi/asm/ioctls.h8
-rw-r--r--arch/h8300/include/uapi/asm/ipcbuf.h1
-rw-r--r--arch/h8300/include/uapi/asm/kvm_para.h1
-rw-r--r--arch/h8300/include/uapi/asm/mman.h1
-rw-r--r--arch/h8300/include/uapi/asm/msgbuf.h31
-rw-r--r--arch/h8300/include/uapi/asm/param.h16
-rw-r--r--arch/h8300/include/uapi/asm/poll.h11
-rw-r--r--arch/h8300/include/uapi/asm/posix_types.h26
-rw-r--r--arch/h8300/include/uapi/asm/ptrace.h44
-rw-r--r--arch/h8300/include/uapi/asm/resource.h6
-rw-r--r--arch/h8300/include/uapi/asm/sembuf.h25
-rw-r--r--arch/h8300/include/uapi/asm/setup.h6
-rw-r--r--arch/h8300/include/uapi/asm/shmbuf.h42
-rw-r--r--arch/h8300/include/uapi/asm/sigcontext.h18
-rw-r--r--arch/h8300/include/uapi/asm/siginfo.h6
-rw-r--r--arch/h8300/include/uapi/asm/signal.h115
-rw-r--r--arch/h8300/include/uapi/asm/socket.h79
-rw-r--r--arch/h8300/include/uapi/asm/sockios.h13
-rw-r--r--arch/h8300/include/uapi/asm/stat.h78
-rw-r--r--arch/h8300/include/uapi/asm/statfs.h6
-rw-r--r--arch/h8300/include/uapi/asm/swab.h10
-rw-r--r--arch/h8300/include/uapi/asm/termbits.h201
-rw-r--r--arch/h8300/include/uapi/asm/termios.h44
-rw-r--r--arch/h8300/include/uapi/asm/types.h1
-rw-r--r--arch/h8300/include/uapi/asm/unistd.h330
-rw-r--r--arch/h8300/kernel/Makefile12
-rw-r--r--arch/h8300/kernel/asm-offsets.c60
-rw-r--r--arch/h8300/kernel/entry.S402
-rw-r--r--arch/h8300/kernel/gpio.c178
-rw-r--r--arch/h8300/kernel/h8300_ksyms.c100
-rw-r--r--arch/h8300/kernel/irq.c165
-rw-r--r--arch/h8300/kernel/module.c75
-rw-r--r--arch/h8300/kernel/process.c154
-rw-r--r--arch/h8300/kernel/ptrace.c168
-rw-r--r--arch/h8300/kernel/setup.c242
-rw-r--r--arch/h8300/kernel/signal.c444
-rw-r--r--arch/h8300/kernel/sys_h8300.c48
-rw-r--r--arch/h8300/kernel/syscalls.S338
-rw-r--r--arch/h8300/kernel/time.c66
-rw-r--r--arch/h8300/kernel/timer/Makefile6
-rw-r--r--arch/h8300/kernel/timer/itu.c82
-rw-r--r--arch/h8300/kernel/timer/timer16.c77
-rw-r--r--arch/h8300/kernel/timer/timer8.c102
-rw-r--r--arch/h8300/kernel/timer/tpu.c100
-rw-r--r--arch/h8300/kernel/traps.c166
-rw-r--r--arch/h8300/kernel/vmlinux.lds.S157
-rw-r--r--arch/h8300/lib/Makefile5
-rw-r--r--arch/h8300/lib/abs.S21
-rw-r--r--arch/h8300/lib/ashrdi3.c63
-rw-r--r--arch/h8300/lib/checksum.c164
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-rw-r--r--arch/h8300/lib/memset.S61
-rw-r--r--arch/h8300/lib/romfs.S57
-rw-r--r--arch/h8300/mm/Makefile5
-rw-r--r--arch/h8300/mm/fault.c56
-rw-r--r--arch/h8300/mm/init.c155
-rw-r--r--arch/h8300/mm/kmap.c58
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-rw-r--r--arch/h8300/platform/h8300h/aki3068net/Makefile5
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-rw-r--r--arch/microblaze/pci/pci-common.c73
-rw-r--r--arch/mips/include/asm/Kbuild1
-rw-r--r--arch/mips/include/asm/netlogic/xlp-hal/xlp.h1
-rw-r--r--arch/mips/include/asm/prom.h14
-rw-r--r--arch/mips/kernel/prom.c60
-rw-r--r--arch/mips/kernel/rtlx.c19
-rw-r--r--arch/mips/lantiq/prom.c1
-rw-r--r--arch/mips/mm/init.c5
-rw-r--r--arch/mips/mti-sead3/sead3-setup.c2
-rw-r--r--arch/mips/netlogic/xlp/dt.c18
-rw-r--r--arch/mips/netlogic/xlp/setup.c2
-rw-r--r--arch/mips/pci/fixup-lantiq.c13
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-rw-r--r--arch/x86/platform/intel-mid/device_libs/platform_msic_power_btn.c36
-rw-r--r--arch/x86/platform/intel-mid/device_libs/platform_msic_thermal.c37
-rw-r--r--arch/x86/platform/intel-mid/device_libs/platform_pmic_gpio.c54
-rw-r--r--arch/x86/platform/intel-mid/device_libs/platform_tc35876x.c36
-rw-r--r--arch/x86/platform/intel-mid/device_libs/platform_tca6416.c57
-rw-r--r--arch/x86/platform/intel-mid/early_printk_intel_mid.c (renamed from arch/x86/platform/mrst/early_printk_mrst.c)11
-rw-r--r--arch/x86/platform/intel-mid/intel-mid.c213
-rw-r--r--arch/x86/platform/intel-mid/intel_mid_vrtc.c (renamed from arch/x86/platform/mrst/vrtc.c)19
-rw-r--r--arch/x86/platform/intel-mid/sfi.c488
-rw-r--r--arch/x86/platform/mrst/Makefile3
-rw-r--r--arch/x86/platform/mrst/mrst.c1052
-rw-r--r--arch/x86/platform/uv/Makefile2
-rw-r--r--arch/x86/platform/uv/uv_nmi.c700
-rw-r--r--arch/xtensa/include/asm/Kbuild1
-rw-r--r--arch/xtensa/include/asm/prom.h6
-rw-r--r--arch/xtensa/kernel/setup.c55
660 files changed, 9317 insertions, 17459 deletions
diff --git a/arch/Kconfig b/arch/Kconfig
index af2cc6eabcc7..ded747c7b74c 100644
--- a/arch/Kconfig
+++ b/arch/Kconfig
@@ -353,6 +353,18 @@ config HAVE_CONTEXT_TRACKING
353config HAVE_VIRT_CPU_ACCOUNTING 353config HAVE_VIRT_CPU_ACCOUNTING
354 bool 354 bool
355 355
356config HAVE_VIRT_CPU_ACCOUNTING_GEN
357 bool
358 default y if 64BIT
359 help
360 With VIRT_CPU_ACCOUNTING_GEN, cputime_t becomes 64-bit.
361 Before enabling this option, arch code must be audited
362 to ensure there are no races in concurrent read/write of
363 cputime_t. For example, reading/writing 64-bit cputime_t on
364 some 32-bit arches may require multiple accesses, so proper
365 locking is needed to protect against concurrent accesses.
366
367
356config HAVE_IRQ_TIME_ACCOUNTING 368config HAVE_IRQ_TIME_ACCOUNTING
357 bool 369 bool
358 help 370 help
@@ -390,6 +402,16 @@ config HAVE_UNDERSCORE_SYMBOL_PREFIX
390 Some architectures generate an _ in front of C symbols; things like 402 Some architectures generate an _ in front of C symbols; things like
391 module loading and assembly files need to know about this. 403 module loading and assembly files need to know about this.
392 404
405config HAVE_IRQ_EXIT_ON_IRQ_STACK
406 bool
407 help
408 Architecture doesn't only execute the irq handler on the irq stack
409 but also irq_exit(). This way we can process softirqs on this irq
410 stack instead of switching to a new one when we call __do_softirq()
411 in the end of an hardirq.
412 This spares a stack switch and improves cache usage on softirq
413 processing.
414
393# 415#
394# ABI hall of shame 416# ABI hall of shame
395# 417#
diff --git a/arch/alpha/include/asm/Kbuild b/arch/alpha/include/asm/Kbuild
index a6e85f448c1c..f01fb505ad52 100644
--- a/arch/alpha/include/asm/Kbuild
+++ b/arch/alpha/include/asm/Kbuild
@@ -3,3 +3,4 @@ generic-y += clkdev.h
3 3
4generic-y += exec.h 4generic-y += exec.h
5generic-y += trace_clock.h 5generic-y += trace_clock.h
6generic-y += preempt.h
diff --git a/arch/arc/include/asm/Kbuild b/arch/arc/include/asm/Kbuild
index d8dd660898b9..5943f7f9d325 100644
--- a/arch/arc/include/asm/Kbuild
+++ b/arch/arc/include/asm/Kbuild
@@ -46,3 +46,4 @@ generic-y += ucontext.h
46generic-y += user.h 46generic-y += user.h
47generic-y += vga.h 47generic-y += vga.h
48generic-y += xor.h 48generic-y += xor.h
49generic-y += preempt.h
diff --git a/arch/arc/include/asm/mach_desc.h b/arch/arc/include/asm/mach_desc.h
index 9998dc846ebb..e8993a2be6c2 100644
--- a/arch/arc/include/asm/mach_desc.h
+++ b/arch/arc/include/asm/mach_desc.h
@@ -51,22 +51,12 @@ struct machine_desc {
51/* 51/*
52 * Current machine - only accessible during boot. 52 * Current machine - only accessible during boot.
53 */ 53 */
54extern struct machine_desc *machine_desc; 54extern const struct machine_desc *machine_desc;
55 55
56/* 56/*
57 * Machine type table - also only accessible during boot 57 * Machine type table - also only accessible during boot
58 */ 58 */
59extern struct machine_desc __arch_info_begin[], __arch_info_end[]; 59extern const struct machine_desc __arch_info_begin[], __arch_info_end[];
60#define for_each_machine_desc(p) \
61 for (p = __arch_info_begin; p < __arch_info_end; p++)
62
63static inline struct machine_desc *default_machine_desc(void)
64{
65 /* the default machine is the last one linked in */
66 if (__arch_info_end - 1 < __arch_info_begin)
67 return NULL;
68 return __arch_info_end - 1;
69}
70 60
71/* 61/*
72 * Set of macros to define architecture features. 62 * Set of macros to define architecture features.
@@ -81,7 +71,6 @@ __attribute__((__section__(".arch.info.init"))) = { \
81#define MACHINE_END \ 71#define MACHINE_END \
82}; 72};
83 73
84extern struct machine_desc *setup_machine_fdt(void *dt); 74extern const struct machine_desc *setup_machine_fdt(void *dt);
85extern void __init copy_devtree(void);
86 75
87#endif 76#endif
diff --git a/arch/arc/include/asm/prom.h b/arch/arc/include/asm/prom.h
deleted file mode 100644
index 692d0d0789a7..000000000000
--- a/arch/arc/include/asm/prom.h
+++ /dev/null
@@ -1,14 +0,0 @@
1/*
2 * Copyright (C) 2012 Synopsys, Inc. (www.synopsys.com)
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8
9#ifndef _ASM_ARC_PROM_H_
10#define _ASM_ARC_PROM_H_
11
12#define HAVE_ARCH_DEVTREE_FIXUPS
13
14#endif
diff --git a/arch/arc/kernel/devtree.c b/arch/arc/kernel/devtree.c
index 2340af0e1d6f..b6dc4e21fd32 100644
--- a/arch/arc/kernel/devtree.c
+++ b/arch/arc/kernel/devtree.c
@@ -14,10 +14,22 @@
14#include <linux/memblock.h> 14#include <linux/memblock.h>
15#include <linux/of.h> 15#include <linux/of.h>
16#include <linux/of_fdt.h> 16#include <linux/of_fdt.h>
17#include <asm/prom.h>
18#include <asm/clk.h> 17#include <asm/clk.h>
19#include <asm/mach_desc.h> 18#include <asm/mach_desc.h>
20 19
20static const void * __init arch_get_next_mach(const char *const **match)
21{
22 static const struct machine_desc *mdesc = __arch_info_begin;
23 const struct machine_desc *m = mdesc;
24
25 if (m >= __arch_info_end)
26 return NULL;
27
28 mdesc++;
29 *match = m->dt_compat;
30 return m;
31}
32
21/** 33/**
22 * setup_machine_fdt - Machine setup when an dtb was passed to the kernel 34 * setup_machine_fdt - Machine setup when an dtb was passed to the kernel
23 * @dt: virtual address pointer to dt blob 35 * @dt: virtual address pointer to dt blob
@@ -25,93 +37,24 @@
25 * If a dtb was passed to the kernel, then use it to choose the correct 37 * If a dtb was passed to the kernel, then use it to choose the correct
26 * machine_desc and to setup the system. 38 * machine_desc and to setup the system.
27 */ 39 */
28struct machine_desc * __init setup_machine_fdt(void *dt) 40const struct machine_desc * __init setup_machine_fdt(void *dt)
29{ 41{
30 struct boot_param_header *devtree = dt; 42 const struct machine_desc *mdesc;
31 struct machine_desc *mdesc = NULL, *mdesc_best = NULL;
32 unsigned int score, mdesc_score = ~1;
33 unsigned long dt_root; 43 unsigned long dt_root;
34 const char *model, *compat;
35 void *clk; 44 void *clk;
36 char manufacturer[16];
37 unsigned long len; 45 unsigned long len;
38 46
39 /* check device tree validity */ 47 if (!early_init_dt_scan(dt))
40 if (be32_to_cpu(devtree->magic) != OF_DT_HEADER)
41 return NULL; 48 return NULL;
42 49
43 initial_boot_params = devtree; 50 mdesc = of_flat_dt_match_machine(NULL, arch_get_next_mach);
44 dt_root = of_get_flat_dt_root(); 51 if (!mdesc)
45
46 /*
47 * The kernel could be multi-platform enabled, thus could have many
48 * "baked-in" machine descriptors. Search thru all for the best
49 * "compatible" string match.
50 */
51 for_each_machine_desc(mdesc) {
52 score = of_flat_dt_match(dt_root, mdesc->dt_compat);
53 if (score > 0 && score < mdesc_score) {
54 mdesc_best = mdesc;
55 mdesc_score = score;
56 }
57 }
58 if (!mdesc_best) {
59 const char *prop;
60 long size;
61
62 pr_err("\n unrecognized device tree list:\n[ ");
63
64 prop = of_get_flat_dt_prop(dt_root, "compatible", &size);
65 if (prop) {
66 while (size > 0) {
67 printk("'%s' ", prop);
68 size -= strlen(prop) + 1;
69 prop += strlen(prop) + 1;
70 }
71 }
72 printk("]\n\n");
73
74 machine_halt(); 52 machine_halt();
75 }
76
77 /* compat = "<manufacturer>,<model>" */
78 compat = mdesc_best->dt_compat[0];
79
80 model = strchr(compat, ',');
81 if (model)
82 model++;
83
84 strlcpy(manufacturer, compat, model ? model - compat : strlen(compat));
85
86 pr_info("Board \"%s\" from %s (Manufacturer)\n", model, manufacturer);
87
88 /* Retrieve various information from the /chosen node */
89 of_scan_flat_dt(early_init_dt_scan_chosen, boot_command_line);
90
91 /* Initialize {size,address}-cells info */
92 of_scan_flat_dt(early_init_dt_scan_root, NULL);
93
94 /* Setup memory, calling early_init_dt_add_memory_arch */
95 of_scan_flat_dt(early_init_dt_scan_memory, NULL);
96 53
54 dt_root = of_get_flat_dt_root();
97 clk = of_get_flat_dt_prop(dt_root, "clock-frequency", &len); 55 clk = of_get_flat_dt_prop(dt_root, "clock-frequency", &len);
98 if (clk) 56 if (clk)
99 arc_set_core_freq(of_read_ulong(clk, len/4)); 57 arc_set_core_freq(of_read_ulong(clk, len/4));
100 58
101 return mdesc_best; 59 return mdesc;
102}
103
104/*
105 * Copy the flattened DT out of .init since unflattening doesn't copy strings
106 * and the normal DT APIs refs them from orig flat DT
107 */
108void __init copy_devtree(void)
109{
110 void *alloc = early_init_dt_alloc_memory_arch(
111 be32_to_cpu(initial_boot_params->totalsize), 64);
112 if (alloc) {
113 memcpy(alloc, initial_boot_params,
114 be32_to_cpu(initial_boot_params->totalsize));
115 initial_boot_params = alloc;
116 }
117} 60}
diff --git a/arch/arc/kernel/setup.c b/arch/arc/kernel/setup.c
index d9e15f16633e..643eae4436e0 100644
--- a/arch/arc/kernel/setup.c
+++ b/arch/arc/kernel/setup.c
@@ -21,7 +21,6 @@
21#include <asm/setup.h> 21#include <asm/setup.h>
22#include <asm/page.h> 22#include <asm/page.h>
23#include <asm/irq.h> 23#include <asm/irq.h>
24#include <asm/prom.h>
25#include <asm/unwind.h> 24#include <asm/unwind.h>
26#include <asm/clk.h> 25#include <asm/clk.h>
27#include <asm/mach_desc.h> 26#include <asm/mach_desc.h>
@@ -31,7 +30,7 @@
31int running_on_hw = 1; /* vs. on ISS */ 30int running_on_hw = 1; /* vs. on ISS */
32 31
33char __initdata command_line[COMMAND_LINE_SIZE]; 32char __initdata command_line[COMMAND_LINE_SIZE];
34struct machine_desc *machine_desc; 33const struct machine_desc *machine_desc;
35 34
36struct task_struct *_current_task[NR_CPUS]; /* For stack switching */ 35struct task_struct *_current_task[NR_CPUS]; /* For stack switching */
37 36
@@ -345,8 +344,7 @@ void __init setup_arch(char **cmdline_p)
345 setup_arch_memory(); 344 setup_arch_memory();
346 345
347 /* copy flat DT out of .init and then unflatten it */ 346 /* copy flat DT out of .init and then unflatten it */
348 copy_devtree(); 347 unflatten_and_copy_device_tree();
349 unflatten_device_tree();
350 348
351 /* Can be issue if someone passes cmd line arg "ro" 349 /* Can be issue if someone passes cmd line arg "ro"
352 * But that is unlikely so keeping it as it is 350 * But that is unlikely so keeping it as it is
diff --git a/arch/arc/mm/init.c b/arch/arc/mm/init.c
index 81279ec73a6a..55e0a85bea78 100644
--- a/arch/arc/mm/init.c
+++ b/arch/arc/mm/init.c
@@ -125,10 +125,3 @@ void __init free_initrd_mem(unsigned long start, unsigned long end)
125 free_reserved_area((void *)start, (void *)end, -1, "initrd"); 125 free_reserved_area((void *)start, (void *)end, -1, "initrd");
126} 126}
127#endif 127#endif
128
129#ifdef CONFIG_OF_FLATTREE
130void __init early_init_dt_setup_initrd_arch(u64 start, u64 end)
131{
132 pr_err("%s(%llx, %llx)\n", __func__, start, end);
133}
134#endif /* CONFIG_OF_FLATTREE */
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 04163fece49f..acb80708accd 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -54,6 +54,7 @@ config ARM
54 select HAVE_REGS_AND_STACK_ACCESS_API 54 select HAVE_REGS_AND_STACK_ACCESS_API
55 select HAVE_SYSCALL_TRACEPOINTS 55 select HAVE_SYSCALL_TRACEPOINTS
56 select HAVE_UID16 56 select HAVE_UID16
57 select HAVE_VIRT_CPU_ACCOUNTING_GEN
57 select IRQ_FORCED_THREADING 58 select IRQ_FORCED_THREADING
58 select KTIME_SCALAR 59 select KTIME_SCALAR
59 select MODULES_USE_ELF_REL 60 select MODULES_USE_ELF_REL
@@ -388,7 +389,6 @@ config ARCH_GEMINI
388 select CLKSRC_MMIO 389 select CLKSRC_MMIO
389 select CPU_FA526 390 select CPU_FA526
390 select GENERIC_CLOCKEVENTS 391 select GENERIC_CLOCKEVENTS
391 select NEED_MACH_GPIO_H
392 help 392 help
393 Support for the Cortina Systems Gemini family SoCs 393 Support for the Cortina Systems Gemini family SoCs
394 394
@@ -457,7 +457,7 @@ config ARCH_IOP32X
457 depends on MMU 457 depends on MMU
458 select ARCH_REQUIRE_GPIOLIB 458 select ARCH_REQUIRE_GPIOLIB
459 select CPU_XSCALE 459 select CPU_XSCALE
460 select NEED_MACH_GPIO_H 460 select GPIO_IOP
461 select NEED_RET_TO_USER 461 select NEED_RET_TO_USER
462 select PCI 462 select PCI
463 select PLAT_IOP 463 select PLAT_IOP
@@ -470,7 +470,7 @@ config ARCH_IOP33X
470 depends on MMU 470 depends on MMU
471 select ARCH_REQUIRE_GPIOLIB 471 select ARCH_REQUIRE_GPIOLIB
472 select CPU_XSCALE 472 select CPU_XSCALE
473 select NEED_MACH_GPIO_H 473 select GPIO_IOP
474 select NEED_RET_TO_USER 474 select NEED_RET_TO_USER
475 select PCI 475 select PCI
476 select PLAT_IOP 476 select PLAT_IOP
@@ -559,7 +559,6 @@ config ARCH_MMP
559 select GPIO_PXA 559 select GPIO_PXA
560 select IRQ_DOMAIN 560 select IRQ_DOMAIN
561 select MULTI_IRQ_HANDLER 561 select MULTI_IRQ_HANDLER
562 select NEED_MACH_GPIO_H
563 select PINCTRL 562 select PINCTRL
564 select PLAT_PXA 563 select PLAT_PXA
565 select SPARSE_IRQ 564 select SPARSE_IRQ
@@ -622,7 +621,6 @@ config ARCH_PXA
622 select GPIO_PXA 621 select GPIO_PXA
623 select HAVE_IDE 622 select HAVE_IDE
624 select MULTI_IRQ_HANDLER 623 select MULTI_IRQ_HANDLER
625 select NEED_MACH_GPIO_H
626 select PLAT_PXA 624 select PLAT_PXA
627 select SPARSE_IRQ 625 select SPARSE_IRQ
628 help 626 help
diff --git a/arch/arm/boot/dts/atlas6.dtsi b/arch/arm/boot/dts/atlas6.dtsi
index a49032c6e199..978bab4991df 100644
--- a/arch/arm/boot/dts/atlas6.dtsi
+++ b/arch/arm/boot/dts/atlas6.dtsi
@@ -558,6 +558,18 @@
558 sirf,function = "usb1_utmi_drvbus"; 558 sirf,function = "usb1_utmi_drvbus";
559 }; 559 };
560 }; 560 };
561 usb1_dp_dn_pins_a: usb1_dp_dn@0 {
562 usb1_dp_dn {
563 sirf,pins = "usb1_dp_dngrp";
564 sirf,function = "usb1_dp_dn";
565 };
566 };
567 uart1_route_io_usb1_pins_a: uart1_route_io_usb1@0 {
568 uart1_route_io_usb1 {
569 sirf,pins = "uart1_route_io_usb1grp";
570 sirf,function = "uart1_route_io_usb1";
571 };
572 };
561 warm_rst_pins_a: warm_rst@0 { 573 warm_rst_pins_a: warm_rst@0 {
562 warm_rst { 574 warm_rst {
563 sirf,pins = "warm_rstgrp"; 575 sirf,pins = "warm_rstgrp";
diff --git a/arch/arm/boot/dts/prima2.dtsi b/arch/arm/boot/dts/prima2.dtsi
index 7cf78afee7b1..daee58944e15 100644
--- a/arch/arm/boot/dts/prima2.dtsi
+++ b/arch/arm/boot/dts/prima2.dtsi
@@ -388,6 +388,12 @@
388 sirf,function = "uart0"; 388 sirf,function = "uart0";
389 }; 389 };
390 }; 390 };
391 uart0_noflow_pins_a: uart0@1 {
392 uart {
393 sirf,pins = "uart0_nostreamctrlgrp";
394 sirf,function = "uart0_nostreamctrl";
395 };
396 };
391 uart1_pins_a: uart1@0 { 397 uart1_pins_a: uart1@0 {
392 uart { 398 uart {
393 sirf,pins = "uart1grp"; 399 sirf,pins = "uart1grp";
@@ -526,18 +532,42 @@
526 sirf,function = "usp0"; 532 sirf,function = "usp0";
527 }; 533 };
528 }; 534 };
535 usp0_uart_nostreamctrl_pins_a: usp0@1 {
536 usp0 {
537 sirf,pins =
538 "usp0_uart_nostreamctrl_grp";
539 sirf,function =
540 "usp0_uart_nostreamctrl";
541 };
542 };
529 usp1_pins_a: usp1@0 { 543 usp1_pins_a: usp1@0 {
530 usp1 { 544 usp1 {
531 sirf,pins = "usp1grp"; 545 sirf,pins = "usp1grp";
532 sirf,function = "usp1"; 546 sirf,function = "usp1";
533 }; 547 };
534 }; 548 };
549 usp1_uart_nostreamctrl_pins_a: usp1@1 {
550 usp1 {
551 sirf,pins =
552 "usp1_uart_nostreamctrl_grp";
553 sirf,function =
554 "usp1_uart_nostreamctrl";
555 };
556 };
535 usp2_pins_a: usp2@0 { 557 usp2_pins_a: usp2@0 {
536 usp2 { 558 usp2 {
537 sirf,pins = "usp2grp"; 559 sirf,pins = "usp2grp";
538 sirf,function = "usp2"; 560 sirf,function = "usp2";
539 }; 561 };
540 }; 562 };
563 usp2_uart_nostreamctrl_pins_a: usp2@1 {
564 usp2 {
565 sirf,pins =
566 "usp2_uart_nostreamctrl_grp";
567 sirf,function =
568 "usp2_uart_nostreamctrl";
569 };
570 };
541 usb0_utmi_drvbus_pins_a: usb0_utmi_drvbus@0 { 571 usb0_utmi_drvbus_pins_a: usb0_utmi_drvbus@0 {
542 usb0_utmi_drvbus { 572 usb0_utmi_drvbus {
543 sirf,pins = "usb0_utmi_drvbusgrp"; 573 sirf,pins = "usb0_utmi_drvbusgrp";
@@ -550,6 +580,18 @@
550 sirf,function = "usb1_utmi_drvbus"; 580 sirf,function = "usb1_utmi_drvbus";
551 }; 581 };
552 }; 582 };
583 usb1_dp_dn_pins_a: usb1_dp_dn@0 {
584 usb1_dp_dn {
585 sirf,pins = "usb1_dp_dngrp";
586 sirf,function = "usb1_dp_dn";
587 };
588 };
589 uart1_route_io_usb1_pins_a: uart1_route_io_usb1@0 {
590 uart1_route_io_usb1 {
591 sirf,pins = "uart1_route_io_usb1grp";
592 sirf,function = "uart1_route_io_usb1";
593 };
594 };
553 warm_rst_pins_a: warm_rst@0 { 595 warm_rst_pins_a: warm_rst@0 {
554 warm_rst { 596 warm_rst {
555 sirf,pins = "warm_rstgrp"; 597 sirf,pins = "warm_rstgrp";
diff --git a/arch/arm/boot/dts/testcases/tests-interrupts.dtsi b/arch/arm/boot/dts/testcases/tests-interrupts.dtsi
new file mode 100644
index 000000000000..c843720bd3e5
--- /dev/null
+++ b/arch/arm/boot/dts/testcases/tests-interrupts.dtsi
@@ -0,0 +1,58 @@
1
2/ {
3 testcase-data {
4 interrupts {
5 #address-cells = <1>;
6 #size-cells = <1>;
7 test_intc0: intc0 {
8 interrupt-controller;
9 #interrupt-cells = <1>;
10 };
11
12 test_intc1: intc1 {
13 interrupt-controller;
14 #interrupt-cells = <3>;
15 };
16
17 test_intc2: intc2 {
18 interrupt-controller;
19 #interrupt-cells = <2>;
20 };
21
22 test_intmap0: intmap0 {
23 #interrupt-cells = <1>;
24 #address-cells = <0>;
25 interrupt-map = <1 &test_intc0 9>,
26 <2 &test_intc1 10 11 12>,
27 <3 &test_intc2 13 14>,
28 <4 &test_intc2 15 16>;
29 };
30
31 test_intmap1: intmap1 {
32 #interrupt-cells = <2>;
33 interrupt-map = <0x5000 1 2 &test_intc0 15>;
34 };
35
36 interrupts0 {
37 interrupt-parent = <&test_intc0>;
38 interrupts = <1>, <2>, <3>, <4>;
39 };
40
41 interrupts1 {
42 interrupt-parent = <&test_intmap0>;
43 interrupts = <1>, <2>, <3>, <4>;
44 };
45
46 interrupts-extended0 {
47 reg = <0x5000 0x100>;
48 interrupts-extended = <&test_intc0 1>,
49 <&test_intc1 2 3 4>,
50 <&test_intc2 5 6>,
51 <&test_intmap0 1>,
52 <&test_intmap0 2>,
53 <&test_intmap0 3>,
54 <&test_intmap1 1 2>;
55 };
56 };
57 };
58};
diff --git a/arch/arm/boot/dts/testcases/tests.dtsi b/arch/arm/boot/dts/testcases/tests.dtsi
index a7c5067622e8..3f123ecc9dd7 100644
--- a/arch/arm/boot/dts/testcases/tests.dtsi
+++ b/arch/arm/boot/dts/testcases/tests.dtsi
@@ -1 +1,2 @@
1/include/ "tests-phandle.dtsi" 1/include/ "tests-phandle.dtsi"
2/include/ "tests-interrupts.dtsi"
diff --git a/arch/arm/boot/dts/versatile-ab.dts b/arch/arm/boot/dts/versatile-ab.dts
index dde75ae8b4b1..e01e5a081def 100644
--- a/arch/arm/boot/dts/versatile-ab.dts
+++ b/arch/arm/boot/dts/versatile-ab.dts
@@ -185,7 +185,7 @@
185 mmc@5000 { 185 mmc@5000 {
186 compatible = "arm,primecell"; 186 compatible = "arm,primecell";
187 reg = < 0x5000 0x1000>; 187 reg = < 0x5000 0x1000>;
188 interrupts = <22 34>; 188 interrupts-extended = <&vic 22 &sic 2>;
189 }; 189 };
190 kmi@6000 { 190 kmi@6000 {
191 compatible = "arm,pl050", "arm,primecell"; 191 compatible = "arm,pl050", "arm,primecell";
diff --git a/arch/arm/boot/dts/versatile-pb.dts b/arch/arm/boot/dts/versatile-pb.dts
index 7e8175269064..f43907c40c93 100644
--- a/arch/arm/boot/dts/versatile-pb.dts
+++ b/arch/arm/boot/dts/versatile-pb.dts
@@ -41,7 +41,7 @@
41 mmc@b000 { 41 mmc@b000 {
42 compatible = "arm,primecell"; 42 compatible = "arm,primecell";
43 reg = <0xb000 0x1000>; 43 reg = <0xb000 0x1000>;
44 interrupts = <23 34>; 44 interrupts-extended = <&vic 23 &sic 2>;
45 }; 45 };
46 }; 46 };
47 }; 47 };
diff --git a/arch/arm/boot/dts/zynq-7000.dtsi b/arch/arm/boot/dts/zynq-7000.dtsi
index e32b92b949d2..e7f73b2e4550 100644
--- a/arch/arm/boot/dts/zynq-7000.dtsi
+++ b/arch/arm/boot/dts/zynq-7000.dtsi
@@ -92,6 +92,14 @@
92 }; 92 };
93 }; 93 };
94 94
95 global_timer: timer@f8f00200 {
96 compatible = "arm,cortex-a9-global-timer";
97 reg = <0xf8f00200 0x20>;
98 interrupts = <1 11 0x301>;
99 interrupt-parent = <&intc>;
100 clocks = <&clkc 4>;
101 };
102
95 ttc0: ttc0@f8001000 { 103 ttc0: ttc0@f8001000 {
96 interrupt-parent = <&intc>; 104 interrupt-parent = <&intc>;
97 interrupts = < 0 10 4 0 11 4 0 12 4 >; 105 interrupts = < 0 10 4 0 11 4 0 12 4 >;
diff --git a/arch/arm/include/asm/Kbuild b/arch/arm/include/asm/Kbuild
index 59ceae8f3c95..1a7024b41351 100644
--- a/arch/arm/include/asm/Kbuild
+++ b/arch/arm/include/asm/Kbuild
@@ -32,3 +32,4 @@ generic-y += termios.h
32generic-y += timex.h 32generic-y += timex.h
33generic-y += trace_clock.h 33generic-y += trace_clock.h
34generic-y += unaligned.h 34generic-y += unaligned.h
35generic-y += preempt.h
diff --git a/arch/arm/include/asm/arch_timer.h b/arch/arm/include/asm/arch_timer.h
index 5665134bfa3e..0704e0cf5571 100644
--- a/arch/arm/include/asm/arch_timer.h
+++ b/arch/arm/include/asm/arch_timer.h
@@ -87,17 +87,43 @@ static inline u64 arch_counter_get_cntvct(void)
87 return cval; 87 return cval;
88} 88}
89 89
90static inline void arch_counter_set_user_access(void) 90static inline u32 arch_timer_get_cntkctl(void)
91{ 91{
92 u32 cntkctl; 92 u32 cntkctl;
93
94 asm volatile("mrc p15, 0, %0, c14, c1, 0" : "=r" (cntkctl)); 93 asm volatile("mrc p15, 0, %0, c14, c1, 0" : "=r" (cntkctl));
94 return cntkctl;
95}
95 96
96 /* disable user access to everything */ 97static inline void arch_timer_set_cntkctl(u32 cntkctl)
97 cntkctl &= ~((3 << 8) | (7 << 0)); 98{
98
99 asm volatile("mcr p15, 0, %0, c14, c1, 0" : : "r" (cntkctl)); 99 asm volatile("mcr p15, 0, %0, c14, c1, 0" : : "r" (cntkctl));
100} 100}
101
102static inline void arch_counter_set_user_access(void)
103{
104 u32 cntkctl = arch_timer_get_cntkctl();
105
106 /* Disable user access to both physical/virtual counters/timers */
107 /* Also disable virtual event stream */
108 cntkctl &= ~(ARCH_TIMER_USR_PT_ACCESS_EN
109 | ARCH_TIMER_USR_VT_ACCESS_EN
110 | ARCH_TIMER_VIRT_EVT_EN
111 | ARCH_TIMER_USR_VCT_ACCESS_EN
112 | ARCH_TIMER_USR_PCT_ACCESS_EN);
113 arch_timer_set_cntkctl(cntkctl);
114}
115
116static inline void arch_timer_evtstrm_enable(int divider)
117{
118 u32 cntkctl = arch_timer_get_cntkctl();
119 cntkctl &= ~ARCH_TIMER_EVT_TRIGGER_MASK;
120 /* Set the divider and enable virtual event stream */
121 cntkctl |= (divider << ARCH_TIMER_EVT_TRIGGER_SHIFT)
122 | ARCH_TIMER_VIRT_EVT_EN;
123 arch_timer_set_cntkctl(cntkctl);
124 elf_hwcap |= HWCAP_EVTSTRM;
125}
126
101#endif 127#endif
102 128
103#endif 129#endif
diff --git a/arch/arm/include/asm/hardware/iop3xx-gpio.h b/arch/arm/include/asm/hardware/iop3xx-gpio.h
deleted file mode 100644
index 9eda7dc92ad8..000000000000
--- a/arch/arm/include/asm/hardware/iop3xx-gpio.h
+++ /dev/null
@@ -1,75 +0,0 @@
1/*
2 * arch/arm/include/asm/hardware/iop3xx-gpio.h
3 *
4 * IOP3xx GPIO wrappers
5 *
6 * Copyright (c) 2008 Arnaud Patard <arnaud.patard@rtp-net.org>
7 * Based on IXP4XX gpio.h file
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
22 *
23 */
24
25#ifndef __ASM_ARM_HARDWARE_IOP3XX_GPIO_H
26#define __ASM_ARM_HARDWARE_IOP3XX_GPIO_H
27
28#include <mach/hardware.h>
29#include <asm-generic/gpio.h>
30
31#define __ARM_GPIOLIB_COMPLEX
32
33#define IOP3XX_N_GPIOS 8
34
35static inline int gpio_get_value(unsigned gpio)
36{
37 if (gpio > IOP3XX_N_GPIOS)
38 return __gpio_get_value(gpio);
39
40 return gpio_line_get(gpio);
41}
42
43static inline void gpio_set_value(unsigned gpio, int value)
44{
45 if (gpio > IOP3XX_N_GPIOS) {
46 __gpio_set_value(gpio, value);
47 return;
48 }
49 gpio_line_set(gpio, value);
50}
51
52static inline int gpio_cansleep(unsigned gpio)
53{
54 if (gpio < IOP3XX_N_GPIOS)
55 return 0;
56 else
57 return __gpio_cansleep(gpio);
58}
59
60/*
61 * The GPIOs are not generating any interrupt
62 * Note : manuals are not clear about this
63 */
64static inline int gpio_to_irq(int gpio)
65{
66 return -EINVAL;
67}
68
69static inline int irq_to_gpio(int gpio)
70{
71 return -EINVAL;
72}
73
74#endif
75
diff --git a/arch/arm/include/asm/hardware/iop3xx.h b/arch/arm/include/asm/hardware/iop3xx.h
index 423744bf18eb..2594a95ff19a 100644
--- a/arch/arm/include/asm/hardware/iop3xx.h
+++ b/arch/arm/include/asm/hardware/iop3xx.h
@@ -18,16 +18,9 @@
18/* 18/*
19 * IOP3XX GPIO handling 19 * IOP3XX GPIO handling
20 */ 20 */
21#define GPIO_IN 0
22#define GPIO_OUT 1
23#define GPIO_LOW 0
24#define GPIO_HIGH 1
25#define IOP3XX_GPIO_LINE(x) (x) 21#define IOP3XX_GPIO_LINE(x) (x)
26 22
27#ifndef __ASSEMBLY__ 23#ifndef __ASSEMBLY__
28extern void gpio_line_config(int line, int direction);
29extern int gpio_line_get(int line);
30extern void gpio_line_set(int line, int value);
31extern int init_atu; 24extern int init_atu;
32extern int iop3xx_get_init_atu(void); 25extern int iop3xx_get_init_atu(void);
33#endif 26#endif
@@ -168,11 +161,6 @@ extern int iop3xx_get_init_atu(void);
168/* PERCR0 DOESN'T EXIST - index from 1! */ 161/* PERCR0 DOESN'T EXIST - index from 1! */
169#define IOP3XX_PERCR0 (volatile u32 *)IOP3XX_REG_ADDR(0x0710) 162#define IOP3XX_PERCR0 (volatile u32 *)IOP3XX_REG_ADDR(0x0710)
170 163
171/* General Purpose I/O */
172#define IOP3XX_GPOE (volatile u32 *)IOP3XX_GPIO_REG(0x0000)
173#define IOP3XX_GPID (volatile u32 *)IOP3XX_GPIO_REG(0x0004)
174#define IOP3XX_GPOD (volatile u32 *)IOP3XX_GPIO_REG(0x0008)
175
176/* Timers */ 164/* Timers */
177#define IOP3XX_TU_TMR0 (volatile u32 *)IOP3XX_TIMER_REG(0x0000) 165#define IOP3XX_TU_TMR0 (volatile u32 *)IOP3XX_TIMER_REG(0x0000)
178#define IOP3XX_TU_TMR1 (volatile u32 *)IOP3XX_TIMER_REG(0x0004) 166#define IOP3XX_TU_TMR1 (volatile u32 *)IOP3XX_TIMER_REG(0x0004)
diff --git a/arch/arm/include/asm/prom.h b/arch/arm/include/asm/prom.h
index 4a2985e21969..b681575ad3de 100644
--- a/arch/arm/include/asm/prom.h
+++ b/arch/arm/include/asm/prom.h
@@ -11,8 +11,6 @@
11#ifndef __ASMARM_PROM_H 11#ifndef __ASMARM_PROM_H
12#define __ASMARM_PROM_H 12#define __ASMARM_PROM_H
13 13
14#define HAVE_ARCH_DEVTREE_FIXUPS
15
16#ifdef CONFIG_OF 14#ifdef CONFIG_OF
17 15
18extern const struct machine_desc *setup_machine_fdt(unsigned int dt_phys); 16extern const struct machine_desc *setup_machine_fdt(unsigned int dt_phys);
diff --git a/arch/arm/include/uapi/asm/hwcap.h b/arch/arm/include/uapi/asm/hwcap.h
index 6d34d080372a..7dcc10d67253 100644
--- a/arch/arm/include/uapi/asm/hwcap.h
+++ b/arch/arm/include/uapi/asm/hwcap.h
@@ -26,5 +26,6 @@
26#define HWCAP_VFPD32 (1 << 19) /* set if VFP has 32 regs (not 16) */ 26#define HWCAP_VFPD32 (1 << 19) /* set if VFP has 32 regs (not 16) */
27#define HWCAP_IDIV (HWCAP_IDIVA | HWCAP_IDIVT) 27#define HWCAP_IDIV (HWCAP_IDIVA | HWCAP_IDIVT)
28#define HWCAP_LPAE (1 << 20) 28#define HWCAP_LPAE (1 << 20)
29#define HWCAP_EVTSTRM (1 << 21)
29 30
30#endif /* _UAPI__ASMARM_HWCAP_H */ 31#endif /* _UAPI__ASMARM_HWCAP_H */
diff --git a/arch/arm/kernel/arch_timer.c b/arch/arm/kernel/arch_timer.c
index 221f07b11ccb..1791f12c180b 100644
--- a/arch/arm/kernel/arch_timer.c
+++ b/arch/arm/kernel/arch_timer.c
@@ -11,7 +11,6 @@
11#include <linux/init.h> 11#include <linux/init.h>
12#include <linux/types.h> 12#include <linux/types.h>
13#include <linux/errno.h> 13#include <linux/errno.h>
14#include <linux/sched_clock.h>
15 14
16#include <asm/delay.h> 15#include <asm/delay.h>
17 16
@@ -22,13 +21,6 @@ static unsigned long arch_timer_read_counter_long(void)
22 return arch_timer_read_counter(); 21 return arch_timer_read_counter();
23} 22}
24 23
25static u32 sched_clock_mult __read_mostly;
26
27static unsigned long long notrace arch_timer_sched_clock(void)
28{
29 return arch_timer_read_counter() * sched_clock_mult;
30}
31
32static struct delay_timer arch_delay_timer; 24static struct delay_timer arch_delay_timer;
33 25
34static void __init arch_timer_delay_timer_register(void) 26static void __init arch_timer_delay_timer_register(void)
@@ -48,11 +40,5 @@ int __init arch_timer_arch_init(void)
48 40
49 arch_timer_delay_timer_register(); 41 arch_timer_delay_timer_register();
50 42
51 /* Cache the sched_clock multiplier to save a divide in the hot path. */
52 sched_clock_mult = NSEC_PER_SEC / arch_timer_rate;
53 sched_clock_func = arch_timer_sched_clock;
54 pr_info("sched_clock: ARM arch timer >56 bits at %ukHz, resolution %uns\n",
55 arch_timer_rate / 1000, sched_clock_mult);
56
57 return 0; 43 return 0;
58} 44}
diff --git a/arch/arm/kernel/devtree.c b/arch/arm/kernel/devtree.c
index f35906b3d8c9..739c3dfc1da2 100644
--- a/arch/arm/kernel/devtree.c
+++ b/arch/arm/kernel/devtree.c
@@ -174,6 +174,19 @@ bool arch_match_cpu_phys_id(int cpu, u64 phys_id)
174 return (phys_id & MPIDR_HWID_BITMASK) == cpu_logical_map(cpu); 174 return (phys_id & MPIDR_HWID_BITMASK) == cpu_logical_map(cpu);
175} 175}
176 176
177static const void * __init arch_get_next_mach(const char *const **match)
178{
179 static const struct machine_desc *mdesc = __arch_info_begin;
180 const struct machine_desc *m = mdesc;
181
182 if (m >= __arch_info_end)
183 return NULL;
184
185 mdesc++;
186 *match = m->dt_compat;
187 return m;
188}
189
177/** 190/**
178 * setup_machine_fdt - Machine setup when an dtb was passed to the kernel 191 * setup_machine_fdt - Machine setup when an dtb was passed to the kernel
179 * @dt_phys: physical address of dt blob 192 * @dt_phys: physical address of dt blob
@@ -183,11 +196,7 @@ bool arch_match_cpu_phys_id(int cpu, u64 phys_id)
183 */ 196 */
184const struct machine_desc * __init setup_machine_fdt(unsigned int dt_phys) 197const struct machine_desc * __init setup_machine_fdt(unsigned int dt_phys)
185{ 198{
186 struct boot_param_header *devtree;
187 const struct machine_desc *mdesc, *mdesc_best = NULL; 199 const struct machine_desc *mdesc, *mdesc_best = NULL;
188 unsigned int score, mdesc_score = ~1;
189 unsigned long dt_root;
190 const char *model;
191 200
192#ifdef CONFIG_ARCH_MULTIPLATFORM 201#ifdef CONFIG_ARCH_MULTIPLATFORM
193 DT_MACHINE_START(GENERIC_DT, "Generic DT based system") 202 DT_MACHINE_START(GENERIC_DT, "Generic DT based system")
@@ -196,32 +205,20 @@ const struct machine_desc * __init setup_machine_fdt(unsigned int dt_phys)
196 mdesc_best = &__mach_desc_GENERIC_DT; 205 mdesc_best = &__mach_desc_GENERIC_DT;
197#endif 206#endif
198 207
199 if (!dt_phys) 208 if (!dt_phys || !early_init_dt_scan(phys_to_virt(dt_phys)))
200 return NULL; 209 return NULL;
201 210
202 devtree = phys_to_virt(dt_phys); 211 mdesc = of_flat_dt_match_machine(mdesc_best, arch_get_next_mach);
203 212
204 /* check device tree validity */ 213 if (!mdesc) {
205 if (be32_to_cpu(devtree->magic) != OF_DT_HEADER)
206 return NULL;
207
208 /* Search the mdescs for the 'best' compatible value match */
209 initial_boot_params = devtree;
210 dt_root = of_get_flat_dt_root();
211 for_each_machine_desc(mdesc) {
212 score = of_flat_dt_match(dt_root, mdesc->dt_compat);
213 if (score > 0 && score < mdesc_score) {
214 mdesc_best = mdesc;
215 mdesc_score = score;
216 }
217 }
218 if (!mdesc_best) {
219 const char *prop; 214 const char *prop;
220 long size; 215 long size;
216 unsigned long dt_root;
221 217
222 early_print("\nError: unrecognized/unsupported " 218 early_print("\nError: unrecognized/unsupported "
223 "device tree compatible list:\n[ "); 219 "device tree compatible list:\n[ ");
224 220
221 dt_root = of_get_flat_dt_root();
225 prop = of_get_flat_dt_prop(dt_root, "compatible", &size); 222 prop = of_get_flat_dt_prop(dt_root, "compatible", &size);
226 while (size > 0) { 223 while (size > 0) {
227 early_print("'%s' ", prop); 224 early_print("'%s' ", prop);
@@ -233,22 +230,8 @@ const struct machine_desc * __init setup_machine_fdt(unsigned int dt_phys)
233 dump_machine_table(); /* does not return */ 230 dump_machine_table(); /* does not return */
234 } 231 }
235 232
236 model = of_get_flat_dt_prop(dt_root, "model", NULL);
237 if (!model)
238 model = of_get_flat_dt_prop(dt_root, "compatible", NULL);
239 if (!model)
240 model = "<unknown>";
241 pr_info("Machine: %s, model: %s\n", mdesc_best->name, model);
242
243 /* Retrieve various information from the /chosen node */
244 of_scan_flat_dt(early_init_dt_scan_chosen, boot_command_line);
245 /* Initialize {size,address}-cells info */
246 of_scan_flat_dt(early_init_dt_scan_root, NULL);
247 /* Setup memory, calling early_init_dt_add_memory_arch */
248 of_scan_flat_dt(early_init_dt_scan_memory, NULL);
249
250 /* Change machine number to match the mdesc we're using */ 233 /* Change machine number to match the mdesc we're using */
251 __machine_arch_type = mdesc_best->nr; 234 __machine_arch_type = mdesc->nr;
252 235
253 return mdesc_best; 236 return mdesc;
254} 237}
diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c
index 0e1e2b3afa45..5d65438685d8 100644
--- a/arch/arm/kernel/setup.c
+++ b/arch/arm/kernel/setup.c
@@ -975,6 +975,7 @@ static const char *hwcap_str[] = {
975 "idivt", 975 "idivt",
976 "vfpd32", 976 "vfpd32",
977 "lpae", 977 "lpae",
978 "evtstrm",
978 NULL 979 NULL
979}; 980};
980 981
diff --git a/arch/arm/mach-bcm2835/bcm2835.c b/arch/arm/mach-bcm2835/bcm2835.c
index d50135be0c20..70f2f3925f0e 100644
--- a/arch/arm/mach-bcm2835/bcm2835.c
+++ b/arch/arm/mach-bcm2835/bcm2835.c
@@ -14,7 +14,7 @@
14 14
15#include <linux/delay.h> 15#include <linux/delay.h>
16#include <linux/init.h> 16#include <linux/init.h>
17#include <linux/irqchip/bcm2835.h> 17#include <linux/irqchip.h>
18#include <linux/of_address.h> 18#include <linux/of_address.h>
19#include <linux/of_platform.h> 19#include <linux/of_platform.h>
20#include <linux/clk/bcm2835.h> 20#include <linux/clk/bcm2835.h>
@@ -130,8 +130,7 @@ static const char * const bcm2835_compat[] = {
130 130
131DT_MACHINE_START(BCM2835, "BCM2835") 131DT_MACHINE_START(BCM2835, "BCM2835")
132 .map_io = bcm2835_map_io, 132 .map_io = bcm2835_map_io,
133 .init_irq = bcm2835_init_irq, 133 .init_irq = irqchip_init,
134 .handle_irq = bcm2835_handle_irq,
135 .init_machine = bcm2835_init, 134 .init_machine = bcm2835_init,
136 .restart = bcm2835_restart, 135 .restart = bcm2835_restart,
137 .dt_compat = bcm2835_compat 136 .dt_compat = bcm2835_compat
diff --git a/arch/arm/mach-gemini/gpio.c b/arch/arm/mach-gemini/gpio.c
index 70bfa571b24b..f8cb5710d6ee 100644
--- a/arch/arm/mach-gemini/gpio.c
+++ b/arch/arm/mach-gemini/gpio.c
@@ -21,9 +21,9 @@
21 21
22#include <mach/hardware.h> 22#include <mach/hardware.h>
23#include <mach/irqs.h> 23#include <mach/irqs.h>
24#include <mach/gpio.h>
25 24
26#define GPIO_BASE(x) IO_ADDRESS(GEMINI_GPIO_BASE(x)) 25#define GPIO_BASE(x) IO_ADDRESS(GEMINI_GPIO_BASE(x))
26#define irq_to_gpio(x) ((x) - GPIO_IRQ_BASE)
27 27
28/* GPIO registers definition */ 28/* GPIO registers definition */
29#define GPIO_DATA_OUT 0x0 29#define GPIO_DATA_OUT 0x0
diff --git a/arch/arm/mach-gemini/include/mach/gpio.h b/arch/arm/mach-gemini/include/mach/gpio.h
deleted file mode 100644
index 40a0527bada7..000000000000
--- a/arch/arm/mach-gemini/include/mach/gpio.h
+++ /dev/null
@@ -1,20 +0,0 @@
1/*
2 * Gemini gpiolib specific defines
3 *
4 * Copyright (C) 2008-2009 Paulius Zaleckas <paulius.zaleckas@teltonika.lt>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 */
11
12#ifndef __MACH_GPIO_H__
13#define __MACH_GPIO_H__
14
15#include <mach/irqs.h>
16
17#define gpio_to_irq(x) ((x) + GPIO_IRQ_BASE)
18#define irq_to_gpio(x) ((x) - GPIO_IRQ_BASE)
19
20#endif /* __MACH_GPIO_H__ */
diff --git a/arch/arm/mach-integrator/pci_v3.c b/arch/arm/mach-integrator/pci_v3.c
index c9c5a33bc802..c5e01b24d9fb 100644
--- a/arch/arm/mach-integrator/pci_v3.c
+++ b/arch/arm/mach-integrator/pci_v3.c
@@ -808,22 +808,6 @@ static u8 __init pci_v3_swizzle(struct pci_dev *dev, u8 *pinp)
808 return pci_common_swizzle(dev, pinp); 808 return pci_common_swizzle(dev, pinp);
809} 809}
810 810
811static int __init pci_v3_map_irq_dt(const struct pci_dev *dev, u8 slot, u8 pin)
812{
813 struct of_irq oirq;
814 int ret;
815
816 ret = of_irq_map_pci(dev, &oirq);
817 if (ret) {
818 dev_err(&dev->dev, "of_irq_map_pci() %d\n", ret);
819 /* Proper return code 0 == NO_IRQ */
820 return 0;
821 }
822
823 return irq_create_of_mapping(oirq.controller, oirq.specifier,
824 oirq.size);
825}
826
827static struct hw_pci pci_v3 __initdata = { 811static struct hw_pci pci_v3 __initdata = {
828 .swizzle = pci_v3_swizzle, 812 .swizzle = pci_v3_swizzle,
829 .setup = pci_v3_setup, 813 .setup = pci_v3_setup,
@@ -914,7 +898,7 @@ static int __init pci_v3_probe(struct platform_device *pdev)
914 return -EINVAL; 898 return -EINVAL;
915 } 899 }
916 900
917 pci_v3.map_irq = pci_v3_map_irq_dt; 901 pci_v3.map_irq = of_irq_parse_and_map_pci;
918 pci_common_init_dev(&pdev->dev, &pci_v3); 902 pci_common_init_dev(&pdev->dev, &pci_v3);
919 903
920 return 0; 904 return 0;
diff --git a/arch/arm/mach-iop32x/em7210.c b/arch/arm/mach-iop32x/em7210.c
index 31fbb6c61b25..177cd073a83b 100644
--- a/arch/arm/mach-iop32x/em7210.c
+++ b/arch/arm/mach-iop32x/em7210.c
@@ -32,6 +32,7 @@
32#include <asm/mach/time.h> 32#include <asm/mach/time.h>
33#include <asm/mach-types.h> 33#include <asm/mach-types.h>
34#include <mach/time.h> 34#include <mach/time.h>
35#include "gpio-iop32x.h"
35 36
36static void __init em7210_timer_init(void) 37static void __init em7210_timer_init(void)
37{ 38{
@@ -183,6 +184,7 @@ void em7210_power_off(void)
183 184
184static void __init em7210_init_machine(void) 185static void __init em7210_init_machine(void)
185{ 186{
187 register_iop32x_gpio();
186 platform_device_register(&em7210_serial_device); 188 platform_device_register(&em7210_serial_device);
187 platform_device_register(&iop3xx_i2c0_device); 189 platform_device_register(&iop3xx_i2c0_device);
188 platform_device_register(&iop3xx_i2c1_device); 190 platform_device_register(&iop3xx_i2c1_device);
diff --git a/arch/arm/mach-iop32x/glantank.c b/arch/arm/mach-iop32x/glantank.c
index ac304705fe68..547b2342d61a 100644
--- a/arch/arm/mach-iop32x/glantank.c
+++ b/arch/arm/mach-iop32x/glantank.c
@@ -34,6 +34,7 @@
34#include <asm/mach-types.h> 34#include <asm/mach-types.h>
35#include <asm/page.h> 35#include <asm/page.h>
36#include <mach/time.h> 36#include <mach/time.h>
37#include "gpio-iop32x.h"
37 38
38/* 39/*
39 * GLAN Tank timer tick configuration. 40 * GLAN Tank timer tick configuration.
@@ -187,6 +188,7 @@ static void glantank_power_off(void)
187 188
188static void __init glantank_init_machine(void) 189static void __init glantank_init_machine(void)
189{ 190{
191 register_iop32x_gpio();
190 platform_device_register(&iop3xx_i2c0_device); 192 platform_device_register(&iop3xx_i2c0_device);
191 platform_device_register(&iop3xx_i2c1_device); 193 platform_device_register(&iop3xx_i2c1_device);
192 platform_device_register(&glantank_flash_device); 194 platform_device_register(&glantank_flash_device);
diff --git a/arch/arm/mach-iop32x/gpio-iop32x.h b/arch/arm/mach-iop32x/gpio-iop32x.h
new file mode 100644
index 000000000000..3c7309c02029
--- /dev/null
+++ b/arch/arm/mach-iop32x/gpio-iop32x.h
@@ -0,0 +1,10 @@
1static struct resource iop32x_gpio_res[] = {
2 DEFINE_RES_MEM((IOP3XX_PERIPHERAL_PHYS_BASE + 0x07c4), 0x10),
3};
4
5static inline void register_iop32x_gpio(void)
6{
7 platform_device_register_simple("gpio-iop", 0,
8 iop32x_gpio_res,
9 ARRAY_SIZE(iop32x_gpio_res));
10}
diff --git a/arch/arm/mach-iop32x/include/mach/gpio.h b/arch/arm/mach-iop32x/include/mach/gpio.h
deleted file mode 100644
index 708f4ec9db1d..000000000000
--- a/arch/arm/mach-iop32x/include/mach/gpio.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef __ASM_ARCH_IOP32X_GPIO_H
2#define __ASM_ARCH_IOP32X_GPIO_H
3
4#include <asm/hardware/iop3xx-gpio.h>
5
6#endif
diff --git a/arch/arm/mach-iop32x/include/mach/iop32x.h b/arch/arm/mach-iop32x/include/mach/iop32x.h
index 941f363aca56..56ec864ec313 100644
--- a/arch/arm/mach-iop32x/include/mach/iop32x.h
+++ b/arch/arm/mach-iop32x/include/mach/iop32x.h
@@ -19,7 +19,6 @@
19 * Peripherals that are shared between the iop32x and iop33x but 19 * Peripherals that are shared between the iop32x and iop33x but
20 * located at different addresses. 20 * located at different addresses.
21 */ 21 */
22#define IOP3XX_GPIO_REG(reg) (IOP3XX_PERIPHERAL_VIRT_BASE + 0x07c4 + (reg))
23#define IOP3XX_TIMER_REG(reg) (IOP3XX_PERIPHERAL_VIRT_BASE + 0x07e0 + (reg)) 22#define IOP3XX_TIMER_REG(reg) (IOP3XX_PERIPHERAL_VIRT_BASE + 0x07e0 + (reg))
24 23
25#include <asm/hardware/iop3xx.h> 24#include <asm/hardware/iop3xx.h>
diff --git a/arch/arm/mach-iop32x/iq31244.c b/arch/arm/mach-iop32x/iq31244.c
index f2cd2966212d..0e1392b20d18 100644
--- a/arch/arm/mach-iop32x/iq31244.c
+++ b/arch/arm/mach-iop32x/iq31244.c
@@ -37,6 +37,7 @@
37#include <asm/page.h> 37#include <asm/page.h>
38#include <asm/pgtable.h> 38#include <asm/pgtable.h>
39#include <mach/time.h> 39#include <mach/time.h>
40#include "gpio-iop32x.h"
40 41
41/* 42/*
42 * Until March of 2007 iq31244 platforms and ep80219 platforms shared the 43 * Until March of 2007 iq31244 platforms and ep80219 platforms shared the
@@ -283,6 +284,7 @@ void ep80219_power_off(void)
283 284
284static void __init iq31244_init_machine(void) 285static void __init iq31244_init_machine(void)
285{ 286{
287 register_iop32x_gpio();
286 platform_device_register(&iop3xx_i2c0_device); 288 platform_device_register(&iop3xx_i2c0_device);
287 platform_device_register(&iop3xx_i2c1_device); 289 platform_device_register(&iop3xx_i2c1_device);
288 platform_device_register(&iq31244_flash_device); 290 platform_device_register(&iq31244_flash_device);
diff --git a/arch/arm/mach-iop32x/iq80321.c b/arch/arm/mach-iop32x/iq80321.c
index 015435de90dd..66782ff1f46a 100644
--- a/arch/arm/mach-iop32x/iq80321.c
+++ b/arch/arm/mach-iop32x/iq80321.c
@@ -33,6 +33,7 @@
33#include <asm/page.h> 33#include <asm/page.h>
34#include <asm/pgtable.h> 34#include <asm/pgtable.h>
35#include <mach/time.h> 35#include <mach/time.h>
36#include "gpio-iop32x.h"
36 37
37/* 38/*
38 * IQ80321 timer tick configuration. 39 * IQ80321 timer tick configuration.
@@ -170,6 +171,7 @@ static struct platform_device iq80321_serial_device = {
170 171
171static void __init iq80321_init_machine(void) 172static void __init iq80321_init_machine(void)
172{ 173{
174 register_iop32x_gpio();
173 platform_device_register(&iop3xx_i2c0_device); 175 platform_device_register(&iop3xx_i2c0_device);
174 platform_device_register(&iop3xx_i2c1_device); 176 platform_device_register(&iop3xx_i2c1_device);
175 platform_device_register(&iq80321_flash_device); 177 platform_device_register(&iq80321_flash_device);
diff --git a/arch/arm/mach-iop32x/n2100.c b/arch/arm/mach-iop32x/n2100.c
index 069144300b77..c1cd80ecc219 100644
--- a/arch/arm/mach-iop32x/n2100.c
+++ b/arch/arm/mach-iop32x/n2100.c
@@ -30,6 +30,7 @@
30#include <linux/platform_device.h> 30#include <linux/platform_device.h>
31#include <linux/reboot.h> 31#include <linux/reboot.h>
32#include <linux/io.h> 32#include <linux/io.h>
33#include <linux/gpio.h>
33#include <mach/hardware.h> 34#include <mach/hardware.h>
34#include <asm/irq.h> 35#include <asm/irq.h>
35#include <asm/mach/arch.h> 36#include <asm/mach/arch.h>
@@ -40,6 +41,7 @@
40#include <asm/page.h> 41#include <asm/page.h>
41#include <asm/pgtable.h> 42#include <asm/pgtable.h>
42#include <mach/time.h> 43#include <mach/time.h>
44#include "gpio-iop32x.h"
43 45
44/* 46/*
45 * N2100 timer tick configuration. 47 * N2100 timer tick configuration.
@@ -288,8 +290,14 @@ static void n2100_power_off(void)
288 290
289static void n2100_restart(enum reboot_mode mode, const char *cmd) 291static void n2100_restart(enum reboot_mode mode, const char *cmd)
290{ 292{
291 gpio_line_set(N2100_HARDWARE_RESET, GPIO_LOW); 293 int ret;
292 gpio_line_config(N2100_HARDWARE_RESET, GPIO_OUT); 294
295 ret = gpio_direction_output(N2100_HARDWARE_RESET, 0);
296 if (ret) {
297 pr_crit("could not drive reset GPIO low\n");
298 return;
299 }
300 /* Wait for reset to happen */
293 while (1) 301 while (1)
294 ; 302 ;
295} 303}
@@ -299,7 +307,7 @@ static struct timer_list power_button_poll_timer;
299 307
300static void power_button_poll(unsigned long dummy) 308static void power_button_poll(unsigned long dummy)
301{ 309{
302 if (gpio_line_get(N2100_POWER_BUTTON) == 0) { 310 if (gpio_get_value(N2100_POWER_BUTTON) == 0) {
303 ctrl_alt_del(); 311 ctrl_alt_del();
304 return; 312 return;
305 } 313 }
@@ -308,9 +316,37 @@ static void power_button_poll(unsigned long dummy)
308 add_timer(&power_button_poll_timer); 316 add_timer(&power_button_poll_timer);
309} 317}
310 318
319static int __init n2100_request_gpios(void)
320{
321 int ret;
322
323 if (!machine_is_n2100())
324 return 0;
325
326 ret = gpio_request(N2100_HARDWARE_RESET, "reset");
327 if (ret)
328 pr_err("could not request reset GPIO\n");
329
330 ret = gpio_request(N2100_POWER_BUTTON, "power");
331 if (ret)
332 pr_err("could not request power GPIO\n");
333 else {
334 ret = gpio_direction_input(N2100_POWER_BUTTON);
335 if (ret)
336 pr_err("could not set power GPIO as input\n");
337 }
338 /* Set up power button poll timer */
339 init_timer(&power_button_poll_timer);
340 power_button_poll_timer.function = power_button_poll;
341 power_button_poll_timer.expires = jiffies + (HZ / 10);
342 add_timer(&power_button_poll_timer);
343 return 0;
344}
345device_initcall(n2100_request_gpios);
311 346
312static void __init n2100_init_machine(void) 347static void __init n2100_init_machine(void)
313{ 348{
349 register_iop32x_gpio();
314 platform_device_register(&iop3xx_i2c0_device); 350 platform_device_register(&iop3xx_i2c0_device);
315 platform_device_register(&n2100_flash_device); 351 platform_device_register(&n2100_flash_device);
316 platform_device_register(&n2100_serial_device); 352 platform_device_register(&n2100_serial_device);
@@ -321,11 +357,6 @@ static void __init n2100_init_machine(void)
321 ARRAY_SIZE(n2100_i2c_devices)); 357 ARRAY_SIZE(n2100_i2c_devices));
322 358
323 pm_power_off = n2100_power_off; 359 pm_power_off = n2100_power_off;
324
325 init_timer(&power_button_poll_timer);
326 power_button_poll_timer.function = power_button_poll;
327 power_button_poll_timer.expires = jiffies + (HZ / 10);
328 add_timer(&power_button_poll_timer);
329} 360}
330 361
331MACHINE_START(N2100, "Thecus N2100") 362MACHINE_START(N2100, "Thecus N2100")
diff --git a/arch/arm/mach-iop33x/include/mach/gpio.h b/arch/arm/mach-iop33x/include/mach/gpio.h
deleted file mode 100644
index ddd55bba9bb9..000000000000
--- a/arch/arm/mach-iop33x/include/mach/gpio.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef __ASM_ARCH_IOP33X_GPIO_H
2#define __ASM_ARCH_IOP33X_GPIO_H
3
4#include <asm/hardware/iop3xx-gpio.h>
5
6#endif
diff --git a/arch/arm/mach-iop33x/include/mach/iop33x.h b/arch/arm/mach-iop33x/include/mach/iop33x.h
index a89c0a234bff..c95122653094 100644
--- a/arch/arm/mach-iop33x/include/mach/iop33x.h
+++ b/arch/arm/mach-iop33x/include/mach/iop33x.h
@@ -18,7 +18,6 @@
18 * Peripherals that are shared between the iop32x and iop33x but 18 * Peripherals that are shared between the iop32x and iop33x but
19 * located at different addresses. 19 * located at different addresses.
20 */ 20 */
21#define IOP3XX_GPIO_REG(reg) (IOP3XX_PERIPHERAL_VIRT_BASE + 0x1780 + (reg))
22#define IOP3XX_TIMER_REG(reg) (IOP3XX_PERIPHERAL_VIRT_BASE + 0x07d0 + (reg)) 21#define IOP3XX_TIMER_REG(reg) (IOP3XX_PERIPHERAL_VIRT_BASE + 0x07d0 + (reg))
23 22
24#include <asm/hardware/iop3xx.h> 23#include <asm/hardware/iop3xx.h>
diff --git a/arch/arm/mach-iop33x/iq80331.c b/arch/arm/mach-iop33x/iq80331.c
index c43304a10fa7..e2cb65cfbe23 100644
--- a/arch/arm/mach-iop33x/iq80331.c
+++ b/arch/arm/mach-iop33x/iq80331.c
@@ -122,8 +122,15 @@ static struct platform_device iq80331_flash_device = {
122 .resource = &iq80331_flash_resource, 122 .resource = &iq80331_flash_resource,
123}; 123};
124 124
125static struct resource iq80331_gpio_res[] = {
126 DEFINE_RES_MEM((IOP3XX_PERIPHERAL_PHYS_BASE + 0x1780), 0x10),
127};
128
125static void __init iq80331_init_machine(void) 129static void __init iq80331_init_machine(void)
126{ 130{
131 platform_device_register_simple("gpio-iop", 0,
132 iq80331_gpio_res,
133 ARRAY_SIZE(iq80331_gpio_res));
127 platform_device_register(&iop3xx_i2c0_device); 134 platform_device_register(&iop3xx_i2c0_device);
128 platform_device_register(&iop3xx_i2c1_device); 135 platform_device_register(&iop3xx_i2c1_device);
129 platform_device_register(&iop33x_uart0_device); 136 platform_device_register(&iop33x_uart0_device);
diff --git a/arch/arm/mach-iop33x/iq80332.c b/arch/arm/mach-iop33x/iq80332.c
index 8192987e78e5..0b6269d94f89 100644
--- a/arch/arm/mach-iop33x/iq80332.c
+++ b/arch/arm/mach-iop33x/iq80332.c
@@ -122,8 +122,15 @@ static struct platform_device iq80332_flash_device = {
122 .resource = &iq80332_flash_resource, 122 .resource = &iq80332_flash_resource,
123}; 123};
124 124
125static struct resource iq80332_gpio_res[] = {
126 DEFINE_RES_MEM((IOP3XX_PERIPHERAL_PHYS_BASE + 0x1780), 0x10),
127};
128
125static void __init iq80332_init_machine(void) 129static void __init iq80332_init_machine(void)
126{ 130{
131 platform_device_register_simple("gpio-iop", 0,
132 iq80332_gpio_res,
133 ARRAY_SIZE(iq80332_gpio_res));
127 platform_device_register(&iop3xx_i2c0_device); 134 platform_device_register(&iop3xx_i2c0_device);
128 platform_device_register(&iop3xx_i2c1_device); 135 platform_device_register(&iop3xx_i2c1_device);
129 platform_device_register(&iop33x_uart0_device); 136 platform_device_register(&iop33x_uart0_device);
diff --git a/arch/arm/mach-ixp4xx/common.c b/arch/arm/mach-ixp4xx/common.c
index 5327decde5a0..9edaf4734fa8 100644
--- a/arch/arm/mach-ixp4xx/common.c
+++ b/arch/arm/mach-ixp4xx/common.c
@@ -81,6 +81,44 @@ void __init ixp4xx_map_io(void)
81 iotable_init(ixp4xx_io_desc, ARRAY_SIZE(ixp4xx_io_desc)); 81 iotable_init(ixp4xx_io_desc, ARRAY_SIZE(ixp4xx_io_desc));
82} 82}
83 83
84/*
85 * GPIO-functions
86 */
87/*
88 * The following converted to the real HW bits the gpio_line_config
89 */
90/* GPIO pin types */
91#define IXP4XX_GPIO_OUT 0x1
92#define IXP4XX_GPIO_IN 0x2
93
94/* GPIO signal types */
95#define IXP4XX_GPIO_LOW 0
96#define IXP4XX_GPIO_HIGH 1
97
98/* GPIO Clocks */
99#define IXP4XX_GPIO_CLK_0 14
100#define IXP4XX_GPIO_CLK_1 15
101
102static void gpio_line_config(u8 line, u32 direction)
103{
104 if (direction == IXP4XX_GPIO_IN)
105 *IXP4XX_GPIO_GPOER |= (1 << line);
106 else
107 *IXP4XX_GPIO_GPOER &= ~(1 << line);
108}
109
110static void gpio_line_get(u8 line, int *value)
111{
112 *value = (*IXP4XX_GPIO_GPINR >> line) & 0x1;
113}
114
115static void gpio_line_set(u8 line, int value)
116{
117 if (value == IXP4XX_GPIO_HIGH)
118 *IXP4XX_GPIO_GPOUTR |= (1 << line);
119 else if (value == IXP4XX_GPIO_LOW)
120 *IXP4XX_GPIO_GPOUTR &= ~(1 << line);
121}
84 122
85/************************************************************************* 123/*************************************************************************
86 * IXP4xx chipset IRQ handling 124 * IXP4xx chipset IRQ handling
@@ -117,17 +155,6 @@ static int ixp4xx_gpio_to_irq(struct gpio_chip *chip, unsigned gpio)
117 return -EINVAL; 155 return -EINVAL;
118} 156}
119 157
120int irq_to_gpio(unsigned int irq)
121{
122 int gpio = (irq < 32) ? irq2gpio[irq] : -EINVAL;
123
124 if (gpio == -1)
125 return -EINVAL;
126
127 return gpio;
128}
129EXPORT_SYMBOL(irq_to_gpio);
130
131static int ixp4xx_set_irq_type(struct irq_data *d, unsigned int type) 158static int ixp4xx_set_irq_type(struct irq_data *d, unsigned int type)
132{ 159{
133 int line = irq2gpio[d->irq]; 160 int line = irq2gpio[d->irq];
diff --git a/arch/arm/mach-ixp4xx/dsmg600-setup.c b/arch/arm/mach-ixp4xx/dsmg600-setup.c
index 63de1b3fd06b..736dc692d540 100644
--- a/arch/arm/mach-ixp4xx/dsmg600-setup.c
+++ b/arch/arm/mach-ixp4xx/dsmg600-setup.c
@@ -26,6 +26,7 @@
26#include <linux/reboot.h> 26#include <linux/reboot.h>
27#include <linux/i2c.h> 27#include <linux/i2c.h>
28#include <linux/i2c-gpio.h> 28#include <linux/i2c-gpio.h>
29#include <linux/gpio.h>
29 30
30#include <mach/hardware.h> 31#include <mach/hardware.h>
31 32
@@ -161,11 +162,8 @@ static struct platform_device *dsmg600_devices[] __initdata = {
161 162
162static void dsmg600_power_off(void) 163static void dsmg600_power_off(void)
163{ 164{
164 /* enable the pwr cntl gpio */ 165 /* enable the pwr cntl and drive it high */
165 gpio_line_config(DSMG600_PO_GPIO, IXP4XX_GPIO_OUT); 166 gpio_direction_output(DSMG600_PO_GPIO, 1);
166
167 /* poweroff */
168 gpio_line_set(DSMG600_PO_GPIO, IXP4XX_GPIO_HIGH);
169} 167}
170 168
171/* This is used to make sure the power-button pusher is serious. The button 169/* This is used to make sure the power-button pusher is serious. The button
@@ -202,7 +200,7 @@ static void dsmg600_power_handler(unsigned long data)
202 ctrl_alt_del(); 200 ctrl_alt_del();
203 201
204 /* Change the state of the power LED to "blink" */ 202 /* Change the state of the power LED to "blink" */
205 gpio_line_set(DSMG600_LED_PWR_GPIO, IXP4XX_GPIO_LOW); 203 gpio_set_value(DSMG600_LED_PWR_GPIO, 0);
206 } else { 204 } else {
207 power_button_countdown = PBUTTON_HOLDDOWN_COUNT; 205 power_button_countdown = PBUTTON_HOLDDOWN_COUNT;
208 } 206 }
@@ -228,6 +226,40 @@ static void __init dsmg600_timer_init(void)
228 ixp4xx_timer_init(); 226 ixp4xx_timer_init();
229} 227}
230 228
229static int __init dsmg600_gpio_init(void)
230{
231 if (!machine_is_dsmg600())
232 return 0;
233
234 gpio_request(DSMG600_RB_GPIO, "reset button");
235 if (request_irq(gpio_to_irq(DSMG600_RB_GPIO), &dsmg600_reset_handler,
236 IRQF_DISABLED | IRQF_TRIGGER_LOW,
237 "DSM-G600 reset button", NULL) < 0) {
238
239 printk(KERN_DEBUG "Reset Button IRQ %d not available\n",
240 gpio_to_irq(DSMG600_RB_GPIO));
241 }
242
243 /*
244 * The power button on the D-Link DSM-G600 is on GPIO 15, but
245 * it cannot handle interrupts on that GPIO line. So we'll
246 * have to poll it with a kernel timer.
247 */
248
249 /* Make sure that the power button GPIO is set up as an input */
250 gpio_request(DSMG600_PB_GPIO, "power button");
251 gpio_direction_input(DSMG600_PB_GPIO);
252 /* Request poweroff GPIO line */
253 gpio_request(DSMG600_PO_GPIO, "power off button");
254
255 /* Set the initial value for the power button IRQ handler */
256 power_button_countdown = PBUTTON_HOLDDOWN_COUNT;
257
258 mod_timer(&dsmg600_power_timer, jiffies + msecs_to_jiffies(500));
259 return 0;
260}
261device_initcall(dsmg600_gpio_init);
262
231static void __init dsmg600_init(void) 263static void __init dsmg600_init(void)
232{ 264{
233 ixp4xx_sys_init(); 265 ixp4xx_sys_init();
@@ -251,27 +283,6 @@ static void __init dsmg600_init(void)
251 platform_add_devices(dsmg600_devices, ARRAY_SIZE(dsmg600_devices)); 283 platform_add_devices(dsmg600_devices, ARRAY_SIZE(dsmg600_devices));
252 284
253 pm_power_off = dsmg600_power_off; 285 pm_power_off = dsmg600_power_off;
254
255 if (request_irq(gpio_to_irq(DSMG600_RB_GPIO), &dsmg600_reset_handler,
256 IRQF_DISABLED | IRQF_TRIGGER_LOW,
257 "DSM-G600 reset button", NULL) < 0) {
258
259 printk(KERN_DEBUG "Reset Button IRQ %d not available\n",
260 gpio_to_irq(DSMG600_RB_GPIO));
261 }
262
263 /* The power button on the D-Link DSM-G600 is on GPIO 15, but
264 * it cannot handle interrupts on that GPIO line. So we'll
265 * have to poll it with a kernel timer.
266 */
267
268 /* Make sure that the power button GPIO is set up as an input */
269 gpio_line_config(DSMG600_PB_GPIO, IXP4XX_GPIO_IN);
270
271 /* Set the initial value for the power button IRQ handler */
272 power_button_countdown = PBUTTON_HOLDDOWN_COUNT;
273
274 mod_timer(&dsmg600_power_timer, jiffies + msecs_to_jiffies(500));
275} 286}
276 287
277MACHINE_START(DSMG600, "D-Link DSM-G600 RevA") 288MACHINE_START(DSMG600, "D-Link DSM-G600 RevA")
diff --git a/arch/arm/mach-ixp4xx/include/mach/platform.h b/arch/arm/mach-ixp4xx/include/mach/platform.h
index 4c4c6a6f4526..75c4c6572ad0 100644
--- a/arch/arm/mach-ixp4xx/include/mach/platform.h
+++ b/arch/arm/mach-ixp4xx/include/mach/platform.h
@@ -131,44 +131,5 @@ struct pci_sys_data;
131extern int ixp4xx_setup(int nr, struct pci_sys_data *sys); 131extern int ixp4xx_setup(int nr, struct pci_sys_data *sys);
132extern struct pci_ops ixp4xx_ops; 132extern struct pci_ops ixp4xx_ops;
133 133
134/*
135 * GPIO-functions
136 */
137/*
138 * The following converted to the real HW bits the gpio_line_config
139 */
140/* GPIO pin types */
141#define IXP4XX_GPIO_OUT 0x1
142#define IXP4XX_GPIO_IN 0x2
143
144/* GPIO signal types */
145#define IXP4XX_GPIO_LOW 0
146#define IXP4XX_GPIO_HIGH 1
147
148/* GPIO Clocks */
149#define IXP4XX_GPIO_CLK_0 14
150#define IXP4XX_GPIO_CLK_1 15
151
152static inline void gpio_line_config(u8 line, u32 direction)
153{
154 if (direction == IXP4XX_GPIO_IN)
155 *IXP4XX_GPIO_GPOER |= (1 << line);
156 else
157 *IXP4XX_GPIO_GPOER &= ~(1 << line);
158}
159
160static inline void gpio_line_get(u8 line, int *value)
161{
162 *value = (*IXP4XX_GPIO_GPINR >> line) & 0x1;
163}
164
165static inline void gpio_line_set(u8 line, int value)
166{
167 if (value == IXP4XX_GPIO_HIGH)
168 *IXP4XX_GPIO_GPOUTR |= (1 << line);
169 else if (value == IXP4XX_GPIO_LOW)
170 *IXP4XX_GPIO_GPOUTR &= ~(1 << line);
171}
172
173#endif // __ASSEMBLY__ 134#endif // __ASSEMBLY__
174 135
diff --git a/arch/arm/mach-ixp4xx/ixdp425-setup.c b/arch/arm/mach-ixp4xx/ixdp425-setup.c
index 22d688b7d513..e7b8befa8729 100644
--- a/arch/arm/mach-ixp4xx/ixdp425-setup.c
+++ b/arch/arm/mach-ixp4xx/ixdp425-setup.c
@@ -20,6 +20,7 @@
20#include <linux/mtd/nand.h> 20#include <linux/mtd/nand.h>
21#include <linux/mtd/partitions.h> 21#include <linux/mtd/partitions.h>
22#include <linux/delay.h> 22#include <linux/delay.h>
23#include <linux/gpio.h>
23#include <asm/types.h> 24#include <asm/types.h>
24#include <asm/setup.h> 25#include <asm/setup.h>
25#include <asm/memory.h> 26#include <asm/memory.h>
@@ -80,10 +81,10 @@ ixdp425_flash_nand_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl)
80 81
81 if (ctrl & NAND_CTRL_CHANGE) { 82 if (ctrl & NAND_CTRL_CHANGE) {
82 if (ctrl & NAND_NCE) { 83 if (ctrl & NAND_NCE) {
83 gpio_line_set(IXDP425_NAND_NCE_PIN, IXP4XX_GPIO_LOW); 84 gpio_set_value(IXDP425_NAND_NCE_PIN, 0);
84 udelay(5); 85 udelay(5);
85 } else 86 } else
86 gpio_line_set(IXDP425_NAND_NCE_PIN, IXP4XX_GPIO_HIGH); 87 gpio_set_value(IXDP425_NAND_NCE_PIN, 1);
87 88
88 offset = (ctrl & NAND_CLE) ? IXDP425_NAND_CMD_BYTE : 0; 89 offset = (ctrl & NAND_CLE) ? IXDP425_NAND_CMD_BYTE : 0;
89 offset |= (ctrl & NAND_ALE) ? IXDP425_NAND_ADDR_BYTE : 0; 90 offset |= (ctrl & NAND_ALE) ? IXDP425_NAND_ADDR_BYTE : 0;
@@ -227,7 +228,8 @@ static void __init ixdp425_init(void)
227 ixdp425_flash_nand_resource.start = IXP4XX_EXP_BUS_BASE(3), 228 ixdp425_flash_nand_resource.start = IXP4XX_EXP_BUS_BASE(3),
228 ixdp425_flash_nand_resource.end = IXP4XX_EXP_BUS_BASE(3) + 0x10 - 1; 229 ixdp425_flash_nand_resource.end = IXP4XX_EXP_BUS_BASE(3) + 0x10 - 1;
229 230
230 gpio_line_config(IXDP425_NAND_NCE_PIN, IXP4XX_GPIO_OUT); 231 gpio_request(IXDP425_NAND_NCE_PIN, "NAND NCE pin");
232 gpio_direction_output(IXDP425_NAND_NCE_PIN, 0);
231 233
232 /* Configure expansion bus for NAND Flash */ 234 /* Configure expansion bus for NAND Flash */
233 *IXP4XX_EXP_CS3 = IXP4XX_EXP_BUS_CS_EN | 235 *IXP4XX_EXP_CS3 = IXP4XX_EXP_BUS_CS_EN |
diff --git a/arch/arm/mach-ixp4xx/nas100d-setup.c b/arch/arm/mach-ixp4xx/nas100d-setup.c
index ed667ce9f576..507cb5233537 100644
--- a/arch/arm/mach-ixp4xx/nas100d-setup.c
+++ b/arch/arm/mach-ixp4xx/nas100d-setup.c
@@ -184,11 +184,8 @@ static void nas100d_power_off(void)
184{ 184{
185 /* This causes the box to drop the power and go dead. */ 185 /* This causes the box to drop the power and go dead. */
186 186
187 /* enable the pwr cntl gpio */ 187 /* enable the pwr cntl gpio and assert power off */
188 gpio_line_config(NAS100D_PO_GPIO, IXP4XX_GPIO_OUT); 188 gpio_direction_output(NAS100D_PO_GPIO, 1);
189
190 /* do the deed */
191 gpio_line_set(NAS100D_PO_GPIO, IXP4XX_GPIO_HIGH);
192} 189}
193 190
194/* This is used to make sure the power-button pusher is serious. The button 191/* This is used to make sure the power-button pusher is serious. The button
@@ -225,7 +222,7 @@ static void nas100d_power_handler(unsigned long data)
225 ctrl_alt_del(); 222 ctrl_alt_del();
226 223
227 /* Change the state of the power LED to "blink" */ 224 /* Change the state of the power LED to "blink" */
228 gpio_line_set(NAS100D_LED_PWR_GPIO, IXP4XX_GPIO_LOW); 225 gpio_set_value(NAS100D_LED_PWR_GPIO, 0);
229 } else { 226 } else {
230 power_button_countdown = PBUTTON_HOLDDOWN_COUNT; 227 power_button_countdown = PBUTTON_HOLDDOWN_COUNT;
231 } 228 }
@@ -242,6 +239,33 @@ static irqreturn_t nas100d_reset_handler(int irq, void *dev_id)
242 return IRQ_HANDLED; 239 return IRQ_HANDLED;
243} 240}
244 241
242static int __init nas100d_gpio_init(void)
243{
244 if (!machine_is_nas100d())
245 return 0;
246
247 /*
248 * The power button on the Iomega NAS100d is on GPIO 14, but
249 * it cannot handle interrupts on that GPIO line. So we'll
250 * have to poll it with a kernel timer.
251 */
252
253 /* Request the power off GPIO */
254 gpio_request(NAS100D_PO_GPIO, "power off");
255
256 /* Make sure that the power button GPIO is set up as an input */
257 gpio_request(NAS100D_PB_GPIO, "power button");
258 gpio_direction_input(NAS100D_PB_GPIO);
259
260 /* Set the initial value for the power button IRQ handler */
261 power_button_countdown = PBUTTON_HOLDDOWN_COUNT;
262
263 mod_timer(&nas100d_power_timer, jiffies + msecs_to_jiffies(500));
264
265 return 0;
266}
267device_initcall(nas100d_gpio_init);
268
245static void __init nas100d_init(void) 269static void __init nas100d_init(void)
246{ 270{
247 uint8_t __iomem *f; 271 uint8_t __iomem *f;
@@ -278,19 +302,6 @@ static void __init nas100d_init(void)
278 gpio_to_irq(NAS100D_RB_GPIO)); 302 gpio_to_irq(NAS100D_RB_GPIO));
279 } 303 }
280 304
281 /* The power button on the Iomega NAS100d is on GPIO 14, but
282 * it cannot handle interrupts on that GPIO line. So we'll
283 * have to poll it with a kernel timer.
284 */
285
286 /* Make sure that the power button GPIO is set up as an input */
287 gpio_line_config(NAS100D_PB_GPIO, IXP4XX_GPIO_IN);
288
289 /* Set the initial value for the power button IRQ handler */
290 power_button_countdown = PBUTTON_HOLDDOWN_COUNT;
291
292 mod_timer(&nas100d_power_timer, jiffies + msecs_to_jiffies(500));
293
294 /* 305 /*
295 * Map in a portion of the flash and read the MAC address. 306 * Map in a portion of the flash and read the MAC address.
296 * Since it is stored in BE in the flash itself, we need to 307 * Since it is stored in BE in the flash itself, we need to
diff --git a/arch/arm/mach-ixp4xx/nslu2-setup.c b/arch/arm/mach-ixp4xx/nslu2-setup.c
index 7e55236c26ea..ba5f1cda2a9d 100644
--- a/arch/arm/mach-ixp4xx/nslu2-setup.c
+++ b/arch/arm/mach-ixp4xx/nslu2-setup.c
@@ -197,11 +197,8 @@ static void nslu2_power_off(void)
197{ 197{
198 /* This causes the box to drop the power and go dead. */ 198 /* This causes the box to drop the power and go dead. */
199 199
200 /* enable the pwr cntl gpio */ 200 /* enable the pwr cntl gpio and assert power off */
201 gpio_line_config(NSLU2_PO_GPIO, IXP4XX_GPIO_OUT); 201 gpio_direction_output(NSLU2_PO_GPIO, 1);
202
203 /* do the deed */
204 gpio_line_set(NSLU2_PO_GPIO, IXP4XX_GPIO_HIGH);
205} 202}
206 203
207static irqreturn_t nslu2_power_handler(int irq, void *dev_id) 204static irqreturn_t nslu2_power_handler(int irq, void *dev_id)
@@ -223,6 +220,16 @@ static irqreturn_t nslu2_reset_handler(int irq, void *dev_id)
223 return IRQ_HANDLED; 220 return IRQ_HANDLED;
224} 221}
225 222
223static int __init nslu2_gpio_init(void)
224{
225 if (!machine_is_nslu2())
226 return 0;
227
228 /* Request the power off GPIO */
229 return gpio_request(NSLU2_PO_GPIO, "power off");
230}
231device_initcall(nslu2_gpio_init);
232
226static void __init nslu2_timer_init(void) 233static void __init nslu2_timer_init(void)
227{ 234{
228 /* The xtal on this machine is non-standard. */ 235 /* The xtal on this machine is non-standard. */
diff --git a/arch/arm/mach-keystone/platsmp.c b/arch/arm/mach-keystone/platsmp.c
index c12296157d4a..5cf0683577ea 100644
--- a/arch/arm/mach-keystone/platsmp.c
+++ b/arch/arm/mach-keystone/platsmp.c
@@ -17,7 +17,6 @@
17#include <linux/io.h> 17#include <linux/io.h>
18 18
19#include <asm/smp_plat.h> 19#include <asm/smp_plat.h>
20#include <asm/prom.h>
21 20
22#include "keystone.h" 21#include "keystone.h"
23 22
diff --git a/arch/arm/mach-mmp/include/mach/gpio.h b/arch/arm/mach-mmp/include/mach/gpio.h
deleted file mode 100644
index 13219ebf5128..000000000000
--- a/arch/arm/mach-mmp/include/mach/gpio.h
+++ /dev/null
@@ -1,8 +0,0 @@
1#ifndef __ASM_MACH_GPIO_H
2#define __ASM_MACH_GPIO_H
3
4#include <asm-generic/gpio.h>
5
6#include <mach/cputype.h>
7
8#endif /* __ASM_MACH_GPIO_H */
diff --git a/arch/arm/mach-msm/timer.c b/arch/arm/mach-msm/timer.c
index 696fb73296d0..1e9c3383daba 100644
--- a/arch/arm/mach-msm/timer.c
+++ b/arch/arm/mach-msm/timer.c
@@ -274,7 +274,6 @@ static void __init msm_dt_timer_init(struct device_node *np)
274 pr_err("Unknown frequency\n"); 274 pr_err("Unknown frequency\n");
275 return; 275 return;
276 } 276 }
277 of_node_put(np);
278 277
279 event_base = base + 0x4; 278 event_base = base + 0x4;
280 sts_base = base + 0x88; 279 sts_base = base + 0x88;
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index e15ac005ef17..1f25f3e99c05 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -40,7 +40,7 @@ omap-4-5-common = omap4-common.o omap-wakeupgen.o
40obj-$(CONFIG_ARCH_OMAP4) += $(omap-4-5-common) $(smp-y) sleep44xx.o 40obj-$(CONFIG_ARCH_OMAP4) += $(omap-4-5-common) $(smp-y) sleep44xx.o
41obj-$(CONFIG_SOC_OMAP5) += $(omap-4-5-common) $(smp-y) sleep44xx.o 41obj-$(CONFIG_SOC_OMAP5) += $(omap-4-5-common) $(smp-y) sleep44xx.o
42obj-$(CONFIG_SOC_AM43XX) += $(omap-4-5-common) 42obj-$(CONFIG_SOC_AM43XX) += $(omap-4-5-common)
43obj-$(CONFIG_SOC_DRA7XX) += $(omap-4-5-common) $(smp-y) 43obj-$(CONFIG_SOC_DRA7XX) += $(omap-4-5-common) $(smp-y) sleep44xx.o
44 44
45plus_sec := $(call as-instr,.arch_extension sec,+sec) 45plus_sec := $(call as-instr,.arch_extension sec,+sec)
46AFLAGS_omap-headsmp.o :=-Wa,-march=armv7-a$(plus_sec) 46AFLAGS_omap-headsmp.o :=-Wa,-march=armv7-a$(plus_sec)
diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c
index 8b9cd0690ce7..09f6149b59a9 100644
--- a/arch/arm/mach-omap2/board-omap3beagle.c
+++ b/arch/arm/mach-omap2/board-omap3beagle.c
@@ -510,7 +510,7 @@ static int __init beagle_opp_init(void)
510 mpu_dev = get_cpu_device(0); 510 mpu_dev = get_cpu_device(0);
511 iva_dev = omap_device_get_by_hwmod_name("iva"); 511 iva_dev = omap_device_get_by_hwmod_name("iva");
512 512
513 if (IS_ERR(mpu_dev) || IS_ERR(iva_dev)) { 513 if (!mpu_dev || IS_ERR(iva_dev)) {
514 pr_err("%s: Aiee.. no mpu/dsp devices? %p %p\n", 514 pr_err("%s: Aiee.. no mpu/dsp devices? %p %p\n",
515 __func__, mpu_dev, iva_dev); 515 __func__, mpu_dev, iva_dev);
516 return -ENODEV; 516 return -ENODEV;
diff --git a/arch/arm/mach-omap2/board-rx51-peripherals.c b/arch/arm/mach-omap2/board-rx51-peripherals.c
index 5c0d0e120420..f093af17f5e6 100644
--- a/arch/arm/mach-omap2/board-rx51-peripherals.c
+++ b/arch/arm/mach-omap2/board-rx51-peripherals.c
@@ -213,29 +213,11 @@ static struct lp55xx_led_config rx51_lp5523_led_config[] = {
213 } 213 }
214}; 214};
215 215
216static int rx51_lp5523_setup(void)
217{
218 return gpio_request_one(RX51_LP5523_CHIP_EN_GPIO, GPIOF_DIR_OUT,
219 "lp5523_enable");
220}
221
222static void rx51_lp5523_release(void)
223{
224 gpio_free(RX51_LP5523_CHIP_EN_GPIO);
225}
226
227static void rx51_lp5523_enable(bool state)
228{
229 gpio_set_value(RX51_LP5523_CHIP_EN_GPIO, !!state);
230}
231
232static struct lp55xx_platform_data rx51_lp5523_platform_data = { 216static struct lp55xx_platform_data rx51_lp5523_platform_data = {
233 .led_config = rx51_lp5523_led_config, 217 .led_config = rx51_lp5523_led_config,
234 .num_channels = ARRAY_SIZE(rx51_lp5523_led_config), 218 .num_channels = ARRAY_SIZE(rx51_lp5523_led_config),
235 .clock_mode = LP55XX_CLOCK_AUTO, 219 .clock_mode = LP55XX_CLOCK_AUTO,
236 .setup_resources = rx51_lp5523_setup, 220 .enable_gpio = RX51_LP5523_CHIP_EN_GPIO,
237 .release_resources = rx51_lp5523_release,
238 .enable = rx51_lp5523_enable,
239}; 221};
240#endif 222#endif
241 223
diff --git a/arch/arm/mach-omap2/cclock3xxx_data.c b/arch/arm/mach-omap2/cclock3xxx_data.c
index 03a2829beb8e..3b05aea56d1f 100644
--- a/arch/arm/mach-omap2/cclock3xxx_data.c
+++ b/arch/arm/mach-omap2/cclock3xxx_data.c
@@ -381,6 +381,42 @@ static struct clk_hw_omap dpll4_ck_hw = {
381 381
382DEFINE_STRUCT_CLK(dpll4_ck, dpll3_ck_parent_names, dpll4_ck_ops); 382DEFINE_STRUCT_CLK(dpll4_ck, dpll3_ck_parent_names, dpll4_ck_ops);
383 383
384static const struct clk_div_table dpll4_mx_ck_div_table[] = {
385 { .div = 1, .val = 1 },
386 { .div = 2, .val = 2 },
387 { .div = 3, .val = 3 },
388 { .div = 4, .val = 4 },
389 { .div = 5, .val = 5 },
390 { .div = 6, .val = 6 },
391 { .div = 7, .val = 7 },
392 { .div = 8, .val = 8 },
393 { .div = 9, .val = 9 },
394 { .div = 10, .val = 10 },
395 { .div = 11, .val = 11 },
396 { .div = 12, .val = 12 },
397 { .div = 13, .val = 13 },
398 { .div = 14, .val = 14 },
399 { .div = 15, .val = 15 },
400 { .div = 16, .val = 16 },
401 { .div = 17, .val = 17 },
402 { .div = 18, .val = 18 },
403 { .div = 19, .val = 19 },
404 { .div = 20, .val = 20 },
405 { .div = 21, .val = 21 },
406 { .div = 22, .val = 22 },
407 { .div = 23, .val = 23 },
408 { .div = 24, .val = 24 },
409 { .div = 25, .val = 25 },
410 { .div = 26, .val = 26 },
411 { .div = 27, .val = 27 },
412 { .div = 28, .val = 28 },
413 { .div = 29, .val = 29 },
414 { .div = 30, .val = 30 },
415 { .div = 31, .val = 31 },
416 { .div = 32, .val = 32 },
417 { .div = 0 },
418};
419
384DEFINE_CLK_DIVIDER(dpll4_m5_ck, "dpll4_ck", &dpll4_ck, 0x0, 420DEFINE_CLK_DIVIDER(dpll4_m5_ck, "dpll4_ck", &dpll4_ck, 0x0,
385 OMAP_CM_REGADDR(OMAP3430_CAM_MOD, CM_CLKSEL), 421 OMAP_CM_REGADDR(OMAP3430_CAM_MOD, CM_CLKSEL),
386 OMAP3430_CLKSEL_CAM_SHIFT, OMAP3630_CLKSEL_CAM_WIDTH, 422 OMAP3430_CLKSEL_CAM_SHIFT, OMAP3630_CLKSEL_CAM_WIDTH,
@@ -524,10 +560,10 @@ static const struct clksel_rate clkout2_src_54m_rates[] = {
524 { .div = 0 } 560 { .div = 0 }
525}; 561};
526 562
527DEFINE_CLK_DIVIDER(dpll4_m3_ck, "dpll4_ck", &dpll4_ck, 0x0, 563DEFINE_CLK_DIVIDER_TABLE(dpll4_m3_ck, "dpll4_ck", &dpll4_ck, 0x0,
528 OMAP_CM_REGADDR(OMAP3430_DSS_MOD, CM_CLKSEL), 564 OMAP_CM_REGADDR(OMAP3430_DSS_MOD, CM_CLKSEL),
529 OMAP3430_CLKSEL_TV_SHIFT, OMAP3630_CLKSEL_TV_WIDTH, 565 OMAP3430_CLKSEL_TV_SHIFT, OMAP3630_CLKSEL_TV_WIDTH,
530 CLK_DIVIDER_ONE_BASED, NULL); 566 0, dpll4_mx_ck_div_table, NULL);
531 567
532static struct clk dpll4_m3x2_ck; 568static struct clk dpll4_m3x2_ck;
533 569
@@ -847,10 +883,10 @@ static struct clk dpll3_m3x2_ck_3630 = {
847 883
848DEFINE_CLK_FIXED_FACTOR(dpll3_x2_ck, "dpll3_ck", &dpll3_ck, 0x0, 2, 1); 884DEFINE_CLK_FIXED_FACTOR(dpll3_x2_ck, "dpll3_ck", &dpll3_ck, 0x0, 2, 1);
849 885
850DEFINE_CLK_DIVIDER(dpll4_m4_ck, "dpll4_ck", &dpll4_ck, 0x0, 886DEFINE_CLK_DIVIDER_TABLE(dpll4_m4_ck, "dpll4_ck", &dpll4_ck, 0x0,
851 OMAP_CM_REGADDR(OMAP3430_DSS_MOD, CM_CLKSEL), 887 OMAP_CM_REGADDR(OMAP3430_DSS_MOD, CM_CLKSEL),
852 OMAP3430_CLKSEL_DSS1_SHIFT, OMAP3630_CLKSEL_DSS1_WIDTH, 888 OMAP3430_CLKSEL_DSS1_SHIFT, OMAP3630_CLKSEL_DSS1_WIDTH,
853 CLK_DIVIDER_ONE_BASED, NULL); 889 0, dpll4_mx_ck_div_table, NULL);
854 890
855static struct clk dpll4_m4x2_ck; 891static struct clk dpll4_m4x2_ck;
856 892
@@ -869,7 +905,8 @@ static struct clk_hw_omap dpll4_m4x2_ck_hw = {
869 .clkdm_name = "dpll4_clkdm", 905 .clkdm_name = "dpll4_clkdm",
870}; 906};
871 907
872DEFINE_STRUCT_CLK(dpll4_m4x2_ck, dpll4_m4x2_ck_parent_names, dpll4_m5x2_ck_ops); 908DEFINE_STRUCT_CLK_FLAGS(dpll4_m4x2_ck, dpll4_m4x2_ck_parent_names,
909 dpll4_m5x2_ck_ops, CLK_SET_RATE_PARENT);
873 910
874static struct clk dpll4_m4x2_ck_3630 = { 911static struct clk dpll4_m4x2_ck_3630 = {
875 .name = "dpll4_m4x2_ck", 912 .name = "dpll4_m4x2_ck",
@@ -877,6 +914,7 @@ static struct clk dpll4_m4x2_ck_3630 = {
877 .parent_names = dpll4_m4x2_ck_parent_names, 914 .parent_names = dpll4_m4x2_ck_parent_names,
878 .num_parents = ARRAY_SIZE(dpll4_m4x2_ck_parent_names), 915 .num_parents = ARRAY_SIZE(dpll4_m4x2_ck_parent_names),
879 .ops = &dpll4_m5x2_ck_3630_ops, 916 .ops = &dpll4_m5x2_ck_3630_ops,
917 .flags = CLK_SET_RATE_PARENT,
880}; 918};
881 919
882DEFINE_CLK_DIVIDER(dpll4_m6_ck, "dpll4_ck", &dpll4_ck, 0x0, 920DEFINE_CLK_DIVIDER(dpll4_m6_ck, "dpll4_ck", &dpll4_ck, 0x0,
@@ -968,8 +1006,9 @@ static struct clk_hw_omap dss1_alwon_fck_3430es1_hw = {
968 .clkdm_name = "dss_clkdm", 1006 .clkdm_name = "dss_clkdm",
969}; 1007};
970 1008
971DEFINE_STRUCT_CLK(dss1_alwon_fck_3430es1, dss1_alwon_fck_3430es1_parent_names, 1009DEFINE_STRUCT_CLK_FLAGS(dss1_alwon_fck_3430es1,
972 aes2_ick_ops); 1010 dss1_alwon_fck_3430es1_parent_names, aes2_ick_ops,
1011 CLK_SET_RATE_PARENT);
973 1012
974static struct clk dss1_alwon_fck_3430es2; 1013static struct clk dss1_alwon_fck_3430es2;
975 1014
@@ -983,8 +1022,9 @@ static struct clk_hw_omap dss1_alwon_fck_3430es2_hw = {
983 .clkdm_name = "dss_clkdm", 1022 .clkdm_name = "dss_clkdm",
984}; 1023};
985 1024
986DEFINE_STRUCT_CLK(dss1_alwon_fck_3430es2, dss1_alwon_fck_3430es1_parent_names, 1025DEFINE_STRUCT_CLK_FLAGS(dss1_alwon_fck_3430es2,
987 aes2_ick_ops); 1026 dss1_alwon_fck_3430es1_parent_names, aes2_ick_ops,
1027 CLK_SET_RATE_PARENT);
988 1028
989static struct clk dss2_alwon_fck; 1029static struct clk dss2_alwon_fck;
990 1030
diff --git a/arch/arm/mach-omap2/cclock44xx_data.c b/arch/arm/mach-omap2/cclock44xx_data.c
index b237950eb8a3..ec0dc0b1755e 100644
--- a/arch/arm/mach-omap2/cclock44xx_data.c
+++ b/arch/arm/mach-omap2/cclock44xx_data.c
@@ -830,7 +830,8 @@ DEFINE_CLK_GATE(dss_tv_clk, "extalt_clkin_ck", &extalt_clkin_ck, 0x0,
830 OMAP4430_CM_DSS_DSS_CLKCTRL, 830 OMAP4430_CM_DSS_DSS_CLKCTRL,
831 OMAP4430_OPTFCLKEN_TV_CLK_SHIFT, 0x0, NULL); 831 OMAP4430_OPTFCLKEN_TV_CLK_SHIFT, 0x0, NULL);
832 832
833DEFINE_CLK_GATE(dss_dss_clk, "dpll_per_m5x2_ck", &dpll_per_m5x2_ck, 0x0, 833DEFINE_CLK_GATE(dss_dss_clk, "dpll_per_m5x2_ck", &dpll_per_m5x2_ck,
834 CLK_SET_RATE_PARENT,
834 OMAP4430_CM_DSS_DSS_CLKCTRL, OMAP4430_OPTFCLKEN_DSSCLK_SHIFT, 835 OMAP4430_CM_DSS_DSS_CLKCTRL, OMAP4430_OPTFCLKEN_DSSCLK_SHIFT,
835 0x0, NULL); 836 0x0, NULL);
836 837
diff --git a/arch/arm/mach-omap2/gpmc-smsc911x.c b/arch/arm/mach-omap2/gpmc-smsc911x.c
index ef990118d32b..2757504a13c4 100644
--- a/arch/arm/mach-omap2/gpmc-smsc911x.c
+++ b/arch/arm/mach-omap2/gpmc-smsc911x.c
@@ -83,7 +83,7 @@ void __init gpmc_smsc911x_init(struct omap_smsc911x_platform_data *gpmc_cfg)
83 pdev = platform_device_register_resndata(NULL, "smsc911x", gpmc_cfg->id, 83 pdev = platform_device_register_resndata(NULL, "smsc911x", gpmc_cfg->id,
84 gpmc_smsc911x_resources, ARRAY_SIZE(gpmc_smsc911x_resources), 84 gpmc_smsc911x_resources, ARRAY_SIZE(gpmc_smsc911x_resources),
85 &gpmc_smsc911x_config, sizeof(gpmc_smsc911x_config)); 85 &gpmc_smsc911x_config, sizeof(gpmc_smsc911x_config));
86 if (!pdev) { 86 if (IS_ERR(pdev)) {
87 pr_err("Unable to register platform device\n"); 87 pr_err("Unable to register platform device\n");
88 gpio_free(gpmc_cfg->gpio_reset); 88 gpio_free(gpmc_cfg->gpio_reset);
89 goto free2; 89 goto free2;
diff --git a/arch/arm/mach-omap2/omap_device.c b/arch/arm/mach-omap2/omap_device.c
index b69dd9abb50a..53f0735817bb 100644
--- a/arch/arm/mach-omap2/omap_device.c
+++ b/arch/arm/mach-omap2/omap_device.c
@@ -621,6 +621,7 @@ static int _od_suspend_noirq(struct device *dev)
621 621
622 if (!ret && !pm_runtime_status_suspended(dev)) { 622 if (!ret && !pm_runtime_status_suspended(dev)) {
623 if (pm_generic_runtime_suspend(dev) == 0) { 623 if (pm_generic_runtime_suspend(dev) == 0) {
624 pm_runtime_set_suspended(dev);
624 omap_device_idle(pdev); 625 omap_device_idle(pdev);
625 od->flags |= OMAP_DEVICE_SUSPENDED; 626 od->flags |= OMAP_DEVICE_SUSPENDED;
626 } 627 }
@@ -634,10 +635,18 @@ static int _od_resume_noirq(struct device *dev)
634 struct platform_device *pdev = to_platform_device(dev); 635 struct platform_device *pdev = to_platform_device(dev);
635 struct omap_device *od = to_omap_device(pdev); 636 struct omap_device *od = to_omap_device(pdev);
636 637
637 if ((od->flags & OMAP_DEVICE_SUSPENDED) && 638 if (od->flags & OMAP_DEVICE_SUSPENDED) {
638 !pm_runtime_status_suspended(dev)) {
639 od->flags &= ~OMAP_DEVICE_SUSPENDED; 639 od->flags &= ~OMAP_DEVICE_SUSPENDED;
640 omap_device_enable(pdev); 640 omap_device_enable(pdev);
641 /*
642 * XXX: we run before core runtime pm has resumed itself. At
643 * this point in time, we just restore the runtime pm state and
644 * considering symmetric operations in resume, we donot expect
645 * to fail. If we failed, something changed in core runtime_pm
646 * framework OR some device driver messed things up, hence, WARN
647 */
648 WARN(pm_runtime_set_active(dev),
649 "Could not set %s runtime state active\n", dev_name(dev));
641 pm_generic_runtime_resume(dev); 650 pm_generic_runtime_resume(dev);
642 } 651 }
643 652
diff --git a/arch/arm/mach-omap2/prm44xx_54xx.h b/arch/arm/mach-omap2/prm44xx_54xx.h
index a085d9cc1f5d..7a976065e138 100644
--- a/arch/arm/mach-omap2/prm44xx_54xx.h
+++ b/arch/arm/mach-omap2/prm44xx_54xx.h
@@ -42,7 +42,8 @@ extern u32 omap4_prm_vcvp_read(u8 offset);
42extern void omap4_prm_vcvp_write(u32 val, u8 offset); 42extern void omap4_prm_vcvp_write(u32 val, u8 offset);
43extern u32 omap4_prm_vcvp_rmw(u32 mask, u32 bits, u8 offset); 43extern u32 omap4_prm_vcvp_rmw(u32 mask, u32 bits, u8 offset);
44 44
45#if defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_SOC_OMAP5) 45#if defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_SOC_OMAP5) || \
46 defined(CONFIG_SOC_DRA7XX)
46void omap44xx_prm_reconfigure_io_chain(void); 47void omap44xx_prm_reconfigure_io_chain(void);
47#else 48#else
48static inline void omap44xx_prm_reconfigure_io_chain(void) 49static inline void omap44xx_prm_reconfigure_io_chain(void)
diff --git a/arch/arm/mach-pxa/include/mach/gpio.h b/arch/arm/mach-pxa/include/mach/gpio.h
deleted file mode 100644
index 0248e433bc98..000000000000
--- a/arch/arm/mach-pxa/include/mach/gpio.h
+++ /dev/null
@@ -1,32 +0,0 @@
1/*
2 * arch/arm/mach-pxa/include/mach/gpio.h
3 *
4 * PXA GPIO wrappers for arch-neutral GPIO calls
5 *
6 * Written by Philipp Zabel <philipp.zabel@gmail.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21 *
22 */
23
24#ifndef __ASM_ARCH_PXA_GPIO_H
25#define __ASM_ARCH_PXA_GPIO_H
26
27#include <asm-generic/gpio.h>
28
29#include <mach/irqs.h>
30#include <mach/hardware.h>
31
32#endif
diff --git a/arch/arm/mach-s3c64xx/mach-crag6410.c b/arch/arm/mach-s3c64xx/mach-crag6410.c
index 1a911df9e451..aca7d16e195d 100644
--- a/arch/arm/mach-s3c64xx/mach-crag6410.c
+++ b/arch/arm/mach-s3c64xx/mach-crag6410.c
@@ -310,10 +310,6 @@ static struct regulator_consumer_supply wallvdd_consumers[] = {
310 310
311 REGULATOR_SUPPLY("SPKVDDL", "spi0.1"), 311 REGULATOR_SUPPLY("SPKVDDL", "spi0.1"),
312 REGULATOR_SUPPLY("SPKVDDR", "spi0.1"), 312 REGULATOR_SUPPLY("SPKVDDR", "spi0.1"),
313 REGULATOR_SUPPLY("SPKVDDL", "wm5102-codec"),
314 REGULATOR_SUPPLY("SPKVDDR", "wm5102-codec"),
315 REGULATOR_SUPPLY("SPKVDDL", "wm5110-codec"),
316 REGULATOR_SUPPLY("SPKVDDR", "wm5110-codec"),
317 313
318 REGULATOR_SUPPLY("DC1VDD", "0-0034"), 314 REGULATOR_SUPPLY("DC1VDD", "0-0034"),
319 REGULATOR_SUPPLY("DC2VDD", "0-0034"), 315 REGULATOR_SUPPLY("DC2VDD", "0-0034"),
@@ -653,14 +649,6 @@ static struct regulator_consumer_supply pvdd_1v8_consumers[] = {
653 REGULATOR_SUPPLY("DBVDD3", "spi0.1"), 649 REGULATOR_SUPPLY("DBVDD3", "spi0.1"),
654 REGULATOR_SUPPLY("LDOVDD", "spi0.1"), 650 REGULATOR_SUPPLY("LDOVDD", "spi0.1"),
655 REGULATOR_SUPPLY("CPVDD", "spi0.1"), 651 REGULATOR_SUPPLY("CPVDD", "spi0.1"),
656
657 REGULATOR_SUPPLY("DBVDD2", "wm5102-codec"),
658 REGULATOR_SUPPLY("DBVDD3", "wm5102-codec"),
659 REGULATOR_SUPPLY("CPVDD", "wm5102-codec"),
660
661 REGULATOR_SUPPLY("DBVDD2", "wm5110-codec"),
662 REGULATOR_SUPPLY("DBVDD3", "wm5110-codec"),
663 REGULATOR_SUPPLY("CPVDD", "wm5110-codec"),
664}; 652};
665 653
666static struct regulator_init_data pvdd_1v8 = { 654static struct regulator_init_data pvdd_1v8 = {
diff --git a/arch/arm/mach-u300/timer.c b/arch/arm/mach-u300/timer.c
index b5db207dfd1e..9a5f9fb352ce 100644
--- a/arch/arm/mach-u300/timer.c
+++ b/arch/arm/mach-u300/timer.c
@@ -358,8 +358,7 @@ static struct delay_timer u300_delay_timer;
358 */ 358 */
359static void __init u300_timer_init_of(struct device_node *np) 359static void __init u300_timer_init_of(struct device_node *np)
360{ 360{
361 struct resource irq_res; 361 unsigned int irq;
362 int irq;
363 struct clk *clk; 362 struct clk *clk;
364 unsigned long rate; 363 unsigned long rate;
365 364
@@ -368,11 +367,11 @@ static void __init u300_timer_init_of(struct device_node *np)
368 panic("could not ioremap system timer\n"); 367 panic("could not ioremap system timer\n");
369 368
370 /* Get the IRQ for the GP1 timer */ 369 /* Get the IRQ for the GP1 timer */
371 irq = of_irq_to_resource(np, 2, &irq_res); 370 irq = irq_of_parse_and_map(np, 2);
372 if (irq <= 0) 371 if (!irq)
373 panic("no IRQ for system timer\n"); 372 panic("no IRQ for system timer\n");
374 373
375 pr_info("U300 GP1 timer @ base: %p, IRQ: %d\n", u300_timer_base, irq); 374 pr_info("U300 GP1 timer @ base: %p, IRQ: %u\n", u300_timer_base, irq);
376 375
377 /* Clock the interrupt controller */ 376 /* Clock the interrupt controller */
378 clk = of_clk_get(np, 0); 377 clk = of_clk_get(np, 0);
diff --git a/arch/arm/mach-w90x900/include/mach/gpio.h b/arch/arm/mach-w90x900/include/mach/gpio.h
deleted file mode 100644
index 5385a4203277..000000000000
--- a/arch/arm/mach-w90x900/include/mach/gpio.h
+++ /dev/null
@@ -1,30 +0,0 @@
1/*
2 * linux/arch/arm/mach-w90p910/include/mach/gpio.h
3 *
4 * Generic w90p910 GPIO handling
5 *
6 * Wan ZongShun <mcuos.com@gmail.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13#ifndef __ASM_ARCH_W90P910_GPIO_H
14#define __ASM_ARCH_W90P910_GPIO_H
15
16#include <mach/hardware.h>
17#include <asm/irq.h>
18
19static inline int gpio_to_irq(unsigned gpio)
20{
21 return gpio;
22}
23#define gpio_to_irq gpio_to_irq
24
25static inline int irq_to_gpio(unsigned irq)
26{
27 return irq;
28}
29
30#endif
diff --git a/arch/arm/mach-zynq/Kconfig b/arch/arm/mach-zynq/Kconfig
index 04f8a4a6e755..6b04260aa142 100644
--- a/arch/arm/mach-zynq/Kconfig
+++ b/arch/arm/mach-zynq/Kconfig
@@ -13,5 +13,6 @@ config ARCH_ZYNQ
13 select HAVE_SMP 13 select HAVE_SMP
14 select SPARSE_IRQ 14 select SPARSE_IRQ
15 select CADENCE_TTC_TIMER 15 select CADENCE_TTC_TIMER
16 select ARM_GLOBAL_TIMER
16 help 17 help
17 Support for Xilinx Zynq ARM Cortex A9 Platform 18 Support for Xilinx Zynq ARM Cortex A9 Platform
diff --git a/arch/arm/mm/init.c b/arch/arm/mm/init.c
index 18ec4c504abf..ca907f805c57 100644
--- a/arch/arm/mm/init.c
+++ b/arch/arm/mm/init.c
@@ -76,14 +76,6 @@ static int __init parse_tag_initrd2(const struct tag *tag)
76 76
77__tagtable(ATAG_INITRD2, parse_tag_initrd2); 77__tagtable(ATAG_INITRD2, parse_tag_initrd2);
78 78
79#ifdef CONFIG_OF_FLATTREE
80void __init early_init_dt_setup_initrd_arch(u64 start, u64 end)
81{
82 phys_initrd_start = start;
83 phys_initrd_size = end - start;
84}
85#endif /* CONFIG_OF_FLATTREE */
86
87/* 79/*
88 * This keeps memory configuration data used by a couple memory 80 * This keeps memory configuration data used by a couple memory
89 * initialization functions, as well as show_mem() for the skipping 81 * initialization functions, as well as show_mem() for the skipping
@@ -350,6 +342,11 @@ void __init arm_memblock_init(struct meminfo *mi,
350 memblock_reserve(__pa(_stext), _end - _stext); 342 memblock_reserve(__pa(_stext), _end - _stext);
351#endif 343#endif
352#ifdef CONFIG_BLK_DEV_INITRD 344#ifdef CONFIG_BLK_DEV_INITRD
345 /* FDT scan will populate initrd_start */
346 if (initrd_start) {
347 phys_initrd_start = __virt_to_phys(initrd_start);
348 phys_initrd_size = initrd_end - initrd_start;
349 }
353 if (phys_initrd_size && 350 if (phys_initrd_size &&
354 !memblock_is_region_memory(phys_initrd_start, phys_initrd_size)) { 351 !memblock_is_region_memory(phys_initrd_start, phys_initrd_size)) {
355 pr_err("INITRD: 0x%08llx+0x%08lx is not a memory region - disabling initrd\n", 352 pr_err("INITRD: 0x%08llx+0x%08lx is not a memory region - disabling initrd\n",
diff --git a/arch/arm/plat-iop/Makefile b/arch/arm/plat-iop/Makefile
index a99dc15a70f7..224e56c6049b 100644
--- a/arch/arm/plat-iop/Makefile
+++ b/arch/arm/plat-iop/Makefile
@@ -5,7 +5,6 @@
5obj-y := 5obj-y :=
6 6
7# IOP32X 7# IOP32X
8obj-$(CONFIG_ARCH_IOP32X) += gpio.o
9obj-$(CONFIG_ARCH_IOP32X) += i2c.o 8obj-$(CONFIG_ARCH_IOP32X) += i2c.o
10obj-$(CONFIG_ARCH_IOP32X) += pci.o 9obj-$(CONFIG_ARCH_IOP32X) += pci.o
11obj-$(CONFIG_ARCH_IOP32X) += setup.o 10obj-$(CONFIG_ARCH_IOP32X) += setup.o
@@ -16,7 +15,6 @@ obj-$(CONFIG_ARCH_IOP32X) += pmu.o
16obj-$(CONFIG_ARCH_IOP32X) += restart.o 15obj-$(CONFIG_ARCH_IOP32X) += restart.o
17 16
18# IOP33X 17# IOP33X
19obj-$(CONFIG_ARCH_IOP33X) += gpio.o
20obj-$(CONFIG_ARCH_IOP33X) += i2c.o 18obj-$(CONFIG_ARCH_IOP33X) += i2c.o
21obj-$(CONFIG_ARCH_IOP33X) += pci.o 19obj-$(CONFIG_ARCH_IOP33X) += pci.o
22obj-$(CONFIG_ARCH_IOP33X) += setup.o 20obj-$(CONFIG_ARCH_IOP33X) += setup.o
diff --git a/arch/arm/plat-iop/gpio.c b/arch/arm/plat-iop/gpio.c
deleted file mode 100644
index 697de6dc4936..000000000000
--- a/arch/arm/plat-iop/gpio.c
+++ /dev/null
@@ -1,93 +0,0 @@
1/*
2 * arch/arm/plat-iop/gpio.c
3 * GPIO handling for Intel IOP3xx processors.
4 *
5 * Copyright (C) 2006 Lennert Buytenhek <buytenh@wantstofly.org>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or (at
10 * your option) any later version.
11 */
12
13#include <linux/device.h>
14#include <linux/init.h>
15#include <linux/types.h>
16#include <linux/errno.h>
17#include <linux/gpio.h>
18#include <linux/export.h>
19#include <asm/hardware/iop3xx.h>
20#include <mach/gpio.h>
21
22void gpio_line_config(int line, int direction)
23{
24 unsigned long flags;
25
26 local_irq_save(flags);
27 if (direction == GPIO_IN) {
28 *IOP3XX_GPOE |= 1 << line;
29 } else if (direction == GPIO_OUT) {
30 *IOP3XX_GPOE &= ~(1 << line);
31 }
32 local_irq_restore(flags);
33}
34EXPORT_SYMBOL(gpio_line_config);
35
36int gpio_line_get(int line)
37{
38 return !!(*IOP3XX_GPID & (1 << line));
39}
40EXPORT_SYMBOL(gpio_line_get);
41
42void gpio_line_set(int line, int value)
43{
44 unsigned long flags;
45
46 local_irq_save(flags);
47 if (value == GPIO_LOW) {
48 *IOP3XX_GPOD &= ~(1 << line);
49 } else if (value == GPIO_HIGH) {
50 *IOP3XX_GPOD |= 1 << line;
51 }
52 local_irq_restore(flags);
53}
54EXPORT_SYMBOL(gpio_line_set);
55
56static int iop3xx_gpio_direction_input(struct gpio_chip *chip, unsigned gpio)
57{
58 gpio_line_config(gpio, GPIO_IN);
59 return 0;
60}
61
62static int iop3xx_gpio_direction_output(struct gpio_chip *chip, unsigned gpio, int level)
63{
64 gpio_line_set(gpio, level);
65 gpio_line_config(gpio, GPIO_OUT);
66 return 0;
67}
68
69static int iop3xx_gpio_get_value(struct gpio_chip *chip, unsigned gpio)
70{
71 return gpio_line_get(gpio);
72}
73
74static void iop3xx_gpio_set_value(struct gpio_chip *chip, unsigned gpio, int value)
75{
76 gpio_line_set(gpio, value);
77}
78
79static struct gpio_chip iop3xx_chip = {
80 .label = "iop3xx",
81 .direction_input = iop3xx_gpio_direction_input,
82 .get = iop3xx_gpio_get_value,
83 .direction_output = iop3xx_gpio_direction_output,
84 .set = iop3xx_gpio_set_value,
85 .base = 0,
86 .ngpio = IOP3XX_N_GPIOS,
87};
88
89static int __init iop3xx_gpio_setup(void)
90{
91 return gpiochip_add(&iop3xx_chip);
92}
93arch_initcall(iop3xx_gpio_setup);
diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
index ce6ae9497492..bb0bf1bfc05d 100644
--- a/arch/arm64/Kconfig
+++ b/arch/arm64/Kconfig
@@ -15,6 +15,7 @@ config ARM64
15 select GENERIC_IOMAP 15 select GENERIC_IOMAP
16 select GENERIC_IRQ_PROBE 16 select GENERIC_IRQ_PROBE
17 select GENERIC_IRQ_SHOW 17 select GENERIC_IRQ_SHOW
18 select GENERIC_SCHED_CLOCK
18 select GENERIC_SMP_IDLE_THREAD 19 select GENERIC_SMP_IDLE_THREAD
19 select GENERIC_TIME_VSYSCALL 20 select GENERIC_TIME_VSYSCALL
20 select HARDIRQS_SW_RESEND 21 select HARDIRQS_SW_RESEND
diff --git a/arch/arm64/boot/dts/apm-storm.dtsi b/arch/arm64/boot/dts/apm-storm.dtsi
index bfdc57834929..d37d7369e260 100644
--- a/arch/arm64/boot/dts/apm-storm.dtsi
+++ b/arch/arm64/boot/dts/apm-storm.dtsi
@@ -103,6 +103,81 @@
103 #size-cells = <2>; 103 #size-cells = <2>;
104 ranges; 104 ranges;
105 105
106 clocks {
107 #address-cells = <2>;
108 #size-cells = <2>;
109 ranges;
110 refclk: refclk {
111 compatible = "fixed-clock";
112 #clock-cells = <1>;
113 clock-frequency = <100000000>;
114 clock-output-names = "refclk";
115 };
116
117 pcppll: pcppll@17000100 {
118 compatible = "apm,xgene-pcppll-clock";
119 #clock-cells = <1>;
120 clocks = <&refclk 0>;
121 clock-names = "pcppll";
122 reg = <0x0 0x17000100 0x0 0x1000>;
123 clock-output-names = "pcppll";
124 type = <0>;
125 };
126
127 socpll: socpll@17000120 {
128 compatible = "apm,xgene-socpll-clock";
129 #clock-cells = <1>;
130 clocks = <&refclk 0>;
131 clock-names = "socpll";
132 reg = <0x0 0x17000120 0x0 0x1000>;
133 clock-output-names = "socpll";
134 type = <1>;
135 };
136
137 socplldiv2: socplldiv2 {
138 compatible = "fixed-factor-clock";
139 #clock-cells = <1>;
140 clocks = <&socpll 0>;
141 clock-names = "socplldiv2";
142 clock-mult = <1>;
143 clock-div = <2>;
144 clock-output-names = "socplldiv2";
145 };
146
147 qmlclk: qmlclk {
148 compatible = "apm,xgene-device-clock";
149 #clock-cells = <1>;
150 clocks = <&socplldiv2 0>;
151 clock-names = "qmlclk";
152 reg = <0x0 0x1703C000 0x0 0x1000>;
153 reg-names = "csr-reg";
154 clock-output-names = "qmlclk";
155 };
156
157 ethclk: ethclk {
158 compatible = "apm,xgene-device-clock";
159 #clock-cells = <1>;
160 clocks = <&socplldiv2 0>;
161 clock-names = "ethclk";
162 reg = <0x0 0x17000000 0x0 0x1000>;
163 reg-names = "div-reg";
164 divider-offset = <0x238>;
165 divider-width = <0x9>;
166 divider-shift = <0x0>;
167 clock-output-names = "ethclk";
168 };
169
170 eth8clk: eth8clk {
171 compatible = "apm,xgene-device-clock";
172 #clock-cells = <1>;
173 clocks = <&ethclk 0>;
174 clock-names = "eth8clk";
175 reg = <0x0 0x1702C000 0x0 0x1000>;
176 reg-names = "csr-reg";
177 clock-output-names = "eth8clk";
178 };
179 };
180
106 serial0: serial@1c020000 { 181 serial0: serial@1c020000 {
107 device_type = "serial"; 182 device_type = "serial";
108 compatible = "ns16550"; 183 compatible = "ns16550";
diff --git a/arch/arm64/include/asm/Kbuild b/arch/arm64/include/asm/Kbuild
index 79a642d199f2..519f89f5b6a3 100644
--- a/arch/arm64/include/asm/Kbuild
+++ b/arch/arm64/include/asm/Kbuild
@@ -50,3 +50,4 @@ generic-y += unaligned.h
50generic-y += user.h 50generic-y += user.h
51generic-y += vga.h 51generic-y += vga.h
52generic-y += xor.h 52generic-y += xor.h
53generic-y += preempt.h
diff --git a/arch/arm64/include/asm/arch_timer.h b/arch/arm64/include/asm/arch_timer.h
index c9f1d2816c2b..9400596a0f39 100644
--- a/arch/arm64/include/asm/arch_timer.h
+++ b/arch/arm64/include/asm/arch_timer.h
@@ -92,19 +92,49 @@ static inline u32 arch_timer_get_cntfrq(void)
92 return val; 92 return val;
93} 93}
94 94
95static inline void arch_counter_set_user_access(void) 95static inline u32 arch_timer_get_cntkctl(void)
96{ 96{
97 u32 cntkctl; 97 u32 cntkctl;
98
99 /* Disable user access to the timers and the physical counter. */
100 asm volatile("mrs %0, cntkctl_el1" : "=r" (cntkctl)); 98 asm volatile("mrs %0, cntkctl_el1" : "=r" (cntkctl));
101 cntkctl &= ~((3 << 8) | (1 << 0)); 99 return cntkctl;
100}
102 101
103 /* Enable user access to the virtual counter and frequency. */ 102static inline void arch_timer_set_cntkctl(u32 cntkctl)
104 cntkctl |= (1 << 1); 103{
105 asm volatile("msr cntkctl_el1, %0" : : "r" (cntkctl)); 104 asm volatile("msr cntkctl_el1, %0" : : "r" (cntkctl));
106} 105}
107 106
107static inline void arch_counter_set_user_access(void)
108{
109 u32 cntkctl = arch_timer_get_cntkctl();
110
111 /* Disable user access to the timers and the physical counter */
112 /* Also disable virtual event stream */
113 cntkctl &= ~(ARCH_TIMER_USR_PT_ACCESS_EN
114 | ARCH_TIMER_USR_VT_ACCESS_EN
115 | ARCH_TIMER_VIRT_EVT_EN
116 | ARCH_TIMER_USR_PCT_ACCESS_EN);
117
118 /* Enable user access to the virtual counter */
119 cntkctl |= ARCH_TIMER_USR_VCT_ACCESS_EN;
120
121 arch_timer_set_cntkctl(cntkctl);
122}
123
124static inline void arch_timer_evtstrm_enable(int divider)
125{
126 u32 cntkctl = arch_timer_get_cntkctl();
127 cntkctl &= ~ARCH_TIMER_EVT_TRIGGER_MASK;
128 /* Set the divider and enable virtual event stream */
129 cntkctl |= (divider << ARCH_TIMER_EVT_TRIGGER_SHIFT)
130 | ARCH_TIMER_VIRT_EVT_EN;
131 arch_timer_set_cntkctl(cntkctl);
132 elf_hwcap |= HWCAP_EVTSTRM;
133#ifdef CONFIG_COMPAT
134 compat_elf_hwcap |= COMPAT_HWCAP_EVTSTRM;
135#endif
136}
137
108static inline u64 arch_counter_get_cntvct(void) 138static inline u64 arch_counter_get_cntvct(void)
109{ 139{
110 u64 cval; 140 u64 cval;
diff --git a/arch/arm64/include/asm/hwcap.h b/arch/arm64/include/asm/hwcap.h
index e2950b098e76..6cddbb0c9f54 100644
--- a/arch/arm64/include/asm/hwcap.h
+++ b/arch/arm64/include/asm/hwcap.h
@@ -30,6 +30,7 @@
30#define COMPAT_HWCAP_IDIVA (1 << 17) 30#define COMPAT_HWCAP_IDIVA (1 << 17)
31#define COMPAT_HWCAP_IDIVT (1 << 18) 31#define COMPAT_HWCAP_IDIVT (1 << 18)
32#define COMPAT_HWCAP_IDIV (COMPAT_HWCAP_IDIVA|COMPAT_HWCAP_IDIVT) 32#define COMPAT_HWCAP_IDIV (COMPAT_HWCAP_IDIVA|COMPAT_HWCAP_IDIVT)
33#define COMPAT_HWCAP_EVTSTRM (1 << 21)
33 34
34#ifndef __ASSEMBLY__ 35#ifndef __ASSEMBLY__
35/* 36/*
@@ -37,11 +38,11 @@
37 * instruction set this cpu supports. 38 * instruction set this cpu supports.
38 */ 39 */
39#define ELF_HWCAP (elf_hwcap) 40#define ELF_HWCAP (elf_hwcap)
40#define COMPAT_ELF_HWCAP (COMPAT_HWCAP_HALF|COMPAT_HWCAP_THUMB|\ 41
41 COMPAT_HWCAP_FAST_MULT|COMPAT_HWCAP_EDSP|\ 42#ifdef CONFIG_COMPAT
42 COMPAT_HWCAP_TLS|COMPAT_HWCAP_VFP|\ 43#define COMPAT_ELF_HWCAP (compat_elf_hwcap)
43 COMPAT_HWCAP_VFPv3|COMPAT_HWCAP_VFPv4|\ 44extern unsigned int compat_elf_hwcap;
44 COMPAT_HWCAP_NEON|COMPAT_HWCAP_IDIV) 45#endif
45 46
46extern unsigned long elf_hwcap; 47extern unsigned long elf_hwcap;
47#endif 48#endif
diff --git a/arch/arm64/include/asm/prom.h b/arch/arm64/include/asm/prom.h
deleted file mode 100644
index 68b90e682957..000000000000
--- a/arch/arm64/include/asm/prom.h
+++ /dev/null
@@ -1 +0,0 @@
1/* Empty for now */
diff --git a/arch/arm64/include/uapi/asm/hwcap.h b/arch/arm64/include/uapi/asm/hwcap.h
index eea497578b87..9b12476e9c85 100644
--- a/arch/arm64/include/uapi/asm/hwcap.h
+++ b/arch/arm64/include/uapi/asm/hwcap.h
@@ -21,6 +21,7 @@
21 */ 21 */
22#define HWCAP_FP (1 << 0) 22#define HWCAP_FP (1 << 0)
23#define HWCAP_ASIMD (1 << 1) 23#define HWCAP_ASIMD (1 << 1)
24#define HWCAP_EVTSTRM (1 << 2)
24 25
25 26
26#endif /* _UAPI__ASM_HWCAP_H */ 27#endif /* _UAPI__ASM_HWCAP_H */
diff --git a/arch/arm64/kernel/setup.c b/arch/arm64/kernel/setup.c
index 9cf30f49610d..0bc5e4cbc017 100644
--- a/arch/arm64/kernel/setup.c
+++ b/arch/arm64/kernel/setup.c
@@ -61,6 +61,16 @@ EXPORT_SYMBOL(processor_id);
61unsigned long elf_hwcap __read_mostly; 61unsigned long elf_hwcap __read_mostly;
62EXPORT_SYMBOL_GPL(elf_hwcap); 62EXPORT_SYMBOL_GPL(elf_hwcap);
63 63
64#ifdef CONFIG_COMPAT
65#define COMPAT_ELF_HWCAP_DEFAULT \
66 (COMPAT_HWCAP_HALF|COMPAT_HWCAP_THUMB|\
67 COMPAT_HWCAP_FAST_MULT|COMPAT_HWCAP_EDSP|\
68 COMPAT_HWCAP_TLS|COMPAT_HWCAP_VFP|\
69 COMPAT_HWCAP_VFPv3|COMPAT_HWCAP_VFPv4|\
70 COMPAT_HWCAP_NEON|COMPAT_HWCAP_IDIV)
71unsigned int compat_elf_hwcap __read_mostly = COMPAT_ELF_HWCAP_DEFAULT;
72#endif
73
64static const char *cpu_name; 74static const char *cpu_name;
65static const char *machine_name; 75static const char *machine_name;
66phys_addr_t __fdt_pointer __initdata; 76phys_addr_t __fdt_pointer __initdata;
@@ -130,70 +140,18 @@ static void __init setup_processor(void)
130 140
131static void __init setup_machine_fdt(phys_addr_t dt_phys) 141static void __init setup_machine_fdt(phys_addr_t dt_phys)
132{ 142{
133 struct boot_param_header *devtree; 143 if (!dt_phys || !early_init_dt_scan(phys_to_virt(dt_phys))) {
134 unsigned long dt_root;
135
136 /* Check we have a non-NULL DT pointer */
137 if (!dt_phys) {
138 early_print("\n"
139 "Error: NULL or invalid device tree blob\n"
140 "The dtb must be 8-byte aligned and passed in the first 512MB of memory\n"
141 "\nPlease check your bootloader.\n");
142
143 while (true)
144 cpu_relax();
145
146 }
147
148 devtree = phys_to_virt(dt_phys);
149
150 /* Check device tree validity */
151 if (be32_to_cpu(devtree->magic) != OF_DT_HEADER) {
152 early_print("\n" 144 early_print("\n"
153 "Error: invalid device tree blob at physical address 0x%p (virtual address 0x%p)\n" 145 "Error: invalid device tree blob at physical address 0x%p (virtual address 0x%p)\n"
154 "Expected 0x%x, found 0x%x\n" 146 "The dtb must be 8-byte aligned and passed in the first 512MB of memory\n"
155 "\nPlease check your bootloader.\n", 147 "\nPlease check your bootloader.\n",
156 dt_phys, devtree, OF_DT_HEADER, 148 dt_phys, phys_to_virt(dt_phys));
157 be32_to_cpu(devtree->magic));
158 149
159 while (true) 150 while (true)
160 cpu_relax(); 151 cpu_relax();
161 } 152 }
162 153
163 initial_boot_params = devtree; 154 machine_name = of_flat_dt_get_machine_name();
164 dt_root = of_get_flat_dt_root();
165
166 machine_name = of_get_flat_dt_prop(dt_root, "model", NULL);
167 if (!machine_name)
168 machine_name = of_get_flat_dt_prop(dt_root, "compatible", NULL);
169 if (!machine_name)
170 machine_name = "<unknown>";
171 pr_info("Machine: %s\n", machine_name);
172
173 /* Retrieve various information from the /chosen node */
174 of_scan_flat_dt(early_init_dt_scan_chosen, boot_command_line);
175 /* Initialize {size,address}-cells info */
176 of_scan_flat_dt(early_init_dt_scan_root, NULL);
177 /* Setup memory, calling early_init_dt_add_memory_arch */
178 of_scan_flat_dt(early_init_dt_scan_memory, NULL);
179}
180
181void __init early_init_dt_add_memory_arch(u64 base, u64 size)
182{
183 base &= PAGE_MASK;
184 size &= PAGE_MASK;
185 if (base + size < PHYS_OFFSET) {
186 pr_warning("Ignoring memory block 0x%llx - 0x%llx\n",
187 base, base + size);
188 return;
189 }
190 if (base < PHYS_OFFSET) {
191 pr_warning("Ignoring memory range 0x%llx - 0x%llx\n",
192 base, PHYS_OFFSET);
193 size -= PHYS_OFFSET - base;
194 base = PHYS_OFFSET;
195 }
196 memblock_add(base, size);
197} 155}
198 156
199/* 157/*
@@ -311,6 +269,7 @@ subsys_initcall(topology_init);
311static const char *hwcap_str[] = { 269static const char *hwcap_str[] = {
312 "fp", 270 "fp",
313 "asimd", 271 "asimd",
272 "evtstrm",
314 NULL 273 NULL
315}; 274};
316 275
diff --git a/arch/arm64/kernel/time.c b/arch/arm64/kernel/time.c
index 03dc3718eb13..29c39d5d77e3 100644
--- a/arch/arm64/kernel/time.c
+++ b/arch/arm64/kernel/time.c
@@ -61,13 +61,6 @@ unsigned long profile_pc(struct pt_regs *regs)
61EXPORT_SYMBOL(profile_pc); 61EXPORT_SYMBOL(profile_pc);
62#endif 62#endif
63 63
64static u64 sched_clock_mult __read_mostly;
65
66unsigned long long notrace sched_clock(void)
67{
68 return arch_timer_read_counter() * sched_clock_mult;
69}
70
71void __init time_init(void) 64void __init time_init(void)
72{ 65{
73 u32 arch_timer_rate; 66 u32 arch_timer_rate;
@@ -78,9 +71,6 @@ void __init time_init(void)
78 if (!arch_timer_rate) 71 if (!arch_timer_rate)
79 panic("Unable to initialise architected timer.\n"); 72 panic("Unable to initialise architected timer.\n");
80 73
81 /* Cache the sched_clock multiplier to save a divide in the hot path. */
82 sched_clock_mult = NSEC_PER_SEC / arch_timer_rate;
83
84 /* Calibrate the delay loop directly */ 74 /* Calibrate the delay loop directly */
85 lpj_fine = arch_timer_rate / HZ; 75 lpj_fine = arch_timer_rate / HZ;
86} 76}
diff --git a/arch/arm64/mm/init.c b/arch/arm64/mm/init.c
index de2de5db628d..0cb8742de4f2 100644
--- a/arch/arm64/mm/init.c
+++ b/arch/arm64/mm/init.c
@@ -31,7 +31,6 @@
31#include <linux/sort.h> 31#include <linux/sort.h>
32#include <linux/of_fdt.h> 32#include <linux/of_fdt.h>
33 33
34#include <asm/prom.h>
35#include <asm/sections.h> 34#include <asm/sections.h>
36#include <asm/setup.h> 35#include <asm/setup.h>
37#include <asm/sizes.h> 36#include <asm/sizes.h>
@@ -39,17 +38,9 @@
39 38
40#include "mm.h" 39#include "mm.h"
41 40
42static unsigned long phys_initrd_start __initdata = 0;
43static unsigned long phys_initrd_size __initdata = 0;
44
45phys_addr_t memstart_addr __read_mostly = 0; 41phys_addr_t memstart_addr __read_mostly = 0;
46 42
47void __init early_init_dt_setup_initrd_arch(u64 start, u64 end) 43#ifdef CONFIG_BLK_DEV_INITRD
48{
49 phys_initrd_start = start;
50 phys_initrd_size = end - start;
51}
52
53static int __init early_initrd(char *p) 44static int __init early_initrd(char *p)
54{ 45{
55 unsigned long start, size; 46 unsigned long start, size;
@@ -59,12 +50,13 @@ static int __init early_initrd(char *p)
59 if (*endp == ',') { 50 if (*endp == ',') {
60 size = memparse(endp + 1, NULL); 51 size = memparse(endp + 1, NULL);
61 52
62 phys_initrd_start = start; 53 initrd_start = (unsigned long)__va(start);
63 phys_initrd_size = size; 54 initrd_end = (unsigned long)__va(start + size);
64 } 55 }
65 return 0; 56 return 0;
66} 57}
67early_param("initrd", early_initrd); 58early_param("initrd", early_initrd);
59#endif
68 60
69#define MAX_DMA32_PFN ((4UL * 1024 * 1024 * 1024) >> PAGE_SHIFT) 61#define MAX_DMA32_PFN ((4UL * 1024 * 1024 * 1024) >> PAGE_SHIFT)
70 62
@@ -137,13 +129,8 @@ void __init arm64_memblock_init(void)
137 /* Register the kernel text, kernel data and initrd with memblock */ 129 /* Register the kernel text, kernel data and initrd with memblock */
138 memblock_reserve(__pa(_text), _end - _text); 130 memblock_reserve(__pa(_text), _end - _text);
139#ifdef CONFIG_BLK_DEV_INITRD 131#ifdef CONFIG_BLK_DEV_INITRD
140 if (phys_initrd_size) { 132 if (initrd_start)
141 memblock_reserve(phys_initrd_start, phys_initrd_size); 133 memblock_reserve(__virt_to_phys(initrd_start), initrd_end - initrd_start);
142
143 /* Now convert initrd to virtual addresses */
144 initrd_start = __phys_to_virt(phys_initrd_start);
145 initrd_end = initrd_start + phys_initrd_size;
146 }
147#endif 134#endif
148 135
149 /* 136 /*
diff --git a/arch/avr32/include/asm/Kbuild b/arch/avr32/include/asm/Kbuild
index fd7980743890..658001b52400 100644
--- a/arch/avr32/include/asm/Kbuild
+++ b/arch/avr32/include/asm/Kbuild
@@ -7,6 +7,7 @@ generic-y += div64.h
7generic-y += emergency-restart.h 7generic-y += emergency-restart.h
8generic-y += exec.h 8generic-y += exec.h
9generic-y += futex.h 9generic-y += futex.h
10generic-y += preempt.h
10generic-y += irq_regs.h 11generic-y += irq_regs.h
11generic-y += param.h 12generic-y += param.h
12generic-y += local.h 13generic-y += local.h
diff --git a/arch/blackfin/Kconfig b/arch/blackfin/Kconfig
index f78c9a2c7e28..74314bd8be39 100644
--- a/arch/blackfin/Kconfig
+++ b/arch/blackfin/Kconfig
@@ -52,6 +52,9 @@ config GENERIC_BUG
52config ZONE_DMA 52config ZONE_DMA
53 def_bool y 53 def_bool y
54 54
55config GENERIC_GPIO
56 def_bool y
57
55config FORCE_MAX_ZONEORDER 58config FORCE_MAX_ZONEORDER
56 int 59 int
57 default "14" 60 default "14"
@@ -317,6 +320,14 @@ config BF53x
317 depends on (BF531 || BF532 || BF533 || BF534 || BF536 || BF537) 320 depends on (BF531 || BF532 || BF533 || BF534 || BF536 || BF537)
318 default y 321 default y
319 322
323config GPIO_ADI
324 def_bool y
325 depends on (BF51x || BF52x || BF53x || BF538 || BF539 || BF561)
326
327config PINCTRL
328 def_bool y
329 depends on BF54x || BF60x
330
320config MEM_MT48LC64M4A2FB_7E 331config MEM_MT48LC64M4A2FB_7E
321 bool 332 bool
322 depends on (BFIN533_STAMP) 333 depends on (BFIN533_STAMP)
diff --git a/arch/blackfin/include/asm/Kbuild b/arch/blackfin/include/asm/Kbuild
index 127826f8a375..f2b43474b0e2 100644
--- a/arch/blackfin/include/asm/Kbuild
+++ b/arch/blackfin/include/asm/Kbuild
@@ -44,3 +44,4 @@ generic-y += ucontext.h
44generic-y += unaligned.h 44generic-y += unaligned.h
45generic-y += user.h 45generic-y += user.h
46generic-y += xor.h 46generic-y += xor.h
47generic-y += preempt.h
diff --git a/arch/blackfin/include/asm/gpio.h b/arch/blackfin/include/asm/gpio.h
index 98d0133346b5..99d338ca2ea4 100644
--- a/arch/blackfin/include/asm/gpio.h
+++ b/arch/blackfin/include/asm/gpio.h
@@ -25,8 +25,12 @@
25 25
26#ifndef __ASSEMBLY__ 26#ifndef __ASSEMBLY__
27 27
28#ifndef CONFIG_PINCTRL
29
28#include <linux/compiler.h> 30#include <linux/compiler.h>
29#include <linux/gpio.h> 31#include <asm/blackfin.h>
32#include <asm/portmux.h>
33#include <asm/irq_handler.h>
30 34
31/*********************************************************** 35/***********************************************************
32* 36*
@@ -45,7 +49,6 @@
45* MODIFICATION HISTORY : 49* MODIFICATION HISTORY :
46**************************************************************/ 50**************************************************************/
47 51
48#if !BFIN_GPIO_PINT
49void set_gpio_dir(unsigned, unsigned short); 52void set_gpio_dir(unsigned, unsigned short);
50void set_gpio_inen(unsigned, unsigned short); 53void set_gpio_inen(unsigned, unsigned short);
51void set_gpio_polar(unsigned, unsigned short); 54void set_gpio_polar(unsigned, unsigned short);
@@ -115,7 +118,6 @@ struct gpio_port_t {
115 unsigned short dummy16; 118 unsigned short dummy16;
116 unsigned short inen; 119 unsigned short inen;
117}; 120};
118#endif
119 121
120#ifdef BFIN_SPECIAL_GPIO_BANKS 122#ifdef BFIN_SPECIAL_GPIO_BANKS
121void bfin_special_gpio_free(unsigned gpio); 123void bfin_special_gpio_free(unsigned gpio);
@@ -127,25 +129,21 @@ void bfin_special_gpio_pm_hibernate_suspend(void);
127#endif 129#endif
128 130
129#ifdef CONFIG_PM 131#ifdef CONFIG_PM
130int bfin_pm_standby_ctrl(unsigned ctrl); 132void bfin_gpio_pm_hibernate_restore(void);
133void bfin_gpio_pm_hibernate_suspend(void);
134int bfin_gpio_pm_wakeup_ctrl(unsigned gpio, unsigned ctrl);
135int bfin_gpio_pm_standby_ctrl(unsigned ctrl);
131 136
132static inline int bfin_pm_standby_setup(void) 137static inline int bfin_pm_standby_setup(void)
133{ 138{
134 return bfin_pm_standby_ctrl(1); 139 return bfin_gpio_pm_standby_ctrl(1);
135} 140}
136 141
137static inline void bfin_pm_standby_restore(void) 142static inline void bfin_pm_standby_restore(void)
138{ 143{
139 bfin_pm_standby_ctrl(0); 144 bfin_gpio_pm_standby_ctrl(0);
140} 145}
141 146
142void bfin_gpio_pm_hibernate_restore(void);
143void bfin_gpio_pm_hibernate_suspend(void);
144void bfin_pint_suspend(void);
145void bfin_pint_resume(void);
146
147# if !BFIN_GPIO_PINT
148int gpio_pm_wakeup_ctrl(unsigned gpio, unsigned ctrl);
149 147
150struct gpio_port_s { 148struct gpio_port_s {
151 unsigned short data; 149 unsigned short data;
@@ -161,7 +159,6 @@ struct gpio_port_s {
161 unsigned short reserved; 159 unsigned short reserved;
162 unsigned short mux; 160 unsigned short mux;
163}; 161};
164# endif
165#endif /*CONFIG_PM*/ 162#endif /*CONFIG_PM*/
166 163
167/*********************************************************** 164/***********************************************************
@@ -178,36 +175,29 @@ struct gpio_port_s {
178************************************************************* 175*************************************************************
179* MODIFICATION HISTORY : 176* MODIFICATION HISTORY :
180**************************************************************/ 177**************************************************************/
181
182int bfin_gpio_request(unsigned gpio, const char *label);
183void bfin_gpio_free(unsigned gpio);
184int bfin_gpio_irq_request(unsigned gpio, const char *label); 178int bfin_gpio_irq_request(unsigned gpio, const char *label);
185void bfin_gpio_irq_free(unsigned gpio); 179void bfin_gpio_irq_free(unsigned gpio);
186int bfin_gpio_direction_input(unsigned gpio); 180void bfin_gpio_irq_prepare(unsigned gpio);
187int bfin_gpio_direction_output(unsigned gpio, int value); 181
188int bfin_gpio_get_value(unsigned gpio); 182static inline int irq_to_gpio(unsigned irq)
189void bfin_gpio_set_value(unsigned gpio, int value); 183{
184 return irq - GPIO_IRQ_BASE;
185}
186#endif /* CONFIG_PINCTRL */
190 187
191#include <asm/irq.h> 188#include <asm/irq.h>
192#include <asm/errno.h> 189#include <asm/errno.h>
193 190
194#ifdef CONFIG_GPIOLIB
195#include <asm-generic/gpio.h> /* cansleep wrappers */ 191#include <asm-generic/gpio.h> /* cansleep wrappers */
196 192
197static inline int gpio_get_value(unsigned int gpio) 193static inline int gpio_get_value(unsigned int gpio)
198{ 194{
199 if (gpio < MAX_BLACKFIN_GPIOS) 195 return __gpio_get_value(gpio);
200 return bfin_gpio_get_value(gpio);
201 else
202 return __gpio_get_value(gpio);
203} 196}
204 197
205static inline void gpio_set_value(unsigned int gpio, int value) 198static inline void gpio_set_value(unsigned int gpio, int value)
206{ 199{
207 if (gpio < MAX_BLACKFIN_GPIOS) 200 __gpio_set_value(gpio, value);
208 bfin_gpio_set_value(gpio, value);
209 else
210 __gpio_set_value(gpio, value);
211} 201}
212 202
213static inline int gpio_cansleep(unsigned int gpio) 203static inline int gpio_cansleep(unsigned int gpio)
@@ -219,113 +209,6 @@ static inline int gpio_to_irq(unsigned gpio)
219{ 209{
220 return __gpio_to_irq(gpio); 210 return __gpio_to_irq(gpio);
221} 211}
222
223#else /* !CONFIG_GPIOLIB */
224
225static inline int gpio_request(unsigned gpio, const char *label)
226{
227 return bfin_gpio_request(gpio, label);
228}
229
230static inline void gpio_free(unsigned gpio)
231{
232 return bfin_gpio_free(gpio);
233}
234
235static inline int gpio_direction_input(unsigned gpio)
236{
237 return bfin_gpio_direction_input(gpio);
238}
239
240static inline int gpio_direction_output(unsigned gpio, int value)
241{
242 return bfin_gpio_direction_output(gpio, value);
243}
244
245static inline int gpio_set_debounce(unsigned gpio, unsigned debounce)
246{
247 return -EINVAL;
248}
249
250static inline int gpio_request_one(unsigned gpio, unsigned long flags, const char *label)
251{
252 int err;
253
254 err = bfin_gpio_request(gpio, label);
255 if (err)
256 return err;
257
258 if (flags & GPIOF_DIR_IN)
259 err = bfin_gpio_direction_input(gpio);
260 else
261 err = bfin_gpio_direction_output(gpio,
262 (flags & GPIOF_INIT_HIGH) ? 1 : 0);
263
264 if (err)
265 bfin_gpio_free(gpio);
266
267 return err;
268}
269
270static inline int gpio_request_array(const struct gpio *array, size_t num)
271{
272 int i, err;
273
274 for (i = 0; i < num; i++, array++) {
275 err = gpio_request_one(array->gpio, array->flags, array->label);
276 if (err)
277 goto err_free;
278 }
279 return 0;
280
281err_free:
282 while (i--)
283 bfin_gpio_free((--array)->gpio);
284 return err;
285}
286
287static inline void gpio_free_array(const struct gpio *array, size_t num)
288{
289 while (num--)
290 bfin_gpio_free((array++)->gpio);
291}
292
293static inline int __gpio_get_value(unsigned gpio)
294{
295 return bfin_gpio_get_value(gpio);
296}
297
298static inline void __gpio_set_value(unsigned gpio, int value)
299{
300 return bfin_gpio_set_value(gpio, value);
301}
302
303static inline int gpio_get_value(unsigned gpio)
304{
305 return __gpio_get_value(gpio);
306}
307
308static inline void gpio_set_value(unsigned gpio, int value)
309{
310 return __gpio_set_value(gpio, value);
311}
312
313static inline int gpio_to_irq(unsigned gpio)
314{
315 if (likely(gpio < MAX_BLACKFIN_GPIOS))
316 return gpio + GPIO_IRQ_BASE;
317
318 return -EINVAL;
319}
320
321#include <asm-generic/gpio.h> /* cansleep wrappers */
322#endif /* !CONFIG_GPIOLIB */
323
324static inline int irq_to_gpio(unsigned irq)
325{
326 return (irq - GPIO_IRQ_BASE);
327}
328
329#endif /* __ASSEMBLY__ */ 212#endif /* __ASSEMBLY__ */
330 213
331#endif /* __ARCH_BLACKFIN_GPIO_H__ */ 214#endif /* __ARCH_BLACKFIN_GPIO_H__ */
diff --git a/arch/blackfin/include/asm/portmux.h b/arch/blackfin/include/asm/portmux.h
index 9b1e2c37b324..7aa20436e799 100644
--- a/arch/blackfin/include/asm/portmux.h
+++ b/arch/blackfin/include/asm/portmux.h
@@ -17,14 +17,29 @@
17#define P_MAYSHARE 0x2000 17#define P_MAYSHARE 0x2000
18#define P_DONTCARE 0x1000 18#define P_DONTCARE 0x1000
19 19
20 20#ifdef CONFIG_PINCTRL
21#include <asm/irq_handler.h>
22
23#define gpio_pint_regs bfin_pint_regs
24#define adi_internal_set_wake bfin_internal_set_wake
25
26#define peripheral_request(per, label) 0
27#define peripheral_free(per)
28#define peripheral_request_list(per, label) \
29 (pdev ? (IS_ERR(devm_pinctrl_get_select_default(&pdev->dev)) \
30 ? -EINVAL : 0) : 0)
31#define peripheral_free_list(per)
32#else
21int peripheral_request(unsigned short per, const char *label); 33int peripheral_request(unsigned short per, const char *label);
22void peripheral_free(unsigned short per); 34void peripheral_free(unsigned short per);
23int peripheral_request_list(const unsigned short per[], const char *label); 35int peripheral_request_list(const unsigned short per[], const char *label);
24void peripheral_free_list(const unsigned short per[]); 36void peripheral_free_list(const unsigned short per[]);
37#endif
25 38
26#include <asm/gpio.h> 39#include <linux/err.h>
40#include <linux/pinctrl/pinctrl.h>
27#include <mach/portmux.h> 41#include <mach/portmux.h>
42#include <linux/gpio.h>
28 43
29#ifndef P_SPORT2_TFS 44#ifndef P_SPORT2_TFS
30#define P_SPORT2_TFS P_UNDEF 45#define P_SPORT2_TFS P_UNDEF
diff --git a/arch/blackfin/kernel/Makefile b/arch/blackfin/kernel/Makefile
index 735f24e07425..703dc7cf2ecc 100644
--- a/arch/blackfin/kernel/Makefile
+++ b/arch/blackfin/kernel/Makefile
@@ -7,7 +7,7 @@ extra-y := vmlinux.lds
7obj-y := \ 7obj-y := \
8 entry.o process.o bfin_ksyms.o ptrace.o setup.o signal.o \ 8 entry.o process.o bfin_ksyms.o ptrace.o setup.o signal.o \
9 sys_bfin.o traps.o irqchip.o dma-mapping.o flat.o \ 9 sys_bfin.o traps.o irqchip.o dma-mapping.o flat.o \
10 fixed_code.o reboot.o bfin_gpio.o bfin_dma.o \ 10 fixed_code.o reboot.o bfin_dma.o \
11 exception.o dumpstack.o 11 exception.o dumpstack.o
12 12
13ifeq ($(CONFIG_GENERIC_CLOCKEVENTS),y) 13ifeq ($(CONFIG_GENERIC_CLOCKEVENTS),y)
@@ -16,6 +16,7 @@ else
16 obj-y += time.o 16 obj-y += time.o
17endif 17endif
18 18
19obj-$(CONFIG_GPIO_ADI) += bfin_gpio.o
19obj-$(CONFIG_DYNAMIC_FTRACE) += ftrace.o 20obj-$(CONFIG_DYNAMIC_FTRACE) += ftrace.o
20obj-$(CONFIG_FUNCTION_TRACER) += ftrace-entry.o 21obj-$(CONFIG_FUNCTION_TRACER) += ftrace-entry.o
21obj-$(CONFIG_FUNCTION_GRAPH_TRACER) += ftrace.o 22obj-$(CONFIG_FUNCTION_GRAPH_TRACER) += ftrace.o
diff --git a/arch/blackfin/mach-bf548/include/mach/portmux.h b/arch/blackfin/mach-bf548/include/mach/portmux.h
index e22246202730..d9f8632d7d09 100644
--- a/arch/blackfin/mach-bf548/include/mach/portmux.h
+++ b/arch/blackfin/mach-bf548/include/mach/portmux.h
@@ -7,8 +7,6 @@
7#ifndef _MACH_PORTMUX_H_ 7#ifndef _MACH_PORTMUX_H_
8#define _MACH_PORTMUX_H_ 8#define _MACH_PORTMUX_H_
9 9
10#define MAX_RESOURCES MAX_BLACKFIN_GPIOS
11
12#define P_SPORT2_TFS (P_DEFINED | P_IDENT(GPIO_PA0) | P_FUNCT(0)) 10#define P_SPORT2_TFS (P_DEFINED | P_IDENT(GPIO_PA0) | P_FUNCT(0))
13#define P_SPORT2_DTSEC (P_DEFINED | P_IDENT(GPIO_PA1) | P_FUNCT(0)) 11#define P_SPORT2_DTSEC (P_DEFINED | P_IDENT(GPIO_PA1) | P_FUNCT(0))
14#define P_SPORT2_DTPRI (P_DEFINED | P_IDENT(GPIO_PA2) | P_FUNCT(0)) 12#define P_SPORT2_DTPRI (P_DEFINED | P_IDENT(GPIO_PA2) | P_FUNCT(0))
diff --git a/arch/blackfin/mach-bf609/include/mach/portmux.h b/arch/blackfin/mach-bf609/include/mach/portmux.h
index 2e1a51c25098..fe34191eef0b 100644
--- a/arch/blackfin/mach-bf609/include/mach/portmux.h
+++ b/arch/blackfin/mach-bf609/include/mach/portmux.h
@@ -7,8 +7,6 @@
7#ifndef _MACH_PORTMUX_H_ 7#ifndef _MACH_PORTMUX_H_
8#define _MACH_PORTMUX_H_ 8#define _MACH_PORTMUX_H_
9 9
10#define MAX_RESOURCES MAX_BLACKFIN_GPIOS
11
12/* EMAC RMII Port Mux */ 10/* EMAC RMII Port Mux */
13#define P_MII0_MDC (P_DEFINED | P_IDENT(GPIO_PC6) | P_FUNCT(0)) 11#define P_MII0_MDC (P_DEFINED | P_IDENT(GPIO_PC6) | P_FUNCT(0))
14#define P_MII0_MDIO (P_DEFINED | P_IDENT(GPIO_PC7) | P_FUNCT(0)) 12#define P_MII0_MDIO (P_DEFINED | P_IDENT(GPIO_PC7) | P_FUNCT(0))
diff --git a/arch/c6x/include/asm/Kbuild b/arch/c6x/include/asm/Kbuild
index e49f918531ad..fc0b3c356027 100644
--- a/arch/c6x/include/asm/Kbuild
+++ b/arch/c6x/include/asm/Kbuild
@@ -56,3 +56,4 @@ generic-y += ucontext.h
56generic-y += user.h 56generic-y += user.h
57generic-y += vga.h 57generic-y += vga.h
58generic-y += xor.h 58generic-y += xor.h
59generic-y += preempt.h
diff --git a/arch/c6x/include/asm/prom.h b/arch/c6x/include/asm/prom.h
deleted file mode 100644
index b4ec95f07518..000000000000
--- a/arch/c6x/include/asm/prom.h
+++ /dev/null
@@ -1 +0,0 @@
1/* dummy prom.h; here to make linux/of.h's #includes happy */
diff --git a/arch/c6x/include/asm/setup.h b/arch/c6x/include/asm/setup.h
index ecead15872a6..696804475f55 100644
--- a/arch/c6x/include/asm/setup.h
+++ b/arch/c6x/include/asm/setup.h
@@ -14,8 +14,6 @@
14#include <uapi/asm/setup.h> 14#include <uapi/asm/setup.h>
15 15
16#ifndef __ASSEMBLY__ 16#ifndef __ASSEMBLY__
17extern char c6x_command_line[COMMAND_LINE_SIZE];
18
19extern int c6x_add_memory(phys_addr_t start, unsigned long size); 17extern int c6x_add_memory(phys_addr_t start, unsigned long size);
20 18
21extern unsigned long ram_start; 19extern unsigned long ram_start;
diff --git a/arch/c6x/kernel/devicetree.c b/arch/c6x/kernel/devicetree.c
index 9e15ab9199b2..fa3e5741514e 100644
--- a/arch/c6x/kernel/devicetree.c
+++ b/arch/c6x/kernel/devicetree.c
@@ -10,37 +10,8 @@
10 * 10 *
11 */ 11 */
12#include <linux/init.h> 12#include <linux/init.h>
13#include <linux/of.h>
14#include <linux/of_fdt.h>
15#include <linux/initrd.h>
16#include <linux/memblock.h> 13#include <linux/memblock.h>
17 14
18void __init early_init_devtree(void *params)
19{
20 /* Setup flat device-tree pointer */
21 initial_boot_params = params;
22
23 /* Retrieve various informations from the /chosen node of the
24 * device-tree, including the platform type, initrd location and
25 * size and more ...
26 */
27 of_scan_flat_dt(early_init_dt_scan_chosen, c6x_command_line);
28
29 /* Scan memory nodes and rebuild MEMBLOCKs */
30 of_scan_flat_dt(early_init_dt_scan_root, NULL);
31 of_scan_flat_dt(early_init_dt_scan_memory, NULL);
32}
33
34
35#ifdef CONFIG_BLK_DEV_INITRD
36void __init early_init_dt_setup_initrd_arch(u64 start, u64 end)
37{
38 initrd_start = (unsigned long)__va(start);
39 initrd_end = (unsigned long)__va(end);
40 initrd_below_start_ok = 1;
41}
42#endif
43
44void __init early_init_dt_add_memory_arch(u64 base, u64 size) 15void __init early_init_dt_add_memory_arch(u64 base, u64 size)
45{ 16{
46 c6x_add_memory(base, size); 17 c6x_add_memory(base, size);
diff --git a/arch/c6x/kernel/setup.c b/arch/c6x/kernel/setup.c
index f4e72bd8c103..731db4b9014d 100644
--- a/arch/c6x/kernel/setup.c
+++ b/arch/c6x/kernel/setup.c
@@ -68,13 +68,6 @@ unsigned long ram_end;
68static unsigned long dma_start __initdata; 68static unsigned long dma_start __initdata;
69static unsigned long dma_size __initdata; 69static unsigned long dma_size __initdata;
70 70
71char c6x_command_line[COMMAND_LINE_SIZE];
72
73#if defined(CONFIG_CMDLINE_BOOL)
74static const char default_command_line[COMMAND_LINE_SIZE] __section(.cmdline) =
75 CONFIG_CMDLINE;
76#endif
77
78struct cpuinfo_c6x { 71struct cpuinfo_c6x {
79 const char *cpu_name; 72 const char *cpu_name;
80 const char *cpu_voltage; 73 const char *cpu_voltage;
@@ -294,10 +287,8 @@ notrace void __init machine_init(unsigned long dt_ptr)
294 fdt = dtb; 287 fdt = dtb;
295 288
296 /* Do some early initialization based on the flat device tree */ 289 /* Do some early initialization based on the flat device tree */
297 early_init_devtree(fdt); 290 early_init_dt_scan(fdt);
298 291
299 /* parse_early_param needs a boot_command_line */
300 strlcpy(boot_command_line, c6x_command_line, COMMAND_LINE_SIZE);
301 parse_early_param(); 292 parse_early_param();
302} 293}
303 294
@@ -309,7 +300,7 @@ void __init setup_arch(char **cmdline_p)
309 printk(KERN_INFO "Initializing kernel\n"); 300 printk(KERN_INFO "Initializing kernel\n");
310 301
311 /* Initialize command line */ 302 /* Initialize command line */
312 *cmdline_p = c6x_command_line; 303 *cmdline_p = boot_command_line;
313 304
314 memory_end = ram_end; 305 memory_end = ram_end;
315 memory_end &= ~(PAGE_SIZE - 1); 306 memory_end &= ~(PAGE_SIZE - 1);
diff --git a/arch/c6x/kernel/vmlinux.lds.S b/arch/c6x/kernel/vmlinux.lds.S
index 279d80725128..5a6e141d1641 100644
--- a/arch/c6x/kernel/vmlinux.lds.S
+++ b/arch/c6x/kernel/vmlinux.lds.S
@@ -37,12 +37,6 @@ SECTIONS
37 _vectors_end = .; 37 _vectors_end = .;
38 } 38 }
39 39
40 . = ALIGN(0x1000);
41 .cmdline :
42 {
43 *(.cmdline)
44 }
45
46 /* 40 /*
47 * This section contains data which may be shared with other 41 * This section contains data which may be shared with other
48 * cores. It needs to be a fixed offset from PAGE_OFFSET 42 * cores. It needs to be a fixed offset from PAGE_OFFSET
diff --git a/arch/cris/include/asm/Kbuild b/arch/cris/include/asm/Kbuild
index c8325455520e..b06caf649a95 100644
--- a/arch/cris/include/asm/Kbuild
+++ b/arch/cris/include/asm/Kbuild
@@ -11,3 +11,4 @@ generic-y += module.h
11generic-y += trace_clock.h 11generic-y += trace_clock.h
12generic-y += vga.h 12generic-y += vga.h
13generic-y += xor.h 13generic-y += xor.h
14generic-y += preempt.h
diff --git a/arch/frv/include/asm/Kbuild b/arch/frv/include/asm/Kbuild
index c5d767028306..74742dc6a3da 100644
--- a/arch/frv/include/asm/Kbuild
+++ b/arch/frv/include/asm/Kbuild
@@ -2,3 +2,4 @@
2generic-y += clkdev.h 2generic-y += clkdev.h
3generic-y += exec.h 3generic-y += exec.h
4generic-y += trace_clock.h 4generic-y += trace_clock.h
5generic-y += preempt.h
diff --git a/arch/h8300/Kconfig b/arch/h8300/Kconfig
deleted file mode 100644
index 24b1dc2564f1..000000000000
--- a/arch/h8300/Kconfig
+++ /dev/null
@@ -1,108 +0,0 @@
1config H8300
2 bool
3 default y
4 select HAVE_IDE
5 select GENERIC_ATOMIC64
6 select HAVE_UID16
7 select VIRT_TO_BUS
8 select ARCH_WANT_IPC_PARSE_VERSION
9 select GENERIC_IRQ_SHOW
10 select GENERIC_CPU_DEVICES
11 select MODULES_USE_ELF_RELA
12 select OLD_SIGSUSPEND3
13 select OLD_SIGACTION
14 select HAVE_UNDERSCORE_SYMBOL_PREFIX
15
16config MMU
17 bool
18 default n
19
20config SWAP
21 bool
22 default n
23
24config ZONE_DMA
25 bool
26 default y
27
28config FPU
29 bool
30 default n
31
32config RWSEM_GENERIC_SPINLOCK
33 bool
34 default y
35
36config RWSEM_XCHGADD_ALGORITHM
37 bool
38 default n
39
40config ARCH_HAS_ILOG2_U32
41 bool
42 default n
43
44config ARCH_HAS_ILOG2_U64
45 bool
46 default n
47
48config GENERIC_HWEIGHT
49 bool
50 default y
51
52config GENERIC_CALIBRATE_DELAY
53 bool
54 default y
55
56config GENERIC_BUG
57 bool
58 depends on BUG
59
60config TIME_LOW_RES
61 bool
62 default y
63
64config NO_IOPORT
65 def_bool y
66
67config NO_DMA
68 def_bool y
69
70config ISA
71 bool
72 default y
73
74config PCI
75 bool
76 default n
77
78config HZ
79 int
80 default 100
81
82source "init/Kconfig"
83
84source "kernel/Kconfig.freezer"
85
86source "arch/h8300/Kconfig.cpu"
87
88menu "Executable file formats"
89
90source "fs/Kconfig.binfmt"
91
92endmenu
93
94source "net/Kconfig"
95
96source "drivers/Kconfig"
97
98source "arch/h8300/Kconfig.ide"
99
100source "fs/Kconfig"
101
102source "arch/h8300/Kconfig.debug"
103
104source "security/Kconfig"
105
106source "crypto/Kconfig"
107
108source "lib/Kconfig"
diff --git a/arch/h8300/Kconfig.cpu b/arch/h8300/Kconfig.cpu
deleted file mode 100644
index cdee771460ed..000000000000
--- a/arch/h8300/Kconfig.cpu
+++ /dev/null
@@ -1,171 +0,0 @@
1menu "Processor type and features"
2
3choice
4 prompt "H8/300 platform"
5 default H8300H_GENERIC
6
7config H8300H_GENERIC
8 bool "H8/300H Generic"
9 help
10 H8/300H CPU Generic Hardware Support
11
12config H8300H_AKI3068NET
13 bool "AE-3068/69"
14 select H83068
15 help
16 AKI-H8/3068F / AKI-H8/3069F Flashmicom LAN Board Support
17 More Information. (Japanese Only)
18 <http://akizukidenshi.com/catalog/default.aspx>
19 AE-3068/69 Evaluation Board Support
20 More Information.
21 <http://www.microtronique.com/ae3069lan.htm>
22
23config H8300H_H8MAX
24 bool "H8MAX"
25 select H83068
26 help
27 H8MAX Evaluation Board Support
28 More Information. (Japanese Only)
29 <http://strawberry-linux.com/h8/index.html>
30
31config H8300H_SIM
32 bool "H8/300H Simulator"
33 select H83007
34 help
35 GDB Simulator Support
36 More Information.
37 <http://sourceware.org/sid/>
38
39config H8S_GENERIC
40 bool "H8S Generic"
41 help
42 H8S CPU Generic Hardware Support
43
44config H8S_EDOSK2674
45 bool "EDOSK-2674"
46 select H8S2678
47 help
48 Renesas EDOSK-2674 Evaluation Board Support
49 More Information.
50 <http://www.azpower.com/H8-uClinux/index.html>
51 <http://www.renesas.eu/products/tools/introductory_evaluation_tools/evaluation_development_os_kits/edosk2674r/edosk2674r_software_tools_root.jsp>
52
53config H8S_SIM
54 bool "H8S Simulator"
55 help
56 GDB Simulator Support
57 More Information.
58 <http://sourceware.org/sid/>
59
60endchoice
61
62choice
63 prompt "CPU Selection"
64
65config H83002
66 bool "H8/3001,3002,3003"
67 depends on BROKEN
68 select CPU_H8300H
69
70config H83007
71 bool "H8/3006,3007"
72 select CPU_H8300H
73
74config H83048
75 bool "H8/3044,3045,3046,3047,3048,3052"
76 depends on BROKEN
77 select CPU_H8300H
78
79config H83068
80 bool "H8/3065,3066,3067,3068,3069"
81 select CPU_H8300H
82
83config H8S2678
84 bool "H8S/2670,2673,2674R,2675,2676"
85 select CPU_H8S
86
87endchoice
88
89config CPU_CLOCK
90 int "CPU Clock Frequency (/1KHz)"
91 default "20000"
92 help
93 CPU Clock Frequency divide to 1000
94
95choice
96 prompt "Kernel executes from"
97 ---help---
98 Choose the memory type that the kernel will be running in.
99
100config RAMKERNEL
101 bool "RAM"
102 help
103 The kernel will be resident in RAM when running.
104
105config ROMKERNEL
106 bool "ROM"
107 help
108 The kernel will be resident in FLASH/ROM when running.
109endchoice
110
111
112config CPU_H8300H
113 bool
114 depends on (H83002 || H83007 || H83048 || H83068)
115 default y
116
117config CPU_H8S
118 bool
119 depends on H8S2678
120 default y
121
122choice
123 prompt "Timer"
124config H8300_TIMER8
125 bool "8bit timer (2ch cascade)"
126 depends on (H83007 || H83068 || H8S2678)
127
128config H8300_TIMER16
129 bool "16bit timer"
130 depends on (H83007 || H83068)
131
132config H8300_ITU
133 bool "ITU"
134 depends on (H83002 || H83048)
135
136config H8300_TPU
137 bool "TPU"
138 depends on H8S2678
139endchoice
140
141if H8300_TIMER8
142choice
143 prompt "Timer Channel"
144config H8300_TIMER8_CH0
145 bool "Channel 0"
146config H8300_TIMER8_CH2
147 bool "Channel 2"
148 depends on CPU_H8300H
149endchoice
150endif
151
152config H8300_TIMER16_CH
153 int "16bit timer channel (0 - 2)"
154 depends on H8300_TIMER16
155 range 0 2
156
157config H8300_ITU_CH
158 int "ITU channel"
159 depends on H8300_ITU
160 range 0 4
161
162config H8300_TPU_CH
163 int "TPU channel"
164 depends on H8300_TPU
165 range 0 4
166
167source "kernel/Kconfig.preempt"
168
169source "mm/Kconfig"
170
171endmenu
diff --git a/arch/h8300/Kconfig.debug b/arch/h8300/Kconfig.debug
deleted file mode 100644
index e8d1b236ad8c..000000000000
--- a/arch/h8300/Kconfig.debug
+++ /dev/null
@@ -1,68 +0,0 @@
1menu "Kernel hacking"
2
3source "lib/Kconfig.debug"
4
5config FULLDEBUG
6 bool "Full Symbolic/Source Debugging support"
7 help
8 Enable debugging symbols on kernel build.
9
10config HIGHPROFILE
11 bool "Use fast second timer for profiling"
12 help
13 Use a fast secondary clock to produce profiling information.
14
15config NO_KERNEL_MSG
16 bool "Suppress Kernel BUG Messages"
17 help
18 Do not output any debug BUG messages within the kernel.
19
20config GDB_MAGICPRINT
21 bool "Message Output for GDB MagicPrint service"
22 depends on (H8300H_SIM || H8S_SIM)
23 help
24 kernel messages output using MagicPrint service from GDB
25
26config SYSCALL_PRINT
27 bool "SystemCall trace print"
28 help
29 output history of systemcall
30
31config GDB_DEBUG
32 bool "Use gdb stub"
33 depends on (!H8300H_SIM && !H8S_SIM)
34 help
35 gdb stub exception support
36
37config SH_STANDARD_BIOS
38 bool "Use gdb protocol serial console"
39 depends on (!H8300H_SIM && !H8S_SIM)
40 help
41 serial console output using GDB protocol.
42 Require eCos/RedBoot
43
44config DEFAULT_CMDLINE
45 bool "Use builtin commandline"
46 default n
47 help
48 builtin kernel commandline enabled.
49
50config KERNEL_COMMAND
51 string "Buildin command string"
52 depends on DEFAULT_CMDLINE
53 help
54 builtin kernel commandline strings.
55
56config BLKDEV_RESERVE
57 bool "BLKDEV Reserved Memory"
58 default n
59 help
60 Reserved BLKDEV area.
61
62config BLKDEV_RESERVE_ADDRESS
63 hex 'start address'
64 depends on BLKDEV_RESERVE
65 help
66 BLKDEV start address.
67
68endmenu
diff --git a/arch/h8300/Kconfig.ide b/arch/h8300/Kconfig.ide
deleted file mode 100644
index a38a63054ac2..000000000000
--- a/arch/h8300/Kconfig.ide
+++ /dev/null
@@ -1,44 +0,0 @@
1# uClinux H8/300 Target Board Selection Menu (IDE)
2
3if (H8300H_AKI3068NET)
4menu "IDE Extra configuration"
5
6config H8300_IDE_BASE
7 hex "IDE register base address"
8 depends on IDE
9 default 0
10 help
11 IDE registers base address
12
13config H8300_IDE_ALT
14 hex "IDE register alternate address"
15 depends on IDE
16 default 0
17 help
18 IDE alternate registers address
19
20config H8300_IDE_IRQ
21 int "IDE IRQ no"
22 depends on IDE
23 default 0
24 help
25 IDE use IRQ no
26endmenu
27endif
28
29if (H8300H_H8MAX)
30config H8300_IDE_BASE
31 hex
32 depends on IDE
33 default 0x200000
34
35config H8300_IDE_ALT
36 hex
37 depends on IDE
38 default 0x60000c
39
40config H8300_IDE_IRQ
41 int
42 depends on IDE
43 default 5
44endif
diff --git a/arch/h8300/Makefile b/arch/h8300/Makefile
deleted file mode 100644
index a556447877b4..000000000000
--- a/arch/h8300/Makefile
+++ /dev/null
@@ -1,71 +0,0 @@
1#
2# arch/h8300/Makefile
3#
4# This file is subject to the terms and conditions of the GNU General Public
5# License. See the file "COPYING" in the main directory of this archive
6# for more details.
7#
8# (C) Copyright 2002,2003 Yoshinori Sato <ysato@users.sourceforge.jp>
9#
10
11platform-$(CONFIG_CPU_H8300H) := h8300h
12platform-$(CONFIG_CPU_H8S) := h8s
13PLATFORM := $(platform-y)
14
15board-$(CONFIG_H8300H_GENERIC) := generic
16board-$(CONFIG_H8300H_AKI3068NET) := aki3068net
17board-$(CONFIG_H8300H_H8MAX) := h8max
18board-$(CONFIG_H8300H_SIM) := generic
19board-$(CONFIG_H8S_GENERIC) := generic
20board-$(CONFIG_H8S_EDOSK2674) := edosk2674
21board-$(CONFIG_H8S_SIM) := generic
22BOARD := $(board-y)
23
24model-$(CONFIG_RAMKERNEL) := ram
25model-$(CONFIG_ROMKERNEL) := rom
26MODEL := $(model-y)
27
28cflags-$(CONFIG_CPU_H8300H) := -mh
29ldflags-$(CONFIG_CPU_H8300H) := -mh8300helf
30cflags-$(CONFIG_CPU_H8S) := -ms
31ldflags-$(CONFIG_CPU_H8S) := -mh8300self
32
33KBUILD_CFLAGS += $(cflags-y)
34KBUILD_CFLAGS += -mint32 -fno-builtin
35KBUILD_CFLAGS += -g
36KBUILD_CFLAGS += -D__linux__
37KBUILD_CFLAGS += -DUTS_SYSNAME=\"uClinux\"
38KBUILD_AFLAGS += -DPLATFORM=$(PLATFORM) -DMODEL=$(MODEL) $(cflags-y)
39LDFLAGS += $(ldflags-y)
40
41CROSS_COMPILE = h8300-elf-
42LIBGCC := $(shell $(CROSS-COMPILE)$(CC) $(KBUILD_CFLAGS) -print-libgcc-file-name)
43
44head-y := arch/$(ARCH)/platform/$(PLATFORM)/$(BOARD)/crt0_$(MODEL).o
45
46core-y += arch/$(ARCH)/kernel/ \
47 arch/$(ARCH)/mm/
48ifdef PLATFORM
49core-y += arch/$(ARCH)/platform/$(PLATFORM)/ \
50 arch/$(ARCH)/platform/$(PLATFORM)/$(BOARD)/
51endif
52
53libs-y += arch/$(ARCH)/lib/ $(LIBGCC)
54
55boot := arch/h8300/boot
56
57export MODEL PLATFORM BOARD
58
59archmrproper:
60
61archclean:
62 $(Q)$(MAKE) $(clean)=$(boot)
63
64vmlinux.srec vmlinux.bin zImage: vmlinux
65 $(Q)$(MAKE) $(build)=$(boot) $(boot)/$@
66
67define archhelp
68 @echo 'vmlinux.bin - Create raw binary'
69 @echo 'vmlinux.srec - Create srec binary'
70 @echo 'zImage - Compressed kernel image'
71endef
diff --git a/arch/h8300/README b/arch/h8300/README
deleted file mode 100644
index efa805fda19b..000000000000
--- a/arch/h8300/README
+++ /dev/null
@@ -1,38 +0,0 @@
1linux-2.6 for H8/300 README
2Yoshinori Sato <ysato@users.sourceforge.jp>
3
4* Supported CPU
5H8/300H and H8S
6
7* Supported Target
81.simulator of GDB
9 require patches.
10
112.AE 3068/AE 3069
12 more information
13 MICROTRONIQUE <http://www.microtronique.com/>
14 Akizuki Denshi Tsusho Ltd. <http://akizukidenshi.com/> (Japanese Only)
15
163.H8MAX
17 see http://ip-sol.jp/h8max/ (Japanese Only)
18
194.EDOSK2674
20 see http://www.eu.renesas.com/products/mpumcu/tool/edk/support/edosk2674.html
21 http://www.uclinux.org/pub/uClinux/ports/h8/HITACHI-EDOSK2674-HOWTO
22 http://www.azpower.com/H8-uClinux/
23
24* Toolchain Version
25gcc-3.1 or higher and patch
26see arch/h8300/tools_patch/README
27binutils-2.12 or higher
28gdb-5.2 or higher
29The environment that can compile a h8300-elf binary is necessary.
30
31* Userland Develop environment
32used h8300-elf toolchains.
33see http://www.uclinux.org/pub/uClinux/ports/h8/
34
35* A few words of thanks
36Porting to H8/300 serieses is support of Information-technology Promotion Agency, Japan.
37I thank support.
38and All developer/user.
diff --git a/arch/h8300/boot/Makefile b/arch/h8300/boot/Makefile
deleted file mode 100644
index 0bb62e064eea..000000000000
--- a/arch/h8300/boot/Makefile
+++ /dev/null
@@ -1,22 +0,0 @@
1# arch/h8300/boot/Makefile
2
3targets := vmlinux.srec vmlinux.bin zImage
4subdir- := compressed
5
6OBJCOPYFLAGS_vmlinux.srec := -Osrec
7OBJCOPYFLAGS_vmlinux.bin := -Obinary
8OBJCOPYFLAGS_zImage := -O binary -R .note -R .comment -R .stab -R .stabstr -S
9
10$(obj)/vmlinux.srec $(obj)/vmlinux.bin: vmlinux FORCE
11 $(call if_changed,objcopy)
12 @echo ' Kernel: $@ is ready'
13
14$(obj)/zImage: $(obj)/compressed/vmlinux FORCE
15 $(call if_changed,objcopy)
16 @echo 'Kernel: $@ is ready'
17
18$(obj)/compressed/vmlinux: FORCE
19 $(Q)$(MAKE) $(build)=$(obj)/compressed $@
20
21CLEAN_FILES += arch/$(ARCH)/vmlinux.bin arch/$(ARCH)/vmlinux.srec
22
diff --git a/arch/h8300/boot/compressed/Makefile b/arch/h8300/boot/compressed/Makefile
deleted file mode 100644
index a6c98fe3bbc3..000000000000
--- a/arch/h8300/boot/compressed/Makefile
+++ /dev/null
@@ -1,37 +0,0 @@
1#
2# linux/arch/sh/boot/compressed/Makefile
3#
4# create a compressed vmlinux image from the original vmlinux
5#
6
7targets := vmlinux vmlinux.bin vmlinux.bin.gz head.o misc.o piggy.o
8asflags-y := -traditional
9
10OBJECTS = $(obj)/head.o $(obj)/misc.o
11
12#
13# IMAGE_OFFSET is the load offset of the compression loader
14# Assign dummy values if these 2 variables are not defined,
15# in order to suppress error message.
16#
17CONFIG_MEMORY_START ?= 0x00400000
18CONFIG_BOOT_LINK_OFFSET ?= 0x00140000
19IMAGE_OFFSET := $(shell printf "0x%08x" $$(($(CONFIG_MEMORY_START)+$(CONFIG_BOOT_LINK_OFFSET))))
20
21LDFLAGS_vmlinux := -Ttext $(IMAGE_OFFSET) -estartup $(obj)/vmlinux.lds
22
23$(obj)/vmlinux: $(OBJECTS) $(obj)/piggy.o FORCE
24 $(call if_changed,ld)
25 @:
26
27$(obj)/vmlinux.bin: vmlinux FORCE
28 $(call if_changed,objcopy)
29
30$(obj)/vmlinux.bin.gz: $(obj)/vmlinux.bin FORCE
31 $(call if_changed,gzip)
32
33LDFLAGS_piggy.o := -r --format binary --oformat elf32-h8300 -T
34OBJCOPYFLAGS := -O binary
35
36$(obj)/piggy.o: $(obj)/vmlinux.scr $(obj)/vmlinux.bin.gz FORCE
37 $(call if_changed,ld)
diff --git a/arch/h8300/boot/compressed/head.S b/arch/h8300/boot/compressed/head.S
deleted file mode 100644
index 10e9a2d1cc6c..000000000000
--- a/arch/h8300/boot/compressed/head.S
+++ /dev/null
@@ -1,47 +0,0 @@
1/*
2 * linux/arch/h8300/boot/compressed/head.S
3 *
4 * Copyright (C) 2006 Yoshinori Sato
5 */
6
7 .h8300h
8#include <linux/linkage.h>
9
10#define SRAM_START 0xff4000
11
12 .section .text..startup
13 .global startup
14startup:
15 mov.l #SRAM_START+0x8000, sp
16 mov.l #__sbss, er0
17 mov.l #__ebss, er1
18 sub.l er0, er1
19 shlr er1
20 shlr er1
21 sub.l er2, er2
221:
23 mov.l er2, @er0
24 adds #4, er0
25 dec.l #1, er1
26 bne 1b
27 jsr @_decompress_kernel
28 jmp @0x400000
29
30 .align 9
31fake_headers_as_bzImage:
32 .word 0
33 .ascii "HdrS" ; header signature
34 .word 0x0202 ; header version number (>= 0x0105)
35 ; or else old loadlin-1.5 will fail)
36 .word 0 ; default_switch
37 .word 0 ; SETUPSEG
38 .word 0x1000
39 .word 0 ; pointing to kernel version string
40 .byte 0 ; = 0, old one (LILO, Loadlin,
41 ; 0xTV: T=0 for LILO
42 ; V = version
43 .byte 1 ; Load flags bzImage=1
44 .word 0x8000 ; size to move, when setup is not
45 .long 0x100000 ; 0x100000 = default for big kernel
46 .long 0 ; address of loaded ramdisk image
47 .long 0 ; its size in bytes
diff --git a/arch/h8300/boot/compressed/misc.c b/arch/h8300/boot/compressed/misc.c
deleted file mode 100644
index 4a1e3dd43948..000000000000
--- a/arch/h8300/boot/compressed/misc.c
+++ /dev/null
@@ -1,180 +0,0 @@
1/*
2 * arch/h8300/boot/compressed/misc.c
3 *
4 * This is a collection of several routines from gzip-1.0.3
5 * adapted for Linux.
6 *
7 * malloc by Hannu Savolainen 1993 and Matthias Urlichs 1994
8 *
9 * Adapted for h8300 by Yoshinori Sato 2006
10 */
11
12#include <asm/uaccess.h>
13
14/*
15 * gzip declarations
16 */
17
18#define OF(args) args
19#define STATIC static
20
21#undef memset
22#undef memcpy
23#define memzero(s, n) memset ((s), 0, (n))
24
25typedef unsigned char uch;
26typedef unsigned short ush;
27typedef unsigned long ulg;
28
29#define WSIZE 0x8000 /* Window size must be at least 32k, */
30 /* and a power of two */
31
32static uch *inbuf; /* input buffer */
33static uch window[WSIZE]; /* Sliding window buffer */
34
35static unsigned insize = 0; /* valid bytes in inbuf */
36static unsigned inptr = 0; /* index of next byte to be processed in inbuf */
37static unsigned outcnt = 0; /* bytes in output buffer */
38
39/* gzip flag byte */
40#define ASCII_FLAG 0x01 /* bit 0 set: file probably ASCII text */
41#define CONTINUATION 0x02 /* bit 1 set: continuation of multi-part gzip file */
42#define EXTRA_FIELD 0x04 /* bit 2 set: extra field present */
43#define ORIG_NAME 0x08 /* bit 3 set: original file name present */
44#define COMMENT 0x10 /* bit 4 set: file comment present */
45#define ENCRYPTED 0x20 /* bit 5 set: file is encrypted */
46#define RESERVED 0xC0 /* bit 6,7: reserved */
47
48#define get_byte() (inptr < insize ? inbuf[inptr++] : fill_inbuf())
49
50/* Diagnostic functions */
51#ifdef DEBUG
52# define Assert(cond,msg) {if(!(cond)) error(msg);}
53# define Trace(x) fprintf x
54# define Tracev(x) {if (verbose) fprintf x ;}
55# define Tracevv(x) {if (verbose>1) fprintf x ;}
56# define Tracec(c,x) {if (verbose && (c)) fprintf x ;}
57# define Tracecv(c,x) {if (verbose>1 && (c)) fprintf x ;}
58#else
59# define Assert(cond,msg)
60# define Trace(x)
61# define Tracev(x)
62# define Tracevv(x)
63# define Tracec(c,x)
64# define Tracecv(c,x)
65#endif
66
67static int fill_inbuf(void);
68static void flush_window(void);
69static void error(char *m);
70
71extern char input_data[];
72extern int input_len;
73
74static long bytes_out = 0;
75static uch *output_data;
76static unsigned long output_ptr = 0;
77
78static void error(char *m);
79
80int puts(const char *);
81
82extern int _end;
83static unsigned long free_mem_ptr;
84static unsigned long free_mem_end_ptr;
85
86#define HEAP_SIZE 0x10000
87
88#include "../../../../lib/inflate.c"
89
90#define SCR *((volatile unsigned char *)0xffff8a)
91#define TDR *((volatile unsigned char *)0xffff8b)
92#define SSR *((volatile unsigned char *)0xffff8c)
93
94int puts(const char *s)
95{
96 return 0;
97}
98
99void* memset(void* s, int c, size_t n)
100{
101 int i;
102 char *ss = (char*)s;
103
104 for (i=0;i<n;i++) ss[i] = c;
105 return s;
106}
107
108void* memcpy(void* __dest, __const void* __src,
109 size_t __n)
110{
111 int i;
112 char *d = (char *)__dest, *s = (char *)__src;
113
114 for (i=0;i<__n;i++) d[i] = s[i];
115 return __dest;
116}
117
118/* ===========================================================================
119 * Fill the input buffer. This is called only when the buffer is empty
120 * and at least one byte is really needed.
121 */
122static int fill_inbuf(void)
123{
124 if (insize != 0) {
125 error("ran out of input data");
126 }
127
128 inbuf = input_data;
129 insize = input_len;
130 inptr = 1;
131 return inbuf[0];
132}
133
134/* ===========================================================================
135 * Write the output window window[0..outcnt-1] and update crc and bytes_out.
136 * (Used for the decompressed data only.)
137 */
138static void flush_window(void)
139{
140 ulg c = crc; /* temporary variable */
141 unsigned n;
142 uch *in, *out, ch;
143
144 in = window;
145 out = &output_data[output_ptr];
146 for (n = 0; n < outcnt; n++) {
147 ch = *out++ = *in++;
148 c = crc_32_tab[((int)c ^ ch) & 0xff] ^ (c >> 8);
149 }
150 crc = c;
151 bytes_out += (ulg)outcnt;
152 output_ptr += (ulg)outcnt;
153 outcnt = 0;
154}
155
156static void error(char *x)
157{
158 puts("\n\n");
159 puts(x);
160 puts("\n\n -- System halted");
161
162 while(1); /* Halt */
163}
164
165#define STACK_SIZE (4096)
166long user_stack [STACK_SIZE];
167long* stack_start = &user_stack[STACK_SIZE];
168
169void decompress_kernel(void)
170{
171 output_data = 0;
172 output_ptr = (unsigned long)0x400000;
173 free_mem_ptr = (unsigned long)&_end;
174 free_mem_end_ptr = free_mem_ptr + HEAP_SIZE;
175
176 makecrc();
177 puts("Uncompressing Linux... ");
178 gunzip();
179 puts("Ok, booting the kernel.\n");
180}
diff --git a/arch/h8300/boot/compressed/vmlinux.lds b/arch/h8300/boot/compressed/vmlinux.lds
deleted file mode 100644
index a0a3a0ed54ef..000000000000
--- a/arch/h8300/boot/compressed/vmlinux.lds
+++ /dev/null
@@ -1,32 +0,0 @@
1SECTIONS
2{
3 .text :
4 {
5 __stext = . ;
6 __text = .;
7 *(.text..startup)
8 *(.text)
9 __etext = . ;
10 }
11
12 .rodata :
13 {
14 *(.rodata)
15 }
16 .data :
17
18 {
19 __sdata = . ;
20 ___data_start = . ;
21 *(.data.*)
22 }
23 .bss :
24 {
25 . = ALIGN(0x4) ;
26 __sbss = . ;
27 *(.bss*)
28 . = ALIGN(0x4) ;
29 __ebss = . ;
30 __end = . ;
31 }
32}
diff --git a/arch/h8300/boot/compressed/vmlinux.scr b/arch/h8300/boot/compressed/vmlinux.scr
deleted file mode 100644
index a0f6962736e9..000000000000
--- a/arch/h8300/boot/compressed/vmlinux.scr
+++ /dev/null
@@ -1,9 +0,0 @@
1SECTIONS
2{
3 .data : {
4 _input_len = .;
5 LONG(_input_data_end - _input_data) _input_data = .;
6 *(.data)
7 _input_data_end = .;
8 }
9}
diff --git a/arch/h8300/defconfig b/arch/h8300/defconfig
deleted file mode 100644
index 042425a02645..000000000000
--- a/arch/h8300/defconfig
+++ /dev/null
@@ -1,42 +0,0 @@
1CONFIG_EXPERIMENTAL=y
2# CONFIG_LOCALVERSION_AUTO is not set
3CONFIG_LOG_BUF_SHIFT=14
4CONFIG_EXPERT=y
5# CONFIG_UID16 is not set
6# CONFIG_SYSCTL_SYSCALL is not set
7# CONFIG_KALLSYMS is not set
8# CONFIG_HOTPLUG is not set
9# CONFIG_BASE_FULL is not set
10# CONFIG_FUTEX is not set
11# CONFIG_EPOLL is not set
12# CONFIG_SIGNALFD is not set
13# CONFIG_TIMERFD is not set
14# CONFIG_EVENTFD is not set
15# CONFIG_VM_EVENT_COUNTERS is not set
16# CONFIG_COMPAT_BRK is not set
17CONFIG_SLOB=y
18# CONFIG_BLK_DEV_BSG is not set
19# CONFIG_IOSCHED_DEADLINE is not set
20# CONFIG_IOSCHED_CFQ is not set
21CONFIG_H83007=y
22CONFIG_BINFMT_FLAT=y
23CONFIG_BINFMT_ZFLAT=y
24CONFIG_BINFMT_MISC=y
25# CONFIG_PREVENT_FIRMWARE_BUILD is not set
26CONFIG_MTD=y
27CONFIG_MTD_PARTITIONS=y
28CONFIG_MTD_REDBOOT_PARTS=y
29CONFIG_MTD_CHAR=y
30CONFIG_MTD_RAM=y
31CONFIG_MTD_ROM=y
32CONFIG_MTD_UCLINUX=y
33# CONFIG_BLK_DEV is not set
34# CONFIG_INPUT is not set
35# CONFIG_SERIO is not set
36# CONFIG_HWMON is not set
37# CONFIG_USB_SUPPORT is not set
38# CONFIG_DNOTIFY is not set
39CONFIG_ROMFS_FS=y
40# CONFIG_ENABLE_WARN_DEPRECATED is not set
41# CONFIG_ENABLE_MUST_CHECK is not set
42# CONFIG_CRC32 is not set
diff --git a/arch/h8300/include/asm/Kbuild b/arch/h8300/include/asm/Kbuild
deleted file mode 100644
index 8ada3cf0c98d..000000000000
--- a/arch/h8300/include/asm/Kbuild
+++ /dev/null
@@ -1,8 +0,0 @@
1
2generic-y += clkdev.h
3generic-y += exec.h
4generic-y += linkage.h
5generic-y += mmu.h
6generic-y += module.h
7generic-y += trace_clock.h
8generic-y += xor.h
diff --git a/arch/h8300/include/asm/asm-offsets.h b/arch/h8300/include/asm/asm-offsets.h
deleted file mode 100644
index d370ee36a182..000000000000
--- a/arch/h8300/include/asm/asm-offsets.h
+++ /dev/null
@@ -1 +0,0 @@
1#include <generated/asm-offsets.h>
diff --git a/arch/h8300/include/asm/atomic.h b/arch/h8300/include/asm/atomic.h
deleted file mode 100644
index 40901e353c21..000000000000
--- a/arch/h8300/include/asm/atomic.h
+++ /dev/null
@@ -1,146 +0,0 @@
1#ifndef __ARCH_H8300_ATOMIC__
2#define __ARCH_H8300_ATOMIC__
3
4#include <linux/types.h>
5#include <asm/cmpxchg.h>
6
7/*
8 * Atomic operations that C can't guarantee us. Useful for
9 * resource counting etc..
10 */
11
12#define ATOMIC_INIT(i) { (i) }
13
14#define atomic_read(v) (*(volatile int *)&(v)->counter)
15#define atomic_set(v, i) (((v)->counter) = i)
16
17#include <linux/kernel.h>
18
19static __inline__ int atomic_add_return(int i, atomic_t *v)
20{
21 unsigned long flags;
22 int ret;
23 local_irq_save(flags);
24 ret = v->counter += i;
25 local_irq_restore(flags);
26 return ret;
27}
28
29#define atomic_add(i, v) atomic_add_return(i, v)
30#define atomic_add_negative(a, v) (atomic_add_return((a), (v)) < 0)
31
32static __inline__ int atomic_sub_return(int i, atomic_t *v)
33{
34 unsigned long flags;
35 int ret;
36 local_irq_save(flags);
37 ret = v->counter -= i;
38 local_irq_restore(flags);
39 return ret;
40}
41
42#define atomic_sub(i, v) atomic_sub_return(i, v)
43#define atomic_sub_and_test(i,v) (atomic_sub_return(i, v) == 0)
44
45static __inline__ int atomic_inc_return(atomic_t *v)
46{
47 unsigned long flags;
48 int ret;
49 local_irq_save(flags);
50 v->counter++;
51 ret = v->counter;
52 local_irq_restore(flags);
53 return ret;
54}
55
56#define atomic_inc(v) atomic_inc_return(v)
57
58/*
59 * atomic_inc_and_test - increment and test
60 * @v: pointer of type atomic_t
61 *
62 * Atomically increments @v by 1
63 * and returns true if the result is zero, or false for all
64 * other cases.
65 */
66#define atomic_inc_and_test(v) (atomic_inc_return(v) == 0)
67
68static __inline__ int atomic_dec_return(atomic_t *v)
69{
70 unsigned long flags;
71 int ret;
72 local_irq_save(flags);
73 --v->counter;
74 ret = v->counter;
75 local_irq_restore(flags);
76 return ret;
77}
78
79#define atomic_dec(v) atomic_dec_return(v)
80
81static __inline__ int atomic_dec_and_test(atomic_t *v)
82{
83 unsigned long flags;
84 int ret;
85 local_irq_save(flags);
86 --v->counter;
87 ret = v->counter;
88 local_irq_restore(flags);
89 return ret == 0;
90}
91
92static inline int atomic_cmpxchg(atomic_t *v, int old, int new)
93{
94 int ret;
95 unsigned long flags;
96
97 local_irq_save(flags);
98 ret = v->counter;
99 if (likely(ret == old))
100 v->counter = new;
101 local_irq_restore(flags);
102 return ret;
103}
104
105static inline int __atomic_add_unless(atomic_t *v, int a, int u)
106{
107 int ret;
108 unsigned long flags;
109
110 local_irq_save(flags);
111 ret = v->counter;
112 if (ret != u)
113 v->counter += a;
114 local_irq_restore(flags);
115 return ret;
116}
117
118static __inline__ void atomic_clear_mask(unsigned long mask, unsigned long *v)
119{
120 __asm__ __volatile__("stc ccr,r1l\n\t"
121 "orc #0x80,ccr\n\t"
122 "mov.l %0,er0\n\t"
123 "and.l %1,er0\n\t"
124 "mov.l er0,%0\n\t"
125 "ldc r1l,ccr"
126 : "=m" (*v) : "g" (~(mask)) :"er0","er1");
127}
128
129static __inline__ void atomic_set_mask(unsigned long mask, unsigned long *v)
130{
131 __asm__ __volatile__("stc ccr,r1l\n\t"
132 "orc #0x80,ccr\n\t"
133 "mov.l %0,er0\n\t"
134 "or.l %1,er0\n\t"
135 "mov.l er0,%0\n\t"
136 "ldc r1l,ccr"
137 : "=m" (*v) : "g" (mask) :"er0","er1");
138}
139
140/* Atomic operations are already serializing */
141#define smp_mb__before_atomic_dec() barrier()
142#define smp_mb__after_atomic_dec() barrier()
143#define smp_mb__before_atomic_inc() barrier()
144#define smp_mb__after_atomic_inc() barrier()
145
146#endif /* __ARCH_H8300_ATOMIC __ */
diff --git a/arch/h8300/include/asm/barrier.h b/arch/h8300/include/asm/barrier.h
deleted file mode 100644
index 9e0aa9fc195d..000000000000
--- a/arch/h8300/include/asm/barrier.h
+++ /dev/null
@@ -1,29 +0,0 @@
1#ifndef _H8300_BARRIER_H
2#define _H8300_BARRIER_H
3
4#define nop() asm volatile ("nop"::)
5
6/*
7 * Force strict CPU ordering.
8 * Not really required on H8...
9 */
10#define mb() asm volatile ("" : : :"memory")
11#define rmb() asm volatile ("" : : :"memory")
12#define wmb() asm volatile ("" : : :"memory")
13#define set_mb(var, value) do { xchg(&var, value); } while (0)
14
15#define read_barrier_depends() do { } while (0)
16
17#ifdef CONFIG_SMP
18#define smp_mb() mb()
19#define smp_rmb() rmb()
20#define smp_wmb() wmb()
21#define smp_read_barrier_depends() read_barrier_depends()
22#else
23#define smp_mb() barrier()
24#define smp_rmb() barrier()
25#define smp_wmb() barrier()
26#define smp_read_barrier_depends() do { } while(0)
27#endif
28
29#endif /* _H8300_BARRIER_H */
diff --git a/arch/h8300/include/asm/bitops.h b/arch/h8300/include/asm/bitops.h
deleted file mode 100644
index eb34e0cd33d5..000000000000
--- a/arch/h8300/include/asm/bitops.h
+++ /dev/null
@@ -1,211 +0,0 @@
1#ifndef _H8300_BITOPS_H
2#define _H8300_BITOPS_H
3
4/*
5 * Copyright 1992, Linus Torvalds.
6 * Copyright 2002, Yoshinori Sato
7 */
8
9#include <linux/compiler.h>
10
11#ifdef __KERNEL__
12
13#ifndef _LINUX_BITOPS_H
14#error only <linux/bitops.h> can be included directly
15#endif
16
17/*
18 * Function prototypes to keep gcc -Wall happy
19 */
20
21/*
22 * ffz = Find First Zero in word. Undefined if no zero exists,
23 * so code should check against ~0UL first..
24 */
25static __inline__ unsigned long ffz(unsigned long word)
26{
27 unsigned long result;
28
29 result = -1;
30 __asm__("1:\n\t"
31 "shlr.l %2\n\t"
32 "adds #1,%0\n\t"
33 "bcs 1b"
34 : "=r" (result)
35 : "0" (result),"r" (word));
36 return result;
37}
38
39#define H8300_GEN_BITOP_CONST(OP,BIT) \
40 case BIT: \
41 __asm__(OP " #" #BIT ",@%0"::"r"(b_addr):"memory"); \
42 break;
43
44#define H8300_GEN_BITOP(FNAME,OP) \
45static __inline__ void FNAME(int nr, volatile unsigned long* addr) \
46{ \
47 volatile unsigned char *b_addr; \
48 b_addr = (volatile unsigned char *)addr + ((nr >> 3) ^ 3); \
49 if (__builtin_constant_p(nr)) { \
50 switch(nr & 7) { \
51 H8300_GEN_BITOP_CONST(OP,0) \
52 H8300_GEN_BITOP_CONST(OP,1) \
53 H8300_GEN_BITOP_CONST(OP,2) \
54 H8300_GEN_BITOP_CONST(OP,3) \
55 H8300_GEN_BITOP_CONST(OP,4) \
56 H8300_GEN_BITOP_CONST(OP,5) \
57 H8300_GEN_BITOP_CONST(OP,6) \
58 H8300_GEN_BITOP_CONST(OP,7) \
59 } \
60 } else { \
61 __asm__(OP " %w0,@%1"::"r"(nr),"r"(b_addr):"memory"); \
62 } \
63}
64
65/*
66 * clear_bit() doesn't provide any barrier for the compiler.
67 */
68#define smp_mb__before_clear_bit() barrier()
69#define smp_mb__after_clear_bit() barrier()
70
71H8300_GEN_BITOP(set_bit ,"bset")
72H8300_GEN_BITOP(clear_bit ,"bclr")
73H8300_GEN_BITOP(change_bit,"bnot")
74#define __set_bit(nr,addr) set_bit((nr),(addr))
75#define __clear_bit(nr,addr) clear_bit((nr),(addr))
76#define __change_bit(nr,addr) change_bit((nr),(addr))
77
78#undef H8300_GEN_BITOP
79#undef H8300_GEN_BITOP_CONST
80
81static __inline__ int test_bit(int nr, const unsigned long* addr)
82{
83 return (*((volatile unsigned char *)addr +
84 ((nr >> 3) ^ 3)) & (1UL << (nr & 7))) != 0;
85}
86
87#define __test_bit(nr, addr) test_bit(nr, addr)
88
89#define H8300_GEN_TEST_BITOP_CONST_INT(OP,BIT) \
90 case BIT: \
91 __asm__("stc ccr,%w1\n\t" \
92 "orc #0x80,ccr\n\t" \
93 "bld #" #BIT ",@%4\n\t" \
94 OP " #" #BIT ",@%4\n\t" \
95 "rotxl.l %0\n\t" \
96 "ldc %w1,ccr" \
97 : "=r"(retval),"=&r"(ccrsave),"=m"(*b_addr) \
98 : "0" (retval),"r" (b_addr) \
99 : "memory"); \
100 break;
101
102#define H8300_GEN_TEST_BITOP_CONST(OP,BIT) \
103 case BIT: \
104 __asm__("bld #" #BIT ",@%3\n\t" \
105 OP " #" #BIT ",@%3\n\t" \
106 "rotxl.l %0\n\t" \
107 : "=r"(retval),"=m"(*b_addr) \
108 : "0" (retval),"r" (b_addr) \
109 : "memory"); \
110 break;
111
112#define H8300_GEN_TEST_BITOP(FNNAME,OP) \
113static __inline__ int FNNAME(int nr, volatile void * addr) \
114{ \
115 int retval = 0; \
116 char ccrsave; \
117 volatile unsigned char *b_addr; \
118 b_addr = (volatile unsigned char *)addr + ((nr >> 3) ^ 3); \
119 if (__builtin_constant_p(nr)) { \
120 switch(nr & 7) { \
121 H8300_GEN_TEST_BITOP_CONST_INT(OP,0) \
122 H8300_GEN_TEST_BITOP_CONST_INT(OP,1) \
123 H8300_GEN_TEST_BITOP_CONST_INT(OP,2) \
124 H8300_GEN_TEST_BITOP_CONST_INT(OP,3) \
125 H8300_GEN_TEST_BITOP_CONST_INT(OP,4) \
126 H8300_GEN_TEST_BITOP_CONST_INT(OP,5) \
127 H8300_GEN_TEST_BITOP_CONST_INT(OP,6) \
128 H8300_GEN_TEST_BITOP_CONST_INT(OP,7) \
129 } \
130 } else { \
131 __asm__("stc ccr,%w1\n\t" \
132 "orc #0x80,ccr\n\t" \
133 "btst %w5,@%4\n\t" \
134 OP " %w5,@%4\n\t" \
135 "beq 1f\n\t" \
136 "inc.l #1,%0\n" \
137 "1:\n\t" \
138 "ldc %w1,ccr" \
139 : "=r"(retval),"=&r"(ccrsave),"=m"(*b_addr) \
140 : "0" (retval),"r" (b_addr),"r"(nr) \
141 : "memory"); \
142 } \
143 return retval; \
144} \
145 \
146static __inline__ int __ ## FNNAME(int nr, volatile void * addr) \
147{ \
148 int retval = 0; \
149 volatile unsigned char *b_addr; \
150 b_addr = (volatile unsigned char *)addr + ((nr >> 3) ^ 3); \
151 if (__builtin_constant_p(nr)) { \
152 switch(nr & 7) { \
153 H8300_GEN_TEST_BITOP_CONST(OP,0) \
154 H8300_GEN_TEST_BITOP_CONST(OP,1) \
155 H8300_GEN_TEST_BITOP_CONST(OP,2) \
156 H8300_GEN_TEST_BITOP_CONST(OP,3) \
157 H8300_GEN_TEST_BITOP_CONST(OP,4) \
158 H8300_GEN_TEST_BITOP_CONST(OP,5) \
159 H8300_GEN_TEST_BITOP_CONST(OP,6) \
160 H8300_GEN_TEST_BITOP_CONST(OP,7) \
161 } \
162 } else { \
163 __asm__("btst %w4,@%3\n\t" \
164 OP " %w4,@%3\n\t" \
165 "beq 1f\n\t" \
166 "inc.l #1,%0\n" \
167 "1:" \
168 : "=r"(retval),"=m"(*b_addr) \
169 : "0" (retval),"r" (b_addr),"r"(nr) \
170 : "memory"); \
171 } \
172 return retval; \
173}
174
175H8300_GEN_TEST_BITOP(test_and_set_bit, "bset")
176H8300_GEN_TEST_BITOP(test_and_clear_bit, "bclr")
177H8300_GEN_TEST_BITOP(test_and_change_bit,"bnot")
178#undef H8300_GEN_TEST_BITOP_CONST
179#undef H8300_GEN_TEST_BITOP_CONST_INT
180#undef H8300_GEN_TEST_BITOP
181
182#include <asm-generic/bitops/ffs.h>
183
184static __inline__ unsigned long __ffs(unsigned long word)
185{
186 unsigned long result;
187
188 result = -1;
189 __asm__("1:\n\t"
190 "shlr.l %2\n\t"
191 "adds #1,%0\n\t"
192 "bcc 1b"
193 : "=r" (result)
194 : "0"(result),"r"(word));
195 return result;
196}
197
198#include <asm-generic/bitops/find.h>
199#include <asm-generic/bitops/sched.h>
200#include <asm-generic/bitops/hweight.h>
201#include <asm-generic/bitops/lock.h>
202#include <asm-generic/bitops/le.h>
203#include <asm-generic/bitops/ext2-atomic.h>
204
205#endif /* __KERNEL__ */
206
207#include <asm-generic/bitops/fls.h>
208#include <asm-generic/bitops/__fls.h>
209#include <asm-generic/bitops/fls64.h>
210
211#endif /* _H8300_BITOPS_H */
diff --git a/arch/h8300/include/asm/bootinfo.h b/arch/h8300/include/asm/bootinfo.h
deleted file mode 100644
index 5bed7e7aac0a..000000000000
--- a/arch/h8300/include/asm/bootinfo.h
+++ /dev/null
@@ -1,2 +0,0 @@
1
2/* Nothing for h8300 */
diff --git a/arch/h8300/include/asm/bug.h b/arch/h8300/include/asm/bug.h
deleted file mode 100644
index 1e1be8119935..000000000000
--- a/arch/h8300/include/asm/bug.h
+++ /dev/null
@@ -1,12 +0,0 @@
1#ifndef _H8300_BUG_H
2#define _H8300_BUG_H
3
4/* always true */
5#define is_valid_bugaddr(addr) (1)
6
7#include <asm-generic/bug.h>
8
9struct pt_regs;
10extern void die(const char *str, struct pt_regs *fp, unsigned long err);
11
12#endif
diff --git a/arch/h8300/include/asm/bugs.h b/arch/h8300/include/asm/bugs.h
deleted file mode 100644
index 1cb4afba6eb1..000000000000
--- a/arch/h8300/include/asm/bugs.h
+++ /dev/null
@@ -1,16 +0,0 @@
1/*
2 * include/asm-h8300/bugs.h
3 *
4 * Copyright (C) 1994 Linus Torvalds
5 */
6
7/*
8 * This is included by init/main.c to check for architecture-dependent bugs.
9 *
10 * Needs:
11 * void check_bugs(void);
12 */
13
14static void check_bugs(void)
15{
16}
diff --git a/arch/h8300/include/asm/cache.h b/arch/h8300/include/asm/cache.h
deleted file mode 100644
index 05887a1d80e5..000000000000
--- a/arch/h8300/include/asm/cache.h
+++ /dev/null
@@ -1,13 +0,0 @@
1#ifndef __ARCH_H8300_CACHE_H
2#define __ARCH_H8300_CACHE_H
3
4/* bytes per L1 cache line */
5#define L1_CACHE_SHIFT 2
6#define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT)
7
8/* m68k-elf-gcc 2.95.2 doesn't like these */
9
10#define __cacheline_aligned
11#define ____cacheline_aligned
12
13#endif
diff --git a/arch/h8300/include/asm/cachectl.h b/arch/h8300/include/asm/cachectl.h
deleted file mode 100644
index c464022d8e26..000000000000
--- a/arch/h8300/include/asm/cachectl.h
+++ /dev/null
@@ -1,14 +0,0 @@
1#ifndef _H8300_CACHECTL_H
2#define _H8300_CACHECTL_H
3
4/* Definitions for the cacheflush system call. */
5
6#define FLUSH_SCOPE_LINE 0 /* Flush a cache line */
7#define FLUSH_SCOPE_PAGE 0 /* Flush a page */
8#define FLUSH_SCOPE_ALL 0 /* Flush the whole cache -- superuser only */
9
10#define FLUSH_CACHE_DATA 0 /* Writeback and flush data cache */
11#define FLUSH_CACHE_INSN 0 /* Flush instruction cache */
12#define FLUSH_CACHE_BOTH 0 /* Flush both caches */
13
14#endif /* _H8300_CACHECTL_H */
diff --git a/arch/h8300/include/asm/cacheflush.h b/arch/h8300/include/asm/cacheflush.h
deleted file mode 100644
index 4cf2df20c1ce..000000000000
--- a/arch/h8300/include/asm/cacheflush.h
+++ /dev/null
@@ -1,40 +0,0 @@
1/*
2 * (C) Copyright 2002, Yoshinori Sato <ysato@users.sourceforge.jp>
3 */
4
5#ifndef _ASM_H8300_CACHEFLUSH_H
6#define _ASM_H8300_CACHEFLUSH_H
7
8/*
9 * Cache handling functions
10 * No Cache memory all dummy functions
11 */
12
13#define flush_cache_all()
14#define flush_cache_mm(mm)
15#define flush_cache_dup_mm(mm) do { } while (0)
16#define flush_cache_range(vma,a,b)
17#define flush_cache_page(vma,p,pfn)
18#define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 0
19#define flush_dcache_page(page)
20#define flush_dcache_mmap_lock(mapping)
21#define flush_dcache_mmap_unlock(mapping)
22#define flush_icache()
23#define flush_icache_page(vma,page)
24#define flush_icache_range(start,len)
25#define flush_cache_vmap(start, end)
26#define flush_cache_vunmap(start, end)
27#define cache_push_v(vaddr,len)
28#define cache_push(paddr,len)
29#define cache_clear(paddr,len)
30
31#define flush_dcache_range(a,b)
32
33#define flush_icache_user_range(vma,page,addr,len)
34
35#define copy_to_user_page(vma, page, vaddr, dst, src, len) \
36 memcpy(dst, src, len)
37#define copy_from_user_page(vma, page, vaddr, dst, src, len) \
38 memcpy(dst, src, len)
39
40#endif /* _ASM_H8300_CACHEFLUSH_H */
diff --git a/arch/h8300/include/asm/checksum.h b/arch/h8300/include/asm/checksum.h
deleted file mode 100644
index 98724e12508c..000000000000
--- a/arch/h8300/include/asm/checksum.h
+++ /dev/null
@@ -1,102 +0,0 @@
1#ifndef _H8300_CHECKSUM_H
2#define _H8300_CHECKSUM_H
3
4/*
5 * computes the checksum of a memory block at buff, length len,
6 * and adds in "sum" (32-bit)
7 *
8 * returns a 32-bit number suitable for feeding into itself
9 * or csum_tcpudp_magic
10 *
11 * this function must be called with even lengths, except
12 * for the last fragment, which may be odd
13 *
14 * it's best to have buff aligned on a 32-bit boundary
15 */
16__wsum csum_partial(const void *buff, int len, __wsum sum);
17
18/*
19 * the same as csum_partial, but copies from src while it
20 * checksums
21 *
22 * here even more important to align src and dst on a 32-bit (or even
23 * better 64-bit) boundary
24 */
25
26__wsum csum_partial_copy_nocheck(const void *src, void *dst, int len, __wsum sum);
27
28
29/*
30 * the same as csum_partial_copy, but copies from user space.
31 *
32 * here even more important to align src and dst on a 32-bit (or even
33 * better 64-bit) boundary
34 */
35
36extern __wsum csum_partial_copy_from_user(const void __user *src, void *dst,
37 int len, __wsum sum, int *csum_err);
38
39__sum16 ip_fast_csum(const void *iph, unsigned int ihl);
40
41
42/*
43 * Fold a partial checksum
44 */
45
46static inline __sum16 csum_fold(__wsum sum)
47{
48 __asm__("mov.l %0,er0\n\t"
49 "add.w e0,r0\n\t"
50 "xor.w e0,e0\n\t"
51 "rotxl.w e0\n\t"
52 "add.w e0,r0\n\t"
53 "sub.w e0,e0\n\t"
54 "mov.l er0,%0"
55 : "=r"(sum)
56 : "0"(sum)
57 : "er0");
58 return (__force __sum16)~sum;
59}
60
61
62/*
63 * computes the checksum of the TCP/UDP pseudo-header
64 * returns a 16-bit checksum, already complemented
65 */
66
67static inline __wsum
68csum_tcpudp_nofold(__be32 saddr, __be32 daddr, unsigned short len,
69 unsigned short proto, __wsum sum)
70{
71 __asm__ ("sub.l er0,er0\n\t"
72 "add.l %2,%0\n\t"
73 "addx #0,r0l\n\t"
74 "add.l %3,%0\n\t"
75 "addx #0,r0l\n\t"
76 "add.l %4,%0\n\t"
77 "addx #0,r0l\n\t"
78 "add.l er0,%0\n\t"
79 "bcc 1f\n\t"
80 "inc.l #1,%0\n"
81 "1:"
82 : "=&r" (sum)
83 : "0" (sum), "r" (daddr), "r" (saddr), "r" (len + proto)
84 :"er0");
85 return sum;
86}
87
88static inline __sum16
89csum_tcpudp_magic(__be32 saddr, __be32 daddr, unsigned short len,
90 unsigned short proto, __wsum sum)
91{
92 return csum_fold(csum_tcpudp_nofold(saddr,daddr,len,proto,sum));
93}
94
95/*
96 * this routine is used for miscellaneous IP-like checksums, mainly
97 * in icmp.c
98 */
99
100extern __sum16 ip_compute_csum(const void *buff, int len);
101
102#endif /* _H8300_CHECKSUM_H */
diff --git a/arch/h8300/include/asm/cmpxchg.h b/arch/h8300/include/asm/cmpxchg.h
deleted file mode 100644
index cdb203ef681f..000000000000
--- a/arch/h8300/include/asm/cmpxchg.h
+++ /dev/null
@@ -1,60 +0,0 @@
1#ifndef __ARCH_H8300_CMPXCHG__
2#define __ARCH_H8300_CMPXCHG__
3
4#include <linux/irqflags.h>
5
6#define xchg(ptr,x) ((__typeof__(*(ptr)))__xchg((unsigned long)(x),(ptr),sizeof(*(ptr))))
7
8struct __xchg_dummy { unsigned long a[100]; };
9#define __xg(x) ((volatile struct __xchg_dummy *)(x))
10
11static inline unsigned long __xchg(unsigned long x, volatile void * ptr, int size)
12{
13 unsigned long tmp, flags;
14
15 local_irq_save(flags);
16
17 switch (size) {
18 case 1:
19 __asm__ __volatile__
20 ("mov.b %2,%0\n\t"
21 "mov.b %1,%2"
22 : "=&r" (tmp) : "r" (x), "m" (*__xg(ptr)) : "memory");
23 break;
24 case 2:
25 __asm__ __volatile__
26 ("mov.w %2,%0\n\t"
27 "mov.w %1,%2"
28 : "=&r" (tmp) : "r" (x), "m" (*__xg(ptr)) : "memory");
29 break;
30 case 4:
31 __asm__ __volatile__
32 ("mov.l %2,%0\n\t"
33 "mov.l %1,%2"
34 : "=&r" (tmp) : "r" (x), "m" (*__xg(ptr)) : "memory");
35 break;
36 default:
37 tmp = 0;
38 }
39 local_irq_restore(flags);
40 return tmp;
41}
42
43#include <asm-generic/cmpxchg-local.h>
44
45/*
46 * cmpxchg_local and cmpxchg64_local are atomic wrt current CPU. Always make
47 * them available.
48 */
49#define cmpxchg_local(ptr, o, n) \
50 ((__typeof__(*(ptr)))__cmpxchg_local_generic((ptr), (unsigned long)(o),\
51 (unsigned long)(n), sizeof(*(ptr))))
52#define cmpxchg64_local(ptr, o, n) __cmpxchg64_local_generic((ptr), (o), (n))
53
54#ifndef CONFIG_SMP
55#include <asm-generic/cmpxchg.h>
56#endif
57
58#define atomic_xchg(v, new) (xchg(&((v)->counter), new))
59
60#endif /* __ARCH_H8300_CMPXCHG__ */
diff --git a/arch/h8300/include/asm/cputime.h b/arch/h8300/include/asm/cputime.h
deleted file mode 100644
index 092e187c7b08..000000000000
--- a/arch/h8300/include/asm/cputime.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef __H8300_CPUTIME_H
2#define __H8300_CPUTIME_H
3
4#include <asm-generic/cputime.h>
5
6#endif /* __H8300_CPUTIME_H */
diff --git a/arch/h8300/include/asm/current.h b/arch/h8300/include/asm/current.h
deleted file mode 100644
index 57d74ee55a14..000000000000
--- a/arch/h8300/include/asm/current.h
+++ /dev/null
@@ -1,25 +0,0 @@
1#ifndef _H8300_CURRENT_H
2#define _H8300_CURRENT_H
3/*
4 * current.h
5 * (C) Copyright 2000, Lineo, David McCullough <davidm@lineo.com>
6 * (C) Copyright 2002, Greg Ungerer (gerg@snapgear.com)
7 *
8 * rather than dedicate a register (as the m68k source does), we
9 * just keep a global, we should probably just change it all to be
10 * current and lose _current_task.
11 */
12
13#include <linux/thread_info.h>
14#include <asm/thread_info.h>
15
16struct task_struct;
17
18static inline struct task_struct *get_current(void)
19{
20 return(current_thread_info()->task);
21}
22
23#define current get_current()
24
25#endif /* _H8300_CURRENT_H */
diff --git a/arch/h8300/include/asm/dbg.h b/arch/h8300/include/asm/dbg.h
deleted file mode 100644
index 2c6d1cbcf736..000000000000
--- a/arch/h8300/include/asm/dbg.h
+++ /dev/null
@@ -1,2 +0,0 @@
1#define DEBUG 1
2#define BREAK asm volatile ("trap #3")
diff --git a/arch/h8300/include/asm/delay.h b/arch/h8300/include/asm/delay.h
deleted file mode 100644
index 743beba70f82..000000000000
--- a/arch/h8300/include/asm/delay.h
+++ /dev/null
@@ -1,38 +0,0 @@
1#ifndef _H8300_DELAY_H
2#define _H8300_DELAY_H
3
4#include <asm/param.h>
5
6/*
7 * Copyright (C) 2002 Yoshinori Sato <ysato@sourceforge.jp>
8 *
9 * Delay routines, using a pre-computed "loops_per_second" value.
10 */
11
12static inline void __delay(unsigned long loops)
13{
14 __asm__ __volatile__ ("1:\n\t"
15 "dec.l #1,%0\n\t"
16 "bne 1b"
17 :"=r" (loops):"0"(loops));
18}
19
20/*
21 * Use only for very small delays ( < 1 msec). Should probably use a
22 * lookup table, really, as the multiplications take much too long with
23 * short delays. This is a "reasonable" implementation, though (and the
24 * first constant multiplications gets optimized away if the delay is
25 * a constant)
26 */
27
28extern unsigned long loops_per_jiffy;
29
30static inline void udelay(unsigned long usecs)
31{
32 usecs *= 4295; /* 2**32 / 1000000 */
33 usecs /= (loops_per_jiffy*HZ);
34 if (usecs)
35 __delay(usecs);
36}
37
38#endif /* _H8300_DELAY_H */
diff --git a/arch/h8300/include/asm/device.h b/arch/h8300/include/asm/device.h
deleted file mode 100644
index d8f9872b0e2d..000000000000
--- a/arch/h8300/include/asm/device.h
+++ /dev/null
@@ -1,7 +0,0 @@
1/*
2 * Arch specific extensions to struct device
3 *
4 * This file is released under the GPLv2
5 */
6#include <asm-generic/device.h>
7
diff --git a/arch/h8300/include/asm/div64.h b/arch/h8300/include/asm/div64.h
deleted file mode 100644
index 6cd978cefb28..000000000000
--- a/arch/h8300/include/asm/div64.h
+++ /dev/null
@@ -1 +0,0 @@
1#include <asm-generic/div64.h>
diff --git a/arch/h8300/include/asm/dma.h b/arch/h8300/include/asm/dma.h
deleted file mode 100644
index 3edbaaaedf5b..000000000000
--- a/arch/h8300/include/asm/dma.h
+++ /dev/null
@@ -1,15 +0,0 @@
1#ifndef _H8300_DMA_H
2#define _H8300_DMA_H
3
4
5/*
6 * Set number of channels of DMA on ColdFire for different implementations.
7 */
8#define MAX_DMA_CHANNELS 0
9#define MAX_DMA_ADDRESS PAGE_OFFSET
10
11/* These are in kernel/dma.c: */
12extern int request_dma(unsigned int dmanr, const char *device_id); /* reserve a DMA channel */
13extern void free_dma(unsigned int dmanr); /* release it again */
14
15#endif /* _H8300_DMA_H */
diff --git a/arch/h8300/include/asm/elf.h b/arch/h8300/include/asm/elf.h
deleted file mode 100644
index 6db71248a82f..000000000000
--- a/arch/h8300/include/asm/elf.h
+++ /dev/null
@@ -1,101 +0,0 @@
1#ifndef __ASMH8300_ELF_H
2#define __ASMH8300_ELF_H
3
4/*
5 * ELF register definitions..
6 */
7
8#include <asm/ptrace.h>
9#include <asm/user.h>
10
11typedef unsigned long elf_greg_t;
12
13#define ELF_NGREG (sizeof(struct user_regs_struct) / sizeof(elf_greg_t))
14typedef elf_greg_t elf_gregset_t[ELF_NGREG];
15typedef unsigned long elf_fpregset_t;
16
17/*
18 * This is used to ensure we don't load something for the wrong architecture.
19 */
20#define elf_check_arch(x) ((x)->e_machine == EM_H8_300)
21
22/*
23 * These are used to set parameters in the core dumps.
24 */
25#define ELF_CLASS ELFCLASS32
26#define ELF_DATA ELFDATA2MSB
27#define ELF_ARCH EM_H8_300
28#if defined(__H8300H__)
29#define ELF_CORE_EFLAGS 0x810000
30#endif
31#if defined(__H8300S__)
32#define ELF_CORE_EFLAGS 0x820000
33#endif
34
35#define ELF_PLAT_INIT(_r) _r->er1 = 0
36
37#define ELF_EXEC_PAGESIZE 4096
38
39/* This is the location that an ET_DYN program is loaded if exec'ed. Typical
40 use of this is to invoke "./ld.so someprog" to test out a new version of
41 the loader. We need to make sure that it is out of the way of the program
42 that it will "exec", and that there is sufficient room for the brk. */
43
44#define ELF_ET_DYN_BASE 0xD0000000UL
45
46/* This yields a mask that user programs can use to figure out what
47 instruction set this cpu supports. */
48
49#define ELF_HWCAP (0)
50
51/* This yields a string that ld.so will use to load implementation
52 specific libraries for optimization. This is more specific in
53 intent than poking at uname or /proc/cpuinfo. */
54
55#define ELF_PLATFORM (NULL)
56
57#define R_H8_NONE 0
58#define R_H8_DIR32 1
59#define R_H8_DIR32_28 2
60#define R_H8_DIR32_24 3
61#define R_H8_DIR32_16 4
62#define R_H8_DIR32U 6
63#define R_H8_DIR32U_28 7
64#define R_H8_DIR32U_24 8
65#define R_H8_DIR32U_20 9
66#define R_H8_DIR32U_16 10
67#define R_H8_DIR24 11
68#define R_H8_DIR24_20 12
69#define R_H8_DIR24_16 13
70#define R_H8_DIR24U 14
71#define R_H8_DIR24U_20 15
72#define R_H8_DIR24U_16 16
73#define R_H8_DIR16 17
74#define R_H8_DIR16U 18
75#define R_H8_DIR16S_32 19
76#define R_H8_DIR16S_28 20
77#define R_H8_DIR16S_24 21
78#define R_H8_DIR16S_20 22
79#define R_H8_DIR16S 23
80#define R_H8_DIR8 24
81#define R_H8_DIR8U 25
82#define R_H8_DIR8Z_32 26
83#define R_H8_DIR8Z_28 27
84#define R_H8_DIR8Z_24 28
85#define R_H8_DIR8Z_20 29
86#define R_H8_DIR8Z_16 30
87#define R_H8_PCREL16 31
88#define R_H8_PCREL8 32
89#define R_H8_BPOS 33
90#define R_H8_PCREL32 34
91#define R_H8_GOT32O 35
92#define R_H8_GOT16O 36
93#define R_H8_DIR16A8 59
94#define R_H8_DIR16R8 60
95#define R_H8_DIR24A8 61
96#define R_H8_DIR24R8 62
97#define R_H8_DIR32A16 63
98#define R_H8_ABS32 65
99#define R_H8_ABS32A16 127
100
101#endif
diff --git a/arch/h8300/include/asm/emergency-restart.h b/arch/h8300/include/asm/emergency-restart.h
deleted file mode 100644
index 108d8c48e42e..000000000000
--- a/arch/h8300/include/asm/emergency-restart.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef _ASM_EMERGENCY_RESTART_H
2#define _ASM_EMERGENCY_RESTART_H
3
4#include <asm-generic/emergency-restart.h>
5
6#endif /* _ASM_EMERGENCY_RESTART_H */
diff --git a/arch/h8300/include/asm/fb.h b/arch/h8300/include/asm/fb.h
deleted file mode 100644
index c7df38030992..000000000000
--- a/arch/h8300/include/asm/fb.h
+++ /dev/null
@@ -1,12 +0,0 @@
1#ifndef _ASM_FB_H_
2#define _ASM_FB_H_
3#include <linux/fb.h>
4
5#define fb_pgprotect(...) do {} while (0)
6
7static inline int fb_is_primary_device(struct fb_info *info)
8{
9 return 0;
10}
11
12#endif /* _ASM_FB_H_ */
diff --git a/arch/h8300/include/asm/flat.h b/arch/h8300/include/asm/flat.h
deleted file mode 100644
index bd12b31b90e6..000000000000
--- a/arch/h8300/include/asm/flat.h
+++ /dev/null
@@ -1,26 +0,0 @@
1/*
2 * include/asm-h8300/flat.h -- uClinux flat-format executables
3 */
4
5#ifndef __H8300_FLAT_H__
6#define __H8300_FLAT_H__
7
8#define flat_argvp_envp_on_stack() 1
9#define flat_old_ram_flag(flags) 1
10#define flat_reloc_valid(reloc, size) ((reloc) <= (size))
11#define flat_set_persistent(relval, p) 0
12
13/*
14 * on the H8 a couple of the relocations have an instruction in the
15 * top byte. As there can only be 24bits of address space, we just
16 * always preserve that 8bits at the top, when it isn't an instruction
17 * is is 0 (davidm@snapgear.com)
18 */
19
20#define flat_get_relocate_addr(rel) (rel)
21#define flat_get_addr_from_rp(rp, relval, flags, persistent) \
22 (get_unaligned(rp) & ((flags & FLAT_FLAG_GOTPIC) ? 0xffffffff: 0x00ffffff))
23#define flat_put_addr_at_rp(rp, addr, rel) \
24 put_unaligned (((*(char *)(rp)) << 24) | ((addr) & 0x00ffffff), rp)
25
26#endif /* __H8300_FLAT_H__ */
diff --git a/arch/h8300/include/asm/fpu.h b/arch/h8300/include/asm/fpu.h
deleted file mode 100644
index 4fc416e80bef..000000000000
--- a/arch/h8300/include/asm/fpu.h
+++ /dev/null
@@ -1 +0,0 @@
1/* Nothing do */
diff --git a/arch/h8300/include/asm/ftrace.h b/arch/h8300/include/asm/ftrace.h
deleted file mode 100644
index 40a8c178f10d..000000000000
--- a/arch/h8300/include/asm/ftrace.h
+++ /dev/null
@@ -1 +0,0 @@
1/* empty */
diff --git a/arch/h8300/include/asm/futex.h b/arch/h8300/include/asm/futex.h
deleted file mode 100644
index 6a332a9f099c..000000000000
--- a/arch/h8300/include/asm/futex.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef _ASM_FUTEX_H
2#define _ASM_FUTEX_H
3
4#include <asm-generic/futex.h>
5
6#endif
diff --git a/arch/h8300/include/asm/gpio-internal.h b/arch/h8300/include/asm/gpio-internal.h
deleted file mode 100644
index a714f0c0efbc..000000000000
--- a/arch/h8300/include/asm/gpio-internal.h
+++ /dev/null
@@ -1,52 +0,0 @@
1#ifndef _H8300_GPIO_H
2#define _H8300_GPIO_H
3
4#define H8300_GPIO_P1 0
5#define H8300_GPIO_P2 1
6#define H8300_GPIO_P3 2
7#define H8300_GPIO_P4 3
8#define H8300_GPIO_P5 4
9#define H8300_GPIO_P6 5
10#define H8300_GPIO_P7 6
11#define H8300_GPIO_P8 7
12#define H8300_GPIO_P9 8
13#define H8300_GPIO_PA 9
14#define H8300_GPIO_PB 10
15#define H8300_GPIO_PC 11
16#define H8300_GPIO_PD 12
17#define H8300_GPIO_PE 13
18#define H8300_GPIO_PF 14
19#define H8300_GPIO_PG 15
20#define H8300_GPIO_PH 16
21
22#define H8300_GPIO_B7 0x80
23#define H8300_GPIO_B6 0x40
24#define H8300_GPIO_B5 0x20
25#define H8300_GPIO_B4 0x10
26#define H8300_GPIO_B3 0x08
27#define H8300_GPIO_B2 0x04
28#define H8300_GPIO_B1 0x02
29#define H8300_GPIO_B0 0x01
30
31#define H8300_GPIO_INPUT 0
32#define H8300_GPIO_OUTPUT 1
33
34#define H8300_GPIO_RESERVE(port, bits) \
35 h8300_reserved_gpio(port, bits)
36
37#define H8300_GPIO_FREE(port, bits) \
38 h8300_free_gpio(port, bits)
39
40#define H8300_GPIO_DDR(port, bit, dir) \
41 h8300_set_gpio_dir(((port) << 8) | (bit), dir)
42
43#define H8300_GPIO_GETDIR(port, bit) \
44 h8300_get_gpio_dir(((port) << 8) | (bit))
45
46extern int h8300_reserved_gpio(int port, int bits);
47extern int h8300_free_gpio(int port, int bits);
48extern int h8300_set_gpio_dir(int port_bit, int dir);
49extern int h8300_get_gpio_dir(int port_bit);
50extern int h8300_init_gpio(void);
51
52#endif
diff --git a/arch/h8300/include/asm/hardirq.h b/arch/h8300/include/asm/hardirq.h
deleted file mode 100644
index c2e1aa0f0d14..000000000000
--- a/arch/h8300/include/asm/hardirq.h
+++ /dev/null
@@ -1,19 +0,0 @@
1#ifndef __H8300_HARDIRQ_H
2#define __H8300_HARDIRQ_H
3
4#include <asm/irq.h>
5
6#define HARDIRQ_BITS 8
7
8/*
9 * The hardirq mask has to be large enough to have
10 * space for potentially all IRQ sources in the system
11 * nesting on a single CPU:
12 */
13#if (1 << HARDIRQ_BITS) < NR_IRQS
14# error HARDIRQ_BITS is too low!
15#endif
16
17#include <asm-generic/hardirq.h>
18
19#endif
diff --git a/arch/h8300/include/asm/hw_irq.h b/arch/h8300/include/asm/hw_irq.h
deleted file mode 100644
index d75a5a1119e8..000000000000
--- a/arch/h8300/include/asm/hw_irq.h
+++ /dev/null
@@ -1 +0,0 @@
1/* Do Nothing */
diff --git a/arch/h8300/include/asm/io.h b/arch/h8300/include/asm/io.h
deleted file mode 100644
index c1a8df22080f..000000000000
--- a/arch/h8300/include/asm/io.h
+++ /dev/null
@@ -1,358 +0,0 @@
1#ifndef _H8300_IO_H
2#define _H8300_IO_H
3
4#ifdef __KERNEL__
5
6#include <asm/virtconvert.h>
7
8#if defined(CONFIG_H83007) || defined(CONFIG_H83068)
9#include <asm/regs306x.h>
10#elif defined(CONFIG_H8S2678)
11#include <asm/regs267x.h>
12#else
13#error UNKNOWN CPU TYPE
14#endif
15
16
17/*
18 * These are for ISA/PCI shared memory _only_ and should never be used
19 * on any other type of memory, including Zorro memory. They are meant to
20 * access the bus in the bus byte order which is little-endian!.
21 *
22 * readX/writeX() are used to access memory mapped devices. On some
23 * architectures the memory mapped IO stuff needs to be accessed
24 * differently. On the m68k architecture, we just read/write the
25 * memory location directly.
26 */
27/* ++roman: The assignments to temp. vars avoid that gcc sometimes generates
28 * two accesses to memory, which may be undesirable for some devices.
29 */
30
31/*
32 * swap functions are sometimes needed to interface little-endian hardware
33 */
34
35static inline unsigned short _swapw(volatile unsigned short v)
36{
37#ifndef H8300_IO_NOSWAP
38 unsigned short r;
39 __asm__("xor.b %w0,%x0\n\t"
40 "xor.b %x0,%w0\n\t"
41 "xor.b %w0,%x0"
42 :"=r"(r)
43 :"0"(v));
44 return r;
45#else
46 return v;
47#endif
48}
49
50static inline unsigned long _swapl(volatile unsigned long v)
51{
52#ifndef H8300_IO_NOSWAP
53 unsigned long r;
54 __asm__("xor.b %w0,%x0\n\t"
55 "xor.b %x0,%w0\n\t"
56 "xor.b %w0,%x0\n\t"
57 "xor.w %e0,%f0\n\t"
58 "xor.w %f0,%e0\n\t"
59 "xor.w %e0,%f0\n\t"
60 "xor.b %w0,%x0\n\t"
61 "xor.b %x0,%w0\n\t"
62 "xor.b %w0,%x0"
63 :"=r"(r)
64 :"0"(v));
65 return r;
66#else
67 return v;
68#endif
69}
70
71#define readb(addr) \
72 ({ unsigned char __v = \
73 *(volatile unsigned char *)((unsigned long)(addr) & 0x00ffffff); \
74 __v; })
75#define readw(addr) \
76 ({ unsigned short __v = \
77 *(volatile unsigned short *)((unsigned long)(addr) & 0x00ffffff); \
78 __v; })
79#define readl(addr) \
80 ({ unsigned long __v = \
81 *(volatile unsigned long *)((unsigned long)(addr) & 0x00ffffff); \
82 __v; })
83
84#define writeb(b,addr) (void)((*(volatile unsigned char *) \
85 ((unsigned long)(addr) & 0x00ffffff)) = (b))
86#define writew(b,addr) (void)((*(volatile unsigned short *) \
87 ((unsigned long)(addr) & 0x00ffffff)) = (b))
88#define writel(b,addr) (void)((*(volatile unsigned long *) \
89 ((unsigned long)(addr) & 0x00ffffff)) = (b))
90#define readb_relaxed(addr) readb(addr)
91#define readw_relaxed(addr) readw(addr)
92#define readl_relaxed(addr) readl(addr)
93
94#define __raw_readb readb
95#define __raw_readw readw
96#define __raw_readl readl
97#define __raw_writeb writeb
98#define __raw_writew writew
99#define __raw_writel writel
100
101static inline int h8300_buswidth(unsigned int addr)
102{
103 return (*(volatile unsigned char *)ABWCR & (1 << ((addr >> 21) & 7))) == 0;
104}
105
106static inline void io_outsb(unsigned int addr, const void *buf, int len)
107{
108 volatile unsigned char *ap_b = (volatile unsigned char *) addr;
109 volatile unsigned short *ap_w = (volatile unsigned short *) addr;
110 unsigned char *bp = (unsigned char *) buf;
111
112 if(h8300_buswidth(addr) && (addr & 1)) {
113 while (len--)
114 *ap_w = *bp++;
115 } else {
116 while (len--)
117 *ap_b = *bp++;
118 }
119}
120
121static inline void io_outsw(unsigned int addr, const void *buf, int len)
122{
123 volatile unsigned short *ap = (volatile unsigned short *) addr;
124 unsigned short *bp = (unsigned short *) buf;
125 while (len--)
126 *ap = _swapw(*bp++);
127}
128
129static inline void io_outsl(unsigned int addr, const void *buf, int len)
130{
131 volatile unsigned long *ap = (volatile unsigned long *) addr;
132 unsigned long *bp = (unsigned long *) buf;
133 while (len--)
134 *ap = _swapl(*bp++);
135}
136
137static inline void io_outsw_noswap(unsigned int addr, const void *buf, int len)
138{
139 volatile unsigned short *ap = (volatile unsigned short *) addr;
140 unsigned short *bp = (unsigned short *) buf;
141 while (len--)
142 *ap = *bp++;
143}
144
145static inline void io_outsl_noswap(unsigned int addr, const void *buf, int len)
146{
147 volatile unsigned long *ap = (volatile unsigned long *) addr;
148 unsigned long *bp = (unsigned long *) buf;
149 while (len--)
150 *ap = *bp++;
151}
152
153static inline void io_insb(unsigned int addr, void *buf, int len)
154{
155 volatile unsigned char *ap_b;
156 volatile unsigned short *ap_w;
157 unsigned char *bp = (unsigned char *) buf;
158
159 if(h8300_buswidth(addr)) {
160 ap_w = (volatile unsigned short *)(addr & ~1);
161 while (len--)
162 *bp++ = *ap_w & 0xff;
163 } else {
164 ap_b = (volatile unsigned char *)addr;
165 while (len--)
166 *bp++ = *ap_b;
167 }
168}
169
170static inline void io_insw(unsigned int addr, void *buf, int len)
171{
172 volatile unsigned short *ap = (volatile unsigned short *) addr;
173 unsigned short *bp = (unsigned short *) buf;
174 while (len--)
175 *bp++ = _swapw(*ap);
176}
177
178static inline void io_insl(unsigned int addr, void *buf, int len)
179{
180 volatile unsigned long *ap = (volatile unsigned long *) addr;
181 unsigned long *bp = (unsigned long *) buf;
182 while (len--)
183 *bp++ = _swapl(*ap);
184}
185
186static inline void io_insw_noswap(unsigned int addr, void *buf, int len)
187{
188 volatile unsigned short *ap = (volatile unsigned short *) addr;
189 unsigned short *bp = (unsigned short *) buf;
190 while (len--)
191 *bp++ = *ap;
192}
193
194static inline void io_insl_noswap(unsigned int addr, void *buf, int len)
195{
196 volatile unsigned long *ap = (volatile unsigned long *) addr;
197 unsigned long *bp = (unsigned long *) buf;
198 while (len--)
199 *bp++ = *ap;
200}
201
202/*
203 * make the short names macros so specific devices
204 * can override them as required
205 */
206
207#define memset_io(a,b,c) memset((void *)(a),(b),(c))
208#define memcpy_fromio(a,b,c) memcpy((a),(void *)(b),(c))
209#define memcpy_toio(a,b,c) memcpy((void *)(a),(b),(c))
210
211#define mmiowb()
212
213#define inb(addr) ((h8300_buswidth(addr))?readw((addr) & ~1) & 0xff:readb(addr))
214#define inw(addr) _swapw(readw(addr))
215#define inl(addr) _swapl(readl(addr))
216#define outb(x,addr) ((void)((h8300_buswidth(addr) && \
217 ((addr) & 1))?writew(x,(addr) & ~1):writeb(x,addr)))
218#define outw(x,addr) ((void) writew(_swapw(x),addr))
219#define outl(x,addr) ((void) writel(_swapl(x),addr))
220
221#define inb_p(addr) inb(addr)
222#define inw_p(addr) inw(addr)
223#define inl_p(addr) inl(addr)
224#define outb_p(x,addr) outb(x,addr)
225#define outw_p(x,addr) outw(x,addr)
226#define outl_p(x,addr) outl(x,addr)
227
228#define outsb(a,b,l) io_outsb(a,b,l)
229#define outsw(a,b,l) io_outsw(a,b,l)
230#define outsl(a,b,l) io_outsl(a,b,l)
231
232#define insb(a,b,l) io_insb(a,b,l)
233#define insw(a,b,l) io_insw(a,b,l)
234#define insl(a,b,l) io_insl(a,b,l)
235
236#define IO_SPACE_LIMIT 0xffffff
237
238
239/* Values for nocacheflag and cmode */
240#define IOMAP_FULL_CACHING 0
241#define IOMAP_NOCACHE_SER 1
242#define IOMAP_NOCACHE_NONSER 2
243#define IOMAP_WRITETHROUGH 3
244
245extern void *__ioremap(unsigned long physaddr, unsigned long size, int cacheflag);
246extern void __iounmap(void *addr, unsigned long size);
247
248static inline void *ioremap(unsigned long physaddr, unsigned long size)
249{
250 return __ioremap(physaddr, size, IOMAP_NOCACHE_SER);
251}
252static inline void *ioremap_nocache(unsigned long physaddr, unsigned long size)
253{
254 return __ioremap(physaddr, size, IOMAP_NOCACHE_SER);
255}
256static inline void *ioremap_writethrough(unsigned long physaddr, unsigned long size)
257{
258 return __ioremap(physaddr, size, IOMAP_WRITETHROUGH);
259}
260static inline void *ioremap_fullcache(unsigned long physaddr, unsigned long size)
261{
262 return __ioremap(physaddr, size, IOMAP_FULL_CACHING);
263}
264
265extern void iounmap(void *addr);
266
267/* H8/300 internal I/O functions */
268static __inline__ unsigned char ctrl_inb(unsigned long addr)
269{
270 return *(volatile unsigned char*)addr;
271}
272
273static __inline__ unsigned short ctrl_inw(unsigned long addr)
274{
275 return *(volatile unsigned short*)addr;
276}
277
278static __inline__ unsigned long ctrl_inl(unsigned long addr)
279{
280 return *(volatile unsigned long*)addr;
281}
282
283static __inline__ void ctrl_outb(unsigned char b, unsigned long addr)
284{
285 *(volatile unsigned char*)addr = b;
286}
287
288static __inline__ void ctrl_outw(unsigned short b, unsigned long addr)
289{
290 *(volatile unsigned short*)addr = b;
291}
292
293static __inline__ void ctrl_outl(unsigned long b, unsigned long addr)
294{
295 *(volatile unsigned long*)addr = b;
296}
297
298static __inline__ void ctrl_bclr(int b, unsigned long addr)
299{
300 if (__builtin_constant_p(b))
301 switch (b) {
302 case 0: __asm__("bclr #0,@%0"::"r"(addr)); break;
303 case 1: __asm__("bclr #1,@%0"::"r"(addr)); break;
304 case 2: __asm__("bclr #2,@%0"::"r"(addr)); break;
305 case 3: __asm__("bclr #3,@%0"::"r"(addr)); break;
306 case 4: __asm__("bclr #4,@%0"::"r"(addr)); break;
307 case 5: __asm__("bclr #5,@%0"::"r"(addr)); break;
308 case 6: __asm__("bclr #6,@%0"::"r"(addr)); break;
309 case 7: __asm__("bclr #7,@%0"::"r"(addr)); break;
310 }
311 else
312 __asm__("bclr %w0,@%1"::"r"(b), "r"(addr));
313}
314
315static __inline__ void ctrl_bset(int b, unsigned long addr)
316{
317 if (__builtin_constant_p(b))
318 switch (b) {
319 case 0: __asm__("bset #0,@%0"::"r"(addr)); break;
320 case 1: __asm__("bset #1,@%0"::"r"(addr)); break;
321 case 2: __asm__("bset #2,@%0"::"r"(addr)); break;
322 case 3: __asm__("bset #3,@%0"::"r"(addr)); break;
323 case 4: __asm__("bset #4,@%0"::"r"(addr)); break;
324 case 5: __asm__("bset #5,@%0"::"r"(addr)); break;
325 case 6: __asm__("bset #6,@%0"::"r"(addr)); break;
326 case 7: __asm__("bset #7,@%0"::"r"(addr)); break;
327 }
328 else
329 __asm__("bset %w0,@%1"::"r"(b), "r"(addr));
330}
331
332/* Pages to physical address... */
333#define page_to_phys(page) ((page - mem_map) << PAGE_SHIFT)
334#define page_to_bus(page) ((page - mem_map) << PAGE_SHIFT)
335
336/*
337 * Macros used for converting between virtual and physical mappings.
338 */
339#define phys_to_virt(vaddr) ((void *) (vaddr))
340#define virt_to_phys(vaddr) ((unsigned long) (vaddr))
341
342#define virt_to_bus virt_to_phys
343#define bus_to_virt phys_to_virt
344
345/*
346 * Convert a physical pointer to a virtual kernel pointer for /dev/mem
347 * access
348 */
349#define xlate_dev_mem_ptr(p) __va(p)
350
351/*
352 * Convert a virtual cached pointer to an uncached pointer
353 */
354#define xlate_dev_kmem_ptr(p) p
355
356#endif /* __KERNEL__ */
357
358#endif /* _H8300_IO_H */
diff --git a/arch/h8300/include/asm/irq.h b/arch/h8300/include/asm/irq.h
deleted file mode 100644
index 13d7c601cd0a..000000000000
--- a/arch/h8300/include/asm/irq.h
+++ /dev/null
@@ -1,49 +0,0 @@
1#ifndef _H8300_IRQ_H_
2#define _H8300_IRQ_H_
3
4#include <asm/ptrace.h>
5
6#if defined(CONFIG_CPU_H8300H)
7#define NR_IRQS 64
8#define EXT_IRQ0 12
9#define EXT_IRQ1 13
10#define EXT_IRQ2 14
11#define EXT_IRQ3 15
12#define EXT_IRQ4 16
13#define EXT_IRQ5 17
14#define EXT_IRQ6 18
15#define EXT_IRQ7 19
16#define EXT_IRQS 5
17#define IER_REGS *(volatile unsigned char *)IER
18#endif
19#if defined(CONFIG_CPU_H8S)
20#define NR_IRQS 128
21#define EXT_IRQ0 16
22#define EXT_IRQ1 17
23#define EXT_IRQ2 18
24#define EXT_IRQ3 19
25#define EXT_IRQ4 20
26#define EXT_IRQ5 21
27#define EXT_IRQ6 22
28#define EXT_IRQ7 23
29#define EXT_IRQ8 24
30#define EXT_IRQ9 25
31#define EXT_IRQ10 26
32#define EXT_IRQ11 27
33#define EXT_IRQ12 28
34#define EXT_IRQ13 29
35#define EXT_IRQ14 30
36#define EXT_IRQ15 31
37#define EXT_IRQS 15
38
39#define IER_REGS *(volatile unsigned short *)IER
40#endif
41
42static __inline__ int irq_canonicalize(int irq)
43{
44 return irq;
45}
46
47typedef void (*h8300_vector)(void);
48
49#endif /* _H8300_IRQ_H_ */
diff --git a/arch/h8300/include/asm/irq_regs.h b/arch/h8300/include/asm/irq_regs.h
deleted file mode 100644
index 3dd9c0b70270..000000000000
--- a/arch/h8300/include/asm/irq_regs.h
+++ /dev/null
@@ -1 +0,0 @@
1#include <asm-generic/irq_regs.h>
diff --git a/arch/h8300/include/asm/irqflags.h b/arch/h8300/include/asm/irqflags.h
deleted file mode 100644
index 9617cd57aebd..000000000000
--- a/arch/h8300/include/asm/irqflags.h
+++ /dev/null
@@ -1,43 +0,0 @@
1#ifndef _H8300_IRQFLAGS_H
2#define _H8300_IRQFLAGS_H
3
4static inline unsigned long arch_local_save_flags(void)
5{
6 unsigned long flags;
7 asm volatile ("stc ccr,%w0" : "=r" (flags));
8 return flags;
9}
10
11static inline void arch_local_irq_disable(void)
12{
13 asm volatile ("orc #0x80,ccr" : : : "memory");
14}
15
16static inline void arch_local_irq_enable(void)
17{
18 asm volatile ("andc #0x7f,ccr" : : : "memory");
19}
20
21static inline unsigned long arch_local_irq_save(void)
22{
23 unsigned long flags = arch_local_save_flags();
24 arch_local_irq_disable();
25 return flags;
26}
27
28static inline void arch_local_irq_restore(unsigned long flags)
29{
30 asm volatile ("ldc %w0,ccr" : : "r" (flags) : "memory");
31}
32
33static inline bool arch_irqs_disabled_flags(unsigned long flags)
34{
35 return (flags & 0x80) == 0x80;
36}
37
38static inline bool arch_irqs_disabled(void)
39{
40 return arch_irqs_disabled_flags(arch_local_save_flags());
41}
42
43#endif /* _H8300_IRQFLAGS_H */
diff --git a/arch/h8300/include/asm/kdebug.h b/arch/h8300/include/asm/kdebug.h
deleted file mode 100644
index 6ece1b037665..000000000000
--- a/arch/h8300/include/asm/kdebug.h
+++ /dev/null
@@ -1 +0,0 @@
1#include <asm-generic/kdebug.h>
diff --git a/arch/h8300/include/asm/kmap_types.h b/arch/h8300/include/asm/kmap_types.h
deleted file mode 100644
index be12a7160116..000000000000
--- a/arch/h8300/include/asm/kmap_types.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef _ASM_H8300_KMAP_TYPES_H
2#define _ASM_H8300_KMAP_TYPES_H
3
4#include <asm-generic/kmap_types.h>
5
6#endif
diff --git a/arch/h8300/include/asm/local.h b/arch/h8300/include/asm/local.h
deleted file mode 100644
index fdd4efe437cd..000000000000
--- a/arch/h8300/include/asm/local.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef _H8300_LOCAL_H_
2#define _H8300_LOCAL_H_
3
4#include <asm-generic/local.h>
5
6#endif
diff --git a/arch/h8300/include/asm/local64.h b/arch/h8300/include/asm/local64.h
deleted file mode 100644
index 36c93b5cc239..000000000000
--- a/arch/h8300/include/asm/local64.h
+++ /dev/null
@@ -1 +0,0 @@
1#include <asm-generic/local64.h>
diff --git a/arch/h8300/include/asm/mc146818rtc.h b/arch/h8300/include/asm/mc146818rtc.h
deleted file mode 100644
index ab9d9646d241..000000000000
--- a/arch/h8300/include/asm/mc146818rtc.h
+++ /dev/null
@@ -1,9 +0,0 @@
1/*
2 * Machine dependent access functions for RTC registers.
3 */
4#ifndef _H8300_MC146818RTC_H
5#define _H8300_MC146818RTC_H
6
7/* empty include file to satisfy the include in genrtc.c/ide-geometry.c */
8
9#endif /* _H8300_MC146818RTC_H */
diff --git a/arch/h8300/include/asm/mmu_context.h b/arch/h8300/include/asm/mmu_context.h
deleted file mode 100644
index f44b730da54d..000000000000
--- a/arch/h8300/include/asm/mmu_context.h
+++ /dev/null
@@ -1,32 +0,0 @@
1#ifndef __H8300_MMU_CONTEXT_H
2#define __H8300_MMU_CONTEXT_H
3
4#include <asm/setup.h>
5#include <asm/page.h>
6#include <asm/pgalloc.h>
7#include <asm-generic/mm_hooks.h>
8
9static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk)
10{
11}
12
13static inline int
14init_new_context(struct task_struct *tsk, struct mm_struct *mm)
15{
16 // mm->context = virt_to_phys(mm->pgd);
17 return(0);
18}
19
20#define destroy_context(mm) do { } while(0)
21#define deactivate_mm(tsk,mm) do { } while(0)
22
23static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next, struct task_struct *tsk)
24{
25}
26
27static inline void activate_mm(struct mm_struct *prev_mm,
28 struct mm_struct *next_mm)
29{
30}
31
32#endif
diff --git a/arch/h8300/include/asm/mutex.h b/arch/h8300/include/asm/mutex.h
deleted file mode 100644
index 458c1f7fbc18..000000000000
--- a/arch/h8300/include/asm/mutex.h
+++ /dev/null
@@ -1,9 +0,0 @@
1/*
2 * Pull in the generic implementation for the mutex fastpath.
3 *
4 * TODO: implement optimized primitives instead, or leave the generic
5 * implementation in place, or pick the atomic_xchg() based generic
6 * implementation. (see asm-generic/mutex-xchg.h for details)
7 */
8
9#include <asm-generic/mutex-dec.h>
diff --git a/arch/h8300/include/asm/page.h b/arch/h8300/include/asm/page.h
deleted file mode 100644
index 837381a2df46..000000000000
--- a/arch/h8300/include/asm/page.h
+++ /dev/null
@@ -1,78 +0,0 @@
1#ifndef _H8300_PAGE_H
2#define _H8300_PAGE_H
3
4/* PAGE_SHIFT determines the page size */
5
6#define PAGE_SHIFT (12)
7#define PAGE_SIZE (1UL << PAGE_SHIFT)
8#define PAGE_MASK (~(PAGE_SIZE-1))
9
10#include <asm/setup.h>
11
12#ifndef __ASSEMBLY__
13
14#define get_user_page(vaddr) __get_free_page(GFP_KERNEL)
15#define free_user_page(page, addr) free_page(addr)
16
17#define clear_page(page) memset((page), 0, PAGE_SIZE)
18#define copy_page(to,from) memcpy((to), (from), PAGE_SIZE)
19
20#define clear_user_page(page, vaddr, pg) clear_page(page)
21#define copy_user_page(to, from, vaddr, pg) copy_page(to, from)
22
23#define __alloc_zeroed_user_highpage(movableflags, vma, vaddr) \
24 alloc_page_vma(GFP_HIGHUSER | __GFP_ZERO | movableflags, vma, vaddr)
25#define __HAVE_ARCH_ALLOC_ZEROED_USER_HIGHPAGE
26
27/*
28 * These are used to make use of C type-checking..
29 */
30typedef struct { unsigned long pte; } pte_t;
31typedef struct { unsigned long pmd[16]; } pmd_t;
32typedef struct { unsigned long pgd; } pgd_t;
33typedef struct { unsigned long pgprot; } pgprot_t;
34typedef struct page *pgtable_t;
35
36#define pte_val(x) ((x).pte)
37#define pmd_val(x) ((&x)->pmd[0])
38#define pgd_val(x) ((x).pgd)
39#define pgprot_val(x) ((x).pgprot)
40
41#define __pte(x) ((pte_t) { (x) } )
42#define __pmd(x) ((pmd_t) { (x) } )
43#define __pgd(x) ((pgd_t) { (x) } )
44#define __pgprot(x) ((pgprot_t) { (x) } )
45
46extern unsigned long memory_start;
47extern unsigned long memory_end;
48
49#endif /* !__ASSEMBLY__ */
50
51#include <asm/page_offset.h>
52
53#define PAGE_OFFSET (PAGE_OFFSET_RAW)
54
55#ifndef __ASSEMBLY__
56
57#define __pa(vaddr) virt_to_phys(vaddr)
58#define __va(paddr) phys_to_virt((unsigned long)paddr)
59
60#define virt_to_pfn(kaddr) (__pa(kaddr) >> PAGE_SHIFT)
61#define pfn_to_virt(pfn) __va((pfn) << PAGE_SHIFT)
62
63#define MAP_NR(addr) (((unsigned long)(addr)-PAGE_OFFSET) >> PAGE_SHIFT)
64#define virt_to_page(addr) (mem_map + (((unsigned long)(addr)-PAGE_OFFSET) >> PAGE_SHIFT))
65#define page_to_virt(page) ((((page) - mem_map) << PAGE_SHIFT) + PAGE_OFFSET)
66#define pfn_valid(page) (page < max_mapnr)
67
68#define ARCH_PFN_OFFSET (PAGE_OFFSET >> PAGE_SHIFT)
69
70#define virt_addr_valid(kaddr) (((void *)(kaddr) >= (void *)PAGE_OFFSET) && \
71 ((void *)(kaddr) < (void *)memory_end))
72
73#endif /* __ASSEMBLY__ */
74
75#include <asm-generic/memory_model.h>
76#include <asm-generic/getorder.h>
77
78#endif /* _H8300_PAGE_H */
diff --git a/arch/h8300/include/asm/page_offset.h b/arch/h8300/include/asm/page_offset.h
deleted file mode 100644
index f8706463008c..000000000000
--- a/arch/h8300/include/asm/page_offset.h
+++ /dev/null
@@ -1,3 +0,0 @@
1
2#define PAGE_OFFSET_RAW 0x00000000
3
diff --git a/arch/h8300/include/asm/param.h b/arch/h8300/include/asm/param.h
deleted file mode 100644
index c3909e7ff178..000000000000
--- a/arch/h8300/include/asm/param.h
+++ /dev/null
@@ -1,9 +0,0 @@
1#ifndef _H8300_PARAM_H
2#define _H8300_PARAM_H
3
4#include <uapi/asm/param.h>
5
6#define HZ CONFIG_HZ
7#define USER_HZ HZ
8#define CLOCKS_PER_SEC (USER_HZ)
9#endif /* _H8300_PARAM_H */
diff --git a/arch/h8300/include/asm/pci.h b/arch/h8300/include/asm/pci.h
deleted file mode 100644
index 0b2acaa3dd84..000000000000
--- a/arch/h8300/include/asm/pci.h
+++ /dev/null
@@ -1,19 +0,0 @@
1#ifndef _ASM_H8300_PCI_H
2#define _ASM_H8300_PCI_H
3
4/*
5 * asm-h8300/pci.h - H8/300 specific PCI declarations.
6 *
7 * Yoshinori Sato <ysato@users.sourceforge.jp>
8 */
9
10#define pcibios_assign_all_busses() 0
11
12static inline void pcibios_penalize_isa_irq(int irq, int active)
13{
14 /* We don't do dynamic PCI IRQ allocation */
15}
16
17#define PCI_DMA_BUS_IS_PHYS (1)
18
19#endif /* _ASM_H8300_PCI_H */
diff --git a/arch/h8300/include/asm/percpu.h b/arch/h8300/include/asm/percpu.h
deleted file mode 100644
index 72c03e3666d8..000000000000
--- a/arch/h8300/include/asm/percpu.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef __ARCH_H8300_PERCPU__
2#define __ARCH_H8300_PERCPU__
3
4#include <asm-generic/percpu.h>
5
6#endif /* __ARCH_H8300_PERCPU__ */
diff --git a/arch/h8300/include/asm/pgalloc.h b/arch/h8300/include/asm/pgalloc.h
deleted file mode 100644
index c2e89a286d23..000000000000
--- a/arch/h8300/include/asm/pgalloc.h
+++ /dev/null
@@ -1,8 +0,0 @@
1#ifndef _H8300_PGALLOC_H
2#define _H8300_PGALLOC_H
3
4#include <asm/setup.h>
5
6#define check_pgt_cache() do { } while (0)
7
8#endif /* _H8300_PGALLOC_H */
diff --git a/arch/h8300/include/asm/pgtable.h b/arch/h8300/include/asm/pgtable.h
deleted file mode 100644
index 7ca20f894dd7..000000000000
--- a/arch/h8300/include/asm/pgtable.h
+++ /dev/null
@@ -1,73 +0,0 @@
1#ifndef _H8300_PGTABLE_H
2#define _H8300_PGTABLE_H
3
4#include <asm-generic/4level-fixup.h>
5
6#include <linux/slab.h>
7#include <asm/processor.h>
8#include <asm/page.h>
9#include <asm/io.h>
10
11#define pgd_present(pgd) (1) /* pages are always present on NO_MM */
12#define pgd_none(pgd) (0)
13#define pgd_bad(pgd) (0)
14#define pgd_clear(pgdp)
15#define kern_addr_valid(addr) (1)
16#define pmd_offset(a, b) ((void *)0)
17#define pmd_none(pmd) (1)
18#define pgd_offset_k(adrdress) ((pgd_t *)0)
19#define pte_offset_kernel(dir, address) ((pte_t *)0)
20
21#define PAGE_NONE __pgprot(0) /* these mean nothing to NO_MM */
22#define PAGE_SHARED __pgprot(0) /* these mean nothing to NO_MM */
23#define PAGE_COPY __pgprot(0) /* these mean nothing to NO_MM */
24#define PAGE_READONLY __pgprot(0) /* these mean nothing to NO_MM */
25#define PAGE_KERNEL __pgprot(0) /* these mean nothing to NO_MM */
26
27extern void paging_init(void);
28#define swapper_pg_dir ((pgd_t *) 0)
29
30#define __swp_type(x) (0)
31#define __swp_offset(x) (0)
32#define __swp_entry(typ,off) ((swp_entry_t) { ((typ) | ((off) << 7)) })
33#define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) })
34#define __swp_entry_to_pte(x) ((pte_t) { (x).val })
35
36static inline int pte_file(pte_t pte) { return 0; }
37
38/*
39 * ZERO_PAGE is a global shared page that is always zero: used
40 * for zero-mapped memory areas etc..
41 */
42#define ZERO_PAGE(vaddr) (virt_to_page(0))
43
44/*
45 * These would be in other places but having them here reduces the diffs.
46 */
47extern unsigned int kobjsize(const void *objp);
48extern int is_in_rom(unsigned long);
49
50/*
51 * No page table caches to initialise
52 */
53#define pgtable_cache_init() do { } while (0)
54
55/*
56 * All 32bit addresses are effectively valid for vmalloc...
57 * Sort of meaningless for non-VM targets.
58 */
59#define VMALLOC_START 0
60#define VMALLOC_END 0xffffffff
61
62/*
63 * All 32bit addresses are effectively valid for vmalloc...
64 * Sort of meaningless for non-VM targets.
65 */
66#define VMALLOC_START 0
67#define VMALLOC_END 0xffffffff
68
69#define arch_enter_lazy_cpu_mode() do {} while (0)
70
71#include <asm-generic/pgtable.h>
72
73#endif /* _H8300_PGTABLE_H */
diff --git a/arch/h8300/include/asm/processor.h b/arch/h8300/include/asm/processor.h
deleted file mode 100644
index 4b0ca49bb463..000000000000
--- a/arch/h8300/include/asm/processor.h
+++ /dev/null
@@ -1,139 +0,0 @@
1/*
2 * include/asm-h8300/processor.h
3 *
4 * Copyright (C) 2002 Yoshinori Sato
5 *
6 * Based on: linux/asm-m68nommu/processor.h
7 *
8 * Copyright (C) 1995 Hamish Macdonald
9 */
10
11#ifndef __ASM_H8300_PROCESSOR_H
12#define __ASM_H8300_PROCESSOR_H
13
14/*
15 * Default implementation of macro that returns current
16 * instruction pointer ("program counter").
17 */
18#define current_text_addr() ({ __label__ _l; _l: &&_l;})
19
20#include <linux/compiler.h>
21#include <asm/segment.h>
22#include <asm/fpu.h>
23#include <asm/ptrace.h>
24#include <asm/current.h>
25
26static inline unsigned long rdusp(void) {
27 extern unsigned int sw_usp;
28 return(sw_usp);
29}
30
31static inline void wrusp(unsigned long usp) {
32 extern unsigned int sw_usp;
33 sw_usp = usp;
34}
35
36/*
37 * User space process size: 3.75GB. This is hardcoded into a few places,
38 * so don't change it unless you know what you are doing.
39 */
40#define TASK_SIZE (0xFFFFFFFFUL)
41
42#ifdef __KERNEL__
43#define STACK_TOP TASK_SIZE
44#define STACK_TOP_MAX STACK_TOP
45#endif
46
47/*
48 * This decides where the kernel will search for a free chunk of vm
49 * space during mmap's. We won't be using it
50 */
51#define TASK_UNMAPPED_BASE 0
52
53struct thread_struct {
54 unsigned long ksp; /* kernel stack pointer */
55 unsigned long usp; /* user stack pointer */
56 unsigned long ccr; /* saved status register */
57 unsigned long esp0; /* points to SR of stack frame */
58 struct {
59 unsigned short *addr;
60 unsigned short inst;
61 } breakinfo;
62};
63
64#define INIT_THREAD { \
65 .ksp = sizeof(init_stack) + (unsigned long)init_stack, \
66 .usp = 0, \
67 .ccr = PS_S, \
68 .esp0 = 0, \
69 .breakinfo = { \
70 .addr = (unsigned short *)-1, \
71 .inst = 0 \
72 } \
73}
74
75/*
76 * Do necessary setup to start up a newly executed thread.
77 *
78 * pass the data segment into user programs if it exists,
79 * it can't hurt anything as far as I can tell
80 */
81#if defined(__H8300H__)
82#define start_thread(_regs, _pc, _usp) \
83do { \
84 (_regs)->pc = (_pc); \
85 (_regs)->ccr = 0x00; /* clear all flags */ \
86 (_regs)->er5 = current->mm->start_data; /* GOT base */ \
87 wrusp((unsigned long)(_usp) - sizeof(unsigned long)*3); \
88} while(0)
89#endif
90#if defined(__H8300S__)
91#define start_thread(_regs, _pc, _usp) \
92do { \
93 (_regs)->pc = (_pc); \
94 (_regs)->ccr = 0x00; /* clear kernel flag */ \
95 (_regs)->exr = 0x78; /* enable all interrupts */ \
96 (_regs)->er5 = current->mm->start_data; /* GOT base */ \
97 /* 14 = space for retaddr(4), vector(4), er0(4) and ext(2) on stack */ \
98 wrusp(((unsigned long)(_usp)) - 14); \
99} while(0)
100#endif
101
102/* Forward declaration, a strange C thing */
103struct task_struct;
104
105/* Free all resources held by a thread. */
106static inline void release_thread(struct task_struct *dead_task)
107{
108}
109
110/*
111 * Free current thread data structures etc..
112 */
113static inline void exit_thread(void)
114{
115}
116
117/*
118 * Return saved PC of a blocked thread.
119 */
120unsigned long thread_saved_pc(struct task_struct *tsk);
121unsigned long get_wchan(struct task_struct *p);
122
123#define KSTK_EIP(tsk) \
124 ({ \
125 unsigned long eip = 0; \
126 if ((tsk)->thread.esp0 > PAGE_SIZE && \
127 MAP_NR((tsk)->thread.esp0) < max_mapnr) \
128 eip = ((struct pt_regs *) (tsk)->thread.esp0)->pc; \
129 eip; })
130#define KSTK_ESP(tsk) ((tsk) == current ? rdusp() : (tsk)->thread.usp)
131
132#define cpu_relax() barrier()
133
134#define HARD_RESET_NOW() ({ \
135 local_irq_disable(); \
136 asm("jmp @@0"); \
137})
138
139#endif
diff --git a/arch/h8300/include/asm/ptrace.h b/arch/h8300/include/asm/ptrace.h
deleted file mode 100644
index c1826b95c5ca..000000000000
--- a/arch/h8300/include/asm/ptrace.h
+++ /dev/null
@@ -1,33 +0,0 @@
1#ifndef _H8300_PTRACE_H
2#define _H8300_PTRACE_H
3
4#include <uapi/asm/ptrace.h>
5
6#ifndef __ASSEMBLY__
7#if defined(CONFIG_CPU_H8S)
8#endif
9#ifndef PS_S
10#define PS_S (0x10)
11#endif
12
13#if defined(__H8300H__)
14#define H8300_REGS_NO 11
15#endif
16#if defined(__H8300S__)
17#define H8300_REGS_NO 12
18#endif
19
20/* Find the stack offset for a register, relative to thread.esp0. */
21#define PT_REG(reg) ((long)&((struct pt_regs *)0)->reg)
22
23#define arch_has_single_step() (1)
24
25#define user_mode(regs) (!((regs)->ccr & PS_S))
26#define instruction_pointer(regs) ((regs)->pc)
27#define profile_pc(regs) instruction_pointer(regs)
28#define current_pt_regs() ((struct pt_regs *) \
29 (THREAD_SIZE + (unsigned long)current_thread_info()) - 1)
30#define signal_pt_regs() ((struct pt_regs *)current->thread.esp0)
31#define current_user_stack_pointer() rdusp()
32#endif /* __ASSEMBLY__ */
33#endif /* _H8300_PTRACE_H */
diff --git a/arch/h8300/include/asm/regs267x.h b/arch/h8300/include/asm/regs267x.h
deleted file mode 100644
index 1bff731a9f77..000000000000
--- a/arch/h8300/include/asm/regs267x.h
+++ /dev/null
@@ -1,336 +0,0 @@
1/* internal Peripherals Register address define */
2/* CPU: H8/306x */
3
4#if !defined(__REGS_H8S267x__)
5#define __REGS_H8S267x__
6
7#if defined(__KERNEL__)
8
9#define DASTCR 0xFEE01A
10#define DADR0 0xFFFFA4
11#define DADR1 0xFFFFA5
12#define DACR01 0xFFFFA6
13#define DADR2 0xFFFFA8
14#define DADR3 0xFFFFA9
15#define DACR23 0xFFFFAA
16
17#define ADDRA 0xFFFF90
18#define ADDRAH 0xFFFF90
19#define ADDRAL 0xFFFF91
20#define ADDRB 0xFFFF92
21#define ADDRBH 0xFFFF92
22#define ADDRBL 0xFFFF93
23#define ADDRC 0xFFFF94
24#define ADDRCH 0xFFFF94
25#define ADDRCL 0xFFFF95
26#define ADDRD 0xFFFF96
27#define ADDRDH 0xFFFF96
28#define ADDRDL 0xFFFF97
29#define ADDRE 0xFFFF98
30#define ADDREH 0xFFFF98
31#define ADDREL 0xFFFF99
32#define ADDRF 0xFFFF9A
33#define ADDRFH 0xFFFF9A
34#define ADDRFL 0xFFFF9B
35#define ADDRG 0xFFFF9C
36#define ADDRGH 0xFFFF9C
37#define ADDRGL 0xFFFF9D
38#define ADDRH 0xFFFF9E
39#define ADDRHH 0xFFFF9E
40#define ADDRHL 0xFFFF9F
41
42#define ADCSR 0xFFFFA0
43#define ADCR 0xFFFFA1
44
45#define ABWCR 0xFFFEC0
46#define ASTCR 0xFFFEC1
47#define WTCRAH 0xFFFEC2
48#define WTCRAL 0xFFFEC3
49#define WTCRBH 0xFFFEC4
50#define WTCRBL 0xFFFEC5
51#define RDNCR 0xFFFEC6
52#define CSACRH 0xFFFEC8
53#define CSACRL 0xFFFEC9
54#define BROMCRH 0xFFFECA
55#define BROMCRL 0xFFFECB
56#define BCR 0xFFFECC
57#define DRAMCR 0xFFFED0
58#define DRACCR 0xFFFED2
59#define REFCR 0xFFFED4
60#define RTCNT 0xFFFED6
61#define RTCOR 0xFFFED7
62
63#define MAR0AH 0xFFFEE0
64#define MAR0AL 0xFFFEE2
65#define IOAR0A 0xFFFEE4
66#define ETCR0A 0xFFFEE6
67#define MAR0BH 0xFFFEE8
68#define MAR0BL 0xFFFEEA
69#define IOAR0B 0xFFFEEC
70#define ETCR0B 0xFFFEEE
71#define MAR1AH 0xFFFEF0
72#define MAR1AL 0xFFFEF2
73#define IOAR1A 0xFFFEF4
74#define ETCR1A 0xFFFEF6
75#define MAR1BH 0xFFFEF8
76#define MAR1BL 0xFFFEFA
77#define IOAR1B 0xFFFEFC
78#define ETCR1B 0xFFFEFE
79#define DMAWER 0xFFFF20
80#define DMATCR 0xFFFF21
81#define DMACR0A 0xFFFF22
82#define DMACR0B 0xFFFF23
83#define DMACR1A 0xFFFF24
84#define DMACR1B 0xFFFF25
85#define DMABCRH 0xFFFF26
86#define DMABCRL 0xFFFF27
87
88#define EDSAR0 0xFFFDC0
89#define EDDAR0 0xFFFDC4
90#define EDTCR0 0xFFFDC8
91#define EDMDR0 0xFFFDCC
92#define EDMDR0H 0xFFFDCC
93#define EDMDR0L 0xFFFDCD
94#define EDACR0 0xFFFDCE
95#define EDSAR1 0xFFFDD0
96#define EDDAR1 0xFFFDD4
97#define EDTCR1 0xFFFDD8
98#define EDMDR1 0xFFFDDC
99#define EDMDR1H 0xFFFDDC
100#define EDMDR1L 0xFFFDDD
101#define EDACR1 0xFFFDDE
102#define EDSAR2 0xFFFDE0
103#define EDDAR2 0xFFFDE4
104#define EDTCR2 0xFFFDE8
105#define EDMDR2 0xFFFDEC
106#define EDMDR2H 0xFFFDEC
107#define EDMDR2L 0xFFFDED
108#define EDACR2 0xFFFDEE
109#define EDSAR3 0xFFFDF0
110#define EDDAR3 0xFFFDF4
111#define EDTCR3 0xFFFDF8
112#define EDMDR3 0xFFFDFC
113#define EDMDR3H 0xFFFDFC
114#define EDMDR3L 0xFFFDFD
115#define EDACR3 0xFFFDFE
116
117#define IPRA 0xFFFE00
118#define IPRB 0xFFFE02
119#define IPRC 0xFFFE04
120#define IPRD 0xFFFE06
121#define IPRE 0xFFFE08
122#define IPRF 0xFFFE0A
123#define IPRG 0xFFFE0C
124#define IPRH 0xFFFE0E
125#define IPRI 0xFFFE10
126#define IPRJ 0xFFFE12
127#define IPRK 0xFFFE14
128#define ITSR 0xFFFE16
129#define SSIER 0xFFFE18
130#define ISCRH 0xFFFE1A
131#define ISCRL 0xFFFE1C
132
133#define INTCR 0xFFFF31
134#define IER 0xFFFF32
135#define IERH 0xFFFF32
136#define IERL 0xFFFF33
137#define ISR 0xFFFF34
138#define ISRH 0xFFFF34
139#define ISRL 0xFFFF35
140
141#define P1DDR 0xFFFE20
142#define P2DDR 0xFFFE21
143#define P3DDR 0xFFFE22
144#define P4DDR 0xFFFE23
145#define P5DDR 0xFFFE24
146#define P6DDR 0xFFFE25
147#define P7DDR 0xFFFE26
148#define P8DDR 0xFFFE27
149#define P9DDR 0xFFFE28
150#define PADDR 0xFFFE29
151#define PBDDR 0xFFFE2A
152#define PCDDR 0xFFFE2B
153#define PDDDR 0xFFFE2C
154#define PEDDR 0xFFFE2D
155#define PFDDR 0xFFFE2E
156#define PGDDR 0xFFFE2F
157#define PHDDR 0xFFFF74
158
159#define PFCR0 0xFFFE32
160#define PFCR1 0xFFFE33
161#define PFCR2 0xFFFE34
162
163#define PAPCR 0xFFFE36
164#define PBPCR 0xFFFE37
165#define PCPCR 0xFFFE38
166#define PDPCR 0xFFFE39
167#define PEPCR 0xFFFE3A
168
169#define P3ODR 0xFFFE3C
170#define PAODR 0xFFFE3D
171
172#define P1DR 0xFFFF60
173#define P2DR 0xFFFF61
174#define P3DR 0xFFFF62
175#define P4DR 0xFFFF63
176#define P5DR 0xFFFF64
177#define P6DR 0xFFFF65
178#define P7DR 0xFFFF66
179#define P8DR 0xFFFF67
180#define P9DR 0xFFFF68
181#define PADR 0xFFFF69
182#define PBDR 0xFFFF6A
183#define PCDR 0xFFFF6B
184#define PDDR 0xFFFF6C
185#define PEDR 0xFFFF6D
186#define PFDR 0xFFFF6E
187#define PGDR 0xFFFF6F
188#define PHDR 0xFFFF72
189
190#define PORT1 0xFFFF50
191#define PORT2 0xFFFF51
192#define PORT3 0xFFFF52
193#define PORT4 0xFFFF53
194#define PORT5 0xFFFF54
195#define PORT6 0xFFFF55
196#define PORT7 0xFFFF56
197#define PORT8 0xFFFF57
198#define PORT9 0xFFFF58
199#define PORTA 0xFFFF59
200#define PORTB 0xFFFF5A
201#define PORTC 0xFFFF5B
202#define PORTD 0xFFFF5C
203#define PORTE 0xFFFF5D
204#define PORTF 0xFFFF5E
205#define PORTG 0xFFFF5F
206#define PORTH 0xFFFF70
207
208#define PCR 0xFFFF46
209#define PMR 0xFFFF47
210#define NDERH 0xFFFF48
211#define NDERL 0xFFFF49
212#define PODRH 0xFFFF4A
213#define PODRL 0xFFFF4B
214#define NDRH1 0xFFFF4C
215#define NDRL1 0xFFFF4D
216#define NDRH2 0xFFFF4E
217#define NDRL2 0xFFFF4F
218
219#define SMR0 0xFFFF78
220#define BRR0 0xFFFF79
221#define SCR0 0xFFFF7A
222#define TDR0 0xFFFF7B
223#define SSR0 0xFFFF7C
224#define RDR0 0xFFFF7D
225#define SCMR0 0xFFFF7E
226#define SMR1 0xFFFF80
227#define BRR1 0xFFFF81
228#define SCR1 0xFFFF82
229#define TDR1 0xFFFF83
230#define SSR1 0xFFFF84
231#define RDR1 0xFFFF85
232#define SCMR1 0xFFFF86
233#define SMR2 0xFFFF88
234#define BRR2 0xFFFF89
235#define SCR2 0xFFFF8A
236#define TDR2 0xFFFF8B
237#define SSR2 0xFFFF8C
238#define RDR2 0xFFFF8D
239#define SCMR2 0xFFFF8E
240
241#define IRCR0 0xFFFE1E
242#define SEMR 0xFFFDA8
243
244#define MDCR 0xFFFF3E
245#define SYSCR 0xFFFF3D
246#define MSTPCRH 0xFFFF40
247#define MSTPCRL 0xFFFF41
248#define FLMCR1 0xFFFFC8
249#define FLMCR2 0xFFFFC9
250#define EBR1 0xFFFFCA
251#define EBR2 0xFFFFCB
252#define CTGARC_RAMCR 0xFFFECE
253#define SBYCR 0xFFFF3A
254#define SCKCR 0xFFFF3B
255#define PLLCR 0xFFFF45
256
257#define TSTR 0xFFFFC0
258#define TSNC 0XFFFFC1
259
260#define TCR0 0xFFFFD0
261#define TMDR0 0xFFFFD1
262#define TIORH0 0xFFFFD2
263#define TIORL0 0xFFFFD3
264#define TIER0 0xFFFFD4
265#define TSR0 0xFFFFD5
266#define TCNT0 0xFFFFD6
267#define GRA0 0xFFFFD8
268#define GRB0 0xFFFFDA
269#define GRC0 0xFFFFDC
270#define GRD0 0xFFFFDE
271#define TCR1 0xFFFFE0
272#define TMDR1 0xFFFFE1
273#define TIORH1 0xFFFFE2
274#define TIORL1 0xFFFFE3
275#define TIER1 0xFFFFE4
276#define TSR1 0xFFFFE5
277#define TCNT1 0xFFFFE6
278#define GRA1 0xFFFFE8
279#define GRB1 0xFFFFEA
280#define TCR2 0xFFFFF0
281#define TMDR2 0xFFFFF1
282#define TIORH2 0xFFFFF2
283#define TIORL2 0xFFFFF3
284#define TIER2 0xFFFFF4
285#define TSR2 0xFFFFF5
286#define TCNT2 0xFFFFF6
287#define GRA2 0xFFFFF8
288#define GRB2 0xFFFFFA
289#define TCR3 0xFFFE80
290#define TMDR3 0xFFFE81
291#define TIORH3 0xFFFE82
292#define TIORL3 0xFFFE83
293#define TIER3 0xFFFE84
294#define TSR3 0xFFFE85
295#define TCNT3 0xFFFE86
296#define GRA3 0xFFFE88
297#define GRB3 0xFFFE8A
298#define GRC3 0xFFFE8C
299#define GRD3 0xFFFE8E
300#define TCR4 0xFFFE90
301#define TMDR4 0xFFFE91
302#define TIORH4 0xFFFE92
303#define TIORL4 0xFFFE93
304#define TIER4 0xFFFE94
305#define TSR4 0xFFFE95
306#define TCNT4 0xFFFE96
307#define GRA4 0xFFFE98
308#define GRB4 0xFFFE9A
309#define TCR5 0xFFFEA0
310#define TMDR5 0xFFFEA1
311#define TIORH5 0xFFFEA2
312#define TIORL5 0xFFFEA3
313#define TIER5 0xFFFEA4
314#define TSR5 0xFFFEA5
315#define TCNT5 0xFFFEA6
316#define GRA5 0xFFFEA8
317#define GRB5 0xFFFEAA
318
319#define _8TCR0 0xFFFFB0
320#define _8TCR1 0xFFFFB1
321#define _8TCSR0 0xFFFFB2
322#define _8TCSR1 0xFFFFB3
323#define _8TCORA0 0xFFFFB4
324#define _8TCORA1 0xFFFFB5
325#define _8TCORB0 0xFFFFB6
326#define _8TCORB1 0xFFFFB7
327#define _8TCNT0 0xFFFFB8
328#define _8TCNT1 0xFFFFB9
329
330#define TCSR 0xFFFFBC
331#define TCNT 0xFFFFBD
332#define RSTCSRW 0xFFFFBE
333#define RSTCSRR 0xFFFFBF
334
335#endif /* __KERNEL__ */
336#endif /* __REGS_H8S267x__ */
diff --git a/arch/h8300/include/asm/regs306x.h b/arch/h8300/include/asm/regs306x.h
deleted file mode 100644
index 027dd633fa25..000000000000
--- a/arch/h8300/include/asm/regs306x.h
+++ /dev/null
@@ -1,212 +0,0 @@
1/* internal Peripherals Register address define */
2/* CPU: H8/306x */
3
4#if !defined(__REGS_H8306x__)
5#define __REGS_H8306x__
6
7#if defined(__KERNEL__)
8
9#define DASTCR 0xFEE01A
10#define DADR0 0xFEE09C
11#define DADR1 0xFEE09D
12#define DACR 0xFEE09E
13
14#define ADDRAH 0xFFFFE0
15#define ADDRAL 0xFFFFE1
16#define ADDRBH 0xFFFFE2
17#define ADDRBL 0xFFFFE3
18#define ADDRCH 0xFFFFE4
19#define ADDRCL 0xFFFFE5
20#define ADDRDH 0xFFFFE6
21#define ADDRDL 0xFFFFE7
22#define ADCSR 0xFFFFE8
23#define ADCR 0xFFFFE9
24
25#define BRCR 0xFEE013
26#define ADRCR 0xFEE01E
27#define CSCR 0xFEE01F
28#define ABWCR 0xFEE020
29#define ASTCR 0xFEE021
30#define WCRH 0xFEE022
31#define WCRL 0xFEE023
32#define BCR 0xFEE024
33#define DRCRA 0xFEE026
34#define DRCRB 0xFEE027
35#define RTMCSR 0xFEE028
36#define RTCNT 0xFEE029
37#define RTCOR 0xFEE02A
38
39#define MAR0AR 0xFFFF20
40#define MAR0AE 0xFFFF21
41#define MAR0AH 0xFFFF22
42#define MAR0AL 0xFFFF23
43#define ETCR0AL 0xFFFF24
44#define ETCR0AH 0xFFFF25
45#define IOAR0A 0xFFFF26
46#define DTCR0A 0xFFFF27
47#define MAR0BR 0xFFFF28
48#define MAR0BE 0xFFFF29
49#define MAR0BH 0xFFFF2A
50#define MAR0BL 0xFFFF2B
51#define ETCR0BL 0xFFFF2C
52#define ETCR0BH 0xFFFF2D
53#define IOAR0B 0xFFFF2E
54#define DTCR0B 0xFFFF2F
55#define MAR1AR 0xFFFF30
56#define MAR1AE 0xFFFF31
57#define MAR1AH 0xFFFF32
58#define MAR1AL 0xFFFF33
59#define ETCR1AL 0xFFFF34
60#define ETCR1AH 0xFFFF35
61#define IOAR1A 0xFFFF36
62#define DTCR1A 0xFFFF37
63#define MAR1BR 0xFFFF38
64#define MAR1BE 0xFFFF39
65#define MAR1BH 0xFFFF3A
66#define MAR1BL 0xFFFF3B
67#define ETCR1BL 0xFFFF3C
68#define ETCR1BH 0xFFFF3D
69#define IOAR1B 0xFFFF3E
70#define DTCR1B 0xFFFF3F
71
72#define ISCR 0xFEE014
73#define IER 0xFEE015
74#define ISR 0xFEE016
75#define IPRA 0xFEE018
76#define IPRB 0xFEE019
77
78#define P1DDR 0xFEE000
79#define P2DDR 0xFEE001
80#define P3DDR 0xFEE002
81#define P4DDR 0xFEE003
82#define P5DDR 0xFEE004
83#define P6DDR 0xFEE005
84/*#define P7DDR 0xFEE006*/
85#define P8DDR 0xFEE007
86#define P9DDR 0xFEE008
87#define PADDR 0xFEE009
88#define PBDDR 0xFEE00A
89
90#define P1DR 0xFFFFD0
91#define P2DR 0xFFFFD1
92#define P3DR 0xFFFFD2
93#define P4DR 0xFFFFD3
94#define P5DR 0xFFFFD4
95#define P6DR 0xFFFFD5
96/*#define P7DR 0xFFFFD6*/
97#define P8DR 0xFFFFD7
98#define P9DR 0xFFFFD8
99#define PADR 0xFFFFD9
100#define PBDR 0xFFFFDA
101
102#define P2CR 0xFEE03C
103#define P4CR 0xFEE03E
104#define P5CR 0xFEE03F
105
106#define SMR0 0xFFFFB0
107#define BRR0 0xFFFFB1
108#define SCR0 0xFFFFB2
109#define TDR0 0xFFFFB3
110#define SSR0 0xFFFFB4
111#define RDR0 0xFFFFB5
112#define SCMR0 0xFFFFB6
113#define SMR1 0xFFFFB8
114#define BRR1 0xFFFFB9
115#define SCR1 0xFFFFBA
116#define TDR1 0xFFFFBB
117#define SSR1 0xFFFFBC
118#define RDR1 0xFFFFBD
119#define SCMR1 0xFFFFBE
120#define SMR2 0xFFFFC0
121#define BRR2 0xFFFFC1
122#define SCR2 0xFFFFC2
123#define TDR2 0xFFFFC3
124#define SSR2 0xFFFFC4
125#define RDR2 0xFFFFC5
126#define SCMR2 0xFFFFC6
127
128#define MDCR 0xFEE011
129#define SYSCR 0xFEE012
130#define DIVCR 0xFEE01B
131#define MSTCRH 0xFEE01C
132#define MSTCRL 0xFEE01D
133#define FLMCR1 0xFEE030
134#define FLMCR2 0xFEE031
135#define EBR1 0xFEE032
136#define EBR2 0xFEE033
137#define RAMCR 0xFEE077
138
139#define TSTR 0xFFFF60
140#define TSNC 0XFFFF61
141#define TMDR 0xFFFF62
142#define TOLR 0xFFFF63
143#define TISRA 0xFFFF64
144#define TISRB 0xFFFF65
145#define TISRC 0xFFFF66
146#define TCR0 0xFFFF68
147#define TIOR0 0xFFFF69
148#define TCNT0H 0xFFFF6A
149#define TCNT0L 0xFFFF6B
150#define GRA0H 0xFFFF6C
151#define GRA0L 0xFFFF6D
152#define GRB0H 0xFFFF6E
153#define GRB0L 0xFFFF6F
154#define TCR1 0xFFFF70
155#define TIOR1 0xFFFF71
156#define TCNT1H 0xFFFF72
157#define TCNT1L 0xFFFF73
158#define GRA1H 0xFFFF74
159#define GRA1L 0xFFFF75
160#define GRB1H 0xFFFF76
161#define GRB1L 0xFFFF77
162#define TCR3 0xFFFF78
163#define TIOR3 0xFFFF79
164#define TCNT3H 0xFFFF7A
165#define TCNT3L 0xFFFF7B
166#define GRA3H 0xFFFF7C
167#define GRA3L 0xFFFF7D
168#define GRB3H 0xFFFF7E
169#define GRB3L 0xFFFF7F
170
171#define _8TCR0 0xFFFF80
172#define _8TCR1 0xFFFF81
173#define _8TCSR0 0xFFFF82
174#define _8TCSR1 0xFFFF83
175#define TCORA0 0xFFFF84
176#define TCORA1 0xFFFF85
177#define TCORB0 0xFFFF86
178#define TCORB1 0xFFFF87
179#define _8TCNT0 0xFFFF88
180#define _8TCNT1 0xFFFF89
181
182#define _8TCR2 0xFFFF90
183#define _8TCR3 0xFFFF91
184#define _8TCSR2 0xFFFF92
185#define _8TCSR3 0xFFFF93
186#define TCORA2 0xFFFF94
187#define TCORA3 0xFFFF95
188#define TCORB2 0xFFFF96
189#define TCORB3 0xFFFF97
190#define _8TCNT2 0xFFFF98
191#define _8TCNT3 0xFFFF99
192
193#define TCSR 0xFFFF8C
194#define TCNT 0xFFFF8D
195#define RSTCSR 0xFFFF8F
196
197#define TPMR 0xFFFFA0
198#define TPCR 0xFFFFA1
199#define NDERB 0xFFFFA2
200#define NDERA 0xFFFFA3
201#define NDRB1 0xFFFFA4
202#define NDRA1 0xFFFFA5
203#define NDRB2 0xFFFFA6
204#define NDRA2 0xFFFFA7
205
206#define TCSR 0xFFFF8C
207#define TCNT 0xFFFF8D
208#define RSTCSRW 0xFFFF8E
209#define RSTCSRR 0xFFFF8F
210
211#endif /* __KERNEL__ */
212#endif /* __REGS_H8306x__ */
diff --git a/arch/h8300/include/asm/scatterlist.h b/arch/h8300/include/asm/scatterlist.h
deleted file mode 100644
index 82130eda0e5f..000000000000
--- a/arch/h8300/include/asm/scatterlist.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef _H8300_SCATTERLIST_H
2#define _H8300_SCATTERLIST_H
3
4#include <asm-generic/scatterlist.h>
5
6#endif /* !(_H8300_SCATTERLIST_H) */
diff --git a/arch/h8300/include/asm/sections.h b/arch/h8300/include/asm/sections.h
deleted file mode 100644
index a81743e8b743..000000000000
--- a/arch/h8300/include/asm/sections.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef _H8300_SECTIONS_H_
2#define _H8300_SECTIONS_H_
3
4#include <asm-generic/sections.h>
5
6#endif
diff --git a/arch/h8300/include/asm/segment.h b/arch/h8300/include/asm/segment.h
deleted file mode 100644
index b79a82d0f99d..000000000000
--- a/arch/h8300/include/asm/segment.h
+++ /dev/null
@@ -1,49 +0,0 @@
1#ifndef _H8300_SEGMENT_H
2#define _H8300_SEGMENT_H
3
4/* define constants */
5#define USER_DATA (1)
6#ifndef __USER_DS
7#define __USER_DS (USER_DATA)
8#endif
9#define USER_PROGRAM (2)
10#define SUPER_DATA (3)
11#ifndef __KERNEL_DS
12#define __KERNEL_DS (SUPER_DATA)
13#endif
14#define SUPER_PROGRAM (4)
15
16#ifndef __ASSEMBLY__
17
18typedef struct {
19 unsigned long seg;
20} mm_segment_t;
21
22#define MAKE_MM_SEG(s) ((mm_segment_t) { (s) })
23#define USER_DS MAKE_MM_SEG(__USER_DS)
24#define KERNEL_DS MAKE_MM_SEG(__KERNEL_DS)
25
26/*
27 * Get/set the SFC/DFC registers for MOVES instructions
28 */
29
30static inline mm_segment_t get_fs(void)
31{
32 return USER_DS;
33}
34
35static inline mm_segment_t get_ds(void)
36{
37 /* return the supervisor data space code */
38 return KERNEL_DS;
39}
40
41static inline void set_fs(mm_segment_t val)
42{
43}
44
45#define segment_eq(a,b) ((a).seg == (b).seg)
46
47#endif /* __ASSEMBLY__ */
48
49#endif /* _H8300_SEGMENT_H */
diff --git a/arch/h8300/include/asm/sh_bios.h b/arch/h8300/include/asm/sh_bios.h
deleted file mode 100644
index b6bb6e58295c..000000000000
--- a/arch/h8300/include/asm/sh_bios.h
+++ /dev/null
@@ -1,29 +0,0 @@
1/* eCos HAL interface header */
2
3#ifndef SH_BIOS_H
4#define SH_BIOS_H
5
6#define HAL_IF_VECTOR_TABLE 0xfffe20
7#define CALL_IF_SET_CONSOLE_COMM 13
8#define QUERY_CURRENT -1
9#define MANGLER -3
10
11/* Checking for GDB stub active */
12/* suggestion Jonathan Larmour */
13static int sh_bios_in_gdb_mode(void)
14{
15 static int gdb_active = -1;
16 if (gdb_active == -1) {
17 int (*set_console_comm)(int);
18 set_console_comm = ((void **)HAL_IF_VECTOR_TABLE)[CALL_IF_SET_CONSOLE_COMM];
19 gdb_active = (set_console_comm(QUERY_CURRENT) == MANGLER);
20 }
21 return gdb_active;
22}
23
24static void sh_bios_gdb_detach(void)
25{
26
27}
28
29#endif
diff --git a/arch/h8300/include/asm/shm.h b/arch/h8300/include/asm/shm.h
deleted file mode 100644
index ed6623c0545d..000000000000
--- a/arch/h8300/include/asm/shm.h
+++ /dev/null
@@ -1,31 +0,0 @@
1#ifndef _H8300_SHM_H
2#define _H8300_SHM_H
3
4
5/* format of page table entries that correspond to shared memory pages
6 currently out in swap space (see also mm/swap.c):
7 bits 0-1 (PAGE_PRESENT) is = 0
8 bits 8..2 (SWP_TYPE) are = SHM_SWP_TYPE
9 bits 31..9 are used like this:
10 bits 15..9 (SHM_ID) the id of the shared memory segment
11 bits 30..16 (SHM_IDX) the index of the page within the shared memory segment
12 (actually only bits 25..16 get used since SHMMAX is so low)
13 bit 31 (SHM_READ_ONLY) flag whether the page belongs to a read-only attach
14*/
15/* on the m68k both bits 0 and 1 must be zero */
16/* format on the sun3 is similar, but bits 30, 31 are set to zero and all
17 others are reduced by 2. --m */
18
19#ifndef CONFIG_SUN3
20#define SHM_ID_SHIFT 9
21#else
22#define SHM_ID_SHIFT 7
23#endif
24#define _SHM_ID_BITS 7
25#define SHM_ID_MASK ((1<<_SHM_ID_BITS)-1)
26
27#define SHM_IDX_SHIFT (SHM_ID_SHIFT+_SHM_ID_BITS)
28#define _SHM_IDX_BITS 15
29#define SHM_IDX_MASK ((1<<_SHM_IDX_BITS)-1)
30
31#endif /* _H8300_SHM_H */
diff --git a/arch/h8300/include/asm/shmparam.h b/arch/h8300/include/asm/shmparam.h
deleted file mode 100644
index d1863953ec64..000000000000
--- a/arch/h8300/include/asm/shmparam.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef _H8300_SHMPARAM_H
2#define _H8300_SHMPARAM_H
3
4#define SHMLBA PAGE_SIZE /* attach addr a multiple of this */
5
6#endif /* _H8300_SHMPARAM_H */
diff --git a/arch/h8300/include/asm/signal.h b/arch/h8300/include/asm/signal.h
deleted file mode 100644
index 6341e36386f8..000000000000
--- a/arch/h8300/include/asm/signal.h
+++ /dev/null
@@ -1,24 +0,0 @@
1#ifndef _H8300_SIGNAL_H
2#define _H8300_SIGNAL_H
3
4#include <uapi/asm/signal.h>
5
6/* Most things should be clean enough to redefine this at will, if care
7 is taken to make libc match. */
8
9#define _NSIG 64
10#define _NSIG_BPW 32
11#define _NSIG_WORDS (_NSIG / _NSIG_BPW)
12
13typedef unsigned long old_sigset_t; /* at least 32 bits */
14
15typedef struct {
16 unsigned long sig[_NSIG_WORDS];
17} sigset_t;
18
19#define __ARCH_HAS_SA_RESTORER
20
21#include <asm/sigcontext.h>
22#undef __HAVE_ARCH_SIG_BITOPS
23
24#endif /* _H8300_SIGNAL_H */
diff --git a/arch/h8300/include/asm/smp.h b/arch/h8300/include/asm/smp.h
deleted file mode 100644
index 9e9bd7e58922..000000000000
--- a/arch/h8300/include/asm/smp.h
+++ /dev/null
@@ -1 +0,0 @@
1/* nothing required here yet */
diff --git a/arch/h8300/include/asm/spinlock.h b/arch/h8300/include/asm/spinlock.h
deleted file mode 100644
index d5407fa173e4..000000000000
--- a/arch/h8300/include/asm/spinlock.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef __H8300_SPINLOCK_H
2#define __H8300_SPINLOCK_H
3
4#error "H8/300 doesn't do SMP yet"
5
6#endif
diff --git a/arch/h8300/include/asm/string.h b/arch/h8300/include/asm/string.h
deleted file mode 100644
index ca5034897d87..000000000000
--- a/arch/h8300/include/asm/string.h
+++ /dev/null
@@ -1,44 +0,0 @@
1#ifndef _H8300_STRING_H_
2#define _H8300_STRING_H_
3
4#ifdef __KERNEL__ /* only set these up for kernel code */
5
6#include <asm/setup.h>
7#include <asm/page.h>
8
9#define __HAVE_ARCH_MEMSET
10extern void * memset(void * s, int c, size_t count);
11
12#define __HAVE_ARCH_MEMCPY
13extern void * memcpy(void *d, const void *s, size_t count);
14
15#else /* KERNEL */
16
17/*
18 * let user libraries deal with these,
19 * IMHO the kernel has no place defining these functions for user apps
20 */
21
22#define __HAVE_ARCH_STRCPY 1
23#define __HAVE_ARCH_STRNCPY 1
24#define __HAVE_ARCH_STRCAT 1
25#define __HAVE_ARCH_STRNCAT 1
26#define __HAVE_ARCH_STRCMP 1
27#define __HAVE_ARCH_STRNCMP 1
28#define __HAVE_ARCH_STRNICMP 1
29#define __HAVE_ARCH_STRCHR 1
30#define __HAVE_ARCH_STRRCHR 1
31#define __HAVE_ARCH_STRSTR 1
32#define __HAVE_ARCH_STRLEN 1
33#define __HAVE_ARCH_STRNLEN 1
34#define __HAVE_ARCH_MEMSET 1
35#define __HAVE_ARCH_MEMCPY 1
36#define __HAVE_ARCH_MEMMOVE 1
37#define __HAVE_ARCH_MEMSCAN 1
38#define __HAVE_ARCH_MEMCMP 1
39#define __HAVE_ARCH_MEMCHR 1
40#define __HAVE_ARCH_STRTOK 1
41
42#endif /* KERNEL */
43
44#endif /* _M68K_STRING_H_ */
diff --git a/arch/h8300/include/asm/switch_to.h b/arch/h8300/include/asm/switch_to.h
deleted file mode 100644
index cdd8731ce487..000000000000
--- a/arch/h8300/include/asm/switch_to.h
+++ /dev/null
@@ -1,50 +0,0 @@
1#ifndef _H8300_SWITCH_TO_H
2#define _H8300_SWITCH_TO_H
3
4/*
5 * switch_to(n) should switch tasks to task ptr, first checking that
6 * ptr isn't the current task, in which case it does nothing. This
7 * also clears the TS-flag if the task we switched to has used the
8 * math co-processor latest.
9 */
10/*
11 * switch_to() saves the extra registers, that are not saved
12 * automatically by SAVE_SWITCH_STACK in resume(), ie. d0-d5 and
13 * a0-a1. Some of these are used by schedule() and its predecessors
14 * and so we might get see unexpected behaviors when a task returns
15 * with unexpected register values.
16 *
17 * syscall stores these registers itself and none of them are used
18 * by syscall after the function in the syscall has been called.
19 *
20 * Beware that resume now expects *next to be in d1 and the offset of
21 * tss to be in a1. This saves a few instructions as we no longer have
22 * to push them onto the stack and read them back right after.
23 *
24 * 02/17/96 - Jes Sorensen (jds@kom.auc.dk)
25 *
26 * Changed 96/09/19 by Andreas Schwab
27 * pass prev in a0, next in a1, offset of tss in d1, and whether
28 * the mm structures are shared in d2 (to avoid atc flushing).
29 *
30 * H8/300 Porting 2002/09/04 Yoshinori Sato
31 */
32
33asmlinkage void resume(void);
34#define switch_to(prev,next,last) { \
35 void *_last; \
36 __asm__ __volatile__( \
37 "mov.l %1, er0\n\t" \
38 "mov.l %2, er1\n\t" \
39 "mov.l %3, er2\n\t" \
40 "jsr @_resume\n\t" \
41 "mov.l er2,%0\n\t" \
42 : "=r" (_last) \
43 : "r" (&(prev->thread)), \
44 "r" (&(next->thread)), \
45 "g" (prev) \
46 : "cc", "er0", "er1", "er2", "er3"); \
47 (last) = _last; \
48}
49
50#endif /* _H8300_SWITCH_TO_H */
diff --git a/arch/h8300/include/asm/target_time.h b/arch/h8300/include/asm/target_time.h
deleted file mode 100644
index 9f2a9aa1fe6f..000000000000
--- a/arch/h8300/include/asm/target_time.h
+++ /dev/null
@@ -1,4 +0,0 @@
1extern int platform_timer_setup(void (*timer_int)(int, void *, struct pt_regs *));
2extern void platform_timer_eoi(void);
3extern void platform_gettod(unsigned int *year, unsigned int *mon, unsigned int *day,
4 unsigned int *hour, unsigned int *min, unsigned int *sec);
diff --git a/arch/h8300/include/asm/termios.h b/arch/h8300/include/asm/termios.h
deleted file mode 100644
index 93a63df56247..000000000000
--- a/arch/h8300/include/asm/termios.h
+++ /dev/null
@@ -1,50 +0,0 @@
1#ifndef _H8300_TERMIOS_H
2#define _H8300_TERMIOS_H
3
4#include <uapi/asm/termios.h>
5
6/* intr=^C quit=^| erase=del kill=^U
7 eof=^D vtime=\0 vmin=\1 sxtc=\0
8 start=^Q stop=^S susp=^Z eol=\0
9 reprint=^R discard=^U werase=^W lnext=^V
10 eol2=\0
11*/
12#define INIT_C_CC "\003\034\177\025\004\0\1\0\021\023\032\0\022\017\027\026\0"
13
14/*
15 * Translate a "termio" structure into a "termios". Ugh.
16 */
17#define user_termio_to_kernel_termios(termios, termio) \
18({ \
19 unsigned short tmp; \
20 get_user(tmp, &(termio)->c_iflag); \
21 (termios)->c_iflag = (0xffff0000 & ((termios)->c_iflag)) | tmp; \
22 get_user(tmp, &(termio)->c_oflag); \
23 (termios)->c_oflag = (0xffff0000 & ((termios)->c_oflag)) | tmp; \
24 get_user(tmp, &(termio)->c_cflag); \
25 (termios)->c_cflag = (0xffff0000 & ((termios)->c_cflag)) | tmp; \
26 get_user(tmp, &(termio)->c_lflag); \
27 (termios)->c_lflag = (0xffff0000 & ((termios)->c_lflag)) | tmp; \
28 get_user((termios)->c_line, &(termio)->c_line); \
29 copy_from_user((termios)->c_cc, (termio)->c_cc, NCC); \
30})
31
32/*
33 * Translate a "termios" structure into a "termio". Ugh.
34 */
35#define kernel_termios_to_user_termio(termio, termios) \
36({ \
37 put_user((termios)->c_iflag, &(termio)->c_iflag); \
38 put_user((termios)->c_oflag, &(termio)->c_oflag); \
39 put_user((termios)->c_cflag, &(termio)->c_cflag); \
40 put_user((termios)->c_lflag, &(termio)->c_lflag); \
41 put_user((termios)->c_line, &(termio)->c_line); \
42 copy_to_user((termio)->c_cc, (termios)->c_cc, NCC); \
43})
44
45#define user_termios_to_kernel_termios(k, u) copy_from_user(k, u, sizeof(struct termios2))
46#define kernel_termios_to_user_termios(u, k) copy_to_user(u, k, sizeof(struct termios2))
47#define user_termios_to_kernel_termios_1(k, u) copy_from_user(k, u, sizeof(struct termios))
48#define kernel_termios_to_user_termios_1(u, k) copy_to_user(u, k, sizeof(struct termios))
49
50#endif /* _H8300_TERMIOS_H */
diff --git a/arch/h8300/include/asm/thread_info.h b/arch/h8300/include/asm/thread_info.h
deleted file mode 100644
index ec2f7777c65a..000000000000
--- a/arch/h8300/include/asm/thread_info.h
+++ /dev/null
@@ -1,103 +0,0 @@
1/* thread_info.h: h8300 low-level thread information
2 * adapted from the i386 and PPC versions by Yoshinori Sato <ysato@users.sourceforge.jp>
3 *
4 * Copyright (C) 2002 David Howells (dhowells@redhat.com)
5 * - Incorporating suggestions made by Linus Torvalds and Dave Miller
6 */
7
8#ifndef _ASM_THREAD_INFO_H
9#define _ASM_THREAD_INFO_H
10
11#include <asm/page.h>
12
13#ifdef __KERNEL__
14
15#ifndef __ASSEMBLY__
16
17/*
18 * low level task data.
19 * If you change this, change the TI_* offsets below to match.
20 */
21struct thread_info {
22 struct task_struct *task; /* main task structure */
23 struct exec_domain *exec_domain; /* execution domain */
24 unsigned long flags; /* low level flags */
25 int cpu; /* cpu we're on */
26 int preempt_count; /* 0 => preemptable, <0 => BUG */
27 struct restart_block restart_block;
28};
29
30/*
31 * macros/functions for gaining access to the thread information structure
32 */
33#define INIT_THREAD_INFO(tsk) \
34{ \
35 .task = &tsk, \
36 .exec_domain = &default_exec_domain, \
37 .flags = 0, \
38 .cpu = 0, \
39 .preempt_count = INIT_PREEMPT_COUNT, \
40 .restart_block = { \
41 .fn = do_no_restart_syscall, \
42 }, \
43}
44
45#define init_thread_info (init_thread_union.thread_info)
46#define init_stack (init_thread_union.stack)
47
48
49/*
50 * Size of kernel stack for each process. This must be a power of 2...
51 */
52#define THREAD_SIZE_ORDER 1
53#define THREAD_SIZE 8192 /* 2 pages */
54
55
56/* how to get the thread information struct from C */
57static inline struct thread_info *current_thread_info(void)
58{
59 struct thread_info *ti;
60 __asm__(
61 "mov.l sp, %0 \n\t"
62 "and.l %1, %0"
63 : "=&r"(ti)
64 : "i" (~(THREAD_SIZE-1))
65 );
66 return ti;
67}
68
69#endif /* __ASSEMBLY__ */
70
71/*
72 * Offsets in thread_info structure, used in assembly code
73 */
74#define TI_TASK 0
75#define TI_EXECDOMAIN 4
76#define TI_FLAGS 8
77#define TI_CPU 12
78#define TI_PRE_COUNT 16
79
80#define PREEMPT_ACTIVE 0x4000000
81
82/*
83 * thread information flag bit numbers
84 */
85#define TIF_SYSCALL_TRACE 0 /* syscall trace active */
86#define TIF_SIGPENDING 1 /* signal pending */
87#define TIF_NEED_RESCHED 2 /* rescheduling necessary */
88#define TIF_MEMDIE 4 /* is terminating due to OOM killer */
89#define TIF_RESTORE_SIGMASK 5 /* restore signal mask in do_signal() */
90#define TIF_NOTIFY_RESUME 6 /* callback before returning to user */
91
92/* as above, but as bit values */
93#define _TIF_SYSCALL_TRACE (1<<TIF_SYSCALL_TRACE)
94#define _TIF_SIGPENDING (1<<TIF_SIGPENDING)
95#define _TIF_NEED_RESCHED (1<<TIF_NEED_RESCHED)
96#define _TIF_NOTIFY_RESUME (1 << TIF_NOTIFY_RESUME)
97
98#define _TIF_WORK_MASK (_TIF_SIGPENDING | _TIF_NEED_RESCHED | \
99 _TIF_NOTIFY_RESUME)
100
101#endif /* __KERNEL__ */
102
103#endif /* _ASM_THREAD_INFO_H */
diff --git a/arch/h8300/include/asm/timer.h b/arch/h8300/include/asm/timer.h
deleted file mode 100644
index def80464d38f..000000000000
--- a/arch/h8300/include/asm/timer.h
+++ /dev/null
@@ -1,25 +0,0 @@
1#ifndef __H8300_TIMER_H
2#define __H8300_TIMER_H
3
4void h8300_timer_tick(void);
5void h8300_timer_setup(void);
6void h8300_gettod(unsigned int *year, unsigned int *mon, unsigned int *day,
7 unsigned int *hour, unsigned int *min, unsigned int *sec);
8
9#define TIMER_FREQ (CONFIG_CPU_CLOCK*10000) /* Timer input freq. */
10
11#define calc_param(cnt, div, rate, limit) \
12do { \
13 cnt = TIMER_FREQ / HZ; \
14 for (div = 0; div < ARRAY_SIZE(divide_rate); div++) { \
15 if (rate[div] == 0) \
16 continue; \
17 if ((cnt / rate[div]) > limit) \
18 break; \
19 } \
20 if (div == ARRAY_SIZE(divide_rate)) \
21 panic("Timer counter overflow"); \
22 cnt /= divide_rate[div]; \
23} while(0)
24
25#endif
diff --git a/arch/h8300/include/asm/timex.h b/arch/h8300/include/asm/timex.h
deleted file mode 100644
index 23e67013439f..000000000000
--- a/arch/h8300/include/asm/timex.h
+++ /dev/null
@@ -1,19 +0,0 @@
1/*
2 * linux/include/asm-h8300/timex.h
3 *
4 * H8/300 architecture timex specifications
5 */
6#ifndef _ASM_H8300_TIMEX_H
7#define _ASM_H8300_TIMEX_H
8
9#define CLOCK_TICK_RATE (CONFIG_CPU_CLOCK*1000/8192) /* Timer input freq. */
10
11typedef unsigned long cycles_t;
12extern short h8300_timer_count;
13
14static inline cycles_t get_cycles(void)
15{
16 return 0;
17}
18
19#endif
diff --git a/arch/h8300/include/asm/tlb.h b/arch/h8300/include/asm/tlb.h
deleted file mode 100644
index 7f0743051ad5..000000000000
--- a/arch/h8300/include/asm/tlb.h
+++ /dev/null
@@ -1,8 +0,0 @@
1#ifndef __H8300_TLB_H__
2#define __H8300_TLB_H__
3
4#define tlb_flush(tlb) do { } while(0)
5
6#include <asm-generic/tlb.h>
7
8#endif
diff --git a/arch/h8300/include/asm/tlbflush.h b/arch/h8300/include/asm/tlbflush.h
deleted file mode 100644
index 41c148a9208e..000000000000
--- a/arch/h8300/include/asm/tlbflush.h
+++ /dev/null
@@ -1,55 +0,0 @@
1#ifndef _H8300_TLBFLUSH_H
2#define _H8300_TLBFLUSH_H
3
4/*
5 * Copyright (C) 2000 Lineo, David McCullough <davidm@uclinux.org>
6 * Copyright (C) 2000-2002, Greg Ungerer <gerg@snapgear.com>
7 */
8
9#include <asm/setup.h>
10
11/*
12 * flush all user-space atc entries.
13 */
14static inline void __flush_tlb(void)
15{
16 BUG();
17}
18
19static inline void __flush_tlb_one(unsigned long addr)
20{
21 BUG();
22}
23
24#define flush_tlb() __flush_tlb()
25
26/*
27 * flush all atc entries (both kernel and user-space entries).
28 */
29static inline void flush_tlb_all(void)
30{
31 BUG();
32}
33
34static inline void flush_tlb_mm(struct mm_struct *mm)
35{
36 BUG();
37}
38
39static inline void flush_tlb_page(struct vm_area_struct *vma, unsigned long addr)
40{
41 BUG();
42}
43
44static inline void flush_tlb_range(struct mm_struct *mm,
45 unsigned long start, unsigned long end)
46{
47 BUG();
48}
49
50static inline void flush_tlb_kernel_page(unsigned long addr)
51{
52 BUG();
53}
54
55#endif /* _H8300_TLBFLUSH_H */
diff --git a/arch/h8300/include/asm/topology.h b/arch/h8300/include/asm/topology.h
deleted file mode 100644
index fdc121924d4c..000000000000
--- a/arch/h8300/include/asm/topology.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef _ASM_H8300_TOPOLOGY_H
2#define _ASM_H8300_TOPOLOGY_H
3
4#include <asm-generic/topology.h>
5
6#endif /* _ASM_H8300_TOPOLOGY_H */
diff --git a/arch/h8300/include/asm/traps.h b/arch/h8300/include/asm/traps.h
deleted file mode 100644
index 41cf6be02f68..000000000000
--- a/arch/h8300/include/asm/traps.h
+++ /dev/null
@@ -1,37 +0,0 @@
1/*
2 * linux/include/asm-h8300/traps.h
3 *
4 * Copyright (C) 2003 Yoshinori Sato <ysato@users.sourceforge.jp>
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file COPYING in the main directory of this archive
8 * for more details.
9 */
10
11#ifndef _H8300_TRAPS_H
12#define _H8300_TRAPS_H
13
14extern void system_call(void);
15extern void interrupt_entry(void);
16extern void trace_break(void);
17
18#define JMP_OP 0x5a000000
19#define JSR_OP 0x5e000000
20#define VECTOR(address) ((JMP_OP)|((unsigned long)address))
21#define REDIRECT(address) ((JSR_OP)|((unsigned long)address))
22
23#define TRACE_VEC 5
24
25#define TRAP0_VEC 8
26#define TRAP1_VEC 9
27#define TRAP2_VEC 10
28#define TRAP3_VEC 11
29
30#if defined(__H8300H__)
31#define NR_TRAPS 12
32#endif
33#if defined(__H8300S__)
34#define NR_TRAPS 16
35#endif
36
37#endif /* _H8300_TRAPS_H */
diff --git a/arch/h8300/include/asm/types.h b/arch/h8300/include/asm/types.h
deleted file mode 100644
index c012707f6037..000000000000
--- a/arch/h8300/include/asm/types.h
+++ /dev/null
@@ -1,9 +0,0 @@
1#ifndef _H8300_TYPES_H
2#define _H8300_TYPES_H
3
4#include <uapi/asm/types.h>
5
6
7#define BITS_PER_LONG 32
8
9#endif /* _H8300_TYPES_H */
diff --git a/arch/h8300/include/asm/uaccess.h b/arch/h8300/include/asm/uaccess.h
deleted file mode 100644
index 8725d1ad4272..000000000000
--- a/arch/h8300/include/asm/uaccess.h
+++ /dev/null
@@ -1,163 +0,0 @@
1#ifndef __H8300_UACCESS_H
2#define __H8300_UACCESS_H
3
4/*
5 * User space memory access functions
6 */
7#include <linux/sched.h>
8#include <linux/mm.h>
9#include <linux/string.h>
10
11#include <asm/segment.h>
12
13#define VERIFY_READ 0
14#define VERIFY_WRITE 1
15
16/* We let the MMU do all checking */
17#define access_ok(type, addr, size) __access_ok((unsigned long)addr,size)
18static inline int __access_ok(unsigned long addr, unsigned long size)
19{
20#define RANGE_CHECK_OK(addr, size, lower, upper) \
21 (((addr) >= (lower)) && (((addr) + (size)) < (upper)))
22
23 extern unsigned long _ramend;
24 return(RANGE_CHECK_OK(addr, size, 0L, (unsigned long)&_ramend));
25}
26
27/*
28 * The exception table consists of pairs of addresses: the first is the
29 * address of an instruction that is allowed to fault, and the second is
30 * the address at which the program should continue. No registers are
31 * modified, so it is entirely up to the continuation code to figure out
32 * what to do.
33 *
34 * All the routines below use bits of fixup code that are out of line
35 * with the main instruction path. This means when everything is well,
36 * we don't even have to jump over them. Further, they do not intrude
37 * on our cache or tlb entries.
38 */
39
40struct exception_table_entry
41{
42 unsigned long insn, fixup;
43};
44
45/* Returns 0 if exception not found and fixup otherwise. */
46extern unsigned long search_exception_table(unsigned long);
47
48
49/*
50 * These are the main single-value transfer routines. They automatically
51 * use the right size if we just have the right pointer type.
52 */
53
54#define put_user(x, ptr) \
55({ \
56 int __pu_err = 0; \
57 typeof(*(ptr)) __pu_val = (x); \
58 switch (sizeof (*(ptr))) { \
59 case 1: \
60 case 2: \
61 case 4: \
62 *(ptr) = (__pu_val); \
63 break; \
64 case 8: \
65 memcpy(ptr, &__pu_val, sizeof (*(ptr))); \
66 break; \
67 default: \
68 __pu_err = __put_user_bad(); \
69 break; \
70 } \
71 __pu_err; \
72})
73#define __put_user(x, ptr) put_user(x, ptr)
74
75extern int __put_user_bad(void);
76
77/*
78 * Tell gcc we read from memory instead of writing: this is because
79 * we do not write to any memory gcc knows about, so there are no
80 * aliasing issues.
81 */
82
83#define __ptr(x) ((unsigned long *)(x))
84
85/*
86 * Tell gcc we read from memory instead of writing: this is because
87 * we do not write to any memory gcc knows about, so there are no
88 * aliasing issues.
89 */
90
91#define get_user(x, ptr) \
92({ \
93 int __gu_err = 0; \
94 typeof(*(ptr)) __gu_val = *ptr; \
95 switch (sizeof(*(ptr))) { \
96 case 1: \
97 case 2: \
98 case 4: \
99 case 8: \
100 break; \
101 default: \
102 __gu_err = __get_user_bad(); \
103 break; \
104 } \
105 (x) = __gu_val; \
106 __gu_err; \
107})
108#define __get_user(x, ptr) get_user(x, ptr)
109
110extern int __get_user_bad(void);
111
112#define copy_from_user(to, from, n) (memcpy(to, from, n), 0)
113#define copy_to_user(to, from, n) (memcpy(to, from, n), 0)
114
115#define __copy_from_user(to, from, n) copy_from_user(to, from, n)
116#define __copy_to_user(to, from, n) copy_to_user(to, from, n)
117#define __copy_to_user_inatomic __copy_to_user
118#define __copy_from_user_inatomic __copy_from_user
119
120#define copy_to_user_ret(to,from,n,retval) ({ if (copy_to_user(to,from,n)) return retval; })
121
122#define copy_from_user_ret(to,from,n,retval) ({ if (copy_from_user(to,from,n)) return retval; })
123
124/*
125 * Copy a null terminated string from userspace.
126 */
127
128static inline long
129strncpy_from_user(char *dst, const char *src, long count)
130{
131 char *tmp;
132 strncpy(dst, src, count);
133 for (tmp = dst; *tmp && count > 0; tmp++, count--)
134 ;
135 return(tmp - dst); /* DAVIDM should we count a NUL ? check getname */
136}
137
138/*
139 * Return the size of a string (including the ending 0)
140 *
141 * Return 0 on exception, a value greater than N if too long
142 */
143static inline long strnlen_user(const char *src, long n)
144{
145 return(strlen(src) + 1); /* DAVIDM make safer */
146}
147
148#define strlen_user(str) strnlen_user(str, 32767)
149
150/*
151 * Zero Userspace
152 */
153
154static inline unsigned long
155clear_user(void *to, unsigned long n)
156{
157 memset(to, 0, n);
158 return 0;
159}
160
161#define __clear_user clear_user
162
163#endif /* _H8300_UACCESS_H */
diff --git a/arch/h8300/include/asm/ucontext.h b/arch/h8300/include/asm/ucontext.h
deleted file mode 100644
index 0bcf8f85fab9..000000000000
--- a/arch/h8300/include/asm/ucontext.h
+++ /dev/null
@@ -1,12 +0,0 @@
1#ifndef _H8300_UCONTEXT_H
2#define _H8300_UCONTEXT_H
3
4struct ucontext {
5 unsigned long uc_flags;
6 struct ucontext *uc_link;
7 stack_t uc_stack;
8 struct sigcontext uc_mcontext;
9 sigset_t uc_sigmask; /* mask last for extensibility */
10};
11
12#endif
diff --git a/arch/h8300/include/asm/unaligned.h b/arch/h8300/include/asm/unaligned.h
deleted file mode 100644
index b8d06c70c2da..000000000000
--- a/arch/h8300/include/asm/unaligned.h
+++ /dev/null
@@ -1,11 +0,0 @@
1#ifndef _ASM_H8300_UNALIGNED_H
2#define _ASM_H8300_UNALIGNED_H
3
4#include <linux/unaligned/be_memmove.h>
5#include <linux/unaligned/le_byteshift.h>
6#include <linux/unaligned/generic.h>
7
8#define get_unaligned __get_unaligned_be
9#define put_unaligned __put_unaligned_be
10
11#endif /* _ASM_H8300_UNALIGNED_H */
diff --git a/arch/h8300/include/asm/unistd.h b/arch/h8300/include/asm/unistd.h
deleted file mode 100644
index ab671ecf5196..000000000000
--- a/arch/h8300/include/asm/unistd.h
+++ /dev/null
@@ -1,36 +0,0 @@
1#ifndef _ASM_H8300_UNISTD_H_
2#define _ASM_H8300_UNISTD_H_
3
4#include <uapi/asm/unistd.h>
5
6
7#define NR_syscalls 321
8
9#define __ARCH_WANT_OLD_READDIR
10#define __ARCH_WANT_OLD_STAT
11#define __ARCH_WANT_STAT64
12#define __ARCH_WANT_SYS_ALARM
13#define __ARCH_WANT_SYS_GETHOSTNAME
14#define __ARCH_WANT_SYS_IPC
15#define __ARCH_WANT_SYS_PAUSE
16#define __ARCH_WANT_SYS_SGETMASK
17#define __ARCH_WANT_SYS_SIGNAL
18#define __ARCH_WANT_SYS_TIME
19#define __ARCH_WANT_SYS_UTIME
20#define __ARCH_WANT_SYS_WAITPID
21#define __ARCH_WANT_SYS_SOCKETCALL
22#define __ARCH_WANT_SYS_FADVISE64
23#define __ARCH_WANT_SYS_GETPGRP
24#define __ARCH_WANT_SYS_LLSEEK
25#define __ARCH_WANT_SYS_NICE
26#define __ARCH_WANT_SYS_OLD_GETRLIMIT
27#define __ARCH_WANT_SYS_OLD_MMAP
28#define __ARCH_WANT_SYS_OLD_SELECT
29#define __ARCH_WANT_SYS_OLDUMOUNT
30#define __ARCH_WANT_SYS_SIGPENDING
31#define __ARCH_WANT_SYS_SIGPROCMASK
32#define __ARCH_WANT_SYS_FORK
33#define __ARCH_WANT_SYS_VFORK
34#define __ARCH_WANT_SYS_CLONE
35
36#endif /* _ASM_H8300_UNISTD_H_ */
diff --git a/arch/h8300/include/asm/user.h b/arch/h8300/include/asm/user.h
deleted file mode 100644
index 14a9e18950f1..000000000000
--- a/arch/h8300/include/asm/user.h
+++ /dev/null
@@ -1,75 +0,0 @@
1#ifndef _H8300_USER_H
2#define _H8300_USER_H
3
4#include <asm/page.h>
5
6/* Core file format: The core file is written in such a way that gdb
7 can understand it and provide useful information to the user (under
8 linux we use the 'trad-core' bfd). There are quite a number of
9 obstacles to being able to view the contents of the floating point
10 registers, and until these are solved you will not be able to view the
11 contents of them. Actually, you can read in the core file and look at
12 the contents of the user struct to find out what the floating point
13 registers contain.
14 The actual file contents are as follows:
15 UPAGE: 1 page consisting of a user struct that tells gdb what is present
16 in the file. Directly after this is a copy of the task_struct, which
17 is currently not used by gdb, but it may come in useful at some point.
18 All of the registers are stored as part of the upage. The upage should
19 always be only one page.
20 DATA: The data area is stored. We use current->end_text to
21 current->brk to pick up all of the user variables, plus any memory
22 that may have been malloced. No attempt is made to determine if a page
23 is demand-zero or if a page is totally unused, we just cover the entire
24 range. All of the addresses are rounded in such a way that an integral
25 number of pages is written.
26 STACK: We need the stack information in order to get a meaningful
27 backtrace. We need to write the data from (esp) to
28 current->start_stack, so we round each of these off in order to be able
29 to write an integer number of pages.
30 The minimum core file size is 3 pages, or 12288 bytes.
31*/
32
33/* This is the old layout of "struct pt_regs" as of Linux 1.x, and
34 is still the layout used by user (the new pt_regs doesn't have
35 all registers). */
36struct user_regs_struct {
37 long er1,er2,er3,er4,er5,er6;
38 long er0;
39 long usp;
40 long orig_er0;
41 short ccr;
42 long pc;
43};
44
45
46/* When the kernel dumps core, it starts by dumping the user struct -
47 this will be used by gdb to figure out where the data and stack segments
48 are within the file, and what virtual addresses to use. */
49struct user{
50/* We start with the registers, to mimic the way that "memory" is returned
51 from the ptrace(3,...) function. */
52 struct user_regs_struct regs; /* Where the registers are actually stored */
53/* ptrace does not yet supply these. Someday.... */
54/* The rest of this junk is to help gdb figure out what goes where */
55 unsigned long int u_tsize; /* Text segment size (pages). */
56 unsigned long int u_dsize; /* Data segment size (pages). */
57 unsigned long int u_ssize; /* Stack segment size (pages). */
58 unsigned long start_code; /* Starting virtual address of text. */
59 unsigned long start_stack; /* Starting virtual address of stack area.
60 This is actually the bottom of the stack,
61 the top of the stack is always found in the
62 esp register. */
63 long int signal; /* Signal that caused the core dump. */
64 int reserved; /* No longer used */
65 unsigned long u_ar0; /* Used by gdb to help find the values for */
66 /* the registers. */
67 unsigned long magic; /* To uniquely identify a core file */
68 char u_comm[32]; /* User command that was responsible */
69};
70#define NBPG PAGE_SIZE
71#define UPAGES 1
72#define HOST_TEXT_START_ADDR (u.start_code)
73#define HOST_STACK_END_ADDR (u.start_stack + u.u_ssize * NBPG)
74
75#endif
diff --git a/arch/h8300/include/asm/virtconvert.h b/arch/h8300/include/asm/virtconvert.h
deleted file mode 100644
index 19cfd62b11c3..000000000000
--- a/arch/h8300/include/asm/virtconvert.h
+++ /dev/null
@@ -1,20 +0,0 @@
1#ifndef __H8300_VIRT_CONVERT__
2#define __H8300_VIRT_CONVERT__
3
4/*
5 * Macros used for converting between virtual and physical mappings.
6 */
7
8#ifdef __KERNEL__
9
10#include <asm/setup.h>
11#include <asm/page.h>
12
13#define phys_to_virt(vaddr) ((void *) (vaddr))
14#define virt_to_phys(vaddr) ((unsigned long) (vaddr))
15
16#define virt_to_bus virt_to_phys
17#define bus_to_virt phys_to_virt
18
19#endif
20#endif
diff --git a/arch/h8300/include/uapi/asm/Kbuild b/arch/h8300/include/uapi/asm/Kbuild
deleted file mode 100644
index 040178cdb3eb..000000000000
--- a/arch/h8300/include/uapi/asm/Kbuild
+++ /dev/null
@@ -1,34 +0,0 @@
1# UAPI Header export list
2include include/uapi/asm-generic/Kbuild.asm
3
4header-y += auxvec.h
5header-y += bitsperlong.h
6header-y += byteorder.h
7header-y += errno.h
8header-y += fcntl.h
9header-y += ioctl.h
10header-y += ioctls.h
11header-y += ipcbuf.h
12header-y += kvm_para.h
13header-y += mman.h
14header-y += msgbuf.h
15header-y += param.h
16header-y += poll.h
17header-y += posix_types.h
18header-y += ptrace.h
19header-y += resource.h
20header-y += sembuf.h
21header-y += setup.h
22header-y += shmbuf.h
23header-y += sigcontext.h
24header-y += siginfo.h
25header-y += signal.h
26header-y += socket.h
27header-y += sockios.h
28header-y += stat.h
29header-y += statfs.h
30header-y += swab.h
31header-y += termbits.h
32header-y += termios.h
33header-y += types.h
34header-y += unistd.h
diff --git a/arch/h8300/include/uapi/asm/auxvec.h b/arch/h8300/include/uapi/asm/auxvec.h
deleted file mode 100644
index 1d36fe38b088..000000000000
--- a/arch/h8300/include/uapi/asm/auxvec.h
+++ /dev/null
@@ -1,4 +0,0 @@
1#ifndef __ASMH8300_AUXVEC_H
2#define __ASMH8300_AUXVEC_H
3
4#endif
diff --git a/arch/h8300/include/uapi/asm/bitsperlong.h b/arch/h8300/include/uapi/asm/bitsperlong.h
deleted file mode 100644
index 6dc0bb0c13b2..000000000000
--- a/arch/h8300/include/uapi/asm/bitsperlong.h
+++ /dev/null
@@ -1 +0,0 @@
1#include <asm-generic/bitsperlong.h>
diff --git a/arch/h8300/include/uapi/asm/byteorder.h b/arch/h8300/include/uapi/asm/byteorder.h
deleted file mode 100644
index 13539da99efd..000000000000
--- a/arch/h8300/include/uapi/asm/byteorder.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef _H8300_BYTEORDER_H
2#define _H8300_BYTEORDER_H
3
4#include <linux/byteorder/big_endian.h>
5
6#endif /* _H8300_BYTEORDER_H */
diff --git a/arch/h8300/include/uapi/asm/errno.h b/arch/h8300/include/uapi/asm/errno.h
deleted file mode 100644
index 0c2f5641fdcc..000000000000
--- a/arch/h8300/include/uapi/asm/errno.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef _H8300_ERRNO_H
2#define _H8300_ERRNO_H
3
4#include <asm-generic/errno.h>
5
6#endif /* _H8300_ERRNO_H */
diff --git a/arch/h8300/include/uapi/asm/fcntl.h b/arch/h8300/include/uapi/asm/fcntl.h
deleted file mode 100644
index 1952cb2e3b06..000000000000
--- a/arch/h8300/include/uapi/asm/fcntl.h
+++ /dev/null
@@ -1,11 +0,0 @@
1#ifndef _H8300_FCNTL_H
2#define _H8300_FCNTL_H
3
4#define O_DIRECTORY 040000 /* must be a directory */
5#define O_NOFOLLOW 0100000 /* don't follow links */
6#define O_DIRECT 0200000 /* direct disk access hint - currently ignored */
7#define O_LARGEFILE 0400000
8
9#include <asm-generic/fcntl.h>
10
11#endif /* _H8300_FCNTL_H */
diff --git a/arch/h8300/include/uapi/asm/ioctl.h b/arch/h8300/include/uapi/asm/ioctl.h
deleted file mode 100644
index b279fe06dfe5..000000000000
--- a/arch/h8300/include/uapi/asm/ioctl.h
+++ /dev/null
@@ -1 +0,0 @@
1#include <asm-generic/ioctl.h>
diff --git a/arch/h8300/include/uapi/asm/ioctls.h b/arch/h8300/include/uapi/asm/ioctls.h
deleted file mode 100644
index 30eaed2facdb..000000000000
--- a/arch/h8300/include/uapi/asm/ioctls.h
+++ /dev/null
@@ -1,8 +0,0 @@
1#ifndef __ARCH_H8300_IOCTLS_H__
2#define __ARCH_H8300_IOCTLS_H__
3
4#define FIOQSIZE 0x545E
5
6#include <asm-generic/ioctls.h>
7
8#endif /* __ARCH_H8300_IOCTLS_H__ */
diff --git a/arch/h8300/include/uapi/asm/ipcbuf.h b/arch/h8300/include/uapi/asm/ipcbuf.h
deleted file mode 100644
index 84c7e51cb6d0..000000000000
--- a/arch/h8300/include/uapi/asm/ipcbuf.h
+++ /dev/null
@@ -1 +0,0 @@
1#include <asm-generic/ipcbuf.h>
diff --git a/arch/h8300/include/uapi/asm/kvm_para.h b/arch/h8300/include/uapi/asm/kvm_para.h
deleted file mode 100644
index 14fab8f0b957..000000000000
--- a/arch/h8300/include/uapi/asm/kvm_para.h
+++ /dev/null
@@ -1 +0,0 @@
1#include <asm-generic/kvm_para.h>
diff --git a/arch/h8300/include/uapi/asm/mman.h b/arch/h8300/include/uapi/asm/mman.h
deleted file mode 100644
index 8eebf89f5ab1..000000000000
--- a/arch/h8300/include/uapi/asm/mman.h
+++ /dev/null
@@ -1 +0,0 @@
1#include <asm-generic/mman.h>
diff --git a/arch/h8300/include/uapi/asm/msgbuf.h b/arch/h8300/include/uapi/asm/msgbuf.h
deleted file mode 100644
index 6b148cd09aa5..000000000000
--- a/arch/h8300/include/uapi/asm/msgbuf.h
+++ /dev/null
@@ -1,31 +0,0 @@
1#ifndef _H8300_MSGBUF_H
2#define _H8300_MSGBUF_H
3
4/*
5 * The msqid64_ds structure for H8/300 architecture.
6 * Note extra padding because this structure is passed back and forth
7 * between kernel and user space.
8 *
9 * Pad space is left for:
10 * - 64-bit time_t to solve y2038 problem
11 * - 2 miscellaneous 32-bit values
12 */
13
14struct msqid64_ds {
15 struct ipc64_perm msg_perm;
16 __kernel_time_t msg_stime; /* last msgsnd time */
17 unsigned long __unused1;
18 __kernel_time_t msg_rtime; /* last msgrcv time */
19 unsigned long __unused2;
20 __kernel_time_t msg_ctime; /* last change time */
21 unsigned long __unused3;
22 unsigned long msg_cbytes; /* current number of bytes on queue */
23 unsigned long msg_qnum; /* number of messages in queue */
24 unsigned long msg_qbytes; /* max number of bytes on queue */
25 __kernel_pid_t msg_lspid; /* pid of last msgsnd */
26 __kernel_pid_t msg_lrpid; /* last receive pid */
27 unsigned long __unused4;
28 unsigned long __unused5;
29};
30
31#endif /* _H8300_MSGBUF_H */
diff --git a/arch/h8300/include/uapi/asm/param.h b/arch/h8300/include/uapi/asm/param.h
deleted file mode 100644
index 3dd18ae15f03..000000000000
--- a/arch/h8300/include/uapi/asm/param.h
+++ /dev/null
@@ -1,16 +0,0 @@
1#ifndef _UAPI_H8300_PARAM_H
2#define _UAPI_H8300_PARAM_H
3
4#ifndef __KERNEL__
5#define HZ 100
6#endif
7
8#define EXEC_PAGESIZE 4096
9
10#ifndef NOGROUP
11#define NOGROUP (-1)
12#endif
13
14#define MAXHOSTNAMELEN 64 /* max length of hostname */
15
16#endif /* _UAPI_H8300_PARAM_H */
diff --git a/arch/h8300/include/uapi/asm/poll.h b/arch/h8300/include/uapi/asm/poll.h
deleted file mode 100644
index f61540c22d94..000000000000
--- a/arch/h8300/include/uapi/asm/poll.h
+++ /dev/null
@@ -1,11 +0,0 @@
1#ifndef __H8300_POLL_H
2#define __H8300_POLL_H
3
4#define POLLWRNORM POLLOUT
5#define POLLWRBAND 256
6
7#include <asm-generic/poll.h>
8
9#undef POLLREMOVE
10
11#endif
diff --git a/arch/h8300/include/uapi/asm/posix_types.h b/arch/h8300/include/uapi/asm/posix_types.h
deleted file mode 100644
index 91e62ba4c7b0..000000000000
--- a/arch/h8300/include/uapi/asm/posix_types.h
+++ /dev/null
@@ -1,26 +0,0 @@
1#ifndef __ARCH_H8300_POSIX_TYPES_H
2#define __ARCH_H8300_POSIX_TYPES_H
3
4/*
5 * This file is generally used by user-level software, so you need to
6 * be a little careful about namespace pollution etc. Also, we cannot
7 * assume GCC is being used.
8 */
9
10typedef unsigned short __kernel_mode_t;
11#define __kernel_mode_t __kernel_mode_t
12
13typedef unsigned short __kernel_ipc_pid_t;
14#define __kernel_ipc_pid_t __kernel_ipc_pid_t
15
16typedef unsigned short __kernel_uid_t;
17typedef unsigned short __kernel_gid_t;
18#define __kernel_uid_t __kernel_uid_t
19
20typedef unsigned short __kernel_old_uid_t;
21typedef unsigned short __kernel_old_gid_t;
22#define __kernel_old_uid_t __kernel_old_uid_t
23
24#include <asm-generic/posix_types.h>
25
26#endif
diff --git a/arch/h8300/include/uapi/asm/ptrace.h b/arch/h8300/include/uapi/asm/ptrace.h
deleted file mode 100644
index ef39ec5977b6..000000000000
--- a/arch/h8300/include/uapi/asm/ptrace.h
+++ /dev/null
@@ -1,44 +0,0 @@
1#ifndef _UAPI_H8300_PTRACE_H
2#define _UAPI_H8300_PTRACE_H
3
4#ifndef __ASSEMBLY__
5
6#define PT_ER1 0
7#define PT_ER2 1
8#define PT_ER3 2
9#define PT_ER4 3
10#define PT_ER5 4
11#define PT_ER6 5
12#define PT_ER0 6
13#define PT_ORIG_ER0 7
14#define PT_CCR 8
15#define PT_PC 9
16#define PT_USP 10
17#define PT_EXR 12
18
19/* this struct defines the way the registers are stored on the
20 stack during a system call. */
21
22struct pt_regs {
23 long retpc;
24 long er4;
25 long er5;
26 long er6;
27 long er3;
28 long er2;
29 long er1;
30 long orig_er0;
31 unsigned short ccr;
32 long er0;
33 long vector;
34#if defined(CONFIG_CPU_H8S)
35 unsigned short exr;
36#endif
37 unsigned long pc;
38} __attribute__((aligned(2),packed));
39
40#define PTRACE_GETREGS 12
41#define PTRACE_SETREGS 13
42
43#endif /* __ASSEMBLY__ */
44#endif /* _UAPI_H8300_PTRACE_H */
diff --git a/arch/h8300/include/uapi/asm/resource.h b/arch/h8300/include/uapi/asm/resource.h
deleted file mode 100644
index 46c5f4391607..000000000000
--- a/arch/h8300/include/uapi/asm/resource.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef _H8300_RESOURCE_H
2#define _H8300_RESOURCE_H
3
4#include <asm-generic/resource.h>
5
6#endif /* _H8300_RESOURCE_H */
diff --git a/arch/h8300/include/uapi/asm/sembuf.h b/arch/h8300/include/uapi/asm/sembuf.h
deleted file mode 100644
index e04a3ec0cb92..000000000000
--- a/arch/h8300/include/uapi/asm/sembuf.h
+++ /dev/null
@@ -1,25 +0,0 @@
1#ifndef _H8300_SEMBUF_H
2#define _H8300_SEMBUF_H
3
4/*
5 * The semid64_ds structure for m68k architecture.
6 * Note extra padding because this structure is passed back and forth
7 * between kernel and user space.
8 *
9 * Pad space is left for:
10 * - 64-bit time_t to solve y2038 problem
11 * - 2 miscellaneous 32-bit values
12 */
13
14struct semid64_ds {
15 struct ipc64_perm sem_perm; /* permissions .. see ipc.h */
16 __kernel_time_t sem_otime; /* last semop time */
17 unsigned long __unused1;
18 __kernel_time_t sem_ctime; /* last change time */
19 unsigned long __unused2;
20 unsigned long sem_nsems; /* no. of semaphores in array */
21 unsigned long __unused3;
22 unsigned long __unused4;
23};
24
25#endif /* _H8300_SEMBUF_H */
diff --git a/arch/h8300/include/uapi/asm/setup.h b/arch/h8300/include/uapi/asm/setup.h
deleted file mode 100644
index e2c600e96733..000000000000
--- a/arch/h8300/include/uapi/asm/setup.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef __H8300_SETUP_H
2#define __H8300_SETUP_H
3
4#define COMMAND_LINE_SIZE 512
5
6#endif
diff --git a/arch/h8300/include/uapi/asm/shmbuf.h b/arch/h8300/include/uapi/asm/shmbuf.h
deleted file mode 100644
index 64e77993a7a9..000000000000
--- a/arch/h8300/include/uapi/asm/shmbuf.h
+++ /dev/null
@@ -1,42 +0,0 @@
1#ifndef _H8300_SHMBUF_H
2#define _H8300_SHMBUF_H
3
4/*
5 * The shmid64_ds structure for m68k architecture.
6 * Note extra padding because this structure is passed back and forth
7 * between kernel and user space.
8 *
9 * Pad space is left for:
10 * - 64-bit time_t to solve y2038 problem
11 * - 2 miscellaneous 32-bit values
12 */
13
14struct shmid64_ds {
15 struct ipc64_perm shm_perm; /* operation perms */
16 size_t shm_segsz; /* size of segment (bytes) */
17 __kernel_time_t shm_atime; /* last attach time */
18 unsigned long __unused1;
19 __kernel_time_t shm_dtime; /* last detach time */
20 unsigned long __unused2;
21 __kernel_time_t shm_ctime; /* last change time */
22 unsigned long __unused3;
23 __kernel_pid_t shm_cpid; /* pid of creator */
24 __kernel_pid_t shm_lpid; /* pid of last operator */
25 unsigned long shm_nattch; /* no. of current attaches */
26 unsigned long __unused4;
27 unsigned long __unused5;
28};
29
30struct shminfo64 {
31 unsigned long shmmax;
32 unsigned long shmmin;
33 unsigned long shmmni;
34 unsigned long shmseg;
35 unsigned long shmall;
36 unsigned long __unused1;
37 unsigned long __unused2;
38 unsigned long __unused3;
39 unsigned long __unused4;
40};
41
42#endif /* _H8300_SHMBUF_H */
diff --git a/arch/h8300/include/uapi/asm/sigcontext.h b/arch/h8300/include/uapi/asm/sigcontext.h
deleted file mode 100644
index e4b81505f8f8..000000000000
--- a/arch/h8300/include/uapi/asm/sigcontext.h
+++ /dev/null
@@ -1,18 +0,0 @@
1#ifndef _ASM_H8300_SIGCONTEXT_H
2#define _ASM_H8300_SIGCONTEXT_H
3
4struct sigcontext {
5 unsigned long sc_mask; /* old sigmask */
6 unsigned long sc_usp; /* old user stack pointer */
7 unsigned long sc_er0;
8 unsigned long sc_er1;
9 unsigned long sc_er2;
10 unsigned long sc_er3;
11 unsigned long sc_er4;
12 unsigned long sc_er5;
13 unsigned long sc_er6;
14 unsigned short sc_ccr;
15 unsigned long sc_pc;
16};
17
18#endif
diff --git a/arch/h8300/include/uapi/asm/siginfo.h b/arch/h8300/include/uapi/asm/siginfo.h
deleted file mode 100644
index bc8fbea931a5..000000000000
--- a/arch/h8300/include/uapi/asm/siginfo.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef _H8300_SIGINFO_H
2#define _H8300_SIGINFO_H
3
4#include <asm-generic/siginfo.h>
5
6#endif
diff --git a/arch/h8300/include/uapi/asm/signal.h b/arch/h8300/include/uapi/asm/signal.h
deleted file mode 100644
index af3a6c37fee6..000000000000
--- a/arch/h8300/include/uapi/asm/signal.h
+++ /dev/null
@@ -1,115 +0,0 @@
1#ifndef _UAPI_H8300_SIGNAL_H
2#define _UAPI_H8300_SIGNAL_H
3
4#include <linux/types.h>
5
6/* Avoid too many header ordering problems. */
7struct siginfo;
8
9#ifndef __KERNEL__
10/* Here we must cater to libcs that poke about in kernel headers. */
11
12#define NSIG 32
13typedef unsigned long sigset_t;
14
15#endif /* __KERNEL__ */
16
17#define SIGHUP 1
18#define SIGINT 2
19#define SIGQUIT 3
20#define SIGILL 4
21#define SIGTRAP 5
22#define SIGABRT 6
23#define SIGIOT 6
24#define SIGBUS 7
25#define SIGFPE 8
26#define SIGKILL 9
27#define SIGUSR1 10
28#define SIGSEGV 11
29#define SIGUSR2 12
30#define SIGPIPE 13
31#define SIGALRM 14
32#define SIGTERM 15
33#define SIGSTKFLT 16
34#define SIGCHLD 17
35#define SIGCONT 18
36#define SIGSTOP 19
37#define SIGTSTP 20
38#define SIGTTIN 21
39#define SIGTTOU 22
40#define SIGURG 23
41#define SIGXCPU 24
42#define SIGXFSZ 25
43#define SIGVTALRM 26
44#define SIGPROF 27
45#define SIGWINCH 28
46#define SIGIO 29
47#define SIGPOLL SIGIO
48/*
49#define SIGLOST 29
50*/
51#define SIGPWR 30
52#define SIGSYS 31
53#define SIGUNUSED 31
54
55/* These should not be considered constants from userland. */
56#define SIGRTMIN 32
57#define SIGRTMAX _NSIG
58
59/*
60 * SA_FLAGS values:
61 *
62 * SA_ONSTACK indicates that a registered stack_t will be used.
63 * SA_RESTART flag to get restarting signals (which were the default long ago)
64 * SA_NOCLDSTOP flag to turn off SIGCHLD when children stop.
65 * SA_RESETHAND clears the handler when the signal is delivered.
66 * SA_NOCLDWAIT flag on SIGCHLD to inhibit zombies.
67 * SA_NODEFER prevents the current signal from being masked in the handler.
68 *
69 * SA_ONESHOT and SA_NOMASK are the historical Linux names for the Single
70 * Unix names RESETHAND and NODEFER respectively.
71 */
72#define SA_NOCLDSTOP 0x00000001
73#define SA_NOCLDWAIT 0x00000002 /* not supported yet */
74#define SA_SIGINFO 0x00000004
75#define SA_ONSTACK 0x08000000
76#define SA_RESTART 0x10000000
77#define SA_NODEFER 0x40000000
78#define SA_RESETHAND 0x80000000
79
80#define SA_NOMASK SA_NODEFER
81#define SA_ONESHOT SA_RESETHAND
82
83#define SA_RESTORER 0x04000000
84
85#define MINSIGSTKSZ 2048
86#define SIGSTKSZ 8192
87
88#include <asm-generic/signal-defs.h>
89
90#ifndef __KERNEL__
91/* Here we must cater to libcs that poke about in kernel headers. */
92
93struct sigaction {
94 union {
95 __sighandler_t _sa_handler;
96 void (*_sa_sigaction)(int, struct siginfo *, void *);
97 } _u;
98 sigset_t sa_mask;
99 unsigned long sa_flags;
100 void (*sa_restorer)(void);
101};
102
103#define sa_handler _u._sa_handler
104#define sa_sigaction _u._sa_sigaction
105
106#endif /* __KERNEL__ */
107
108typedef struct sigaltstack {
109 void *ss_sp;
110 int ss_flags;
111 size_t ss_size;
112} stack_t;
113
114
115#endif /* _UAPI_H8300_SIGNAL_H */
diff --git a/arch/h8300/include/uapi/asm/socket.h b/arch/h8300/include/uapi/asm/socket.h
deleted file mode 100644
index 9490758c5e2b..000000000000
--- a/arch/h8300/include/uapi/asm/socket.h
+++ /dev/null
@@ -1,79 +0,0 @@
1#ifndef _ASM_SOCKET_H
2#define _ASM_SOCKET_H
3
4#include <asm/sockios.h>
5
6/* For setsockoptions(2) */
7#define SOL_SOCKET 1
8
9#define SO_DEBUG 1
10#define SO_REUSEADDR 2
11#define SO_TYPE 3
12#define SO_ERROR 4
13#define SO_DONTROUTE 5
14#define SO_BROADCAST 6
15#define SO_SNDBUF 7
16#define SO_RCVBUF 8
17#define SO_SNDBUFFORCE 32
18#define SO_RCVBUFFORCE 33
19#define SO_KEEPALIVE 9
20#define SO_OOBINLINE 10
21#define SO_NO_CHECK 11
22#define SO_PRIORITY 12
23#define SO_LINGER 13
24#define SO_BSDCOMPAT 14
25#define SO_REUSEPORT 15
26#define SO_PASSCRED 16
27#define SO_PEERCRED 17
28#define SO_RCVLOWAT 18
29#define SO_SNDLOWAT 19
30#define SO_RCVTIMEO 20
31#define SO_SNDTIMEO 21
32
33/* Security levels - as per NRL IPv6 - don't actually do anything */
34#define SO_SECURITY_AUTHENTICATION 22
35#define SO_SECURITY_ENCRYPTION_TRANSPORT 23
36#define SO_SECURITY_ENCRYPTION_NETWORK 24
37
38#define SO_BINDTODEVICE 25
39
40/* Socket filtering */
41#define SO_ATTACH_FILTER 26
42#define SO_DETACH_FILTER 27
43#define SO_GET_FILTER SO_ATTACH_FILTER
44
45#define SO_PEERNAME 28
46#define SO_TIMESTAMP 29
47#define SCM_TIMESTAMP SO_TIMESTAMP
48
49#define SO_ACCEPTCONN 30
50
51#define SO_PEERSEC 31
52#define SO_PASSSEC 34
53#define SO_TIMESTAMPNS 35
54#define SCM_TIMESTAMPNS SO_TIMESTAMPNS
55
56#define SO_MARK 36
57
58#define SO_TIMESTAMPING 37
59#define SCM_TIMESTAMPING SO_TIMESTAMPING
60
61#define SO_PROTOCOL 38
62#define SO_DOMAIN 39
63
64#define SO_RXQ_OVFL 40
65
66#define SO_WIFI_STATUS 41
67#define SCM_WIFI_STATUS SO_WIFI_STATUS
68#define SO_PEEK_OFF 42
69
70/* Instruct lower device to use last 4-bytes of skb data as FCS */
71#define SO_NOFCS 43
72
73#define SO_LOCK_FILTER 44
74
75#define SO_SELECT_ERR_QUEUE 45
76
77#define SO_BUSY_POLL 46
78
79#endif /* _ASM_SOCKET_H */
diff --git a/arch/h8300/include/uapi/asm/sockios.h b/arch/h8300/include/uapi/asm/sockios.h
deleted file mode 100644
index e9c7ec810c23..000000000000
--- a/arch/h8300/include/uapi/asm/sockios.h
+++ /dev/null
@@ -1,13 +0,0 @@
1#ifndef __ARCH_H8300_SOCKIOS__
2#define __ARCH_H8300_SOCKIOS__
3
4/* Socket-level I/O control calls. */
5#define FIOSETOWN 0x8901
6#define SIOCSPGRP 0x8902
7#define FIOGETOWN 0x8903
8#define SIOCGPGRP 0x8904
9#define SIOCATMARK 0x8905
10#define SIOCGSTAMP 0x8906 /* Get stamp (timeval) */
11#define SIOCGSTAMPNS 0x8907 /* Get stamp (timespec) */
12
13#endif /* __ARCH_H8300_SOCKIOS__ */
diff --git a/arch/h8300/include/uapi/asm/stat.h b/arch/h8300/include/uapi/asm/stat.h
deleted file mode 100644
index 62c3cc24dfe6..000000000000
--- a/arch/h8300/include/uapi/asm/stat.h
+++ /dev/null
@@ -1,78 +0,0 @@
1#ifndef _H8300_STAT_H
2#define _H8300_STAT_H
3
4struct __old_kernel_stat {
5 unsigned short st_dev;
6 unsigned short st_ino;
7 unsigned short st_mode;
8 unsigned short st_nlink;
9 unsigned short st_uid;
10 unsigned short st_gid;
11 unsigned short st_rdev;
12 unsigned long st_size;
13 unsigned long st_atime;
14 unsigned long st_mtime;
15 unsigned long st_ctime;
16};
17
18struct stat {
19 unsigned short st_dev;
20 unsigned short __pad1;
21 unsigned long st_ino;
22 unsigned short st_mode;
23 unsigned short st_nlink;
24 unsigned short st_uid;
25 unsigned short st_gid;
26 unsigned short st_rdev;
27 unsigned short __pad2;
28 unsigned long st_size;
29 unsigned long st_blksize;
30 unsigned long st_blocks;
31 unsigned long st_atime;
32 unsigned long __unused1;
33 unsigned long st_mtime;
34 unsigned long __unused2;
35 unsigned long st_ctime;
36 unsigned long __unused3;
37 unsigned long __unused4;
38 unsigned long __unused5;
39};
40
41/* This matches struct stat64 in glibc2.1, hence the absolutely
42 * insane amounts of padding around dev_t's.
43 */
44struct stat64 {
45 unsigned long long st_dev;
46 unsigned char __pad1[2];
47
48#define STAT64_HAS_BROKEN_ST_INO 1
49 unsigned long __st_ino;
50
51 unsigned int st_mode;
52 unsigned int st_nlink;
53
54 unsigned long st_uid;
55 unsigned long st_gid;
56
57 unsigned long long st_rdev;
58 unsigned char __pad3[2];
59
60 long long st_size;
61 unsigned long st_blksize;
62
63 unsigned long __pad4; /* future possible st_blocks high bits */
64 unsigned long st_blocks; /* Number 512-byte blocks allocated. */
65
66 unsigned long st_atime;
67 unsigned long st_atime_nsec;
68
69 unsigned long st_mtime;
70 unsigned long st_mtime_nsec;
71
72 unsigned long st_ctime;
73 unsigned long st_ctime_nsec;
74
75 unsigned long long st_ino;
76};
77
78#endif /* _H8300_STAT_H */
diff --git a/arch/h8300/include/uapi/asm/statfs.h b/arch/h8300/include/uapi/asm/statfs.h
deleted file mode 100644
index b96efa712aac..000000000000
--- a/arch/h8300/include/uapi/asm/statfs.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef _H8300_STATFS_H
2#define _H8300_STATFS_H
3
4#include <asm-generic/statfs.h>
5
6#endif /* _H8300_STATFS_H */
diff --git a/arch/h8300/include/uapi/asm/swab.h b/arch/h8300/include/uapi/asm/swab.h
deleted file mode 100644
index 39abbf52807d..000000000000
--- a/arch/h8300/include/uapi/asm/swab.h
+++ /dev/null
@@ -1,10 +0,0 @@
1#ifndef _H8300_SWAB_H
2#define _H8300_SWAB_H
3
4#include <linux/types.h>
5
6#if defined(__GNUC__) && !defined(__STRICT_ANSI__) || defined(__KERNEL__)
7# define __SWAB_64_THRU_32__
8#endif
9
10#endif /* _H8300_SWAB_H */
diff --git a/arch/h8300/include/uapi/asm/termbits.h b/arch/h8300/include/uapi/asm/termbits.h
deleted file mode 100644
index 3287a6244d74..000000000000
--- a/arch/h8300/include/uapi/asm/termbits.h
+++ /dev/null
@@ -1,201 +0,0 @@
1#ifndef __ARCH_H8300_TERMBITS_H__
2#define __ARCH_H8300_TERMBITS_H__
3
4#include <linux/posix_types.h>
5
6typedef unsigned char cc_t;
7typedef unsigned int speed_t;
8typedef unsigned int tcflag_t;
9
10#define NCCS 19
11struct termios {
12 tcflag_t c_iflag; /* input mode flags */
13 tcflag_t c_oflag; /* output mode flags */
14 tcflag_t c_cflag; /* control mode flags */
15 tcflag_t c_lflag; /* local mode flags */
16 cc_t c_line; /* line discipline */
17 cc_t c_cc[NCCS]; /* control characters */
18};
19
20struct termios2 {
21 tcflag_t c_iflag; /* input mode flags */
22 tcflag_t c_oflag; /* output mode flags */
23 tcflag_t c_cflag; /* control mode flags */
24 tcflag_t c_lflag; /* local mode flags */
25 cc_t c_line; /* line discipline */
26 cc_t c_cc[NCCS]; /* control characters */
27 speed_t c_ispeed; /* input speed */
28 speed_t c_ospeed; /* output speed */
29};
30
31struct ktermios {
32 tcflag_t c_iflag; /* input mode flags */
33 tcflag_t c_oflag; /* output mode flags */
34 tcflag_t c_cflag; /* control mode flags */
35 tcflag_t c_lflag; /* local mode flags */
36 cc_t c_line; /* line discipline */
37 cc_t c_cc[NCCS]; /* control characters */
38 speed_t c_ispeed; /* input speed */
39 speed_t c_ospeed; /* output speed */
40};
41
42/* c_cc characters */
43#define VINTR 0
44#define VQUIT 1
45#define VERASE 2
46#define VKILL 3
47#define VEOF 4
48#define VTIME 5
49#define VMIN 6
50#define VSWTC 7
51#define VSTART 8
52#define VSTOP 9
53#define VSUSP 10
54#define VEOL 11
55#define VREPRINT 12
56#define VDISCARD 13
57#define VWERASE 14
58#define VLNEXT 15
59#define VEOL2 16
60
61
62/* c_iflag bits */
63#define IGNBRK 0000001
64#define BRKINT 0000002
65#define IGNPAR 0000004
66#define PARMRK 0000010
67#define INPCK 0000020
68#define ISTRIP 0000040
69#define INLCR 0000100
70#define IGNCR 0000200
71#define ICRNL 0000400
72#define IUCLC 0001000
73#define IXON 0002000
74#define IXANY 0004000
75#define IXOFF 0010000
76#define IMAXBEL 0020000
77#define IUTF8 0040000
78
79/* c_oflag bits */
80#define OPOST 0000001
81#define OLCUC 0000002
82#define ONLCR 0000004
83#define OCRNL 0000010
84#define ONOCR 0000020
85#define ONLRET 0000040
86#define OFILL 0000100
87#define OFDEL 0000200
88#define NLDLY 0000400
89#define NL0 0000000
90#define NL1 0000400
91#define CRDLY 0003000
92#define CR0 0000000
93#define CR1 0001000
94#define CR2 0002000
95#define CR3 0003000
96#define TABDLY 0014000
97#define TAB0 0000000
98#define TAB1 0004000
99#define TAB2 0010000
100#define TAB3 0014000
101#define XTABS 0014000
102#define BSDLY 0020000
103#define BS0 0000000
104#define BS1 0020000
105#define VTDLY 0040000
106#define VT0 0000000
107#define VT1 0040000
108#define FFDLY 0100000
109#define FF0 0000000
110#define FF1 0100000
111
112/* c_cflag bit meaning */
113#define CBAUD 0010017
114#define B0 0000000 /* hang up */
115#define B50 0000001
116#define B75 0000002
117#define B110 0000003
118#define B134 0000004
119#define B150 0000005
120#define B200 0000006
121#define B300 0000007
122#define B600 0000010
123#define B1200 0000011
124#define B1800 0000012
125#define B2400 0000013
126#define B4800 0000014
127#define B9600 0000015
128#define B19200 0000016
129#define B38400 0000017
130#define EXTA B19200
131#define EXTB B38400
132#define CSIZE 0000060
133#define CS5 0000000
134#define CS6 0000020
135#define CS7 0000040
136#define CS8 0000060
137#define CSTOPB 0000100
138#define CREAD 0000200
139#define PARENB 0000400
140#define PARODD 0001000
141#define HUPCL 0002000
142#define CLOCAL 0004000
143#define CBAUDEX 0010000
144#define BOTHER 0010000
145#define B57600 0010001
146#define B115200 0010002
147#define B230400 0010003
148#define B460800 0010004
149#define B500000 0010005
150#define B576000 0010006
151#define B921600 0010007
152#define B1000000 0010010
153#define B1152000 0010011
154#define B1500000 0010012
155#define B2000000 0010013
156#define B2500000 0010014
157#define B3000000 0010015
158#define B3500000 0010016
159#define B4000000 0010017
160#define CIBAUD 002003600000 /* input baud rate */
161#define CMSPAR 010000000000 /* mark or space (stick) parity */
162#define CRTSCTS 020000000000 /* flow control */
163
164#define IBSHIFT 16 /* shift from CBAUD to CIBAUD */
165
166/* c_lflag bits */
167#define ISIG 0000001
168#define ICANON 0000002
169#define XCASE 0000004
170#define ECHO 0000010
171#define ECHOE 0000020
172#define ECHOK 0000040
173#define ECHONL 0000100
174#define NOFLSH 0000200
175#define TOSTOP 0000400
176#define ECHOCTL 0001000
177#define ECHOPRT 0002000
178#define ECHOKE 0004000
179#define FLUSHO 0010000
180#define PENDIN 0040000
181#define IEXTEN 0100000
182#define EXTPROC 0200000
183
184
185/* tcflow() and TCXONC use these */
186#define TCOOFF 0
187#define TCOON 1
188#define TCIOFF 2
189#define TCION 3
190
191/* tcflush() and TCFLSH use these */
192#define TCIFLUSH 0
193#define TCOFLUSH 1
194#define TCIOFLUSH 2
195
196/* tcsetattr uses these */
197#define TCSANOW 0
198#define TCSADRAIN 1
199#define TCSAFLUSH 2
200
201#endif /* __ARCH_H8300_TERMBITS_H__ */
diff --git a/arch/h8300/include/uapi/asm/termios.h b/arch/h8300/include/uapi/asm/termios.h
deleted file mode 100644
index 5a67d7e38843..000000000000
--- a/arch/h8300/include/uapi/asm/termios.h
+++ /dev/null
@@ -1,44 +0,0 @@
1#ifndef _UAPI_H8300_TERMIOS_H
2#define _UAPI_H8300_TERMIOS_H
3
4#include <asm/termbits.h>
5#include <asm/ioctls.h>
6
7struct winsize {
8 unsigned short ws_row;
9 unsigned short ws_col;
10 unsigned short ws_xpixel;
11 unsigned short ws_ypixel;
12};
13
14#define NCC 8
15struct termio {
16 unsigned short c_iflag; /* input mode flags */
17 unsigned short c_oflag; /* output mode flags */
18 unsigned short c_cflag; /* control mode flags */
19 unsigned short c_lflag; /* local mode flags */
20 unsigned char c_line; /* line discipline */
21 unsigned char c_cc[NCC]; /* control characters */
22};
23
24
25/* modem lines */
26#define TIOCM_LE 0x001
27#define TIOCM_DTR 0x002
28#define TIOCM_RTS 0x004
29#define TIOCM_ST 0x008
30#define TIOCM_SR 0x010
31#define TIOCM_CTS 0x020
32#define TIOCM_CAR 0x040
33#define TIOCM_RNG 0x080
34#define TIOCM_DSR 0x100
35#define TIOCM_CD TIOCM_CAR
36#define TIOCM_RI TIOCM_RNG
37#define TIOCM_OUT1 0x2000
38#define TIOCM_OUT2 0x4000
39#define TIOCM_LOOP 0x8000
40
41/* ioctl (fd, TIOCSERGETLSR, &result) where result may be as below */
42
43
44#endif /* _UAPI_H8300_TERMIOS_H */
diff --git a/arch/h8300/include/uapi/asm/types.h b/arch/h8300/include/uapi/asm/types.h
deleted file mode 100644
index 9ec9d4c5ac4d..000000000000
--- a/arch/h8300/include/uapi/asm/types.h
+++ /dev/null
@@ -1 +0,0 @@
1#include <asm-generic/int-ll64.h>
diff --git a/arch/h8300/include/uapi/asm/unistd.h b/arch/h8300/include/uapi/asm/unistd.h
deleted file mode 100644
index 8cb5d429f840..000000000000
--- a/arch/h8300/include/uapi/asm/unistd.h
+++ /dev/null
@@ -1,330 +0,0 @@
1#ifndef _UAPI_ASM_H8300_UNISTD_H_
2#define _UAPI_ASM_H8300_UNISTD_H_
3
4/*
5 * This file contains the system call numbers.
6 */
7
8#define __NR_restart_syscall 0
9#define __NR_exit 1
10#define __NR_fork 2
11#define __NR_read 3
12#define __NR_write 4
13#define __NR_open 5
14#define __NR_close 6
15#define __NR_waitpid 7
16#define __NR_creat 8
17#define __NR_link 9
18#define __NR_unlink 10
19#define __NR_execve 11
20#define __NR_chdir 12
21#define __NR_time 13
22#define __NR_mknod 14
23#define __NR_chmod 15
24#define __NR_lchown 16
25#define __NR_break 17
26#define __NR_oldstat 18
27#define __NR_lseek 19
28#define __NR_getpid 20
29#define __NR_mount 21
30#define __NR_umount 22
31#define __NR_setuid 23
32#define __NR_getuid 24
33#define __NR_stime 25
34#define __NR_ptrace 26
35#define __NR_alarm 27
36#define __NR_oldfstat 28
37#define __NR_pause 29
38#define __NR_utime 30
39#define __NR_stty 31
40#define __NR_gtty 32
41#define __NR_access 33
42#define __NR_nice 34
43#define __NR_ftime 35
44#define __NR_sync 36
45#define __NR_kill 37
46#define __NR_rename 38
47#define __NR_mkdir 39
48#define __NR_rmdir 40
49#define __NR_dup 41
50#define __NR_pipe 42
51#define __NR_times 43
52#define __NR_prof 44
53#define __NR_brk 45
54#define __NR_setgid 46
55#define __NR_getgid 47
56#define __NR_signal 48
57#define __NR_geteuid 49
58#define __NR_getegid 50
59#define __NR_acct 51
60#define __NR_umount2 52
61#define __NR_lock 53
62#define __NR_ioctl 54
63#define __NR_fcntl 55
64#define __NR_mpx 56
65#define __NR_setpgid 57
66#define __NR_ulimit 58
67#define __NR_oldolduname 59
68#define __NR_umask 60
69#define __NR_chroot 61
70#define __NR_ustat 62
71#define __NR_dup2 63
72#define __NR_getppid 64
73#define __NR_getpgrp 65
74#define __NR_setsid 66
75#define __NR_sigaction 67
76#define __NR_sgetmask 68
77#define __NR_ssetmask 69
78#define __NR_setreuid 70
79#define __NR_setregid 71
80#define __NR_sigsuspend 72
81#define __NR_sigpending 73
82#define __NR_sethostname 74
83#define __NR_setrlimit 75
84#define __NR_getrlimit 76
85#define __NR_getrusage 77
86#define __NR_gettimeofday 78
87#define __NR_settimeofday 79
88#define __NR_getgroups 80
89#define __NR_setgroups 81
90#define __NR_select 82
91#define __NR_symlink 83
92#define __NR_oldlstat 84
93#define __NR_readlink 85
94#define __NR_uselib 86
95#define __NR_swapon 87
96#define __NR_reboot 88
97#define __NR_readdir 89
98#define __NR_mmap 90
99#define __NR_munmap 91
100#define __NR_truncate 92
101#define __NR_ftruncate 93
102#define __NR_fchmod 94
103#define __NR_fchown 95
104#define __NR_getpriority 96
105#define __NR_setpriority 97
106#define __NR_profil 98
107#define __NR_statfs 99
108#define __NR_fstatfs 100
109#define __NR_ioperm 101
110#define __NR_socketcall 102
111#define __NR_syslog 103
112#define __NR_setitimer 104
113#define __NR_getitimer 105
114#define __NR_stat 106
115#define __NR_lstat 107
116#define __NR_fstat 108
117#define __NR_olduname 109
118#define __NR_iopl 110
119#define __NR_vhangup 111
120#define __NR_idle 112
121#define __NR_vm86old 113
122#define __NR_wait4 114
123#define __NR_swapoff 115
124#define __NR_sysinfo 116
125#define __NR_ipc 117
126#define __NR_fsync 118
127#define __NR_sigreturn 119
128#define __NR_clone 120
129#define __NR_setdomainname 121
130#define __NR_uname 122
131#define __NR_modify_ldt 123
132#define __NR_adjtimex 124
133#define __NR_mprotect 125
134#define __NR_sigprocmask 126
135#define __NR_create_module 127
136#define __NR_init_module 128
137#define __NR_delete_module 129
138#define __NR_get_kernel_syms 130
139#define __NR_quotactl 131
140#define __NR_getpgid 132
141#define __NR_fchdir 133
142#define __NR_bdflush 134
143#define __NR_sysfs 135
144#define __NR_personality 136
145#define __NR_afs_syscall 137 /* Syscall for Andrew File System */
146#define __NR_setfsuid 138
147#define __NR_setfsgid 139
148#define __NR__llseek 140
149#define __NR_getdents 141
150#define __NR__newselect 142
151#define __NR_flock 143
152#define __NR_msync 144
153#define __NR_readv 145
154#define __NR_writev 146
155#define __NR_getsid 147
156#define __NR_fdatasync 148
157#define __NR__sysctl 149
158#define __NR_mlock 150
159#define __NR_munlock 151
160#define __NR_mlockall 152
161#define __NR_munlockall 153
162#define __NR_sched_setparam 154
163#define __NR_sched_getparam 155
164#define __NR_sched_setscheduler 156
165#define __NR_sched_getscheduler 157
166#define __NR_sched_yield 158
167#define __NR_sched_get_priority_max 159
168#define __NR_sched_get_priority_min 160
169#define __NR_sched_rr_get_interval 161
170#define __NR_nanosleep 162
171#define __NR_mremap 163
172#define __NR_setresuid 164
173#define __NR_getresuid 165
174#define __NR_vm86 166
175#define __NR_query_module 167
176#define __NR_poll 168
177#define __NR_nfsservctl 169
178#define __NR_setresgid 170
179#define __NR_getresgid 171
180#define __NR_prctl 172
181#define __NR_rt_sigreturn 173
182#define __NR_rt_sigaction 174
183#define __NR_rt_sigprocmask 175
184#define __NR_rt_sigpending 176
185#define __NR_rt_sigtimedwait 177
186#define __NR_rt_sigqueueinfo 178
187#define __NR_rt_sigsuspend 179
188#define __NR_pread64 180
189#define __NR_pwrite64 181
190#define __NR_chown 182
191#define __NR_getcwd 183
192#define __NR_capget 184
193#define __NR_capset 185
194#define __NR_sigaltstack 186
195#define __NR_sendfile 187
196#define __NR_getpmsg 188 /* some people actually want streams */
197#define __NR_putpmsg 189 /* some people actually want streams */
198#define __NR_vfork 190
199#define __NR_ugetrlimit 191
200#define __NR_mmap2 192
201#define __NR_truncate64 193
202#define __NR_ftruncate64 194
203#define __NR_stat64 195
204#define __NR_lstat64 196
205#define __NR_fstat64 197
206#define __NR_lchown32 198
207#define __NR_getuid32 199
208#define __NR_getgid32 200
209#define __NR_geteuid32 201
210#define __NR_getegid32 202
211#define __NR_setreuid32 203
212#define __NR_setregid32 204
213#define __NR_getgroups32 205
214#define __NR_setgroups32 206
215#define __NR_fchown32 207
216#define __NR_setresuid32 208
217#define __NR_getresuid32 209
218#define __NR_setresgid32 210
219#define __NR_getresgid32 211
220#define __NR_chown32 212
221#define __NR_setuid32 213
222#define __NR_setgid32 214
223#define __NR_setfsuid32 215
224#define __NR_setfsgid32 216
225#define __NR_pivot_root 217
226#define __NR_mincore 218
227#define __NR_madvise 219
228#define __NR_madvise1 219
229#define __NR_getdents64 220
230#define __NR_fcntl64 221
231/* 223 is unused */
232#define __NR_gettid 224
233#define __NR_readahead 225
234#define __NR_setxattr 226
235#define __NR_lsetxattr 227
236#define __NR_fsetxattr 228
237#define __NR_getxattr 229
238#define __NR_lgetxattr 230
239#define __NR_fgetxattr 231
240#define __NR_listxattr 232
241#define __NR_llistxattr 233
242#define __NR_flistxattr 234
243#define __NR_removexattr 235
244#define __NR_lremovexattr 236
245#define __NR_fremovexattr 237
246#define __NR_tkill 238
247#define __NR_sendfile64 239
248#define __NR_futex 240
249#define __NR_sched_setaffinity 241
250#define __NR_sched_getaffinity 242
251#define __NR_set_thread_area 243
252#define __NR_get_thread_area 244
253#define __NR_io_setup 245
254#define __NR_io_destroy 246
255#define __NR_io_getevents 247
256#define __NR_io_submit 248
257#define __NR_io_cancel 249
258#define __NR_fadvise64 250
259/* 251 is available for reuse (was briefly sys_set_zone_reclaim) */
260#define __NR_exit_group 252
261#define __NR_lookup_dcookie 253
262#define __NR_epoll_create 254
263#define __NR_epoll_ctl 255
264#define __NR_epoll_wait 256
265#define __NR_remap_file_pages 257
266#define __NR_set_tid_address 258
267#define __NR_timer_create 259
268#define __NR_timer_settime (__NR_timer_create+1)
269#define __NR_timer_gettime (__NR_timer_create+2)
270#define __NR_timer_getoverrun (__NR_timer_create+3)
271#define __NR_timer_delete (__NR_timer_create+4)
272#define __NR_clock_settime (__NR_timer_create+5)
273#define __NR_clock_gettime (__NR_timer_create+6)
274#define __NR_clock_getres (__NR_timer_create+7)
275#define __NR_clock_nanosleep (__NR_timer_create+8)
276#define __NR_statfs64 268
277#define __NR_fstatfs64 269
278#define __NR_tgkill 270
279#define __NR_utimes 271
280#define __NR_fadvise64_64 272
281#define __NR_vserver 273
282#define __NR_mbind 274
283#define __NR_get_mempolicy 275
284#define __NR_set_mempolicy 276
285#define __NR_mq_open 277
286#define __NR_mq_unlink (__NR_mq_open+1)
287#define __NR_mq_timedsend (__NR_mq_open+2)
288#define __NR_mq_timedreceive (__NR_mq_open+3)
289#define __NR_mq_notify (__NR_mq_open+4)
290#define __NR_mq_getsetattr (__NR_mq_open+5)
291#define __NR_kexec_load 283
292#define __NR_waitid 284
293/* #define __NR_sys_setaltroot 285 */
294#define __NR_add_key 286
295#define __NR_request_key 287
296#define __NR_keyctl 288
297#define __NR_ioprio_set 289
298#define __NR_ioprio_get 290
299#define __NR_inotify_init 291
300#define __NR_inotify_add_watch 292
301#define __NR_inotify_rm_watch 293
302#define __NR_migrate_pages 294
303#define __NR_openat 295
304#define __NR_mkdirat 296
305#define __NR_mknodat 297
306#define __NR_fchownat 298
307#define __NR_futimesat 299
308#define __NR_fstatat64 300
309#define __NR_unlinkat 301
310#define __NR_renameat 302
311#define __NR_linkat 303
312#define __NR_symlinkat 304
313#define __NR_readlinkat 305
314#define __NR_fchmodat 306
315#define __NR_faccessat 307
316#define __NR_pselect6 308
317#define __NR_ppoll 309
318#define __NR_unshare 310
319#define __NR_set_robust_list 311
320#define __NR_get_robust_list 312
321#define __NR_splice 313
322#define __NR_sync_file_range 314
323#define __NR_tee 315
324#define __NR_vmsplice 316
325#define __NR_move_pages 317
326#define __NR_getcpu 318
327#define __NR_epoll_pwait 319
328#define __NR_setns 320
329
330#endif /* _UAPI_ASM_H8300_UNISTD_H_ */
diff --git a/arch/h8300/kernel/Makefile b/arch/h8300/kernel/Makefile
deleted file mode 100644
index 1cc57f872d34..000000000000
--- a/arch/h8300/kernel/Makefile
+++ /dev/null
@@ -1,12 +0,0 @@
1#
2# Makefile for the linux kernel.
3#
4
5extra-y := vmlinux.lds
6
7obj-y := process.o traps.o ptrace.o irq.o \
8 sys_h8300.o time.o signal.o \
9 setup.o gpio.o syscalls.o \
10 entry.o timer/
11
12obj-$(CONFIG_MODULES) += module.o h8300_ksyms.o
diff --git a/arch/h8300/kernel/asm-offsets.c b/arch/h8300/kernel/asm-offsets.c
deleted file mode 100644
index fd961e0bd741..000000000000
--- a/arch/h8300/kernel/asm-offsets.c
+++ /dev/null
@@ -1,60 +0,0 @@
1/*
2 * This program is used to generate definitions needed by
3 * assembly language modules.
4 *
5 * We use the technique used in the OSF Mach kernel code:
6 * generate asm statements containing #defines,
7 * compile this file to assembler, and then extract the
8 * #defines from the assembly-language output.
9 */
10
11#include <linux/stddef.h>
12#include <linux/sched.h>
13#include <linux/kernel_stat.h>
14#include <linux/ptrace.h>
15#include <linux/hardirq.h>
16#include <linux/kbuild.h>
17#include <asm/bootinfo.h>
18#include <asm/irq.h>
19#include <asm/ptrace.h>
20
21int main(void)
22{
23 /* offsets into the task struct */
24 DEFINE(TASK_STATE, offsetof(struct task_struct, state));
25 DEFINE(TASK_FLAGS, offsetof(struct task_struct, flags));
26 DEFINE(TASK_PTRACE, offsetof(struct task_struct, ptrace));
27 DEFINE(TASK_BLOCKED, offsetof(struct task_struct, blocked));
28 DEFINE(TASK_THREAD, offsetof(struct task_struct, thread));
29 DEFINE(TASK_THREAD_INFO, offsetof(struct task_struct, stack));
30 DEFINE(TASK_MM, offsetof(struct task_struct, mm));
31 DEFINE(TASK_ACTIVE_MM, offsetof(struct task_struct, active_mm));
32
33 /* offsets into the irq_cpustat_t struct */
34 DEFINE(CPUSTAT_SOFTIRQ_PENDING, offsetof(irq_cpustat_t, __softirq_pending));
35
36 /* offsets into the thread struct */
37 DEFINE(THREAD_KSP, offsetof(struct thread_struct, ksp));
38 DEFINE(THREAD_USP, offsetof(struct thread_struct, usp));
39 DEFINE(THREAD_CCR, offsetof(struct thread_struct, ccr));
40
41 /* offsets into the pt_regs struct */
42 DEFINE(LER0, offsetof(struct pt_regs, er0) - sizeof(long));
43 DEFINE(LER1, offsetof(struct pt_regs, er1) - sizeof(long));
44 DEFINE(LER2, offsetof(struct pt_regs, er2) - sizeof(long));
45 DEFINE(LER3, offsetof(struct pt_regs, er3) - sizeof(long));
46 DEFINE(LER4, offsetof(struct pt_regs, er4) - sizeof(long));
47 DEFINE(LER5, offsetof(struct pt_regs, er5) - sizeof(long));
48 DEFINE(LER6, offsetof(struct pt_regs, er6) - sizeof(long));
49 DEFINE(LORIG, offsetof(struct pt_regs, orig_er0) - sizeof(long));
50 DEFINE(LCCR, offsetof(struct pt_regs, ccr) - sizeof(long));
51 DEFINE(LVEC, offsetof(struct pt_regs, vector) - sizeof(long));
52#if defined(__H8300S__)
53 DEFINE(LEXR, offsetof(struct pt_regs, exr) - sizeof(long));
54#endif
55 DEFINE(LRET, offsetof(struct pt_regs, pc) - sizeof(long));
56
57 DEFINE(PT_PTRACED, PT_PTRACED);
58
59 return 0;
60}
diff --git a/arch/h8300/kernel/entry.S b/arch/h8300/kernel/entry.S
deleted file mode 100644
index 94bd30f11df6..000000000000
--- a/arch/h8300/kernel/entry.S
+++ /dev/null
@@ -1,402 +0,0 @@
1/* -*- mode: asm -*-
2 *
3 * linux/arch/h8300/platform/h8300h/entry.S
4 *
5 * Yoshinori Sato <ysato@users.sourceforge.jp>
6 * David McCullough <davidm@snapgear.com>
7 *
8 */
9
10/*
11 * entry.S
12 * include exception/interrupt gateway
13 * system call entry
14 */
15
16#include <linux/sys.h>
17#include <asm/unistd.h>
18#include <asm/setup.h>
19#include <asm/segment.h>
20#include <asm/linkage.h>
21#include <asm/asm-offsets.h>
22#include <asm/thread_info.h>
23#include <asm/errno.h>
24
25#if defined(CONFIG_CPU_H8300H)
26#define USERRET 8
27INTERRUPTS = 64
28 .h8300h
29 .macro SHLL2 reg
30 shll.l \reg
31 shll.l \reg
32 .endm
33 .macro SHLR2 reg
34 shlr.l \reg
35 shlr.l \reg
36 .endm
37 .macro SAVEREGS
38 mov.l er0,@-sp
39 mov.l er1,@-sp
40 mov.l er2,@-sp
41 mov.l er3,@-sp
42 .endm
43 .macro RESTOREREGS
44 mov.l @sp+,er3
45 mov.l @sp+,er2
46 .endm
47 .macro SAVEEXR
48 .endm
49 .macro RESTOREEXR
50 .endm
51#endif
52#if defined(CONFIG_CPU_H8S)
53#define USERRET 10
54#define USEREXR 8
55INTERRUPTS = 128
56 .h8300s
57 .macro SHLL2 reg
58 shll.l #2,\reg
59 .endm
60 .macro SHLR2 reg
61 shlr.l #2,\reg
62 .endm
63 .macro SAVEREGS
64 stm.l er0-er3,@-sp
65 .endm
66 .macro RESTOREREGS
67 ldm.l @sp+,er2-er3
68 .endm
69 .macro SAVEEXR
70 mov.w @(USEREXR:16,er0),r1
71 mov.w r1,@(LEXR-LER3:16,sp) /* copy EXR */
72 .endm
73 .macro RESTOREEXR
74 mov.w @(LEXR-LER1:16,sp),r1 /* restore EXR */
75 mov.b r1l,r1h
76 mov.w r1,@(USEREXR:16,er0)
77 .endm
78#endif
79
80
81/* CPU context save/restore macros. */
82
83 .macro SAVE_ALL
84 mov.l er0,@-sp
85 stc ccr,r0l /* check kernel mode */
86 btst #4,r0l
87 bne 5f
88
89 /* user mode */
90 mov.l sp,@_sw_usp
91 mov.l @sp,er0 /* restore saved er0 */
92 orc #0x10,ccr /* switch kernel stack */
93 mov.l @_sw_ksp,sp
94 sub.l #(LRET-LORIG),sp /* allocate LORIG - LRET */
95 SAVEREGS
96 mov.l @_sw_usp,er0
97 mov.l @(USERRET:16,er0),er1 /* copy the RET addr */
98 mov.l er1,@(LRET-LER3:16,sp)
99 SAVEEXR
100
101 mov.l @(LORIG-LER3:16,sp),er0
102 mov.l er0,@(LER0-LER3:16,sp) /* copy ER0 */
103 mov.w e1,r1 /* e1 highbyte = ccr */
104 and #0xef,r1h /* mask mode? flag */
105 bra 6f
1065:
107 /* kernel mode */
108 mov.l @sp,er0 /* restore saved er0 */
109 subs #2,sp /* set dummy ccr */
110 SAVEREGS
111 mov.w @(LRET-LER3:16,sp),r1 /* copy old ccr */
1126:
113 mov.b r1h,r1l
114 mov.b #0,r1h
115 mov.w r1,@(LCCR-LER3:16,sp) /* set ccr */
116 mov.l er6,@-sp /* syscall arg #6 */
117 mov.l er5,@-sp /* syscall arg #5 */
118 mov.l er4,@-sp /* syscall arg #4 */
119 .endm /* r1 = ccr */
120
121 .macro RESTORE_ALL
122 mov.l @sp+,er4
123 mov.l @sp+,er5
124 mov.l @sp+,er6
125 RESTOREREGS
126 mov.w @(LCCR-LER1:16,sp),r0 /* check kernel mode */
127 btst #4,r0l
128 bne 7f
129
130 orc #0x80,ccr
131 mov.l @_sw_usp,er0
132 mov.l @(LER0-LER1:16,sp),er1 /* restore ER0 */
133 mov.l er1,@er0
134 RESTOREEXR
135 mov.w @(LCCR-LER1:16,sp),r1 /* restore the RET addr */
136 mov.b r1l,r1h
137 mov.b @(LRET+1-LER1:16,sp),r1l
138 mov.w r1,e1
139 mov.w @(LRET+2-LER1:16,sp),r1
140 mov.l er1,@(USERRET:16,er0)
141
142 mov.l @sp+,er1
143 add.l #(LRET-LER1),sp /* remove LORIG - LRET */
144 mov.l sp,@_sw_ksp
145 andc #0xef,ccr /* switch to user mode */
146 mov.l er0,sp
147 bra 8f
1487:
149 mov.l @sp+,er1
150 adds #4,sp
151 adds #2,sp
1528:
153 mov.l @sp+,er0
154 adds #4,sp /* remove the sw created LVEC */
155 rte
156 .endm
157
158.globl _system_call
159.globl _ret_from_exception
160.globl _ret_from_fork
161.globl _ret_from_kernel_thread
162.globl _ret_from_interrupt
163.globl _interrupt_redirect_table
164.globl _sw_ksp,_sw_usp
165.globl _resume
166.globl _interrupt_entry
167.globl _trace_break
168
169#if defined(CONFIG_ROMKERNEL)
170 .section .int_redirect,"ax"
171_interrupt_redirect_table:
172#if defined(CONFIG_CPU_H8300H)
173 .rept 7
174 .long 0
175 .endr
176#endif
177#if defined(CONFIG_CPU_H8S)
178 .rept 5
179 .long 0
180 .endr
181 jmp @_trace_break
182 .long 0
183#endif
184
185 jsr @_interrupt_entry /* NMI */
186 jmp @_system_call /* TRAPA #0 (System call) */
187 .long 0
188 .long 0
189 jmp @_trace_break /* TRAPA #3 (breakpoint) */
190 .rept INTERRUPTS-12
191 jsr @_interrupt_entry
192 .endr
193#endif
194#if defined(CONFIG_RAMKERNEL)
195.globl _interrupt_redirect_table
196 .section .bss
197_interrupt_redirect_table:
198 .space 4
199#endif
200
201 .section .text
202 .align 2
203_interrupt_entry:
204 SAVE_ALL
205 mov.l sp,er0
206 add.l #LVEC,er0
207 btst #4,r1l
208 bne 1f
209 /* user LVEC */
210 mov.l @_sw_usp,er0
211 adds #4,er0
2121:
213 mov.l @er0,er0 /* LVEC address */
214#if defined(CONFIG_ROMKERNEL)
215 sub.l #_interrupt_redirect_table,er0
216#endif
217#if defined(CONFIG_RAMKERNEL)
218 mov.l @_interrupt_redirect_table,er1
219 sub.l er1,er0
220#endif
221 SHLR2 er0
222 dec.l #1,er0
223 mov.l sp,er1
224 subs #4,er1 /* adjust ret_pc */
225 jsr @_do_IRQ
226 jmp @_ret_from_interrupt
227
228_system_call:
229 subs #4,sp /* dummy LVEC */
230 SAVE_ALL
231 andc #0x7f,ccr
232 mov.l er0,er4
233
234 /* save top of frame */
235 mov.l sp,er0
236 jsr @_set_esp0
237 mov.l sp,er2
238 and.w #0xe000,r2
239 mov.b @((TI_FLAGS+3-(TIF_SYSCALL_TRACE >> 3)):16,er2),r2l
240 btst #(TIF_SYSCALL_TRACE & 7),r2l
241 beq 1f
242 jsr @_do_syscall_trace
2431:
244 cmp.l #NR_syscalls,er4
245 bcc badsys
246 SHLL2 er4
247 mov.l #_sys_call_table,er0
248 add.l er4,er0
249 mov.l @er0,er4
250 beq _ret_from_exception:16
251 mov.l @(LER1:16,sp),er0
252 mov.l @(LER2:16,sp),er1
253 mov.l @(LER3:16,sp),er2
254 jsr @er4
255 mov.l er0,@(LER0:16,sp) /* save the return value */
256 mov.l sp,er2
257 and.w #0xe000,r2
258 mov.b @((TI_FLAGS+3-(TIF_SYSCALL_TRACE >> 3)):16,er2),r2l
259 btst #(TIF_SYSCALL_TRACE & 7),r2l
260 beq 2f
261 jsr @_do_syscall_trace
2622:
263#if defined(CONFIG_SYSCALL_PRINT)
264 jsr @_syscall_print
265#endif
266 orc #0x80,ccr
267 bra resume_userspace
268
269badsys:
270 mov.l #-ENOSYS,er0
271 mov.l er0,@(LER0:16,sp)
272 bra resume_userspace
273
274#if !defined(CONFIG_PREEMPT)
275#define resume_kernel restore_all
276#endif
277
278_ret_from_exception:
279#if defined(CONFIG_PREEMPT)
280 orc #0x80,ccr
281#endif
282_ret_from_interrupt:
283 mov.b @(LCCR+1:16,sp),r0l
284 btst #4,r0l
285 bne resume_kernel:8 /* return from kernel */
286resume_userspace:
287 andc #0x7f,ccr
288 mov.l sp,er4
289 and.w #0xe000,r4 /* er4 <- current thread info */
290 mov.l @(TI_FLAGS:16,er4),er1
291 and.l #_TIF_WORK_MASK,er1
292 beq restore_all:8
293work_pending:
294 btst #TIF_NEED_RESCHED,r1l
295 bne work_resched:8
296 /* work notifysig */
297 mov.l sp,er0
298 subs #4,er0 /* er0: pt_regs */
299 jsr @_do_notify_resume
300 bra restore_all:8
301work_resched:
302 mov.l sp,er0
303 jsr @_set_esp0
304 jsr @_schedule
305 bra resume_userspace:8
306restore_all:
307 RESTORE_ALL /* Does RTE */
308
309#if defined(CONFIG_PREEMPT)
310resume_kernel:
311 mov.l @(TI_PRE_COUNT:16,er4),er0
312 bne restore_all:8
313need_resched:
314 mov.l @(TI_FLAGS:16,er4),er0
315 btst #TIF_NEED_RESCHED,r0l
316 beq restore_all:8
317 mov.b @(LCCR+1:16,sp),r0l /* Interrupt Enabled? */
318 bmi restore_all:8
319 mov.l #PREEMPT_ACTIVE,er0
320 mov.l er0,@(TI_PRE_COUNT:16,er4)
321 andc #0x7f,ccr
322 mov.l sp,er0
323 jsr @_set_esp0
324 jsr @_schedule
325 orc #0x80,ccr
326 bra need_resched:8
327#endif
328
329_ret_from_fork:
330 mov.l er2,er0
331 jsr @_schedule_tail
332 jmp @_ret_from_exception
333
334_ret_from_kernel_thread:
335 mov.l er2,er0
336 jsr @_schedule_tail
337 mov.l @(LER4:16,sp),er0
338 mov.l @(LER5:16,sp),er1
339 jsr @er1
340 jmp @_ret_from_exception
341
342_resume:
343 /*
344 * Beware - when entering resume, offset of tss is in d1,
345 * prev (the current task) is in a0, next (the new task)
346 * is in a1 and d2.b is non-zero if the mm structure is
347 * shared between the tasks, so don't change these
348 * registers until their contents are no longer needed.
349 */
350
351 /* save sr */
352 sub.w r3,r3
353 stc ccr,r3l
354 mov.w r3,@(THREAD_CCR+2:16,er0)
355
356 /* disable interrupts */
357 orc #0x80,ccr
358 mov.l @_sw_usp,er3
359 mov.l er3,@(THREAD_USP:16,er0)
360 mov.l sp,@(THREAD_KSP:16,er0)
361
362 /* Skip address space switching if they are the same. */
363 /* FIXME: what did we hack out of here, this does nothing! */
364
365 mov.l @(THREAD_USP:16,er1),er0
366 mov.l er0,@_sw_usp
367 mov.l @(THREAD_KSP:16,er1),sp
368
369 /* restore status register */
370 mov.w @(THREAD_CCR+2:16,er1),r3
371
372 ldc r3l,ccr
373 rts
374
375_trace_break:
376 subs #4,sp
377 SAVE_ALL
378 sub.l er1,er1
379 dec.l #1,er1
380 mov.l er1,@(LORIG,sp)
381 mov.l sp,er0
382 jsr @_set_esp0
383 mov.l @_sw_usp,er0
384 mov.l @er0,er1
385 mov.w @(-2:16,er1),r2
386 cmp.w #0x5730,r2
387 beq 1f
388 subs #2,er1
389 mov.l er1,@er0
3901:
391 and.w #0xff,e1
392 mov.l er1,er0
393 jsr @_trace_trap
394 jmp @_ret_from_exception
395
396 .section .bss
397_sw_ksp:
398 .space 4
399_sw_usp:
400 .space 4
401
402 .end
diff --git a/arch/h8300/kernel/gpio.c b/arch/h8300/kernel/gpio.c
deleted file mode 100644
index 084bfd0c107e..000000000000
--- a/arch/h8300/kernel/gpio.c
+++ /dev/null
@@ -1,178 +0,0 @@
1/*
2 * linux/arch/h8300/kernel/gpio.c
3 *
4 * Yoshinori Sato <ysato@users.sourceforge.jp>
5 *
6 */
7
8/*
9 * Internal I/O Port Management
10 */
11
12#include <linux/stddef.h>
13#include <linux/proc_fs.h>
14#include <linux/seq_file.h>
15#include <linux/kernel.h>
16#include <linux/string.h>
17#include <linux/fs.h>
18#include <linux/init.h>
19
20#define _(addr) (volatile unsigned char *)(addr)
21#if defined(CONFIG_H83007) || defined(CONFIG_H83068)
22#include <asm/regs306x.h>
23static volatile unsigned char *ddrs[] = {
24 _(P1DDR),_(P2DDR),_(P3DDR),_(P4DDR),_(P5DDR),_(P6DDR),
25 NULL, _(P8DDR),_(P9DDR),_(PADDR),_(PBDDR),
26};
27#define MAX_PORT 11
28#endif
29
30 #if defined(CONFIG_H83002) || defined(CONFIG_H8048)
31/* Fix me!! */
32#include <asm/regs306x.h>
33static volatile unsigned char *ddrs[] = {
34 _(P1DDR),_(P2DDR),_(P3DDR),_(P4DDR),_(P5DDR),_(P6DDR),
35 NULL, _(P8DDR),_(P9DDR),_(PADDR),_(PBDDR),
36};
37#define MAX_PORT 11
38#endif
39
40#if defined(CONFIG_H8S2678)
41#include <asm/regs267x.h>
42static volatile unsigned char *ddrs[] = {
43 _(P1DDR),_(P2DDR),_(P3DDR),NULL ,_(P5DDR),_(P6DDR),
44 _(P7DDR),_(P8DDR),NULL, _(PADDR),_(PBDDR),_(PCDDR),
45 _(PDDDR),_(PEDDR),_(PFDDR),_(PGDDR),_(PHDDR),
46 _(PADDR),_(PBDDR),_(PCDDR),_(PDDDR),_(PEDDR),_(PFDDR),
47 _(PGDDR),_(PHDDR)
48};
49#define MAX_PORT 17
50#endif
51#undef _
52
53#if !defined(P1DDR)
54#error Unsuppoted CPU Selection
55#endif
56
57static struct {
58 unsigned char used;
59 unsigned char ddr;
60} gpio_regs[MAX_PORT];
61
62extern char *_platform_gpio_table(int length);
63
64int h8300_reserved_gpio(int port, unsigned int bits)
65{
66 unsigned char *used;
67
68 if (port < 0 || port >= MAX_PORT)
69 return -1;
70 used = &(gpio_regs[port].used);
71 if ((*used & bits) != 0)
72 return 0;
73 *used |= bits;
74 return 1;
75}
76
77int h8300_free_gpio(int port, unsigned int bits)
78{
79 unsigned char *used;
80
81 if (port < 0 || port >= MAX_PORT)
82 return -1;
83 used = &(gpio_regs[port].used);
84 if ((*used & bits) != bits)
85 return 0;
86 *used &= (~bits);
87 return 1;
88}
89
90int h8300_set_gpio_dir(int port_bit,int dir)
91{
92 int port = (port_bit >> 8) & 0xff;
93 int bit = port_bit & 0xff;
94
95 if (ddrs[port] == NULL)
96 return 0;
97 if (gpio_regs[port].used & bit) {
98 if (dir)
99 gpio_regs[port].ddr |= bit;
100 else
101 gpio_regs[port].ddr &= ~bit;
102 *ddrs[port] = gpio_regs[port].ddr;
103 return 1;
104 } else
105 return 0;
106}
107
108int h8300_get_gpio_dir(int port_bit)
109{
110 int port = (port_bit >> 8) & 0xff;
111 int bit = port_bit & 0xff;
112
113 if (ddrs[port] == NULL)
114 return 0;
115 if (gpio_regs[port].used & bit) {
116 return (gpio_regs[port].ddr & bit) != 0;
117 } else
118 return -1;
119}
120
121#if defined(CONFIG_PROC_FS)
122static char *port_status(int portno)
123{
124 static char result[10];
125 static const char io[2]={'I','O'};
126 char *rp;
127 int c;
128 unsigned char used,ddr;
129
130 used = gpio_regs[portno].used;
131 ddr = gpio_regs[portno].ddr;
132 result[8]='\0';
133 rp = result + 7;
134 for (c = 8; c > 0; c--,rp--,used >>= 1, ddr >>= 1)
135 if (used & 0x01)
136 *rp = io[ ddr & 0x01];
137 else
138 *rp = '-';
139 return result;
140}
141
142static int gpio_proc_show(struct seq_file *m, void *v)
143{
144 static const char port_name[]="123456789ABCDEFGH";
145 int c;
146
147 for (c = 0; c < MAX_PORT; c++) {
148 if (ddrs[c] == NULL)
149 continue;
150 seq_printf(m, "P%c: %s\n", port_name[c], port_status(c));
151 }
152 return 0;
153}
154
155static int gpio_proc_open(struct inode *inode, struct file *file)
156{
157 return single_open(file, gpio_proc_show, PDE_DATA(inode));
158}
159
160static const struct file_operations gpio_proc_fops = {
161 .open = gpio_proc_open,
162 .read = seq_read,
163 .llseek = seq_lseek,
164 .release = single_release,
165};
166
167static __init int register_proc(void)
168{
169 return proc_create("gpio", S_IRUGO, NULL, &gpio_proc_fops) != NULL;
170}
171
172__initcall(register_proc);
173#endif
174
175void __init h8300_gpio_init(void)
176{
177 memcpy(gpio_regs,_platform_gpio_table(sizeof(gpio_regs)),sizeof(gpio_regs));
178}
diff --git a/arch/h8300/kernel/h8300_ksyms.c b/arch/h8300/kernel/h8300_ksyms.c
deleted file mode 100644
index 53d7c0e4bd83..000000000000
--- a/arch/h8300/kernel/h8300_ksyms.c
+++ /dev/null
@@ -1,100 +0,0 @@
1#include <linux/module.h>
2#include <linux/linkage.h>
3#include <linux/sched.h>
4#include <linux/string.h>
5#include <linux/mm.h>
6#include <linux/user.h>
7#include <linux/elfcore.h>
8#include <linux/in6.h>
9#include <linux/interrupt.h>
10
11#include <asm/setup.h>
12#include <asm/pgalloc.h>
13#include <asm/irq.h>
14#include <asm/io.h>
15#include <asm/checksum.h>
16#include <asm/current.h>
17#include <asm/gpio.h>
18
19//asmlinkage long long __ashrdi3 (long long, int);
20//asmlinkage long long __lshrdi3 (long long, int);
21extern char h8300_debug_device[];
22
23/* platform dependent support */
24
25EXPORT_SYMBOL(strnlen);
26EXPORT_SYMBOL(strrchr);
27EXPORT_SYMBOL(strstr);
28EXPORT_SYMBOL(strchr);
29EXPORT_SYMBOL(strcat);
30EXPORT_SYMBOL(strlen);
31EXPORT_SYMBOL(strcmp);
32EXPORT_SYMBOL(strncmp);
33
34EXPORT_SYMBOL(ip_fast_csum);
35
36EXPORT_SYMBOL(enable_irq);
37EXPORT_SYMBOL(disable_irq);
38
39/* Networking helper routines. */
40EXPORT_SYMBOL(csum_partial_copy_nocheck);
41
42/* The following are special because they're not called
43 explicitly (the C compiler generates them). Fortunately,
44 their interface isn't gonna change any time soon now, so
45 it's OK to leave it out of version control. */
46//EXPORT_SYMBOL(__ashrdi3);
47//EXPORT_SYMBOL(__lshrdi3);
48EXPORT_SYMBOL(memcpy);
49EXPORT_SYMBOL(memset);
50EXPORT_SYMBOL(memcmp);
51EXPORT_SYMBOL(memscan);
52EXPORT_SYMBOL(memmove);
53
54/*
55 * libgcc functions - functions that are used internally by the
56 * compiler... (prototypes are not correct though, but that
57 * doesn't really matter since they're not versioned).
58 */
59extern void __gcc_bcmp(void);
60extern void __ashldi3(void);
61extern void __ashrdi3(void);
62extern void __cmpdi2(void);
63extern void __divdi3(void);
64extern void __divsi3(void);
65extern void __lshrdi3(void);
66extern void __moddi3(void);
67extern void __modsi3(void);
68extern void __muldi3(void);
69extern void __mulsi3(void);
70extern void __negdi2(void);
71extern void __ucmpdi2(void);
72extern void __udivdi3(void);
73extern void __udivmoddi4(void);
74extern void __udivsi3(void);
75extern void __umoddi3(void);
76extern void __umodsi3(void);
77
78 /* gcc lib functions */
79EXPORT_SYMBOL(__gcc_bcmp);
80EXPORT_SYMBOL(__ashldi3);
81EXPORT_SYMBOL(__ashrdi3);
82EXPORT_SYMBOL(__cmpdi2);
83EXPORT_SYMBOL(__divdi3);
84EXPORT_SYMBOL(__divsi3);
85EXPORT_SYMBOL(__lshrdi3);
86EXPORT_SYMBOL(__moddi3);
87EXPORT_SYMBOL(__modsi3);
88EXPORT_SYMBOL(__muldi3);
89EXPORT_SYMBOL(__mulsi3);
90EXPORT_SYMBOL(__negdi2);
91EXPORT_SYMBOL(__ucmpdi2);
92EXPORT_SYMBOL(__udivdi3);
93EXPORT_SYMBOL(__udivmoddi4);
94EXPORT_SYMBOL(__udivsi3);
95EXPORT_SYMBOL(__umoddi3);
96EXPORT_SYMBOL(__umodsi3);
97
98EXPORT_SYMBOL(h8300_reserved_gpio);
99EXPORT_SYMBOL(h8300_free_gpio);
100EXPORT_SYMBOL(h8300_set_gpio_dir);
diff --git a/arch/h8300/kernel/irq.c b/arch/h8300/kernel/irq.c
deleted file mode 100644
index 2fa8ac7b79b5..000000000000
--- a/arch/h8300/kernel/irq.c
+++ /dev/null
@@ -1,165 +0,0 @@
1/*
2 * linux/arch/h8300/kernel/irq.c
3 *
4 * Copyright 2007 Yoshinori Sato <ysato@users.sourceforge.jp>
5 */
6
7#include <linux/module.h>
8#include <linux/types.h>
9#include <linux/kernel.h>
10#include <linux/sched.h>
11#include <linux/kernel_stat.h>
12#include <linux/seq_file.h>
13#include <linux/init.h>
14#include <linux/random.h>
15#include <linux/bootmem.h>
16#include <linux/irq.h>
17#include <linux/interrupt.h>
18
19#include <asm/traps.h>
20#include <asm/io.h>
21#include <asm/setup.h>
22#include <asm/errno.h>
23
24/*#define DEBUG*/
25
26extern unsigned long *interrupt_redirect_table;
27extern const int h8300_saved_vectors[];
28extern const h8300_vector h8300_trap_table[];
29int h8300_enable_irq_pin(unsigned int irq);
30void h8300_disable_irq_pin(unsigned int irq);
31
32#define CPU_VECTOR ((unsigned long *)0x000000)
33#define ADDR_MASK (0xffffff)
34
35static inline int is_ext_irq(unsigned int irq)
36{
37 return (irq >= EXT_IRQ0 && irq <= (EXT_IRQ0 + EXT_IRQS));
38}
39
40static void h8300_enable_irq(struct irq_data *data)
41{
42 if (is_ext_irq(data->irq))
43 IER_REGS |= 1 << (data->irq - EXT_IRQ0);
44}
45
46static void h8300_disable_irq(struct irq_data *data)
47{
48 if (is_ext_irq(data->irq))
49 IER_REGS &= ~(1 << (data->irq - EXT_IRQ0));
50}
51
52static unsigned int h8300_startup_irq(struct irq_data *data)
53{
54 if (is_ext_irq(data->irq))
55 return h8300_enable_irq_pin(data->irq);
56 else
57 return 0;
58}
59
60static void h8300_shutdown_irq(struct irq_data *data)
61{
62 if (is_ext_irq(data->irq))
63 h8300_disable_irq_pin(data->irq);
64}
65
66/*
67 * h8300 interrupt controller implementation
68 */
69struct irq_chip h8300irq_chip = {
70 .name = "H8300-INTC",
71 .irq_startup = h8300_startup_irq,
72 .irq_shutdown = h8300_shutdown_irq,
73 .irq_enable = h8300_enable_irq,
74 .irq_disable = h8300_disable_irq,
75};
76
77#if defined(CONFIG_RAMKERNEL)
78static unsigned long __init *get_vector_address(void)
79{
80 unsigned long *rom_vector = CPU_VECTOR;
81 unsigned long base,tmp;
82 int vec_no;
83
84 base = rom_vector[EXT_IRQ0] & ADDR_MASK;
85
86 /* check romvector format */
87 for (vec_no = EXT_IRQ1; vec_no <= EXT_IRQ0+EXT_IRQS; vec_no++) {
88 if ((base+(vec_no - EXT_IRQ0)*4) != (rom_vector[vec_no] & ADDR_MASK))
89 return NULL;
90 }
91
92 /* ramvector base address */
93 base -= EXT_IRQ0*4;
94
95 /* writerble check */
96 tmp = ~(*(volatile unsigned long *)base);
97 (*(volatile unsigned long *)base) = tmp;
98 if ((*(volatile unsigned long *)base) != tmp)
99 return NULL;
100 return (unsigned long *)base;
101}
102
103static void __init setup_vector(void)
104{
105 int i;
106 unsigned long *ramvec,*ramvec_p;
107 const h8300_vector *trap_entry;
108 const int *saved_vector;
109
110 ramvec = get_vector_address();
111 if (ramvec == NULL)
112 panic("interrupt vector serup failed.");
113 else
114 printk(KERN_INFO "virtual vector at 0x%08lx\n",(unsigned long)ramvec);
115
116 /* create redirect table */
117 ramvec_p = ramvec;
118 trap_entry = h8300_trap_table;
119 saved_vector = h8300_saved_vectors;
120 for ( i = 0; i < NR_IRQS; i++) {
121 if (i == *saved_vector) {
122 ramvec_p++;
123 saved_vector++;
124 } else {
125 if ( i < NR_TRAPS ) {
126 if (*trap_entry)
127 *ramvec_p = VECTOR(*trap_entry);
128 ramvec_p++;
129 trap_entry++;
130 } else
131 *ramvec_p++ = REDIRECT(interrupt_entry);
132 }
133 }
134 interrupt_redirect_table = ramvec;
135#ifdef DEBUG
136 ramvec_p = ramvec;
137 for (i = 0; i < NR_IRQS; i++) {
138 if ((i % 8) == 0)
139 printk(KERN_DEBUG "\n%p: ",ramvec_p);
140 printk(KERN_DEBUG "%p ",*ramvec_p);
141 ramvec_p++;
142 }
143 printk(KERN_DEBUG "\n");
144#endif
145}
146#else
147#define setup_vector() do { } while(0)
148#endif
149
150void __init init_IRQ(void)
151{
152 int c;
153
154 setup_vector();
155
156 for (c = 0; c < NR_IRQS; c++)
157 irq_set_chip_and_handler(c, &h8300irq_chip, handle_simple_irq);
158}
159
160asmlinkage void do_IRQ(int irq)
161{
162 irq_enter();
163 generic_handle_irq(irq);
164 irq_exit();
165}
diff --git a/arch/h8300/kernel/module.c b/arch/h8300/kernel/module.c
deleted file mode 100644
index 1d526e05db19..000000000000
--- a/arch/h8300/kernel/module.c
+++ /dev/null
@@ -1,75 +0,0 @@
1#include <linux/moduleloader.h>
2#include <linux/elf.h>
3#include <linux/vmalloc.h>
4#include <linux/fs.h>
5#include <linux/string.h>
6#include <linux/kernel.h>
7
8#if 0
9#define DEBUGP printk
10#else
11#define DEBUGP(fmt...)
12#endif
13
14int apply_relocate_add(Elf32_Shdr *sechdrs,
15 const char *strtab,
16 unsigned int symindex,
17 unsigned int relsec,
18 struct module *me)
19{
20 unsigned int i;
21 Elf32_Rela *rela = (void *)sechdrs[relsec].sh_addr;
22
23 DEBUGP("Applying relocate section %u to %u\n", relsec,
24 sechdrs[relsec].sh_info);
25 for (i = 0; i < sechdrs[relsec].sh_size / sizeof(*rela); i++) {
26 /* This is where to make the change */
27 uint32_t *loc = (uint32_t *)(sechdrs[sechdrs[relsec].sh_info].sh_addr
28 + rela[i].r_offset);
29 /* This is the symbol it is referring to. Note that all
30 undefined symbols have been resolved. */
31 Elf32_Sym *sym = (Elf32_Sym *)sechdrs[symindex].sh_addr
32 + ELF32_R_SYM(rela[i].r_info);
33 uint32_t v = sym->st_value + rela[i].r_addend;
34
35 switch (ELF32_R_TYPE(rela[i].r_info)) {
36 case R_H8_DIR24R8:
37 loc = (uint32_t *)((uint32_t)loc - 1);
38 *loc = (*loc & 0xff000000) | ((*loc & 0xffffff) + v);
39 break;
40 case R_H8_DIR24A8:
41 if (ELF32_R_SYM(rela[i].r_info))
42 *loc += v;
43 break;
44 case R_H8_DIR32:
45 case R_H8_DIR32A16:
46 *loc += v;
47 break;
48 case R_H8_PCREL16:
49 v -= (unsigned long)loc + 2;
50 if ((Elf32_Sword)v > 0x7fff ||
51 (Elf32_Sword)v < -(Elf32_Sword)0x8000)
52 goto overflow;
53 else
54 *(unsigned short *)loc = v;
55 break;
56 case R_H8_PCREL8:
57 v -= (unsigned long)loc + 1;
58 if ((Elf32_Sword)v > 0x7f ||
59 (Elf32_Sword)v < -(Elf32_Sword)0x80)
60 goto overflow;
61 else
62 *(unsigned char *)loc = v;
63 break;
64 default:
65 printk(KERN_ERR "module %s: Unknown relocation: %u\n",
66 me->name, ELF32_R_TYPE(rela[i].r_info));
67 return -ENOEXEC;
68 }
69 }
70 return 0;
71 overflow:
72 printk(KERN_ERR "module %s: relocation offset overflow: %08x\n",
73 me->name, rela[i].r_offset);
74 return -ENOEXEC;
75}
diff --git a/arch/h8300/kernel/process.c b/arch/h8300/kernel/process.c
deleted file mode 100644
index 1a744ab7e7e5..000000000000
--- a/arch/h8300/kernel/process.c
+++ /dev/null
@@ -1,154 +0,0 @@
1/*
2 * linux/arch/h8300/kernel/process.c
3 *
4 * Yoshinori Sato <ysato@users.sourceforge.jp>
5 *
6 * Based on:
7 *
8 * linux/arch/m68knommu/kernel/process.c
9 *
10 * Copyright (C) 1998 D. Jeff Dionne <jeff@ryeham.ee.ryerson.ca>,
11 * Kenneth Albanowski <kjahds@kjahds.com>,
12 * The Silver Hammer Group, Ltd.
13 *
14 * linux/arch/m68k/kernel/process.c
15 *
16 * Copyright (C) 1995 Hamish Macdonald
17 *
18 * 68060 fixes by Jesper Skov
19 */
20
21/*
22 * This file handles the architecture-dependent parts of process handling..
23 */
24
25#include <linux/errno.h>
26#include <linux/module.h>
27#include <linux/sched.h>
28#include <linux/kernel.h>
29#include <linux/mm.h>
30#include <linux/smp.h>
31#include <linux/stddef.h>
32#include <linux/unistd.h>
33#include <linux/ptrace.h>
34#include <linux/user.h>
35#include <linux/interrupt.h>
36#include <linux/reboot.h>
37#include <linux/fs.h>
38#include <linux/slab.h>
39#include <linux/rcupdate.h>
40
41#include <asm/uaccess.h>
42#include <asm/traps.h>
43#include <asm/setup.h>
44#include <asm/pgtable.h>
45
46void (*pm_power_off)(void) = NULL;
47EXPORT_SYMBOL(pm_power_off);
48
49asmlinkage void ret_from_fork(void);
50asmlinkage void ret_from_kernel_thread(void);
51
52/*
53 * The idle loop on an H8/300..
54 */
55#if !defined(CONFIG_H8300H_SIM) && !defined(CONFIG_H8S_SIM)
56void arch_cpu_idle(void)
57{
58 local_irq_enable();
59 /* XXX: race here! What if need_resched() gets set now? */
60 __asm__("sleep");
61}
62#endif
63
64void machine_restart(char * __unused)
65{
66 local_irq_disable();
67 __asm__("jmp @@0");
68}
69
70void machine_halt(void)
71{
72 local_irq_disable();
73 __asm__("sleep");
74 for (;;);
75}
76
77void machine_power_off(void)
78{
79 local_irq_disable();
80 __asm__("sleep");
81 for (;;);
82}
83
84void show_regs(struct pt_regs * regs)
85{
86 show_regs_print_info(KERN_DEFAULT);
87
88 printk("\nPC: %08lx Status: %02x",
89 regs->pc, regs->ccr);
90 printk("\nORIG_ER0: %08lx ER0: %08lx ER1: %08lx",
91 regs->orig_er0, regs->er0, regs->er1);
92 printk("\nER2: %08lx ER3: %08lx ER4: %08lx ER5: %08lx",
93 regs->er2, regs->er3, regs->er4, regs->er5);
94 printk("\nER6' %08lx ",regs->er6);
95 if (user_mode(regs))
96 printk("USP: %08lx\n", rdusp());
97 else
98 printk("\n");
99}
100
101void flush_thread(void)
102{
103}
104
105int copy_thread(unsigned long clone_flags,
106 unsigned long usp, unsigned long topstk,
107 struct task_struct * p)
108{
109 struct pt_regs * childregs;
110
111 childregs = (struct pt_regs *) (THREAD_SIZE + task_stack_page(p)) - 1;
112
113 if (unlikely(p->flags & PF_KTHREAD)) {
114 memset(childregs, 0, sizeof(struct pt_regs));
115 childregs->retpc = (unsigned long) ret_from_kernel_thread;
116 childregs->er4 = topstk; /* arg */
117 childregs->er5 = usp; /* fn */
118 p->thread.ksp = (unsigned long)childregs;
119 }
120 *childregs = *current_pt_regs();
121 childregs->retpc = (unsigned long) ret_from_fork;
122 childregs->er0 = 0;
123 p->thread.usp = usp ?: rdusp();
124 p->thread.ksp = (unsigned long)childregs;
125
126 return 0;
127}
128
129unsigned long thread_saved_pc(struct task_struct *tsk)
130{
131 return ((struct pt_regs *)tsk->thread.esp0)->pc;
132}
133
134unsigned long get_wchan(struct task_struct *p)
135{
136 unsigned long fp, pc;
137 unsigned long stack_page;
138 int count = 0;
139 if (!p || p == current || p->state == TASK_RUNNING)
140 return 0;
141
142 stack_page = (unsigned long)p;
143 fp = ((struct pt_regs *)p->thread.ksp)->er6;
144 do {
145 if (fp < stack_page+sizeof(struct thread_info) ||
146 fp >= 8184+stack_page)
147 return 0;
148 pc = ((unsigned long *)fp)[1];
149 if (!in_sched_functions(pc))
150 return pc;
151 fp = *(unsigned long *) fp;
152 } while (count++ < 16);
153 return 0;
154}
diff --git a/arch/h8300/kernel/ptrace.c b/arch/h8300/kernel/ptrace.c
deleted file mode 100644
index 748cf6585aa4..000000000000
--- a/arch/h8300/kernel/ptrace.c
+++ /dev/null
@@ -1,168 +0,0 @@
1/*
2 * linux/arch/h8300/kernel/ptrace.c
3 *
4 * Yoshinori Sato <ysato@users.sourceforge.jp>
5 *
6 * Based on:
7 * linux/arch/m68k/kernel/ptrace.c
8 *
9 * Copyright (C) 1994 by Hamish Macdonald
10 * Taken from linux/kernel/ptrace.c and modified for M680x0.
11 * linux/kernel/ptrace.c is by Ross Biro 1/23/92, edited by Linus Torvalds
12 *
13 * This file is subject to the terms and conditions of the GNU General
14 * Public License. See the file COPYING in the main directory of
15 * this archive for more details.
16 */
17
18#include <linux/kernel.h>
19#include <linux/sched.h>
20#include <linux/mm.h>
21#include <linux/smp.h>
22#include <linux/errno.h>
23#include <linux/ptrace.h>
24#include <linux/user.h>
25#include <linux/signal.h>
26
27#include <asm/uaccess.h>
28#include <asm/page.h>
29#include <asm/pgtable.h>
30#include <asm/processor.h>
31#include <asm/signal.h>
32
33/* cpu depend functions */
34extern long h8300_get_reg(struct task_struct *task, int regno);
35extern int h8300_put_reg(struct task_struct *task, int regno, unsigned long data);
36
37
38void user_disable_single_step(struct task_struct *child)
39{
40}
41
42/*
43 * does not yet catch signals sent when the child dies.
44 * in exit.c or in signal.c.
45 */
46
47void ptrace_disable(struct task_struct *child)
48{
49 user_disable_single_step(child);
50}
51
52long arch_ptrace(struct task_struct *child, long request,
53 unsigned long addr, unsigned long data)
54{
55 int ret;
56 int regno = addr >> 2;
57 unsigned long __user *datap = (unsigned long __user *) data;
58
59 switch (request) {
60 /* read the word at location addr in the USER area. */
61 case PTRACE_PEEKUSR: {
62 unsigned long tmp = 0;
63
64 if ((addr & 3) || addr >= sizeof(struct user)) {
65 ret = -EIO;
66 break ;
67 }
68
69 ret = 0; /* Default return condition */
70
71 if (regno < H8300_REGS_NO)
72 tmp = h8300_get_reg(child, regno);
73 else {
74 switch (regno) {
75 case 49:
76 tmp = child->mm->start_code;
77 break ;
78 case 50:
79 tmp = child->mm->start_data;
80 break ;
81 case 51:
82 tmp = child->mm->end_code;
83 break ;
84 case 52:
85 tmp = child->mm->end_data;
86 break ;
87 default:
88 ret = -EIO;
89 }
90 }
91 if (!ret)
92 ret = put_user(tmp, datap);
93 break ;
94 }
95
96 /* when I and D space are separate, this will have to be fixed. */
97 case PTRACE_POKEUSR: /* write the word at location addr in the USER area */
98 if ((addr & 3) || addr >= sizeof(struct user)) {
99 ret = -EIO;
100 break ;
101 }
102
103 if (regno == PT_ORIG_ER0) {
104 ret = -EIO;
105 break ;
106 }
107 if (regno < H8300_REGS_NO) {
108 ret = h8300_put_reg(child, regno, data);
109 break ;
110 }
111 ret = -EIO;
112 break ;
113
114 case PTRACE_GETREGS: { /* Get all gp regs from the child. */
115 int i;
116 unsigned long tmp;
117 for (i = 0; i < H8300_REGS_NO; i++) {
118 tmp = h8300_get_reg(child, i);
119 if (put_user(tmp, datap)) {
120 ret = -EFAULT;
121 break;
122 }
123 datap++;
124 }
125 ret = 0;
126 break;
127 }
128
129 case PTRACE_SETREGS: { /* Set all gp regs in the child. */
130 int i;
131 unsigned long tmp;
132 for (i = 0; i < H8300_REGS_NO; i++) {
133 if (get_user(tmp, datap)) {
134 ret = -EFAULT;
135 break;
136 }
137 h8300_put_reg(child, i, tmp);
138 datap++;
139 }
140 ret = 0;
141 break;
142 }
143
144 default:
145 ret = ptrace_request(child, request, addr, data);
146 break;
147 }
148 return ret;
149}
150
151asmlinkage void do_syscall_trace(void)
152{
153 if (!test_thread_flag(TIF_SYSCALL_TRACE))
154 return;
155 if (!(current->ptrace & PT_PTRACED))
156 return;
157 ptrace_notify(SIGTRAP | ((current->ptrace & PT_TRACESYSGOOD)
158 ? 0x80 : 0));
159 /*
160 * this isn't the same as continuing with a signal, but it will do
161 * for normal use. strace only continues with a signal if the
162 * stopping signal is not SIGTRAP. -brl
163 */
164 if (current->exit_code) {
165 send_sig(current->exit_code, current, 1);
166 current->exit_code = 0;
167 }
168}
diff --git a/arch/h8300/kernel/setup.c b/arch/h8300/kernel/setup.c
deleted file mode 100644
index d0b1607f2711..000000000000
--- a/arch/h8300/kernel/setup.c
+++ /dev/null
@@ -1,242 +0,0 @@
1/*
2 * linux/arch/h8300/kernel/setup.c
3 *
4 * Copyleft ()) 2000 James D. Schettine {james@telos-systems.com}
5 * Copyright (C) 1999,2000 Greg Ungerer (gerg@snapgear.com)
6 * Copyright (C) 1998,1999 D. Jeff Dionne <jeff@lineo.ca>
7 * Copyright (C) 1998 Kenneth Albanowski <kjahds@kjahds.com>
8 * Copyright (C) 1995 Hamish Macdonald
9 * Copyright (C) 2000 Lineo Inc. (www.lineo.com)
10 * Copyright (C) 2001 Lineo, Inc. <www.lineo.com>
11 *
12 * H8/300 porting Yoshinori Sato <ysato@users.sourceforge.jp>
13 */
14
15/*
16 * This file handles the architecture-dependent parts of system setup
17 */
18
19#include <linux/kernel.h>
20#include <linux/sched.h>
21#include <linux/delay.h>
22#include <linux/interrupt.h>
23#include <linux/mm.h>
24#include <linux/fs.h>
25#include <linux/fb.h>
26#include <linux/console.h>
27#include <linux/genhd.h>
28#include <linux/errno.h>
29#include <linux/string.h>
30#include <linux/major.h>
31#include <linux/bootmem.h>
32#include <linux/seq_file.h>
33#include <linux/init.h>
34
35#include <asm/setup.h>
36#include <asm/irq.h>
37#include <asm/pgtable.h>
38#include <asm/sections.h>
39
40#if defined(__H8300H__)
41#define CPU "H8/300H"
42#include <asm/regs306x.h>
43#endif
44
45#if defined(__H8300S__)
46#define CPU "H8S"
47#include <asm/regs267x.h>
48#endif
49
50#define STUBSIZE 0xc000
51
52unsigned long rom_length;
53unsigned long memory_start;
54unsigned long memory_end;
55
56char __initdata command_line[COMMAND_LINE_SIZE];
57
58extern int _ramstart, _ramend;
59extern char _target_name[];
60extern void h8300_gpio_init(void);
61
62#if (defined(CONFIG_H8300H_SIM) || defined(CONFIG_H8S_SIM)) \
63 && defined(CONFIG_GDB_MAGICPRINT)
64/* printk with gdb service */
65static void gdb_console_output(struct console *c, const char *msg, unsigned len)
66{
67 for (; len > 0; len--) {
68 asm("mov.w %0,r2\n\t"
69 "jsr @0xc4"::"r"(*msg++):"er2");
70 }
71}
72
73/*
74 * Setup initial baud/bits/parity. We do two things here:
75 * - construct a cflag setting for the first rs_open()
76 * - initialize the serial port
77 * Return non-zero if we didn't find a serial port.
78 */
79static int __init gdb_console_setup(struct console *co, char *options)
80{
81 return 0;
82}
83
84static const struct console gdb_console = {
85 .name = "gdb_con",
86 .write = gdb_console_output,
87 .device = NULL,
88 .setup = gdb_console_setup,
89 .flags = CON_PRINTBUFFER,
90 .index = -1,
91};
92#endif
93
94void __init setup_arch(char **cmdline_p)
95{
96 int bootmap_size;
97
98 memory_start = (unsigned long) &_ramstart;
99
100 /* allow for ROMFS on the end of the kernel */
101 if (memcmp((void *)memory_start, "-rom1fs-", 8) == 0) {
102#if defined(CONFIG_BLK_DEV_INITRD)
103 initrd_start = memory_start;
104 initrd_end = memory_start += be32_to_cpu(((unsigned long *) (memory_start))[2]);
105#else
106 memory_start += be32_to_cpu(((unsigned long *) memory_start)[2]);
107#endif
108 }
109 memory_start = PAGE_ALIGN(memory_start);
110#if !defined(CONFIG_BLKDEV_RESERVE)
111 memory_end = (unsigned long) &_ramend; /* by now the stack is part of the init task */
112#if defined(CONFIG_GDB_DEBUG)
113 memory_end -= STUBSIZE;
114#endif
115#else
116 if ((memory_end < CONFIG_BLKDEV_RESERVE_ADDRESS) &&
117 (memory_end > CONFIG_BLKDEV_RESERVE_ADDRESS))
118 /* overlap userarea */
119 memory_end = CONFIG_BLKDEV_RESERVE_ADDRESS;
120#endif
121
122 init_mm.start_code = (unsigned long) _stext;
123 init_mm.end_code = (unsigned long) _etext;
124 init_mm.end_data = (unsigned long) _edata;
125 init_mm.brk = (unsigned long) 0;
126
127#if (defined(CONFIG_H8300H_SIM) || defined(CONFIG_H8S_SIM)) && defined(CONFIG_GDB_MAGICPRINT)
128 register_console((struct console *)&gdb_console);
129#endif
130
131 printk(KERN_INFO "\r\n\nuClinux " CPU "\n");
132 printk(KERN_INFO "Target Hardware: %s\n",_target_name);
133 printk(KERN_INFO "Flat model support (C) 1998,1999 Kenneth Albanowski, D. Jeff Dionne\n");
134 printk(KERN_INFO "H8/300 series support by Yoshinori Sato <ysato@users.sourceforge.jp>\n");
135
136#ifdef DEBUG
137 printk(KERN_DEBUG "KERNEL -> TEXT=0x%p-0x%p DATA=0x%p-0x%p "
138 "BSS=0x%p-0x%p\n", _stext, _etext, _sdata, _edata, __bss_start,
139 __bss_stop);
140 printk(KERN_DEBUG "KERNEL -> ROMFS=0x%p-0x%06lx MEM=0x%06lx-0x%06lx "
141 "STACK=0x%06lx-0x%p\n", __bss_stop, memory_start, memory_start,
142 memory_end, memory_end, &_ramend);
143#endif
144
145#ifdef CONFIG_DEFAULT_CMDLINE
146 /* set from default command line */
147 if (*command_line == '\0')
148 strcpy(command_line,CONFIG_KERNEL_COMMAND);
149#endif
150 /* Keep a copy of command line */
151 *cmdline_p = &command_line[0];
152 memcpy(boot_command_line, command_line, COMMAND_LINE_SIZE);
153 boot_command_line[COMMAND_LINE_SIZE-1] = 0;
154
155#ifdef DEBUG
156 if (strlen(*cmdline_p))
157 printk(KERN_DEBUG "Command line: '%s'\n", *cmdline_p);
158#endif
159
160 /*
161 * give all the memory to the bootmap allocator, tell it to put the
162 * boot mem_map at the start of memory
163 */
164 bootmap_size = init_bootmem_node(
165 NODE_DATA(0),
166 memory_start >> PAGE_SHIFT, /* map goes here */
167 PAGE_OFFSET >> PAGE_SHIFT, /* 0 on coldfire */
168 memory_end >> PAGE_SHIFT);
169 /*
170 * free the usable memory, we have to make sure we do not free
171 * the bootmem bitmap so we then reserve it after freeing it :-)
172 */
173 free_bootmem(memory_start, memory_end - memory_start);
174 reserve_bootmem(memory_start, bootmap_size, BOOTMEM_DEFAULT);
175 /*
176 * get kmalloc into gear
177 */
178 paging_init();
179 h8300_gpio_init();
180#if defined(CONFIG_H8300_AKI3068NET) && defined(CONFIG_IDE)
181 {
182#define AREABIT(addr) (1 << (((addr) >> 21) & 7))
183 /* setup BSC */
184 volatile unsigned char *abwcr = (volatile unsigned char *)ABWCR;
185 volatile unsigned char *cscr = (volatile unsigned char *)CSCR;
186 *abwcr &= ~(AREABIT(CONFIG_H8300_IDE_BASE) | AREABIT(CONFIG_H8300_IDE_ALT));
187 *cscr |= (AREABIT(CONFIG_H8300_IDE_BASE) | AREABIT(CONFIG_H8300_IDE_ALT)) | 0x0f;
188 }
189#endif
190#ifdef DEBUG
191 printk(KERN_DEBUG "Done setup_arch\n");
192#endif
193}
194
195/*
196 * Get CPU information for use by the procfs.
197 */
198
199static int show_cpuinfo(struct seq_file *m, void *v)
200{
201 char *cpu;
202 int mode;
203 u_long clockfreq;
204
205 cpu = CPU;
206 mode = *(volatile unsigned char *)MDCR & 0x07;
207
208 clockfreq = CONFIG_CPU_CLOCK;
209
210 seq_printf(m, "CPU:\t\t%s (mode:%d)\n"
211 "Clock:\t\t%lu.%1luMHz\n"
212 "BogoMips:\t%lu.%02lu\n"
213 "Calibration:\t%lu loops\n",
214 cpu,mode,
215 clockfreq/1000,clockfreq%1000,
216 (loops_per_jiffy*HZ)/500000,((loops_per_jiffy*HZ)/5000)%100,
217 (loops_per_jiffy*HZ));
218
219 return 0;
220}
221
222static void *c_start(struct seq_file *m, loff_t *pos)
223{
224 return *pos < NR_CPUS ? ((void *) 0x12345678) : NULL;
225}
226
227static void *c_next(struct seq_file *m, void *v, loff_t *pos)
228{
229 ++*pos;
230 return c_start(m, pos);
231}
232
233static void c_stop(struct seq_file *m, void *v)
234{
235}
236
237const struct seq_operations cpuinfo_op = {
238 .start = c_start,
239 .next = c_next,
240 .stop = c_stop,
241 .show = show_cpuinfo,
242};
diff --git a/arch/h8300/kernel/signal.c b/arch/h8300/kernel/signal.c
deleted file mode 100644
index a65ff3b76326..000000000000
--- a/arch/h8300/kernel/signal.c
+++ /dev/null
@@ -1,444 +0,0 @@
1/*
2 * linux/arch/h8300/kernel/signal.c
3 *
4 * Copyright (C) 1991, 1992 Linus Torvalds
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file COPYING in the main directory of this archive
8 * for more details.
9 */
10
11/*
12 * uClinux H8/300 support by Yoshinori Sato <ysato@users.sourceforge.jp>
13 * and David McCullough <davidm@snapgear.com>
14 *
15 * Based on
16 * Linux/m68k by Hamish Macdonald
17 */
18
19/*
20 * ++roman (07/09/96): implemented signal stacks (specially for tosemu on
21 * Atari :-) Current limitation: Only one sigstack can be active at one time.
22 * If a second signal with SA_ONSTACK set arrives while working on a sigstack,
23 * SA_ONSTACK is ignored. This behaviour avoids lots of trouble with nested
24 * signal handlers!
25 */
26
27#include <linux/sched.h>
28#include <linux/mm.h>
29#include <linux/kernel.h>
30#include <linux/signal.h>
31#include <linux/syscalls.h>
32#include <linux/errno.h>
33#include <linux/wait.h>
34#include <linux/ptrace.h>
35#include <linux/unistd.h>
36#include <linux/stddef.h>
37#include <linux/highuid.h>
38#include <linux/personality.h>
39#include <linux/tty.h>
40#include <linux/binfmts.h>
41#include <linux/tracehook.h>
42
43#include <asm/setup.h>
44#include <asm/uaccess.h>
45#include <asm/pgtable.h>
46#include <asm/traps.h>
47#include <asm/ucontext.h>
48
49/*
50 * Do a signal return; undo the signal stack.
51 *
52 * Keep the return code on the stack quadword aligned!
53 * That makes the cache flush below easier.
54 */
55
56struct sigframe
57{
58 long dummy_er0;
59 long dummy_vector;
60#if defined(CONFIG_CPU_H8S)
61 short dummy_exr;
62#endif
63 long dummy_pc;
64 char *pretcode;
65 unsigned char retcode[8];
66 unsigned long extramask[_NSIG_WORDS-1];
67 struct sigcontext sc;
68 int sig;
69} __attribute__((aligned(2),packed));
70
71struct rt_sigframe
72{
73 long dummy_er0;
74 long dummy_vector;
75#if defined(CONFIG_CPU_H8S)
76 short dummy_exr;
77#endif
78 long dummy_pc;
79 char *pretcode;
80 struct siginfo *pinfo;
81 void *puc;
82 unsigned char retcode[8];
83 struct siginfo info;
84 struct ucontext uc;
85 int sig;
86} __attribute__((aligned(2),packed));
87
88static inline int
89restore_sigcontext(struct sigcontext *usc, int *pd0)
90{
91 struct pt_regs *regs = current_pt_regs();
92 int err = 0;
93 unsigned int ccr;
94 unsigned int usp;
95 unsigned int er0;
96
97 /* Always make any pending restarted system calls return -EINTR */
98 current_thread_info()->restart_block.fn = do_no_restart_syscall;
99
100#define COPY(r) err |= __get_user(regs->r, &usc->sc_##r) /* restore passed registers */
101 COPY(er1);
102 COPY(er2);
103 COPY(er3);
104 COPY(er5);
105 COPY(pc);
106 ccr = regs->ccr & 0x10;
107 COPY(ccr);
108#undef COPY
109 regs->ccr &= 0xef;
110 regs->ccr |= ccr;
111 regs->orig_er0 = -1; /* disable syscall checks */
112 err |= __get_user(usp, &usc->sc_usp);
113 wrusp(usp);
114
115 err |= __get_user(er0, &usc->sc_er0);
116 *pd0 = er0;
117 return err;
118}
119
120asmlinkage int sys_sigreturn(void)
121{
122 unsigned long usp = rdusp();
123 struct sigframe *frame = (struct sigframe *)(usp - 4);
124 sigset_t set;
125 int er0;
126
127 if (!access_ok(VERIFY_READ, frame, sizeof(*frame)))
128 goto badframe;
129 if (__get_user(set.sig[0], &frame->sc.sc_mask) ||
130 (_NSIG_WORDS > 1 &&
131 __copy_from_user(&set.sig[1], &frame->extramask,
132 sizeof(frame->extramask))))
133 goto badframe;
134
135 set_current_blocked(&set);
136
137 if (restore_sigcontext(&frame->sc, &er0))
138 goto badframe;
139 return er0;
140
141badframe:
142 force_sig(SIGSEGV, current);
143 return 0;
144}
145
146asmlinkage int sys_rt_sigreturn(void)
147{
148 unsigned long usp = rdusp();
149 struct rt_sigframe *frame = (struct rt_sigframe *)(usp - 4);
150 sigset_t set;
151 int er0;
152
153 if (!access_ok(VERIFY_READ, frame, sizeof(*frame)))
154 goto badframe;
155 if (__copy_from_user(&set, &frame->uc.uc_sigmask, sizeof(set)))
156 goto badframe;
157
158 set_current_blocked(&set);
159
160 if (restore_sigcontext(&frame->uc.uc_mcontext, &er0))
161 goto badframe;
162
163 if (restore_altstack(&frame->uc.uc_stack))
164 goto badframe;
165
166 return er0;
167
168badframe:
169 force_sig(SIGSEGV, current);
170 return 0;
171}
172
173static int setup_sigcontext(struct sigcontext __user *sc, struct pt_regs *regs,
174 unsigned long mask)
175{
176 int err = 0;
177
178 err |= __put_user(regs->er0, &sc->sc_er0);
179 err |= __put_user(regs->er1, &sc->sc_er1);
180 err |= __put_user(regs->er2, &sc->sc_er2);
181 err |= __put_user(regs->er3, &sc->sc_er3);
182 err |= __put_user(regs->er4, &sc->sc_er4);
183 err |= __put_user(regs->er5, &sc->sc_er5);
184 err |= __put_user(regs->er6, &sc->sc_er6);
185 err |= __put_user(rdusp(), &sc->sc_usp);
186 err |= __put_user(regs->pc, &sc->sc_pc);
187 err |= __put_user(regs->ccr, &sc->sc_ccr);
188 err |= __put_user(mask, &sc->sc_mask);
189
190 return err;
191}
192
193static inline void *
194get_sigframe(struct k_sigaction *ka, struct pt_regs *regs, size_t frame_size)
195{
196 unsigned long usp;
197
198 /* Default to using normal stack. */
199 usp = rdusp();
200
201 /* This is the X/Open sanctioned signal stack switching. */
202 if (ka->sa.sa_flags & SA_ONSTACK) {
203 if (!sas_ss_flags(usp))
204 usp = current->sas_ss_sp + current->sas_ss_size;
205 }
206 return (void *)((usp - frame_size) & -8UL);
207}
208
209static int setup_frame (int sig, struct k_sigaction *ka,
210 sigset_t *set, struct pt_regs *regs)
211{
212 struct sigframe *frame;
213 int err = 0;
214 int usig;
215 unsigned char *ret;
216
217 frame = get_sigframe(ka, regs, sizeof(*frame));
218
219 if (!access_ok(VERIFY_WRITE, frame, sizeof(*frame)))
220 goto give_sigsegv;
221
222 usig = current_thread_info()->exec_domain
223 && current_thread_info()->exec_domain->signal_invmap
224 && sig < 32
225 ? current_thread_info()->exec_domain->signal_invmap[sig]
226 : sig;
227
228 err |= __put_user(usig, &frame->sig);
229 if (err)
230 goto give_sigsegv;
231
232 err |= setup_sigcontext(&frame->sc, regs, set->sig[0]);
233 if (err)
234 goto give_sigsegv;
235
236 if (_NSIG_WORDS > 1) {
237 err |= copy_to_user(frame->extramask, &set->sig[1],
238 sizeof(frame->extramask));
239 if (err)
240 goto give_sigsegv;
241 }
242
243 ret = frame->retcode;
244 if (ka->sa.sa_flags & SA_RESTORER)
245 ret = (unsigned char *)(ka->sa.sa_restorer);
246 else {
247 /* sub.l er0,er0; mov.b #__NR_sigreturn,r0l; trapa #0 */
248 err |= __put_user(0x1a80f800 + (__NR_sigreturn & 0xff),
249 (unsigned long *)(frame->retcode + 0));
250 err |= __put_user(0x5700, (unsigned short *)(frame->retcode + 4));
251 }
252
253 /* Set up to return from userspace. */
254 err |= __put_user(ret, &frame->pretcode);
255
256 if (err)
257 goto give_sigsegv;
258
259 /* Set up registers for signal handler */
260 wrusp ((unsigned long) frame);
261 regs->pc = (unsigned long) ka->sa.sa_handler;
262 regs->er0 = (current_thread_info()->exec_domain
263 && current_thread_info()->exec_domain->signal_invmap
264 && sig < 32
265 ? current_thread_info()->exec_domain->signal_invmap[sig]
266 : sig);
267 regs->er1 = (unsigned long)&(frame->sc);
268 regs->er5 = current->mm->start_data; /* GOT base */
269
270 return 0;
271
272give_sigsegv:
273 force_sigsegv(sig, current);
274 return -EFAULT;
275}
276
277static int setup_rt_frame (int sig, struct k_sigaction *ka, siginfo_t *info,
278 sigset_t *set, struct pt_regs *regs)
279{
280 struct rt_sigframe *frame;
281 int err = 0;
282 int usig;
283 unsigned char *ret;
284
285 frame = get_sigframe(ka, regs, sizeof(*frame));
286
287 if (!access_ok(VERIFY_WRITE, frame, sizeof(*frame)))
288 goto give_sigsegv;
289
290 usig = current_thread_info()->exec_domain
291 && current_thread_info()->exec_domain->signal_invmap
292 && sig < 32
293 ? current_thread_info()->exec_domain->signal_invmap[sig]
294 : sig;
295
296 err |= __put_user(usig, &frame->sig);
297 if (err)
298 goto give_sigsegv;
299
300 err |= __put_user(&frame->info, &frame->pinfo);
301 err |= __put_user(&frame->uc, &frame->puc);
302 err |= copy_siginfo_to_user(&frame->info, info);
303 if (err)
304 goto give_sigsegv;
305
306 /* Create the ucontext. */
307 err |= __put_user(0, &frame->uc.uc_flags);
308 err |= __put_user(0, &frame->uc.uc_link);
309 err |= __save_altstack(&frame->uc.uc_stack, rdusp());
310 err |= setup_sigcontext(&frame->uc.uc_mcontext, regs, set->sig[0]);
311 err |= copy_to_user (&frame->uc.uc_sigmask, set, sizeof(*set));
312 if (err)
313 goto give_sigsegv;
314
315 /* Set up to return from userspace. */
316 ret = frame->retcode;
317 if (ka->sa.sa_flags & SA_RESTORER)
318 ret = (unsigned char *)(ka->sa.sa_restorer);
319 else {
320 /* sub.l er0,er0; mov.b #__NR_sigreturn,r0l; trapa #0 */
321 err |= __put_user(0x1a80f800 + (__NR_sigreturn & 0xff),
322 (unsigned long *)(frame->retcode + 0));
323 err |= __put_user(0x5700, (unsigned short *)(frame->retcode + 4));
324 }
325 err |= __put_user(ret, &frame->pretcode);
326
327 if (err)
328 goto give_sigsegv;
329
330 /* Set up registers for signal handler */
331 wrusp ((unsigned long) frame);
332 regs->pc = (unsigned long) ka->sa.sa_handler;
333 regs->er0 = (current_thread_info()->exec_domain
334 && current_thread_info()->exec_domain->signal_invmap
335 && sig < 32
336 ? current_thread_info()->exec_domain->signal_invmap[sig]
337 : sig);
338 regs->er1 = (unsigned long)&(frame->info);
339 regs->er2 = (unsigned long)&frame->uc;
340 regs->er5 = current->mm->start_data; /* GOT base */
341
342 return 0;
343
344give_sigsegv:
345 force_sigsegv(sig, current);
346 return -EFAULT;
347}
348
349/*
350 * OK, we're invoking a handler
351 */
352static void
353handle_signal(unsigned long sig, siginfo_t *info, struct k_sigaction *ka,
354 struct pt_regs * regs)
355{
356 sigset_t *oldset = sigmask_to_save();
357 int ret;
358 /* are we from a system call? */
359 if (regs->orig_er0 >= 0) {
360 switch (regs->er0) {
361 case -ERESTART_RESTARTBLOCK:
362 case -ERESTARTNOHAND:
363 regs->er0 = -EINTR;
364 break;
365
366 case -ERESTARTSYS:
367 if (!(ka->sa.sa_flags & SA_RESTART)) {
368 regs->er0 = -EINTR;
369 break;
370 }
371 /* fallthrough */
372 case -ERESTARTNOINTR:
373 regs->er0 = regs->orig_er0;
374 regs->pc -= 2;
375 }
376 }
377
378 /* set up the stack frame */
379 if (ka->sa.sa_flags & SA_SIGINFO)
380 ret = setup_rt_frame(sig, ka, info, oldset, regs);
381 else
382 ret = setup_frame(sig, ka, oldset, regs);
383
384 if (!ret)
385 signal_delivered(sig, info, ka, regs, 0);
386}
387
388/*
389 * Note that 'init' is a special process: it doesn't get signals it doesn't
390 * want to handle. Thus you cannot kill init even with a SIGKILL even by
391 * mistake.
392 */
393static void do_signal(struct pt_regs *regs)
394{
395 siginfo_t info;
396 int signr;
397 struct k_sigaction ka;
398
399 /*
400 * We want the common case to go fast, which
401 * is why we may in certain cases get here from
402 * kernel mode. Just return without doing anything
403 * if so.
404 */
405 if ((regs->ccr & 0x10))
406 return;
407
408 current->thread.esp0 = (unsigned long) regs;
409
410 signr = get_signal_to_deliver(&info, &ka, regs, NULL);
411 if (signr > 0) {
412 /* Whee! Actually deliver the signal. */
413 handle_signal(signr, &info, &ka, regs);
414 return;
415 }
416 /* Did we come from a system call? */
417 if (regs->orig_er0 >= 0) {
418 /* Restart the system call - no handlers present */
419 if (regs->er0 == -ERESTARTNOHAND ||
420 regs->er0 == -ERESTARTSYS ||
421 regs->er0 == -ERESTARTNOINTR) {
422 regs->er0 = regs->orig_er0;
423 regs->pc -= 2;
424 }
425 if (regs->er0 == -ERESTART_RESTARTBLOCK){
426 regs->er0 = __NR_restart_syscall;
427 regs->pc -= 2;
428 }
429 }
430
431 /* If there's no signal to deliver, we just restore the saved mask. */
432 restore_saved_sigmask();
433}
434
435asmlinkage void do_notify_resume(struct pt_regs *regs, u32 thread_info_flags)
436{
437 if (thread_info_flags & _TIF_SIGPENDING)
438 do_signal(regs);
439
440 if (thread_info_flags & _TIF_NOTIFY_RESUME) {
441 clear_thread_flag(TIF_NOTIFY_RESUME);
442 tracehook_notify_resume(regs);
443 }
444}
diff --git a/arch/h8300/kernel/sys_h8300.c b/arch/h8300/kernel/sys_h8300.c
deleted file mode 100644
index bf350cb7f597..000000000000
--- a/arch/h8300/kernel/sys_h8300.c
+++ /dev/null
@@ -1,48 +0,0 @@
1/*
2 * linux/arch/h8300/kernel/sys_h8300.c
3 *
4 * This file contains various random system calls that
5 * have a non-standard calling sequence on the H8/300
6 * platform.
7 */
8
9#include <linux/errno.h>
10#include <linux/sched.h>
11#include <linux/mm.h>
12#include <linux/smp.h>
13#include <linux/sem.h>
14#include <linux/msg.h>
15#include <linux/shm.h>
16#include <linux/stat.h>
17#include <linux/syscalls.h>
18#include <linux/mman.h>
19#include <linux/file.h>
20#include <linux/fs.h>
21#include <linux/ipc.h>
22
23#include <asm/setup.h>
24#include <asm/uaccess.h>
25#include <asm/cachectl.h>
26#include <asm/traps.h>
27#include <asm/unistd.h>
28
29/* sys_cacheflush -- no support. */
30asmlinkage int
31sys_cacheflush (unsigned long addr, int scope, int cache, unsigned long len)
32{
33 return -EINVAL;
34}
35
36asmlinkage int sys_getpagesize(void)
37{
38 return PAGE_SIZE;
39}
40
41#if defined(CONFIG_SYSCALL_PRINT)
42asmlinkage void syscall_print(void *dummy,...)
43{
44 struct pt_regs *regs = (struct pt_regs *) ((unsigned char *)&dummy-4);
45 printk("call %06lx:%ld 1:%08lx,2:%08lx,3:%08lx,ret:%08lx\n",
46 ((regs->pc)&0xffffff)-2,regs->orig_er0,regs->er1,regs->er2,regs->er3,regs->er0);
47}
48#endif
diff --git a/arch/h8300/kernel/syscalls.S b/arch/h8300/kernel/syscalls.S
deleted file mode 100644
index c55e0ed270d5..000000000000
--- a/arch/h8300/kernel/syscalls.S
+++ /dev/null
@@ -1,338 +0,0 @@
1/* Systemcall Entry Table */
2#include <linux/sys.h>
3#include <asm/linkage.h>
4#include <asm/unistd.h>
5
6#define CALL(x) .long _ ## x
7
8.globl _sys_call_table
9
10#if defined(CONFIG_CPU_H8300H)
11 .h8300h
12#endif
13#if defined(CONFIG_CPU_H8S)
14 .h8300s
15#endif
16 .section .text
17 .align 2
18_sys_call_table:
19 CALL(sys_ni_syscall) /* 0 - old "setup()" system call*/
20 CALL(sys_exit)
21 CALL(sys_fork)
22 CALL(sys_read)
23 CALL(sys_write)
24 CALL(sys_open) /* 5 */
25 CALL(sys_close)
26 CALL(sys_waitpid)
27 CALL(sys_creat)
28 CALL(sys_link)
29 CALL(sys_unlink) /* 10 */
30 CALL(sys_execve)
31 CALL(sys_chdir)
32 CALL(sys_time)
33 CALL(sys_mknod)
34 CALL(sys_chmod) /* 15 */
35 CALL(sys_chown16)
36 CALL(sys_ni_syscall) /* old break syscall holder */
37 CALL(sys_stat)
38 CALL(sys_lseek)
39 CALL(sys_getpid) /* 20 */
40 CALL(sys_mount)
41 CALL(sys_oldumount)
42 CALL(sys_setuid16)
43 CALL(sys_getuid16)
44 CALL(sys_stime) /* 25 */
45 CALL(sys_ptrace)
46 CALL(sys_alarm)
47 CALL(sys_fstat)
48 CALL(sys_pause)
49 CALL(sys_utime) /* 30 */
50 CALL(sys_ni_syscall) /* old stty syscall holder */
51 CALL(sys_ni_syscall) /* old gtty syscall holder */
52 CALL(sys_access)
53 CALL(sys_nice)
54 CALL(sys_ni_syscall) /* 35 old ftime syscall holder */
55 CALL(sys_sync)
56 CALL(sys_kill)
57 CALL(sys_rename)
58 CALL(sys_mkdir)
59 CALL(sys_rmdir) /* 40 */
60 CALL(sys_dup)
61 CALL(sys_pipe)
62 CALL(sys_times)
63 CALL(sys_ni_syscall) /* old prof syscall holder */
64 CALL(sys_brk) /* 45 */
65 CALL(sys_setgid16)
66 CALL(sys_getgid16)
67 CALL(sys_signal)
68 CALL(sys_geteuid16)
69 CALL(sys_getegid16) /* 50 */
70 CALL(sys_acct)
71 CALL(sys_umount) /* recycled never used phys() */
72 CALL(sys_ni_syscall) /* old lock syscall holder */
73 CALL(sys_ioctl)
74 CALL(sys_fcntl) /* 55 */
75 CALL(sys_ni_syscall) /* old mpx syscall holder */
76 CALL(sys_setpgid)
77 CALL(sys_ni_syscall) /* old ulimit syscall holder */
78 CALL(sys_ni_syscall)
79 CALL(sys_umask) /* 60 */
80 CALL(sys_chroot)
81 CALL(sys_ustat)
82 CALL(sys_dup2)
83 CALL(sys_getppid)
84 CALL(sys_getpgrp) /* 65 */
85 CALL(sys_setsid)
86 CALL(sys_sigaction)
87 CALL(sys_sgetmask)
88 CALL(sys_ssetmask)
89 CALL(sys_setreuid16) /* 70 */
90 CALL(sys_setregid16)
91 CALL(sys_sigsuspend)
92 CALL(sys_sigpending)
93 CALL(sys_sethostname)
94 CALL(sys_setrlimit) /* 75 */
95 CALL(sys_old_getrlimit)
96 CALL(sys_getrusage)
97 CALL(sys_gettimeofday)
98 CALL(sys_settimeofday)
99 CALL(sys_getgroups16) /* 80 */
100 CALL(sys_setgroups16)
101 CALL(sys_old_select)
102 CALL(sys_symlink)
103 CALL(sys_lstat)
104 CALL(sys_readlink) /* 85 */
105 CALL(sys_uselib)
106 CALL(sys_swapon)
107 CALL(sys_reboot)
108 CALL(sys_old_readdir)
109 CALL(sys_old_mmap) /* 90 */
110 CALL(sys_munmap)
111 CALL(sys_truncate)
112 CALL(sys_ftruncate)
113 CALL(sys_fchmod)
114 CALL(sys_fchown16) /* 95 */
115 CALL(sys_getpriority)
116 CALL(sys_setpriority)
117 CALL(sys_ni_syscall) /* old profil syscall holder */
118 CALL(sys_statfs)
119 CALL(sys_fstatfs) /* 100 */
120 CALL(sys_ni_syscall) /* ioperm for i386 */
121 CALL(sys_socketcall)
122 CALL(sys_syslog)
123 CALL(sys_setitimer)
124 CALL(sys_getitimer) /* 105 */
125 CALL(sys_newstat)
126 CALL(sys_newlstat)
127 CALL(sys_newfstat)
128 CALL(sys_ni_syscall)
129 CALL(sys_ni_syscall) /* iopl for i386 */ /* 110 */
130 CALL(sys_vhangup)
131 CALL(sys_ni_syscall) /* obsolete idle() syscall */
132 CALL(sys_ni_syscall) /* vm86old for i386 */
133 CALL(sys_wait4)
134 CALL(sys_swapoff) /* 115 */
135 CALL(sys_sysinfo)
136 CALL(sys_ipc)
137 CALL(sys_fsync)
138 CALL(sys_sigreturn)
139 CALL(sys_clone) /* 120 */
140 CALL(sys_setdomainname)
141 CALL(sys_newuname)
142 CALL(sys_cacheflush) /* modify_ldt for i386 */
143 CALL(sys_adjtimex)
144 CALL(sys_ni_syscall) /* 125 sys_mprotect */
145 CALL(sys_sigprocmask)
146 CALL(sys_ni_syscall) /* sys_create_module */
147 CALL(sys_init_module)
148 CALL(sys_delete_module)
149 CALL(sys_ni_syscall) /* 130 sys_get_kernel_syms */
150 CALL(sys_quotactl)
151 CALL(sys_getpgid)
152 CALL(sys_fchdir)
153 CALL(sys_bdflush)
154 CALL(sys_sysfs) /* 135 */
155 CALL(sys_personality)
156 CALL(sys_ni_syscall) /* for afs_syscall */
157 CALL(sys_setfsuid16)
158 CALL(sys_setfsgid16)
159 CALL(sys_llseek) /* 140 */
160 CALL(sys_getdents)
161 CALL(sys_select)
162 CALL(sys_flock)
163 CALL(sys_ni_syscall) /* sys_msync */
164 CALL(sys_readv) /* 145 */
165 CALL(sys_writev)
166 CALL(sys_getsid)
167 CALL(sys_fdatasync)
168 CALL(sys_sysctl)
169 CALL(sys_ni_syscall) /* 150 sys_mlock */
170 CALL(sys_ni_syscall) /* sys_munlock */
171 CALL(sys_ni_syscall) /* sys_mlockall */
172 CALL(sys_ni_syscall) /* sys_munlockall */
173 CALL(sys_sched_setparam)
174 CALL(sys_sched_getparam) /* 155 */
175 CALL(sys_sched_setscheduler)
176 CALL(sys_sched_getscheduler)
177 CALL(sys_sched_yield)
178 CALL(sys_sched_get_priority_max)
179 CALL(sys_sched_get_priority_min) /* 160 */
180 CALL(sys_sched_rr_get_interval)
181 CALL(sys_nanosleep)
182 CALL(sys_ni_syscall) /* sys_mremap */
183 CALL(sys_setresuid16)
184 CALL(sys_getresuid16) /* 165 */
185 CALL(sys_ni_syscall) /* for vm86 */
186 CALL(sys_ni_syscall) /* sys_query_module */
187 CALL(sys_poll)
188 CALL(sys_ni_syscall) /* old nfsservctl */
189 CALL(sys_setresgid16) /* 170 */
190 CALL(sys_getresgid16)
191 CALL(sys_prctl)
192 CALL(sys_rt_sigreturn)
193 CALL(sys_rt_sigaction)
194 CALL(sys_rt_sigprocmask) /* 175 */
195 CALL(sys_rt_sigpending)
196 CALL(sys_rt_sigtimedwait)
197 CALL(sys_rt_sigqueueinfo)
198 CALL(sys_rt_sigsuspend)
199 CALL(sys_pread64) /* 180 */
200 CALL(sys_pwrite64)
201 CALL(sys_lchown16);
202 CALL(sys_getcwd)
203 CALL(sys_capget)
204 CALL(sys_capset) /* 185 */
205 CALL(sys_sigaltstack)
206 CALL(sys_sendfile)
207 CALL(sys_ni_syscall) /* streams1 */
208 CALL(sys_ni_syscall) /* streams2 */
209 CALL(sys_vfork) /* 190 */
210 CALL(sys_getrlimit)
211 CALL(sys_mmap_pgoff)
212 CALL(sys_truncate64)
213 CALL(sys_ftruncate64)
214 CALL(sys_stat64) /* 195 */
215 CALL(sys_lstat64)
216 CALL(sys_fstat64)
217 CALL(sys_chown)
218 CALL(sys_getuid)
219 CALL(sys_getgid) /* 200 */
220 CALL(sys_geteuid)
221 CALL(sys_getegid)
222 CALL(sys_setreuid)
223 CALL(sys_setregid)
224 CALL(sys_getgroups) /* 205 */
225 CALL(sys_setgroups)
226 CALL(sys_fchown)
227 CALL(sys_setresuid)
228 CALL(sys_getresuid)
229 CALL(sys_setresgid) /* 210 */
230 CALL(sys_getresgid)
231 CALL(sys_lchown)
232 CALL(sys_setuid)
233 CALL(sys_setgid)
234 CALL(sys_setfsuid) /* 215 */
235 CALL(sys_setfsgid)
236 CALL(sys_pivot_root)
237 CALL(sys_ni_syscall)
238 CALL(sys_ni_syscall)
239 CALL(sys_getdents64) /* 220 */
240 CALL(sys_fcntl64)
241 CALL(sys_ni_syscall) /* reserved TUX */
242 CALL(sys_ni_syscall) /* reserved Security */
243 CALL(sys_gettid)
244 CALL(sys_readahead) /* 225 */
245 CALL(sys_setxattr)
246 CALL(sys_lsetxattr)
247 CALL(sys_fsetxattr)
248 CALL(sys_getxattr)
249 CALL(sys_lgetxattr) /* 230 */
250 CALL(sys_fgetxattr)
251 CALL(sys_listxattr)
252 CALL(sys_llistxattr)
253 CALL(sys_flistxattr)
254 CALL(sys_removexattr) /* 235 */
255 CALL(sys_lremovexattr)
256 CALL(sys_fremovexattr)
257 CALL(sys_tkill)
258 CALL(sys_sendfile64)
259 CALL(sys_futex) /* 240 */
260 CALL(sys_sched_setaffinity)
261 CALL(sys_sched_getaffinity)
262 CALL(sys_ni_syscall)
263 CALL(sys_ni_syscall)
264 CALL(sys_io_setup) /* 245 */
265 CALL(sys_io_destroy)
266 CALL(sys_io_getevents)
267 CALL(sys_io_submit)
268 CALL(sys_io_cancel)
269 CALL(sys_fadvise64) /* 250 */
270 CALL(sys_ni_syscall)
271 CALL(sys_exit_group)
272 CALL(sys_lookup_dcookie)
273 CALL(sys_epoll_create)
274 CALL(sys_epoll_ctl) /* 255 */
275 CALL(sys_epoll_wait)
276 CALL(sys_ni_syscall) /* sys_remap_file_pages */
277 CALL(sys_set_tid_address)
278 CALL(sys_timer_create)
279 CALL(sys_timer_settime) /* 260 */
280 CALL(sys_timer_gettime)
281 CALL(sys_timer_getoverrun)
282 CALL(sys_timer_delete)
283 CALL(sys_clock_settime)
284 CALL(sys_clock_gettime) /* 265 */
285 CALL(sys_clock_getres)
286 CALL(sys_clock_nanosleep)
287 CALL(sys_statfs64)
288 CALL(sys_fstatfs64)
289 CALL(sys_tgkill) /* 270 */
290 CALL(sys_utimes)
291 CALL(sys_fadvise64_64)
292 CALL(sys_ni_syscall) /* sys_vserver */
293 CALL(sys_ni_syscall)
294 CALL(sys_get_mempolicy) /* 275 */
295 CALL(sys_set_mempolicy)
296 CALL(sys_mq_open)
297 CALL(sys_mq_unlink)
298 CALL(sys_mq_timedsend)
299 CALL(sys_mq_timedreceive) /* 280 */
300 CALL(sys_mq_notify)
301 CALL(sys_mq_getsetattr)
302 CALL(sys_waitid)
303 CALL(sys_ni_syscall) /* sys_kexec_load */
304 CALL(sys_add_key) /* 285 */
305 CALL(sys_request_key)
306 CALL(sys_keyctl)
307 CALL(sys_ioprio_set)
308 CALL(sys_ioprio_get) /* 290 */
309 CALL(sys_inotify_init)
310 CALL(sys_inotify_add_watch)
311 CALL(sys_inotify_rm_watch)
312 CALL(sys_migrate_pages)
313 CALL(sys_openat) /* 295 */
314 CALL(sys_mkdirat)
315 CALL(sys_mknodat)
316 CALL(sys_fchownat)
317 CALL(sys_futimesat)
318 CALL(sys_fstatat64) /* 300 */
319 CALL(sys_unlinkat)
320 CALL(sys_renameat)
321 CALL(sys_linkat)
322 CALL(sys_symlinkat)
323 CALL(sys_readlinkat) /* 305 */
324 CALL(sys_fchmodat)
325 CALL(sys_faccessat)
326 CALL(sys_ni_syscall) /* sys_pselect6 */
327 CALL(sys_ni_syscall) /* sys_ppoll */
328 CALL(sys_unshare) /* 310 */
329 CALL(sys_set_robust_list)
330 CALL(sys_get_robust_list)
331 CALL(sys_splice)
332 CALL(sys_sync_file_range)
333 CALL(sys_tee) /* 315 */
334 CALL(sys_vmsplice)
335 CALL(sys_ni_syscall) /* sys_move_pages */
336 CALL(sys_getcpu)
337 CALL(sys_ni_syscall) /* sys_epoll_pwait */
338 CALL(sys_setns) /* 320 */
diff --git a/arch/h8300/kernel/time.c b/arch/h8300/kernel/time.c
deleted file mode 100644
index e0f74191d553..000000000000
--- a/arch/h8300/kernel/time.c
+++ /dev/null
@@ -1,66 +0,0 @@
1/*
2 * linux/arch/h8300/kernel/time.c
3 *
4 * Yoshinori Sato <ysato@users.sourceforge.jp>
5 *
6 * Copied/hacked from:
7 *
8 * linux/arch/m68k/kernel/time.c
9 *
10 * Copyright (C) 1991, 1992, 1995 Linus Torvalds
11 *
12 * This file contains the m68k-specific time handling details.
13 * Most of the stuff is located in the machine specific files.
14 *
15 * 1997-09-10 Updated NTP code according to technical memorandum Jan '96
16 * "A Kernel Model for Precision Timekeeping" by Dave Mills
17 */
18
19#include <linux/errno.h>
20#include <linux/module.h>
21#include <linux/sched.h>
22#include <linux/kernel.h>
23#include <linux/param.h>
24#include <linux/string.h>
25#include <linux/mm.h>
26#include <linux/timex.h>
27#include <linux/profile.h>
28
29#include <asm/io.h>
30#include <asm/irq_regs.h>
31#include <asm/timer.h>
32
33#define TICK_SIZE (tick_nsec / 1000)
34
35void h8300_timer_tick(void)
36{
37 if (current->pid)
38 profile_tick(CPU_PROFILING);
39 xtime_update(1);
40 update_process_times(user_mode(get_irq_regs()));
41}
42
43void read_persistent_clock(struct timespec *ts)
44{
45 unsigned int year, mon, day, hour, min, sec;
46
47 /* FIX by dqg : Set to zero for platforms that don't have tod */
48 /* without this time is undefined and can overflow time_t, causing */
49 /* very strange errors */
50 year = 1980;
51 mon = day = 1;
52 hour = min = sec = 0;
53#ifdef CONFIG_H8300_GETTOD
54 h8300_gettod (&year, &mon, &day, &hour, &min, &sec);
55#endif
56 if ((year += 1900) < 1970)
57 year += 100;
58 ts->tv_sec = mktime(year, mon, day, hour, min, sec);
59 ts->tv_nsec = 0;
60}
61
62void __init time_init(void)
63{
64
65 h8300_timer_setup();
66}
diff --git a/arch/h8300/kernel/timer/Makefile b/arch/h8300/kernel/timer/Makefile
deleted file mode 100644
index bef0510ea6ad..000000000000
--- a/arch/h8300/kernel/timer/Makefile
+++ /dev/null
@@ -1,6 +0,0 @@
1# h8300 internal timer handler
2
3obj-$(CONFIG_H8300_TIMER8) := timer8.o
4obj-$(CONFIG_H8300_TIMER16) := timer16.o
5obj-$(CONFIG_H8300_ITU) := itu.o
6obj-$(CONFIG_H8300_TPU) := tpu.o
diff --git a/arch/h8300/kernel/timer/itu.c b/arch/h8300/kernel/timer/itu.c
deleted file mode 100644
index 0a8b5cd5bf38..000000000000
--- a/arch/h8300/kernel/timer/itu.c
+++ /dev/null
@@ -1,82 +0,0 @@
1/*
2 * linux/arch/h8300/kernel/timer/itu.c
3 *
4 * Yoshinori Sato <ysato@users.sourcefoge.jp>
5 *
6 * ITU Timer Handler
7 *
8 */
9
10#include <linux/errno.h>
11#include <linux/sched.h>
12#include <linux/kernel.h>
13#include <linux/param.h>
14#include <linux/string.h>
15#include <linux/mm.h>
16#include <linux/interrupt.h>
17#include <linux/init.h>
18#include <linux/timex.h>
19
20#include <asm/segment.h>
21#include <asm/io.h>
22#include <asm/irq.h>
23#include <asm/regs306x.h>
24
25#if CONFIG_H8300_ITU_CH == 0
26#define ITUBASE 0xffff64
27#define ITUIRQ 24
28#elif CONFIG_H8300_ITU_CH == 1
29#define ITUBASE 0xffff6e
30#define ITUIRQ 28
31#elif CONFIG_H8300_ITU_CH == 2
32#define ITUBASE 0xffff78
33#define ITUIRQ 32
34#elif CONFIG_H8300_ITU_CH == 3
35#define ITUBASE 0xffff82
36#define ITUIRQ 36
37#elif CONFIG_H8300_ITU_CH == 4
38#define ITUBASE 0xffff92
39#define ITUIRQ 40
40#else
41#error Unknown timer channel.
42#endif
43
44#define TCR 0
45#define TIOR 1
46#define TIER 2
47#define TSR 3
48#define TCNT 4
49#define GRA 6
50#define GRB 8
51
52static irqreturn_t timer_interrupt(int irq, void *dev_id)
53{
54 h8300_timer_tick();
55 ctrl_bclr(IMFA, ITUBASE + TSR);
56 return IRQ_HANDLED;
57}
58
59static struct irqaction itu_irq = {
60 .name = "itu",
61 .handler = timer_interrupt,
62 .flags = IRQF_DISABLED | IRQF_TIMER,
63};
64
65static const int __initconst divide_rate[] = {1, 2, 4, 8};
66
67void __init h8300_timer_setup(void)
68{
69 unsigned int div;
70 unsigned int cnt;
71
72 calc_param(cnt, div, divide_rate, 0x10000);
73
74 setup_irq(ITUIRQ, &itu_irq);
75
76 /* initialize timer */
77 ctrl_outb(0, TSTR);
78 ctrl_outb(CCLR0 | div, ITUBASE + TCR);
79 ctrl_outb(0x01, ITUBASE + TIER);
80 ctrl_outw(cnt, ITUBASE + GRA);
81 ctrl_bset(CONFIG_H8300_ITU_CH, TSTR);
82}
diff --git a/arch/h8300/kernel/timer/timer16.c b/arch/h8300/kernel/timer/timer16.c
deleted file mode 100644
index 462d9f581719..000000000000
--- a/arch/h8300/kernel/timer/timer16.c
+++ /dev/null
@@ -1,77 +0,0 @@
1/*
2 * linux/arch/h8300/kernel/timer/timer16.c
3 *
4 * Yoshinori Sato <ysato@users.sourcefoge.jp>
5 *
6 * 16bit Timer Handler
7 *
8 */
9
10#include <linux/errno.h>
11#include <linux/sched.h>
12#include <linux/kernel.h>
13#include <linux/param.h>
14#include <linux/string.h>
15#include <linux/mm.h>
16#include <linux/interrupt.h>
17#include <linux/init.h>
18#include <linux/timex.h>
19
20#include <asm/segment.h>
21#include <asm/io.h>
22#include <asm/irq.h>
23#include <asm/regs306x.h>
24
25/* 16bit timer */
26#if CONFIG_H8300_TIMER16_CH == 0
27#define _16BASE 0xffff78
28#define _16IRQ 24
29#elif CONFIG_H8300_TIMER16_CH == 1
30#define _16BASE 0xffff80
31#define _16IRQ 28
32#elif CONFIG_H8300_TIMER16_CH == 2
33#define _16BASE 0xffff88
34#define _16IRQ 32
35#else
36#error Unknown timer channel.
37#endif
38
39#define TCR 0
40#define TIOR 1
41#define TCNT 2
42#define GRA 4
43#define GRB 6
44
45#define H8300_TIMER_FREQ CONFIG_CPU_CLOCK*10000 /* Timer input freq. */
46
47static irqreturn_t timer_interrupt(int irq, void *dev_id)
48{
49 h8300_timer_tick();
50 ctrl_bclr(CONFIG_H8300_TIMER16_CH, TISRA);
51 return IRQ_HANDLED;
52}
53
54static struct irqaction timer16_irq = {
55 .name = "timer-16",
56 .handler = timer_interrupt,
57 .flags = IRQF_DISABLED | IRQF_TIMER,
58};
59
60static const int __initconst divide_rate[] = {1, 2, 4, 8};
61
62void __init h8300_timer_setup(void)
63{
64 unsigned int div;
65 unsigned int cnt;
66
67 calc_param(cnt, div, divide_rate, 0x10000);
68
69 setup_irq(_16IRQ, &timer16_irq);
70
71 /* initialize timer */
72 ctrl_outb(0, TSTR);
73 ctrl_outb(CCLR0 | div, _16BASE + TCR);
74 ctrl_outw(cnt, _16BASE + GRA);
75 ctrl_bset(4 + CONFIG_H8300_TIMER16_CH, TISRA);
76 ctrl_bset(CONFIG_H8300_TIMER16_CH, TSTR);
77}
diff --git a/arch/h8300/kernel/timer/timer8.c b/arch/h8300/kernel/timer/timer8.c
deleted file mode 100644
index 505f3415b40f..000000000000
--- a/arch/h8300/kernel/timer/timer8.c
+++ /dev/null
@@ -1,102 +0,0 @@
1/*
2 * linux/arch/h8300/kernel/cpu/timer/timer8.c
3 *
4 * Yoshinori Sato <ysato@users.sourcefoge.jp>
5 *
6 * 8bit Timer Handler
7 *
8 */
9
10#include <linux/errno.h>
11#include <linux/sched.h>
12#include <linux/kernel.h>
13#include <linux/param.h>
14#include <linux/string.h>
15#include <linux/mm.h>
16#include <linux/interrupt.h>
17#include <linux/init.h>
18#include <linux/profile.h>
19
20#include <asm/io.h>
21#include <asm/irq.h>
22#include <asm/timer.h>
23#if defined(CONFIG_CPU_H8300H)
24#include <asm/regs306x.h>
25#endif
26#if defined(CONFIG_CPU_H8S)
27#include <asm/regs267x.h>
28#endif
29
30/* 8bit timer x2 */
31#define CMFA 6
32
33#if defined(CONFIG_H8300_TIMER8_CH0)
34#define _8BASE _8TCR0
35#ifdef CONFIG_CPU_H8300H
36#define _8IRQ 36
37#endif
38#ifdef CONFIG_CPU_H8S
39#define _8IRQ 72
40#endif
41#elif defined(CONFIG_H8300_TIMER8_CH2)
42#ifdef CONFIG_CPU_H8300H
43#define _8BASE _8TCR2
44#define _8IRQ 40
45#endif
46#endif
47
48#ifndef _8BASE
49#error Unknown timer channel.
50#endif
51
52#define _8TCR 0
53#define _8TCSR 2
54#define TCORA 4
55#define TCORB 6
56#define _8TCNT 8
57
58#define CMIEA 0x40
59#define CCLR_CMA 0x08
60#define CKS2 0x04
61
62/*
63 * timer_interrupt() needs to keep up the real-time clock,
64 * as well as call the "xtime_update()" routine every clocktick
65 */
66
67static irqreturn_t timer_interrupt(int irq, void *dev_id)
68{
69 h8300_timer_tick();
70 ctrl_bclr(CMFA, _8BASE + _8TCSR);
71 return IRQ_HANDLED;
72}
73
74static struct irqaction timer8_irq = {
75 .name = "timer-8",
76 .handler = timer_interrupt,
77 .flags = IRQF_DISABLED | IRQF_TIMER,
78};
79
80static const int __initconst divide_rate[] = {8, 64, 8192};
81
82void __init h8300_timer_setup(void)
83{
84 unsigned int div;
85 unsigned int cnt;
86
87 calc_param(cnt, div, divide_rate, 0x10000);
88 div++;
89
90 setup_irq(_8IRQ, &timer8_irq);
91
92#if defined(CONFIG_CPU_H8S)
93 /* Timer module enable */
94 ctrl_bclr(0, MSTPCRL)
95#endif
96
97 /* initialize timer */
98 ctrl_outw(cnt, _8BASE + TCORA);
99 ctrl_outw(0x0000, _8BASE + _8TCSR);
100 ctrl_outw((CMIEA|CCLR_CMA|CKS2) << 8 | div,
101 _8BASE + _8TCR);
102}
diff --git a/arch/h8300/kernel/timer/tpu.c b/arch/h8300/kernel/timer/tpu.c
deleted file mode 100644
index 0350f6204ecf..000000000000
--- a/arch/h8300/kernel/timer/tpu.c
+++ /dev/null
@@ -1,100 +0,0 @@
1/*
2 * linux/arch/h8300/kernel/timer/tpu.c
3 *
4 * Yoshinori Sato <ysato@users.sourceforge.jp>
5 *
6 * TPU Timer Handler
7 *
8 */
9
10#include <linux/errno.h>
11#include <linux/sched.h>
12#include <linux/kernel.h>
13#include <linux/param.h>
14#include <linux/string.h>
15#include <linux/mm.h>
16#include <linux/interrupt.h>
17#include <linux/init.h>
18#include <linux/timex.h>
19
20#include <asm/segment.h>
21#include <asm/io.h>
22#include <asm/irq.h>
23#include <asm/regs267x.h>
24
25/* TPU */
26#if CONFIG_H8300_TPU_CH == 0
27#define TPUBASE 0xffffd0
28#define TPUIRQ 40
29#elif CONFIG_H8300_TPU_CH == 1
30#define TPUBASE 0xffffe0
31#define TPUIRQ 48
32#elif CONFIG_H8300_TPU_CH == 2
33#define TPUBASE 0xfffff0
34#define TPUIRQ 52
35#elif CONFIG_H8300_TPU_CH == 3
36#define TPUBASE 0xfffe80
37#define TPUIRQ 56
38#elif CONFIG_H8300_TPU_CH == 4
39#define TPUBASE 0xfffe90
40#define TPUIRQ 64
41#else
42#error Unknown timer channel.
43#endif
44
45#define _TCR 0
46#define _TMDR 1
47#define _TIOR 2
48#define _TIER 4
49#define _TSR 5
50#define _TCNT 6
51#define _GRA 8
52#define _GRB 10
53
54#define CCLR0 0x20
55
56static irqreturn_t timer_interrupt(int irq, void *dev_id)
57{
58 h8300_timer_tick();
59 ctrl_bclr(0, TPUBASE + _TSR);
60 return IRQ_HANDLED;
61}
62
63static struct irqaction tpu_irq = {
64 .name = "tpu",
65 .handler = timer_interrupt,
66 .flags = IRQF_DISABLED | IRQF_TIMER,
67};
68
69static const int __initconst divide_rate[] = {
70#if CONFIG_H8300_TPU_CH == 0
71 1,4,16,64,0,0,0,0,
72#elif (CONFIG_H8300_TPU_CH == 1) || (CONFIG_H8300_TPU_CH == 5)
73 1,4,16,64,0,0,256,0,
74#elif (CONFIG_H8300_TPU_CH == 2) || (CONFIG_H8300_TPU_CH == 4)
75 1,4,16,64,0,0,0,1024,
76#elif CONFIG_H8300_TPU_CH == 3
77 1,4,16,64,0,1024,256,4096,
78#endif
79};
80
81void __init h8300_timer_setup(void)
82{
83 unsigned int cnt;
84 unsigned int div;
85
86 calc_param(cnt, div, divide_rate, 0x10000);
87
88 setup_irq(TPUIRQ, &tpu_irq);
89
90 /* TPU module enabled */
91 ctrl_bclr(3, MSTPCRH);
92
93 ctrl_outb(0, TSTR);
94 ctrl_outb(CCLR0 | div, TPUBASE + _TCR);
95 ctrl_outb(0, TPUBASE + _TMDR);
96 ctrl_outw(0, TPUBASE + _TIOR);
97 ctrl_outb(0x01, TPUBASE + _TIER);
98 ctrl_outw(cnt, TPUBASE + _GRA);
99 ctrl_bset(CONFIG_H8300_TPU_CH, TSTR);
100}
diff --git a/arch/h8300/kernel/traps.c b/arch/h8300/kernel/traps.c
deleted file mode 100644
index cfe494dbe3da..000000000000
--- a/arch/h8300/kernel/traps.c
+++ /dev/null
@@ -1,166 +0,0 @@
1/*
2 * linux/arch/h8300/boot/traps.c -- general exception handling code
3 * H8/300 support Yoshinori Sato <ysato@users.sourceforge.jp>
4 *
5 * Cloned from Linux/m68k.
6 *
7 * No original Copyright holder listed,
8 * Probable original (C) Roman Zippel (assigned DJD, 1999)
9 *
10 * Copyright 1999-2000 D. Jeff Dionne, <jeff@rt-control.com>
11 *
12 * This file is subject to the terms and conditions of the GNU General Public
13 * License. See the file COPYING in the main directory of this archive
14 * for more details.
15 */
16
17#include <linux/types.h>
18#include <linux/sched.h>
19#include <linux/kernel.h>
20#include <linux/errno.h>
21#include <linux/init.h>
22#include <linux/module.h>
23#include <linux/bug.h>
24
25#include <asm/irq.h>
26#include <asm/traps.h>
27#include <asm/page.h>
28
29static DEFINE_SPINLOCK(die_lock);
30
31/*
32 * this must be called very early as the kernel might
33 * use some instruction that are emulated on the 060
34 */
35
36void __init base_trap_init(void)
37{
38}
39
40void __init trap_init (void)
41{
42}
43
44asmlinkage void set_esp0 (unsigned long ssp)
45{
46 current->thread.esp0 = ssp;
47}
48
49/*
50 * Generic dumping code. Used for panic and debug.
51 */
52
53static void dump(struct pt_regs *fp)
54{
55 unsigned long *sp;
56 unsigned char *tp;
57 int i;
58
59 printk("\nCURRENT PROCESS:\n\n");
60 printk("COMM=%s PID=%d\n", current->comm, current->pid);
61 if (current->mm) {
62 printk("TEXT=%08x-%08x DATA=%08x-%08x BSS=%08x-%08x\n",
63 (int) current->mm->start_code,
64 (int) current->mm->end_code,
65 (int) current->mm->start_data,
66 (int) current->mm->end_data,
67 (int) current->mm->end_data,
68 (int) current->mm->brk);
69 printk("USER-STACK=%08x KERNEL-STACK=%08lx\n\n",
70 (int) current->mm->start_stack,
71 (int) PAGE_SIZE+(unsigned long)current);
72 }
73
74 show_regs(fp);
75 printk("\nCODE:");
76 tp = ((unsigned char *) fp->pc) - 0x20;
77 for (sp = (unsigned long *) tp, i = 0; (i < 0x40); i += 4) {
78 if ((i % 0x10) == 0)
79 printk("\n%08x: ", (int) (tp + i));
80 printk("%08x ", (int) *sp++);
81 }
82 printk("\n");
83
84 printk("\nKERNEL STACK:");
85 tp = ((unsigned char *) fp) - 0x40;
86 for (sp = (unsigned long *) tp, i = 0; (i < 0xc0); i += 4) {
87 if ((i % 0x10) == 0)
88 printk("\n%08x: ", (int) (tp + i));
89 printk("%08x ", (int) *sp++);
90 }
91 printk("\n");
92 if (STACK_MAGIC != *(unsigned long *)((unsigned long)current+PAGE_SIZE))
93 printk("(Possibly corrupted stack page??)\n");
94
95 printk("\n\n");
96}
97
98void die(const char *str, struct pt_regs *fp, unsigned long err)
99{
100 static int diecount;
101
102 oops_enter();
103
104 console_verbose();
105 spin_lock_irq(&die_lock);
106 report_bug(fp->pc, fp);
107 printk(KERN_EMERG "%s: %04lx [#%d] ", str, err & 0xffff, ++diecount);
108 dump(fp);
109
110 spin_unlock_irq(&die_lock);
111 do_exit(SIGSEGV);
112}
113
114extern char _start, _etext;
115#define check_kernel_text(addr) \
116 ((addr >= (unsigned long)(&_start)) && \
117 (addr < (unsigned long)(&_etext)))
118
119static int kstack_depth_to_print = 24;
120
121void show_stack(struct task_struct *task, unsigned long *esp)
122{
123 unsigned long *stack, addr;
124 int i;
125
126 if (esp == NULL)
127 esp = (unsigned long *) &esp;
128
129 stack = esp;
130
131 printk("Stack from %08lx:", (unsigned long)stack);
132 for (i = 0; i < kstack_depth_to_print; i++) {
133 if (((unsigned long)stack & (THREAD_SIZE - 1)) == 0)
134 break;
135 if (i % 8 == 0)
136 printk("\n ");
137 printk(" %08lx", *stack++);
138 }
139
140 printk("\nCall Trace:");
141 i = 0;
142 stack = esp;
143 while (((unsigned long)stack & (THREAD_SIZE - 1)) != 0) {
144 addr = *stack++;
145 /*
146 * If the address is either in the text segment of the
147 * kernel, or in the region which contains vmalloc'ed
148 * memory, it *may* be the address of a calling
149 * routine; if so, print it so that someone tracing
150 * down the cause of the crash will be able to figure
151 * out the call path that was taken.
152 */
153 if (check_kernel_text(addr)) {
154 if (i % 4 == 0)
155 printk("\n ");
156 printk(" [<%08lx>]", addr);
157 i++;
158 }
159 }
160 printk("\n");
161}
162
163void show_trace_task(struct task_struct *tsk)
164{
165 show_stack(tsk,(unsigned long *)tsk->thread.esp0);
166}
diff --git a/arch/h8300/kernel/vmlinux.lds.S b/arch/h8300/kernel/vmlinux.lds.S
deleted file mode 100644
index 3253fed42ac1..000000000000
--- a/arch/h8300/kernel/vmlinux.lds.S
+++ /dev/null
@@ -1,157 +0,0 @@
1#include <asm-generic/vmlinux.lds.h>
2#include <asm/page.h>
3
4/* target memory map */
5#ifdef CONFIG_H8300H_GENERIC
6#define ROMTOP 0x000000
7#define ROMSIZE 0x400000
8#define RAMTOP 0x400000
9#define RAMSIZE 0x400000
10#endif
11
12#ifdef CONFIG_H8300H_AKI3068NET
13#define ROMTOP 0x000000
14#define ROMSIZE 0x080000
15#define RAMTOP 0x400000
16#define RAMSIZE 0x200000
17#endif
18
19#ifdef CONFIG_H8300H_H8MAX
20#define ROMTOP 0x000000
21#define ROMSIZE 0x080000
22#define RAMTOP 0x400000
23#define RAMSIZE 0x200000
24#endif
25
26#ifdef CONFIG_H8300H_SIM
27#define ROMTOP 0x000000
28#define ROMSIZE 0x400000
29#define RAMTOP 0x400000
30#define RAMSIZE 0x400000
31#endif
32
33#ifdef CONFIG_H8S_SIM
34#define ROMTOP 0x000000
35#define ROMSIZE 0x400000
36#define RAMTOP 0x400000
37#define RAMSIZE 0x800000
38#endif
39
40#ifdef CONFIG_H8S_EDOSK2674
41#define ROMTOP 0x000000
42#define ROMSIZE 0x400000
43#define RAMTOP 0x400000
44#define RAMSIZE 0x800000
45#endif
46
47#if defined(CONFIG_H8300H_SIM) || defined(CONFIG_H8S_SIM)
48INPUT(romfs.o)
49#endif
50
51_jiffies = _jiffies_64 + 4;
52
53ENTRY(__start)
54
55SECTIONS
56{
57#if defined(CONFIG_ROMKERNEL)
58 . = ROMTOP;
59 .vectors :
60 {
61 __vector = . ;
62 *(.vectors*)
63 }
64#else
65 . = RAMTOP;
66 .bootvec :
67 {
68 *(.bootvec)
69 }
70#endif
71 .text :
72 {
73 _text = .;
74#if defined(CONFIG_ROMKERNEL)
75 *(.int_redirect)
76#endif
77 __stext = . ;
78 TEXT_TEXT
79 SCHED_TEXT
80 LOCK_TEXT
81 __etext = . ;
82 }
83 EXCEPTION_TABLE(16)
84
85 RODATA
86#if defined(CONFIG_ROMKERNEL)
87 SECURITY_INIT
88#endif
89 ROEND = .;
90#if defined(CONFIG_ROMKERNEL)
91 . = RAMTOP;
92 .data : AT(ROEND)
93#else
94 .data :
95#endif
96 {
97 __sdata = . ;
98 ___data_start = . ;
99
100 INIT_TASK_DATA(0x2000)
101 . = ALIGN(0x4) ;
102 DATA_DATA
103 . = ALIGN(0x4) ;
104 *(.data.*)
105
106 . = ALIGN(0x4) ;
107 ___init_begin = .;
108 __sinittext = .;
109 INIT_TEXT
110 __einittext = .;
111 INIT_DATA
112 . = ALIGN(0x4) ;
113 INIT_SETUP(0x4)
114 ___setup_start = .;
115 *(.init.setup)
116 . = ALIGN(0x4) ;
117 ___setup_end = .;
118 INIT_CALLS
119 CON_INITCALL
120 EXIT_TEXT
121 EXIT_DATA
122 INIT_RAM_FS
123 . = ALIGN(0x4) ;
124 ___init_end = .;
125 __edata = . ;
126 }
127#if defined(CONFIG_RAMKERNEL)
128 SECURITY_INIT
129#endif
130 __begin_data = LOADADDR(.data);
131 .bss :
132 {
133 . = ALIGN(0x4) ;
134 __sbss = . ;
135 ___bss_start = . ;
136 *(.bss*)
137 . = ALIGN(0x4) ;
138 *(COMMON)
139 . = ALIGN(0x4) ;
140 ___bss_stop = . ;
141 __ebss = . ;
142 __end = . ;
143 __ramstart = .;
144 }
145 .romfs :
146 {
147 *(.romfs*)
148 }
149 . = RAMTOP+RAMSIZE;
150 .dummy :
151 {
152 COMMAND_START = . - 0x200 ;
153 __ramend = . ;
154 }
155
156 DISCARDS
157}
diff --git a/arch/h8300/lib/Makefile b/arch/h8300/lib/Makefile
deleted file mode 100644
index 1577f5075b10..000000000000
--- a/arch/h8300/lib/Makefile
+++ /dev/null
@@ -1,5 +0,0 @@
1#
2# Makefile for H8/300-specific library files..
3#
4
5lib-y = ashrdi3.o checksum.o memcpy.o memset.o abs.o romfs.o
diff --git a/arch/h8300/lib/abs.S b/arch/h8300/lib/abs.S
deleted file mode 100644
index ddd1fb3d01ad..000000000000
--- a/arch/h8300/lib/abs.S
+++ /dev/null
@@ -1,21 +0,0 @@
1;;; abs.S
2
3#include <asm/linkage.h>
4
5#if defined(__H8300H__)
6 .h8300h
7#endif
8#if defined(__H8300S__)
9 .h8300s
10#endif
11 .text
12.global _abs
13
14;;; int abs(int n)
15_abs:
16 mov.l er0,er0
17 bpl 1f
18 neg.l er0
191:
20 rts
21
diff --git a/arch/h8300/lib/ashrdi3.c b/arch/h8300/lib/ashrdi3.c
deleted file mode 100644
index 78efb65e315a..000000000000
--- a/arch/h8300/lib/ashrdi3.c
+++ /dev/null
@@ -1,63 +0,0 @@
1/* ashrdi3.c extracted from gcc-2.7.2/libgcc2.c which is: */
2/* Copyright (C) 1989, 1992, 1993, 1994, 1995 Free Software Foundation, Inc.
3
4This file is part of GNU CC.
5
6GNU CC is free software; you can redistribute it and/or modify
7it under the terms of the GNU General Public License as published by
8the Free Software Foundation; either version 2, or (at your option)
9any later version.
10
11GNU CC is distributed in the hope that it will be useful,
12but WITHOUT ANY WARRANTY; without even the implied warranty of
13MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14GNU General Public License for more details.
15
16You should have received a copy of the GNU General Public License
17along with GNU CC; see the file COPYING. If not, write to
18the Free Software Foundation, 59 Temple Place - Suite 330,
19Boston, MA 02111-1307, USA. */
20
21#define BITS_PER_UNIT 8
22
23typedef int SItype __attribute__ ((mode (SI)));
24typedef unsigned int USItype __attribute__ ((mode (SI)));
25typedef int DItype __attribute__ ((mode (DI)));
26typedef int word_type __attribute__ ((mode (__word__)));
27
28struct DIstruct {SItype high, low;};
29
30typedef union
31{
32 struct DIstruct s;
33 DItype ll;
34} DIunion;
35
36DItype
37__ashrdi3 (DItype u, word_type b)
38{
39 DIunion w;
40 word_type bm;
41 DIunion uu;
42
43 if (b == 0)
44 return u;
45
46 uu.ll = u;
47
48 bm = (sizeof (SItype) * BITS_PER_UNIT) - b;
49 if (bm <= 0)
50 {
51 /* w.s.high = 1..1 or 0..0 */
52 w.s.high = uu.s.high >> (sizeof (SItype) * BITS_PER_UNIT - 1);
53 w.s.low = uu.s.high >> -bm;
54 }
55 else
56 {
57 USItype carries = (USItype)uu.s.high << bm;
58 w.s.high = uu.s.high >> b;
59 w.s.low = ((USItype)uu.s.low >> b) | carries;
60 }
61
62 return w.ll;
63}
diff --git a/arch/h8300/lib/checksum.c b/arch/h8300/lib/checksum.c
deleted file mode 100644
index bdc5b032acd6..000000000000
--- a/arch/h8300/lib/checksum.c
+++ /dev/null
@@ -1,164 +0,0 @@
1/*
2 * INET An implementation of the TCP/IP protocol suite for the LINUX
3 * operating system. INET is implemented using the BSD Socket
4 * interface as the means of communication with the user level.
5 *
6 * IP/TCP/UDP checksumming routines
7 *
8 * Authors: Jorge Cwik, <jorge@laser.satlink.net>
9 * Arnt Gulbrandsen, <agulbra@nvg.unit.no>
10 * Tom May, <ftom@netcom.com>
11 * Andreas Schwab, <schwab@issan.informatik.uni-dortmund.de>
12 * Lots of code moved from tcp.c and ip.c; see those files
13 * for more names.
14 *
15 * 03/02/96 Jes Sorensen, Andreas Schwab, Roman Hodek:
16 * Fixed some nasty bugs, causing some horrible crashes.
17 * A: At some points, the sum (%0) was used as
18 * length-counter instead of the length counter
19 * (%1). Thanks to Roman Hodek for pointing this out.
20 * B: GCC seems to mess up if one uses too many
21 * data-registers to hold input values and one tries to
22 * specify d0 and d1 as scratch registers. Letting gcc choose these
23 * registers itself solves the problem.
24 *
25 * This program is free software; you can redistribute it and/or
26 * modify it under the terms of the GNU General Public License
27 * as published by the Free Software Foundation; either version
28 * 2 of the License, or (at your option) any later version.
29 */
30
31/* Revised by Kenneth Albanowski for m68knommu. Basic problem: unaligned access kills, so most
32 of the assembly has to go. */
33
34#include <net/checksum.h>
35#include <linux/module.h>
36
37static inline unsigned short from32to16(unsigned long x)
38{
39 /* add up 16-bit and 16-bit for 16+c bit */
40 x = (x & 0xffff) + (x >> 16);
41 /* add up carry.. */
42 x = (x & 0xffff) + (x >> 16);
43 return x;
44}
45
46static unsigned long do_csum(const unsigned char * buff, int len)
47{
48 int odd, count;
49 unsigned long result = 0;
50
51 if (len <= 0)
52 goto out;
53 odd = 1 & (unsigned long) buff;
54 if (odd) {
55 result = *buff;
56 len--;
57 buff++;
58 }
59 count = len >> 1; /* nr of 16-bit words.. */
60 if (count) {
61 if (2 & (unsigned long) buff) {
62 result += *(unsigned short *) buff;
63 count--;
64 len -= 2;
65 buff += 2;
66 }
67 count >>= 1; /* nr of 32-bit words.. */
68 if (count) {
69 unsigned long carry = 0;
70 do {
71 unsigned long w = *(unsigned long *) buff;
72 count--;
73 buff += 4;
74 result += carry;
75 result += w;
76 carry = (w > result);
77 } while (count);
78 result += carry;
79 result = (result & 0xffff) + (result >> 16);
80 }
81 if (len & 2) {
82 result += *(unsigned short *) buff;
83 buff += 2;
84 }
85 }
86 if (len & 1)
87 result += (*buff << 8);
88 result = from32to16(result);
89 if (odd)
90 result = ((result >> 8) & 0xff) | ((result & 0xff) << 8);
91out:
92 return result;
93}
94
95/*
96 * This is a version of ip_compute_csum() optimized for IP headers,
97 * which always checksum on 4 octet boundaries.
98 */
99__sum16 ip_fast_csum(const void *iph, unsigned int ihl)
100{
101 return (__force __sum16)~do_csum(iph,ihl*4);
102}
103
104/*
105 * computes the checksum of a memory block at buff, length len,
106 * and adds in "sum" (32-bit)
107 *
108 * returns a 32-bit number suitable for feeding into itself
109 * or csum_tcpudp_magic
110 *
111 * this function must be called with even lengths, except
112 * for the last fragment, which may be odd
113 *
114 * it's best to have buff aligned on a 32-bit boundary
115 */
116/*
117 * Egads... That thing apparently assumes that *all* checksums it ever sees will
118 * be folded. Very likely a bug.
119 */
120__wsum csum_partial(const void *buff, int len, __wsum sum)
121{
122 unsigned int result = do_csum(buff, len);
123
124 /* add in old sum, and carry.. */
125 result += (__force u32)sum;
126 /* 16+c bits -> 16 bits */
127 result = (result & 0xffff) + (result >> 16);
128 return (__force __wsum)result;
129}
130
131EXPORT_SYMBOL(csum_partial);
132
133/*
134 * this routine is used for miscellaneous IP-like checksums, mainly
135 * in icmp.c
136 */
137__sum16 ip_compute_csum(const void *buff, int len)
138{
139 return (__force __sum16)~do_csum(buff,len);
140}
141
142/*
143 * copy from fs while checksumming, otherwise like csum_partial
144 */
145
146__wsum
147csum_partial_copy_from_user(const void __user *src, void *dst, int len,
148 __wsum sum, int *csum_err)
149{
150 if (csum_err) *csum_err = 0;
151 memcpy(dst, (__force const void *)src, len);
152 return csum_partial(dst, len, sum);
153}
154
155/*
156 * copy from ds while checksumming, otherwise like csum_partial
157 */
158
159__wsum
160csum_partial_copy_nocheck(const void *src, void *dst, int len, __wsum sum)
161{
162 memcpy(dst, src, len);
163 return csum_partial(dst, len, sum);
164}
diff --git a/arch/h8300/lib/memcpy.S b/arch/h8300/lib/memcpy.S
deleted file mode 100644
index cad325e2c0e8..000000000000
--- a/arch/h8300/lib/memcpy.S
+++ /dev/null
@@ -1,84 +0,0 @@
1;;; memcpy.S
2
3#include <asm/linkage.h>
4
5#if defined(__H8300H__)
6 .h8300h
7#endif
8#if defined(__H8300S__)
9 .h8300s
10#endif
11
12 .text
13.global _memcpy
14
15;;; void *memcpy(void *to, void *from, size_t n)
16_memcpy:
17 mov.l er2,er2
18 bne 1f
19 rts
201:
21 ;; address check
22 bld #0,r0l
23 bxor #0,r1l
24 bcs 4f
25 mov.l er4,@-sp
26 mov.l er0,@-sp
27 btst #0,r0l
28 beq 1f
29 ;; (aligned even) odd address
30 mov.b @er1,r3l
31 mov.b r3l,@er0
32 adds #1,er1
33 adds #1,er0
34 dec.l #1,er2
35 beq 3f
361:
37 ;; n < sizeof(unsigned long) check
38 sub.l er4,er4
39 adds #4,er4 ; loop count check value
40 cmp.l er4,er2
41 blo 2f
42 ;; unsigned long copy
431:
44 mov.l @er1,er3
45 mov.l er3,@er0
46 adds #4,er0
47 adds #4,er1
48 subs #4,er2
49 cmp.l er4,er2
50 bcc 1b
51 ;; rest
522:
53 mov.l er2,er2
54 beq 3f
551:
56 mov.b @er1,r3l
57 mov.b r3l,@er0
58 adds #1,er1
59 adds #1,er0
60 dec.l #1,er2
61 bne 1b
623:
63 mov.l @sp+,er0
64 mov.l @sp+,er4
65 rts
66
67 ;; odd <- even / even <- odd
684:
69 mov.l er4,er3
70 mov.l er2,er4
71 mov.l er5,er2
72 mov.l er1,er5
73 mov.l er6,er1
74 mov.l er0,er6
751:
76 eepmov.w
77 mov.w r4,r4
78 bne 1b
79 dec.w #1,e4
80 bpl 1b
81 mov.l er1,er6
82 mov.l er2,er5
83 mov.l er3,er4
84 rts
diff --git a/arch/h8300/lib/memset.S b/arch/h8300/lib/memset.S
deleted file mode 100644
index 4549a64c5b79..000000000000
--- a/arch/h8300/lib/memset.S
+++ /dev/null
@@ -1,61 +0,0 @@
1/* memset.S */
2
3#include <asm/linkage.h>
4
5#if defined(__H8300H__)
6 .h8300h
7#endif
8#if defined(__H8300S__)
9 .h8300s
10#endif
11 .text
12
13.global _memset
14
15;;void *memset(*ptr, int c, size_t count)
16;; ptr = er0
17;; c = er1(r1l)
18;; count = er2
19_memset:
20 btst #0,r0l
21 beq 2f
22
23 ;; odd address
241:
25 mov.b r1l,@er0
26 adds #1,er0
27 dec.l #1,er2
28 beq 6f
29
30 ;; even address
312:
32 mov.l er2,er3
33 cmp.l #4,er2
34 blo 4f
35 ;; count>=4 -> count/4
36#if defined(__H8300H__)
37 shlr.l er2
38 shlr.l er2
39#endif
40#if defined(__H8300S__)
41 shlr.l #2,er2
42#endif
43 ;; byte -> long
44 mov.b r1l,r1h
45 mov.w r1,e1
463:
47 mov.l er1,@er0
48 adds #4,er0
49 dec.l #1,er2
50 bne 3b
514:
52 ;; count % 4
53 and.b #3,r3l
54 beq 6f
555:
56 mov.b r1l,@er0
57 adds #1,er0
58 dec.b r3l
59 bne 5b
606:
61 rts
diff --git a/arch/h8300/lib/romfs.S b/arch/h8300/lib/romfs.S
deleted file mode 100644
index 68910d8e1ff4..000000000000
--- a/arch/h8300/lib/romfs.S
+++ /dev/null
@@ -1,57 +0,0 @@
1/* romfs move to __ebss */
2
3#include <asm/linkage.h>
4
5#if defined(__H8300H__)
6 .h8300h
7#endif
8#if defined(__H8300S__)
9 .h8300s
10#endif
11
12#define BLKOFFSET 512
13
14 .text
15.globl __move_romfs
16_romfs_sig_len = 8
17
18__move_romfs:
19 mov.l #__sbss,er0
20 mov.l #_romfs_sig,er1
21 mov.b #_romfs_sig_len,r3l
221: /* check romfs image */
23 mov.b @er0+,r2l
24 mov.b @er1+,r2h
25 cmp.b r2l,r2h
26 bne 2f
27 dec.b r3l
28 bne 1b
29
30 /* find romfs image */
31 mov.l @__sbss+8,er0 /* romfs length(be) */
32 mov.l #__sbss,er1
33 add.l er0,er1 /* romfs image end */
34 mov.l #__ebss,er2
35 add.l er0,er2 /* distination address */
36#if defined(CONFIG_INTELFLASH)
37 add.l #BLKOFFSET,er2
38#endif
39 adds #2,er0
40 adds #1,er0
41 shlr er0
42 shlr er0 /* transfer length */
431:
44 mov.l @er1,er3 /* copy image */
45 mov.l er3,@er2
46 subs #4,er1
47 subs #4,er2
48 dec.l #1,er0
49 bpl 1b
502:
51 rts
52
53 .section .rodata
54_romfs_sig:
55 .ascii "-rom1fs-"
56
57 .end
diff --git a/arch/h8300/mm/Makefile b/arch/h8300/mm/Makefile
deleted file mode 100644
index 5f4bc42b6453..000000000000
--- a/arch/h8300/mm/Makefile
+++ /dev/null
@@ -1,5 +0,0 @@
1#
2# Makefile for the linux m68k-specific parts of the memory manager.
3#
4
5obj-y := init.o fault.o memory.o kmap.o
diff --git a/arch/h8300/mm/fault.c b/arch/h8300/mm/fault.c
deleted file mode 100644
index 472535977006..000000000000
--- a/arch/h8300/mm/fault.c
+++ /dev/null
@@ -1,56 +0,0 @@
1/*
2 * linux/arch/h8300/mm/fault.c
3 *
4 * Copyright (C) 1998 D. Jeff Dionne <jeff@lineo.ca>,
5 * Copyright (C) 2000 Lineo, Inc. (www.lineo.com)
6 *
7 * Based on:
8 *
9 * linux/arch/m68knommu/mm/fault.c
10 * linux/arch/m68k/mm/fault.c
11 *
12 * Copyright (C) 1995 Hamish Macdonald
13 */
14
15#include <linux/mman.h>
16#include <linux/mm.h>
17#include <linux/kernel.h>
18#include <linux/ptrace.h>
19
20#include <asm/pgtable.h>
21
22/*
23 * This routine handles page faults. It determines the problem, and
24 * then passes it off to one of the appropriate routines.
25 *
26 * error_code:
27 * bit 0 == 0 means no page found, 1 means protection fault
28 * bit 1 == 0 means read, 1 means write
29 *
30 * If this routine detects a bad access, it returns 1, otherwise it
31 * returns 0.
32 */
33asmlinkage int do_page_fault(struct pt_regs *regs, unsigned long address,
34 unsigned long error_code)
35{
36#ifdef DEBUG
37 printk ("regs->sr=%#x, regs->pc=%#lx, address=%#lx, %ld\n",
38 regs->sr, regs->pc, address, error_code);
39#endif
40
41/*
42 * Oops. The kernel tried to access some bad page. We'll have to
43 * terminate things with extreme prejudice.
44 */
45 if ((unsigned long) address < PAGE_SIZE) {
46 printk(KERN_ALERT "Unable to handle kernel NULL pointer dereference");
47 } else
48 printk(KERN_ALERT "Unable to handle kernel access");
49 printk(" at virtual address %08lx\n",address);
50 if (!user_mode(regs))
51 die("Oops", regs, error_code);
52 do_exit(SIGKILL);
53
54 return 1;
55}
56
diff --git a/arch/h8300/mm/init.c b/arch/h8300/mm/init.c
deleted file mode 100644
index 6c1251e491af..000000000000
--- a/arch/h8300/mm/init.c
+++ /dev/null
@@ -1,155 +0,0 @@
1/*
2 * linux/arch/h8300/mm/init.c
3 *
4 * Copyright (C) 1998 D. Jeff Dionne <jeff@lineo.ca>,
5 * Kenneth Albanowski <kjahds@kjahds.com>,
6 * Copyright (C) 2000 Lineo, Inc. (www.lineo.com)
7 *
8 * Based on:
9 *
10 * linux/arch/m68knommu/mm/init.c
11 * linux/arch/m68k/mm/init.c
12 *
13 * Copyright (C) 1995 Hamish Macdonald
14 *
15 * JAN/1999 -- hacked to support ColdFire (gerg@snapgear.com)
16 * DEC/2000 -- linux 2.4 support <davidm@snapgear.com>
17 */
18
19#include <linux/signal.h>
20#include <linux/sched.h>
21#include <linux/kernel.h>
22#include <linux/errno.h>
23#include <linux/string.h>
24#include <linux/types.h>
25#include <linux/ptrace.h>
26#include <linux/mman.h>
27#include <linux/mm.h>
28#include <linux/swap.h>
29#include <linux/init.h>
30#include <linux/highmem.h>
31#include <linux/pagemap.h>
32#include <linux/bootmem.h>
33#include <linux/gfp.h>
34
35#include <asm/setup.h>
36#include <asm/segment.h>
37#include <asm/page.h>
38#include <asm/pgtable.h>
39#include <asm/sections.h>
40
41#undef DEBUG
42
43/*
44 * BAD_PAGE is the page that is used for page faults when linux
45 * is out-of-memory. Older versions of linux just did a
46 * do_exit(), but using this instead means there is less risk
47 * for a process dying in kernel mode, possibly leaving a inode
48 * unused etc..
49 *
50 * BAD_PAGETABLE is the accompanying page-table: it is initialized
51 * to point to BAD_PAGE entries.
52 *
53 * ZERO_PAGE is a special page that is used for zero-initialized
54 * data and COW.
55 */
56static unsigned long empty_bad_page_table;
57
58static unsigned long empty_bad_page;
59
60unsigned long empty_zero_page;
61
62extern unsigned long rom_length;
63
64extern unsigned long memory_start;
65extern unsigned long memory_end;
66
67/*
68 * paging_init() continues the virtual memory environment setup which
69 * was begun by the code in arch/head.S.
70 * The parameters are pointers to where to stick the starting and ending
71 * addresses of available kernel virtual memory.
72 */
73void __init paging_init(void)
74{
75 /*
76 * Make sure start_mem is page aligned, otherwise bootmem and
77 * page_alloc get different views og the world.
78 */
79#ifdef DEBUG
80 unsigned long start_mem = PAGE_ALIGN(memory_start);
81#endif
82 unsigned long end_mem = memory_end & PAGE_MASK;
83
84#ifdef DEBUG
85 printk ("start_mem is %#lx\nvirtual_end is %#lx\n",
86 start_mem, end_mem);
87#endif
88
89 /*
90 * Initialize the bad page table and bad page to point
91 * to a couple of allocated pages.
92 */
93 empty_bad_page_table = (unsigned long)alloc_bootmem_pages(PAGE_SIZE);
94 empty_bad_page = (unsigned long)alloc_bootmem_pages(PAGE_SIZE);
95 empty_zero_page = (unsigned long)alloc_bootmem_pages(PAGE_SIZE);
96 memset((void *)empty_zero_page, 0, PAGE_SIZE);
97
98 /*
99 * Set up SFC/DFC registers (user data space).
100 */
101 set_fs (USER_DS);
102
103#ifdef DEBUG
104 printk ("before free_area_init\n");
105
106 printk ("free_area_init -> start_mem is %#lx\nvirtual_end is %#lx\n",
107 start_mem, end_mem);
108#endif
109
110 {
111 unsigned long zones_size[MAX_NR_ZONES] = {0, };
112
113 zones_size[ZONE_DMA] = 0 >> PAGE_SHIFT;
114 zones_size[ZONE_NORMAL] = (end_mem - PAGE_OFFSET) >> PAGE_SHIFT;
115#ifdef CONFIG_HIGHMEM
116 zones_size[ZONE_HIGHMEM] = 0;
117#endif
118 free_area_init(zones_size);
119 }
120}
121
122void __init mem_init(void)
123{
124 unsigned long codesize = _etext - _stext;
125
126 pr_devel("Mem_init: start=%lx, end=%lx\n", memory_start, memory_end);
127
128 high_memory = (void *) (memory_end & PAGE_MASK);
129 max_mapnr = MAP_NR(high_memory);
130
131 /* this will put all low memory onto the freelists */
132 free_all_bootmem();
133
134 mem_init_print_info(NULL);
135 if (rom_length > 0 && rom_length > codesize)
136 pr_info("Memory available: %luK/%luK ROM\n",
137 (rom_length - codesize) >> 10, rom_length >> 10);
138}
139
140
141#ifdef CONFIG_BLK_DEV_INITRD
142void free_initrd_mem(unsigned long start, unsigned long end)
143{
144 free_reserved_area((void *)start, (void *)end, -1, "initrd");
145}
146#endif
147
148void
149free_initmem(void)
150{
151#ifdef CONFIG_RAMKERNEL
152 free_initmem_default(-1);
153#endif
154}
155
diff --git a/arch/h8300/mm/kmap.c b/arch/h8300/mm/kmap.c
deleted file mode 100644
index f79edcdadf39..000000000000
--- a/arch/h8300/mm/kmap.c
+++ /dev/null
@@ -1,58 +0,0 @@
1/*
2 * linux/arch/h8300/mm/kmap.c
3 *
4 * Based on
5 * linux/arch/m68knommu/mm/kmap.c
6 *
7 * Copyright (C) 2000 Lineo, <davidm@snapgear.com>
8 * Copyright (C) 2000-2002 David McCullough <davidm@snapgear.com>
9 */
10
11#include <linux/mm.h>
12#include <linux/kernel.h>
13#include <linux/string.h>
14#include <linux/types.h>
15#include <linux/vmalloc.h>
16
17#include <asm/setup.h>
18#include <asm/segment.h>
19#include <asm/page.h>
20#include <asm/pgalloc.h>
21#include <asm/io.h>
22
23#undef DEBUG
24
25#define VIRT_OFFSET (0x01000000)
26
27/*
28 * Map some physical address range into the kernel address space.
29 */
30void *__ioremap(unsigned long physaddr, unsigned long size, int cacheflag)
31{
32 return (void *)(physaddr + VIRT_OFFSET);
33}
34
35/*
36 * Unmap a ioremap()ed region again.
37 */
38void iounmap(void *addr)
39{
40}
41
42/*
43 * __iounmap unmaps nearly everything, so be careful
44 * it doesn't free currently pointer/page tables anymore but it
45 * wans't used anyway and might be added later.
46 */
47void __iounmap(void *addr, unsigned long size)
48{
49}
50
51/*
52 * Set new cache mode for some kernel address space.
53 * The caller must push data for that range itself, if such data may already
54 * be in the cache.
55 */
56void kernel_set_cachemode(void *addr, unsigned long size, int cmode)
57{
58}
diff --git a/arch/h8300/mm/memory.c b/arch/h8300/mm/memory.c
deleted file mode 100644
index 06e364641392..000000000000
--- a/arch/h8300/mm/memory.c
+++ /dev/null
@@ -1,54 +0,0 @@
1/*
2 * linux/arch/h8300/mm/memory.c
3 *
4 * Copyright (C) 2002 Yoshinori Sato <ysato@users.sourceforge.jp>,
5 *
6 * Based on:
7 *
8 * linux/arch/m68knommu/mm/memory.c
9 *
10 * Copyright (C) 1998 Kenneth Albanowski <kjahds@kjahds.com>,
11 * Copyright (C) 1999-2002, Greg Ungerer (gerg@snapgear.com)
12 *
13 * Based on:
14 *
15 * linux/arch/m68k/mm/memory.c
16 *
17 * Copyright (C) 1995 Hamish Macdonald
18 */
19
20#include <linux/mm.h>
21#include <linux/kernel.h>
22#include <linux/string.h>
23#include <linux/types.h>
24
25#include <asm/setup.h>
26#include <asm/segment.h>
27#include <asm/page.h>
28#include <asm/pgtable.h>
29#include <asm/traps.h>
30#include <asm/io.h>
31
32void cache_clear (unsigned long paddr, int len)
33{
34}
35
36
37void cache_push (unsigned long paddr, int len)
38{
39}
40
41void cache_push_v (unsigned long vaddr, int len)
42{
43}
44
45/*
46 * Map some physical address range into the kernel address space.
47 */
48
49unsigned long kernel_map(unsigned long paddr, unsigned long size,
50 int nocacheflag, unsigned long *memavailp )
51{
52 return paddr;
53}
54
diff --git a/arch/h8300/platform/h8300h/Makefile b/arch/h8300/platform/h8300h/Makefile
deleted file mode 100644
index 420f73b0d962..000000000000
--- a/arch/h8300/platform/h8300h/Makefile
+++ /dev/null
@@ -1,7 +0,0 @@
1#
2# Makefile for the linux kernel.
3#
4# Reuse any files we can from the H8/300H
5#
6
7obj-y := irq.o ptrace_h8300h.o
diff --git a/arch/h8300/platform/h8300h/aki3068net/Makefile b/arch/h8300/platform/h8300h/aki3068net/Makefile
deleted file mode 100644
index b7ff78050b7f..000000000000
--- a/arch/h8300/platform/h8300h/aki3068net/Makefile
+++ /dev/null
@@ -1,5 +0,0 @@
1#
2# Makefile for the linux kernel.
3#
4
5extra-y := crt0_ram.o
diff --git a/arch/h8300/platform/h8300h/aki3068net/crt0_ram.S b/arch/h8300/platform/h8300h/aki3068net/crt0_ram.S
deleted file mode 100644
index b2ad0f2d0417..000000000000
--- a/arch/h8300/platform/h8300h/aki3068net/crt0_ram.S
+++ /dev/null
@@ -1,110 +0,0 @@
1/*
2 * linux/arch/h8300/platform/h8300h/aki3068net/crt0_ram.S
3 *
4 * Yoshinori Sato <ysato@users.sourceforge.jp>
5 *
6 * Platform depend startup
7 * Target Archtecture: AE-3068 (aka. aki3068net)
8 * Memory Layout : RAM
9 */
10
11#define ASSEMBLY
12
13#include <asm/linkage.h>
14
15#if !defined(CONFIG_BLKDEV_RESERVE)
16#if defined(CONFIG_GDB_DEBUG)
17#define RAMEND (__ramend - 0xc000)
18#else
19#define RAMEND __ramend
20#endif
21#else
22#define RAMEND CONFIG_BLKDEV_RESERVE_ADDRESS
23#endif
24
25 .global __start
26 .global _command_line
27 .global __platform_gpio_table
28 .global __target_name
29
30 .h8300h
31
32 .section .text
33 .file "crt0_ram.S"
34
35 /* CPU Reset entry */
36__start:
37 mov.l #RAMEND,sp
38 ldc #0x80,ccr
39
40 /* Peripheral Setup */
41
42#if defined(CONFIG_MTD_UCLINUX)
43 /* move romfs image */
44 jsr @__move_romfs
45#endif
46
47 /* .bss clear */
48 mov.l #__sbss,er5
49 mov.l #__ebss,er4
50 sub.l er5,er4
51 shlr er4
52 shlr er4
53 sub.l er0,er0
541:
55 mov.l er0,@er5
56 adds #4,er5
57 dec.l #1,er4
58 bne 1b
59
60 /* copy kernel commandline */
61 mov.l #COMMAND_START,er5
62 mov.l #_command_line,er6
63 mov.w #512,r4
64 eepmov.w
65
66 /* uClinux kernel start */
67 ldc #0x90,ccr /* running kernel */
68 mov.l #_init_thread_union,sp
69 add.l #0x2000,sp
70 jsr @_start_kernel
71_exit:
72
73 jmp _exit
74
75 rts
76
77 /* I/O port assign information */
78__platform_gpio_table:
79 mov.l #gpio_table,er0
80 rts
81
82gpio_table:
83 ;; P1DDR
84 .byte 0xff,0xff
85 ;; P2DDR
86 .byte 0xff,0xff
87 ;; P3DDR
88 .byte 0xff,0x00
89 ;; P4DDR
90 .byte 0x00,0x00
91 ;; P5DDR
92 .byte 0x01,0x01
93 ;; P6DDR
94 .byte 0x00,0x00
95 ;; dummy
96 .byte 0x00,0x00
97 ;; P8DDR
98 .byte 0x0c,0x0c
99 ;; P9DDR
100 .byte 0x00,0x00
101 ;; PADDR
102 .byte 0x00,0x00
103 ;; PBDDR
104 .byte 0x30,0x30
105
106__target_name:
107 .asciz "AE-3068"
108
109 .section .bootvec,"ax"
110 jmp @__start
diff --git a/arch/h8300/platform/h8300h/generic/Makefile b/arch/h8300/platform/h8300h/generic/Makefile
deleted file mode 100644
index 2b12a170209e..000000000000
--- a/arch/h8300/platform/h8300h/generic/Makefile
+++ /dev/null
@@ -1,5 +0,0 @@
1#
2# Makefile for the linux kernel.
3#
4
5extra-y := crt0_$(MODEL).o
diff --git a/arch/h8300/platform/h8300h/generic/crt0_ram.S b/arch/h8300/platform/h8300h/generic/crt0_ram.S
deleted file mode 100644
index 5ab7d9c12910..000000000000
--- a/arch/h8300/platform/h8300h/generic/crt0_ram.S
+++ /dev/null
@@ -1,107 +0,0 @@
1/*
2 * linux/arch/h8300/platform/h8300h/generic/crt0_ram.S
3 *
4 * Yoshinori Sato <ysato@users.sourceforge.jp>
5 *
6 * Platform depend startup
7 * Target Archtecture: AE-3068 (aka. aki3068net)
8 * Memory Layout : RAM
9 */
10
11#define ASSEMBLY
12
13#include <asm/linkage.h>
14
15#if !defined(CONFIG_BLKDEV_RESERVE)
16#if defined(CONFIG_GDB_DEBUG)
17#define RAMEND (__ramend - 0xc000)
18#else
19#define RAMEND __ramend
20#endif
21#else
22#define RAMEND CONFIG_BLKDEV_RESERVE_ADDRESS
23#endif
24
25 .global __start
26 .global _command_line
27 .global __platform_gpio_table
28 .global __target_name
29
30 .h8300h
31
32 .section .text
33 .file "crt0_ram.S"
34
35 /* CPU Reset entry */
36__start:
37 mov.l #RAMEND,sp
38 ldc #0x80,ccr
39
40 /* Peripheral Setup */
41
42#if defined(CONFIG_BLK_DEV_BLKMEM)
43 /* move romfs image */
44 jsr @__move_romfs
45#endif
46
47 /* .bss clear */
48 mov.l #__sbss,er5
49 mov.l #__ebss,er4
50 sub.l er5,er4
51 shlr er4
52 shlr er4
53 sub.l er0,er0
541:
55 mov.l er0,@er5
56 adds #4,er5
57 dec.l #1,er4
58 bne 1b
59
60 /* copy kernel commandline */
61 mov.l #COMMAND_START,er5
62 mov.l #_command_line,er6
63 mov.w #512,r4
64 eepmov.w
65
66 /* uClinux kernel start */
67 ldc #0x90,ccr /* running kernel */
68 mov.l #_init_thread_union,sp
69 add.l #0x2000,sp
70 jsr @_start_kernel
71_exit:
72
73 jmp _exit
74
75 rts
76
77 /* I/O port assign information */
78__platform_gpio_table:
79 mov.l #gpio_table,er0
80 rts
81
82gpio_table:
83 ;; P1DDR
84 .byte 0x00,0x00
85 ;; P2DDR
86 .byte 0x00,0x00
87 ;; P3DDR
88 .byte 0x00,0x00
89 ;; P4DDR
90 .byte 0x00,0x00
91 ;; P5DDR
92 .byte 0x00,0x00
93 ;; P6DDR
94 .byte 0x00,0x00
95 ;; dummy
96 .byte 0x00,0x00
97 ;; P8DDR
98 .byte 0x00,0x00
99 ;; P9DDR
100 .byte 0x00,0x00
101 ;; PADDR
102 .byte 0x00,0x00
103 ;; PBDDR
104 .byte 0x00,0x00
105
106__target_name:
107 .asciz "generic"
diff --git a/arch/h8300/platform/h8300h/generic/crt0_rom.S b/arch/h8300/platform/h8300h/generic/crt0_rom.S
deleted file mode 100644
index dda1dfa15a5e..000000000000
--- a/arch/h8300/platform/h8300h/generic/crt0_rom.S
+++ /dev/null
@@ -1,122 +0,0 @@
1/*
2 * linux/arch/h8300/platform/h8300h/generic/crt0_rom.S
3 *
4 * Yoshinori Sato <ysato@users.sourceforge.jp>
5 *
6 * Platform depend startup
7 * Target Archtecture: generic
8 * Memory Layout : ROM
9 */
10
11#define ASSEMBLY
12
13#include <asm/linkage.h>
14
15 .global __start
16 .global __command_line
17 .global __platform_gpio_table
18 .global __target_name
19
20 .h8300h
21 .section .text
22 .file "crt0_rom.S"
23
24 /* CPU Reset entry */
25__start:
26 mov.l #__ramend,sp
27 ldc #0x80,ccr
28
29 /* Peripheral Setup */
30
31 /* .bss clear */
32 mov.l #__sbss,er5
33 mov.l #__ebss,er4
34 sub.l er5,er4
35 shlr er4
36 shlr er4
37 sub.l er0,er0
381:
39 mov.l er0,@er5
40 adds #4,er5
41 dec.l #1,er4
42 bne 1b
43
44 /* copy .data */
45#if !defined(CONFIG_H8300H_SIM)
46 /* copy .data */
47 mov.l #__begin_data,er5
48 mov.l #__sdata,er6
49 mov.l #__edata,er4
50 sub.l er6,er4
51 shlr.l er4
52 shlr.l er4
531:
54 mov.l @er5+,er0
55 mov.l er0,@er6
56 adds #4,er6
57 dec.l #1,er4
58 bne 1b
59#endif
60
61 /* copy kernel commandline */
62 mov.l #COMMAND_START,er5
63 mov.l #__command_line,er6
64 mov.w #512,r4
65 eepmov.w
66
67 /* linux kernel start */
68 ldc #0x90,ccr /* running kernel */
69 mov.l #_init_thread_union,sp
70 add.l #0x2000,sp
71 jsr @_start_kernel
72_exit:
73
74 jmp _exit
75
76 rts
77
78 /* I/O port assign information */
79__platform_gpio_table:
80 mov.l #gpio_table,er0
81 rts
82
83gpio_table:
84 ;; P1DDR
85 .byte 0x00,0x00
86 ;; P2DDR
87 .byte 0x00,0x00
88 ;; P3DDR
89 .byte 0x00,0x00
90 ;; P4DDR
91 .byte 0x00,0x00
92 ;; P5DDR
93 .byte 0x00,0x00
94 ;; P6DDR
95 .byte 0x00,0x00
96 ;; dummy
97 .byte 0x00,0x00
98 ;; P8DDR
99 .byte 0x00,0x00
100 ;; P9DDR
101 .byte 0x00,0x00
102 ;; PADDR
103 .byte 0x00,0x00
104 ;; PBDDR
105 .byte 0x00,0x00
106
107 .section .rodata
108__target_name:
109 .asciz "generic"
110
111 .section .bss
112__command_line:
113 .space 512
114
115 /* interrupt vector */
116 .section .vectors,"ax"
117 .long __start
118vector = 1
119 .rept 64-1
120 .long _interrupt_redirect_table+vector*4
121vector = vector + 1
122 .endr
diff --git a/arch/h8300/platform/h8300h/h8max/Makefile b/arch/h8300/platform/h8300h/h8max/Makefile
deleted file mode 100644
index b7ff78050b7f..000000000000
--- a/arch/h8300/platform/h8300h/h8max/Makefile
+++ /dev/null
@@ -1,5 +0,0 @@
1#
2# Makefile for the linux kernel.
3#
4
5extra-y := crt0_ram.o
diff --git a/arch/h8300/platform/h8300h/h8max/crt0_ram.S b/arch/h8300/platform/h8300h/h8max/crt0_ram.S
deleted file mode 100644
index 6a0d4e2d9ec6..000000000000
--- a/arch/h8300/platform/h8300h/h8max/crt0_ram.S
+++ /dev/null
@@ -1,110 +0,0 @@
1/*
2 * linux/arch/h8300/platform/h8300h/h8max/crt0_ram.S
3 *
4 * Yoshinori Sato <ysato@users.sourceforge.jp>
5 *
6 * Platform depend startup
7 * Target Archtecture: H8MAX
8 * Memory Layout : RAM
9 */
10
11#define ASSEMBLY
12
13#include <asm/linkage.h>
14
15#if !defined(CONFIG_BLKDEV_RESERVE)
16#if defined(CONFIG_GDB_DEBUG)
17#define RAMEND (__ramend - 0xc000)
18#else
19#define RAMEND __ramend
20#endif
21#else
22#define RAMEND CONFIG_BLKDEV_RESERVE_ADDRESS
23#endif
24
25 .global __start
26 .global _command_line
27 .global __platform_gpio_table
28 .global __target_name
29
30 .h8300h
31
32 .section .text
33 .file "crt0_ram.S"
34
35 /* CPU Reset entry */
36__start:
37 mov.l #RAMEND,sp
38 ldc #0x80,ccr
39
40 /* Peripheral Setup */
41
42#if defined(CONFIG_MTD_UCLINUX)
43 /* move romfs image */
44 jsr @__move_romfs
45#endif
46
47 /* .bss clear */
48 mov.l #__sbss,er5
49 mov.l #__ebss,er4
50 sub.l er5,er4
51 shlr er4
52 shlr er4
53 sub.l er0,er0
541:
55 mov.l er0,@er5
56 adds #4,er5
57 dec.l #1,er4
58 bne 1b
59
60 /* copy kernel commandline */
61 mov.l #COMMAND_START,er5
62 mov.l #_command_line,er6
63 mov.w #512,r4
64 eepmov.w
65
66 /* uClinux kernel start */
67 ldc #0x90,ccr /* running kernel */
68 mov.l #_init_thread_union,sp
69 add.l #0x2000,sp
70 jsr @_start_kernel
71_exit:
72
73 jmp _exit
74
75 rts
76
77 /* I/O port assign information */
78__platform_gpio_table:
79 mov.l #gpio_table,er0
80 rts
81
82gpio_table:
83 ;; P1DDR
84 .byte 0xff,0xff
85 ;; P2DDR
86 .byte 0xff,0xff
87 ;; P3DDR
88 .byte 0x00,0x00
89 ;; P4DDR
90 .byte 0x00,0x00
91 ;; P5DDR
92 .byte 0x01,0x01
93 ;; P6DDR
94 .byte 0xf6,0xf6
95 ;; dummy
96 .byte 0x00,0x00
97 ;; P8DDR
98 .byte 0xee,0xee
99 ;; P9DDR
100 .byte 0x00,0x00
101 ;; PADDR
102 .byte 0x00,0x00
103 ;; PBDDR
104 .byte 0x30,0x30
105
106__target_name:
107 .asciz "H8MAX"
108
109 .section .bootvec,"ax"
110 jmp @__start
diff --git a/arch/h8300/platform/h8300h/irq.c b/arch/h8300/platform/h8300h/irq.c
deleted file mode 100644
index 0a50353e09d5..000000000000
--- a/arch/h8300/platform/h8300h/irq.c
+++ /dev/null
@@ -1,82 +0,0 @@
1/*
2 * Interrupt handling H8/300H depend.
3 * Yoshinori Sato <ysato@users.sourceforge.jp>
4 *
5 */
6
7#include <linux/init.h>
8#include <linux/errno.h>
9
10#include <asm/ptrace.h>
11#include <asm/traps.h>
12#include <asm/irq.h>
13#include <asm/io.h>
14#include <asm/gpio-internal.h>
15#include <asm/regs306x.h>
16
17const int __initconst h8300_saved_vectors[] = {
18#if defined(CONFIG_GDB_DEBUG)
19 TRAP3_VEC, /* TRAPA #3 is GDB breakpoint */
20#endif
21 -1,
22};
23
24const h8300_vector __initconst h8300_trap_table[] = {
25 0, 0, 0, 0, 0, 0, 0, 0,
26 system_call,
27 0,
28 0,
29 trace_break,
30};
31
32int h8300_enable_irq_pin(unsigned int irq)
33{
34 int bitmask;
35 if (irq < EXT_IRQ0 || irq > EXT_IRQ5)
36 return 0;
37
38 /* initialize IRQ pin */
39 bitmask = 1 << (irq - EXT_IRQ0);
40 switch(irq) {
41 case EXT_IRQ0:
42 case EXT_IRQ1:
43 case EXT_IRQ2:
44 case EXT_IRQ3:
45 if (H8300_GPIO_RESERVE(H8300_GPIO_P8, bitmask) == 0)
46 return -EBUSY;
47 H8300_GPIO_DDR(H8300_GPIO_P8, bitmask, H8300_GPIO_INPUT);
48 break;
49 case EXT_IRQ4:
50 case EXT_IRQ5:
51 if (H8300_GPIO_RESERVE(H8300_GPIO_P9, bitmask) == 0)
52 return -EBUSY;
53 H8300_GPIO_DDR(H8300_GPIO_P9, bitmask, H8300_GPIO_INPUT);
54 break;
55 }
56
57 return 0;
58}
59
60void h8300_disable_irq_pin(unsigned int irq)
61{
62 int bitmask;
63 if (irq < EXT_IRQ0 || irq > EXT_IRQ5)
64 return;
65
66 /* disable interrupt & release IRQ pin */
67 bitmask = 1 << (irq - EXT_IRQ0);
68 switch(irq) {
69 case EXT_IRQ0:
70 case EXT_IRQ1:
71 case EXT_IRQ2:
72 case EXT_IRQ3:
73 *(volatile unsigned char *)IER &= ~bitmask;
74 H8300_GPIO_FREE(H8300_GPIO_P8, bitmask);
75 break ;
76 case EXT_IRQ4:
77 case EXT_IRQ5:
78 *(volatile unsigned char *)IER &= ~bitmask;
79 H8300_GPIO_FREE(H8300_GPIO_P9, bitmask);
80 break;
81 }
82}
diff --git a/arch/h8300/platform/h8300h/ptrace_h8300h.c b/arch/h8300/platform/h8300h/ptrace_h8300h.c
deleted file mode 100644
index 4f1ed0279633..000000000000
--- a/arch/h8300/platform/h8300h/ptrace_h8300h.c
+++ /dev/null
@@ -1,284 +0,0 @@
1/*
2 * linux/arch/h8300/platform/h8300h/ptrace_h8300h.c
3 * ptrace cpu depend helper functions
4 *
5 * Yoshinori Sato <ysato@users.sourceforge.jp>
6 *
7 * This file is subject to the terms and conditions of the GNU General
8 * Public License. See the file COPYING in the main directory of
9 * this archive for more details.
10 */
11
12#include <linux/linkage.h>
13#include <linux/sched.h>
14#include <asm/ptrace.h>
15
16#define CCR_MASK 0x6f /* mode/imask not set */
17#define BREAKINST 0x5730 /* trapa #3 */
18
19/* Mapping from PT_xxx to the stack offset at which the register is
20 saved. Notice that usp has no stack-slot and needs to be treated
21 specially (see get_reg/put_reg below). */
22static const int h8300_register_offset[] = {
23 PT_REG(er1), PT_REG(er2), PT_REG(er3), PT_REG(er4),
24 PT_REG(er5), PT_REG(er6), PT_REG(er0), PT_REG(orig_er0),
25 PT_REG(ccr), PT_REG(pc)
26};
27
28/* read register */
29long h8300_get_reg(struct task_struct *task, int regno)
30{
31 switch (regno) {
32 case PT_USP:
33 return task->thread.usp + sizeof(long)*2;
34 case PT_CCR:
35 return *(unsigned short *)(task->thread.esp0 + h8300_register_offset[regno]);
36 default:
37 return *(unsigned long *)(task->thread.esp0 + h8300_register_offset[regno]);
38 }
39}
40
41/* write register */
42int h8300_put_reg(struct task_struct *task, int regno, unsigned long data)
43{
44 unsigned short oldccr;
45 switch (regno) {
46 case PT_USP:
47 task->thread.usp = data - sizeof(long)*2;
48 case PT_CCR:
49 oldccr = *(unsigned short *)(task->thread.esp0 + h8300_register_offset[regno]);
50 oldccr &= ~CCR_MASK;
51 data &= CCR_MASK;
52 data |= oldccr;
53 *(unsigned short *)(task->thread.esp0 + h8300_register_offset[regno]) = data;
54 break;
55 default:
56 *(unsigned long *)(task->thread.esp0 + h8300_register_offset[regno]) = data;
57 break;
58 }
59 return 0;
60}
61
62/* disable singlestep */
63void user_disable_single_step(struct task_struct *child)
64{
65 if((long)child->thread.breakinfo.addr != -1L) {
66 *child->thread.breakinfo.addr = child->thread.breakinfo.inst;
67 child->thread.breakinfo.addr = (unsigned short *)-1L;
68 }
69}
70
71/* calculate next pc */
72enum jump_type {none, /* normal instruction */
73 jabs, /* absolute address jump */
74 ind, /* indirect address jump */
75 ret, /* return to subrutine */
76 reg, /* register indexed jump */
77 relb, /* pc relative jump (byte offset) */
78 relw, /* pc relative jump (word offset) */
79 };
80
81/* opcode decode table define
82 ptn: opcode pattern
83 msk: opcode bitmask
84 len: instruction length (<0 next table index)
85 jmp: jump operation mode */
86struct optable {
87 unsigned char bitpattern;
88 unsigned char bitmask;
89 signed char length;
90 signed char type;
91} __attribute__((aligned(1),packed));
92
93#define OPTABLE(ptn,msk,len,jmp) \
94 { \
95 .bitpattern = ptn, \
96 .bitmask = msk, \
97 .length = len, \
98 .type = jmp, \
99 }
100
101static const struct optable optable_0[] = {
102 OPTABLE(0x00,0xff, 1,none), /* 0x00 */
103 OPTABLE(0x01,0xff,-1,none), /* 0x01 */
104 OPTABLE(0x02,0xfe, 1,none), /* 0x02-0x03 */
105 OPTABLE(0x04,0xee, 1,none), /* 0x04-0x05/0x14-0x15 */
106 OPTABLE(0x06,0xfe, 1,none), /* 0x06-0x07 */
107 OPTABLE(0x08,0xea, 1,none), /* 0x08-0x09/0x0c-0x0d/0x18-0x19/0x1c-0x1d */
108 OPTABLE(0x0a,0xee, 1,none), /* 0x0a-0x0b/0x1a-0x1b */
109 OPTABLE(0x0e,0xee, 1,none), /* 0x0e-0x0f/0x1e-0x1f */
110 OPTABLE(0x10,0xfc, 1,none), /* 0x10-0x13 */
111 OPTABLE(0x16,0xfe, 1,none), /* 0x16-0x17 */
112 OPTABLE(0x20,0xe0, 1,none), /* 0x20-0x3f */
113 OPTABLE(0x40,0xf0, 1,relb), /* 0x40-0x4f */
114 OPTABLE(0x50,0xfc, 1,none), /* 0x50-0x53 */
115 OPTABLE(0x54,0xfd, 1,ret ), /* 0x54/0x56 */
116 OPTABLE(0x55,0xff, 1,relb), /* 0x55 */
117 OPTABLE(0x57,0xff, 1,none), /* 0x57 */
118 OPTABLE(0x58,0xfb, 2,relw), /* 0x58/0x5c */
119 OPTABLE(0x59,0xfb, 1,reg ), /* 0x59/0x5b */
120 OPTABLE(0x5a,0xfb, 2,jabs), /* 0x5a/0x5e */
121 OPTABLE(0x5b,0xfb, 2,ind ), /* 0x5b/0x5f */
122 OPTABLE(0x60,0xe8, 1,none), /* 0x60-0x67/0x70-0x77 */
123 OPTABLE(0x68,0xfa, 1,none), /* 0x68-0x69/0x6c-0x6d */
124 OPTABLE(0x6a,0xfe,-2,none), /* 0x6a-0x6b */
125 OPTABLE(0x6e,0xfe, 2,none), /* 0x6e-0x6f */
126 OPTABLE(0x78,0xff, 4,none), /* 0x78 */
127 OPTABLE(0x79,0xff, 2,none), /* 0x79 */
128 OPTABLE(0x7a,0xff, 3,none), /* 0x7a */
129 OPTABLE(0x7b,0xff, 2,none), /* 0x7b */
130 OPTABLE(0x7c,0xfc, 2,none), /* 0x7c-0x7f */
131 OPTABLE(0x80,0x80, 1,none), /* 0x80-0xff */
132};
133
134static const struct optable optable_1[] = {
135 OPTABLE(0x00,0xff,-3,none), /* 0x0100 */
136 OPTABLE(0x40,0xf0,-3,none), /* 0x0140-0x14f */
137 OPTABLE(0x80,0xf0, 1,none), /* 0x0180-0x018f */
138 OPTABLE(0xc0,0xc0, 2,none), /* 0x01c0-0x01ff */
139};
140
141static const struct optable optable_2[] = {
142 OPTABLE(0x00,0x20, 2,none), /* 0x6a0?/0x6a8?/0x6b0?/0x6b8? */
143 OPTABLE(0x20,0x20, 3,none), /* 0x6a2?/0x6aa?/0x6b2?/0x6ba? */
144};
145
146static const struct optable optable_3[] = {
147 OPTABLE(0x69,0xfb, 2,none), /* 0x010069/0x01006d/014069/0x01406d */
148 OPTABLE(0x6b,0xff,-4,none), /* 0x01006b/0x01406b */
149 OPTABLE(0x6f,0xff, 3,none), /* 0x01006f/0x01406f */
150 OPTABLE(0x78,0xff, 5,none), /* 0x010078/0x014078 */
151};
152
153static const struct optable optable_4[] = {
154 OPTABLE(0x00,0x78, 3,none), /* 0x0100690?/0x01006d0?/0140690/0x01406d0?/0x0100698?/0x01006d8?/0140698?/0x01406d8? */
155 OPTABLE(0x20,0x78, 4,none), /* 0x0100692?/0x01006d2?/0140692/0x01406d2?/0x010069a?/0x01006da?/014069a?/0x01406da? */
156};
157
158static const struct optables_list {
159 const struct optable *ptr;
160 int size;
161} optables[] = {
162#define OPTABLES(no) \
163 { \
164 .ptr = optable_##no, \
165 .size = sizeof(optable_##no) / sizeof(struct optable), \
166 }
167 OPTABLES(0),
168 OPTABLES(1),
169 OPTABLES(2),
170 OPTABLES(3),
171 OPTABLES(4),
172
173};
174
175const unsigned char condmask[] = {
176 0x00,0x40,0x01,0x04,0x02,0x08,0x10,0x20
177};
178
179static int isbranch(struct task_struct *task,int reson)
180{
181 unsigned char cond = h8300_get_reg(task, PT_CCR);
182 /* encode complex conditions */
183 /* B4: N^V
184 B5: Z|(N^V)
185 B6: C|Z */
186 __asm__("bld #3,%w0\n\t"
187 "bxor #1,%w0\n\t"
188 "bst #4,%w0\n\t"
189 "bor #2,%w0\n\t"
190 "bst #5,%w0\n\t"
191 "bld #2,%w0\n\t"
192 "bor #0,%w0\n\t"
193 "bst #6,%w0\n\t"
194 :"=&r"(cond)::"cc");
195 cond &= condmask[reson >> 1];
196 if (!(reson & 1))
197 return cond == 0;
198 else
199 return cond != 0;
200}
201
202static unsigned short *getnextpc(struct task_struct *child, unsigned short *pc)
203{
204 const struct optable *op;
205 unsigned char *fetch_p;
206 unsigned char inst;
207 unsigned long addr;
208 unsigned long *sp;
209 int op_len,regno;
210 op = optables[0].ptr;
211 op_len = optables[0].size;
212 fetch_p = (unsigned char *)pc;
213 inst = *fetch_p++;
214 do {
215 if ((inst & op->bitmask) == op->bitpattern) {
216 if (op->length < 0) {
217 op = optables[-op->length].ptr;
218 op_len = optables[-op->length].size + 1;
219 inst = *fetch_p++;
220 } else {
221 switch (op->type) {
222 case none:
223 return pc + op->length;
224 case jabs:
225 addr = *(unsigned long *)pc;
226 return (unsigned short *)(addr & 0x00ffffff);
227 case ind:
228 addr = *pc & 0xff;
229 return (unsigned short *)(*(unsigned long *)addr);
230 case ret:
231 sp = (unsigned long *)h8300_get_reg(child, PT_USP);
232 /* user stack frames
233 | er0 | temporary saved
234 +--------+
235 | exp | exception stack frames
236 +--------+
237 | ret pc | userspace return address
238 */
239 return (unsigned short *)(*(sp+2) & 0x00ffffff);
240 case reg:
241 regno = (*pc >> 4) & 0x07;
242 if (regno == 0)
243 addr = h8300_get_reg(child, PT_ER0);
244 else
245 addr = h8300_get_reg(child, regno-1+PT_ER1);
246 return (unsigned short *)addr;
247 case relb:
248 if (inst == 0x55 || isbranch(child,inst & 0x0f))
249 pc = (unsigned short *)((unsigned long)pc +
250 ((signed char)(*fetch_p)));
251 return pc+1; /* skip myself */
252 case relw:
253 if (inst == 0x5c || isbranch(child,(*fetch_p & 0xf0) >> 4))
254 pc = (unsigned short *)((unsigned long)pc +
255 ((signed short)(*(pc+1))));
256 return pc+2; /* skip myself */
257 }
258 }
259 } else
260 op++;
261 } while(--op_len > 0);
262 return NULL;
263}
264
265/* Set breakpoint(s) to simulate a single step from the current PC. */
266
267void user_enable_single_step(struct task_struct *child)
268{
269 unsigned short *nextpc;
270 nextpc = getnextpc(child,(unsigned short *)h8300_get_reg(child, PT_PC));
271 child->thread.breakinfo.addr = nextpc;
272 child->thread.breakinfo.inst = *nextpc;
273 *nextpc = BREAKINST;
274}
275
276asmlinkage void trace_trap(unsigned long bp)
277{
278 if ((unsigned long)current->thread.breakinfo.addr == bp) {
279 user_disable_single_step(current);
280 force_sig(SIGTRAP,current);
281 } else
282 force_sig(SIGILL,current);
283}
284
diff --git a/arch/h8300/platform/h8s/Makefile b/arch/h8300/platform/h8s/Makefile
deleted file mode 100644
index bf1241883766..000000000000
--- a/arch/h8300/platform/h8s/Makefile
+++ /dev/null
@@ -1,7 +0,0 @@
1#
2# Makefile for the linux kernel.
3#
4# Reuse any files we can from the H8S
5#
6
7obj-y := ints_h8s.o ptrace_h8s.o
diff --git a/arch/h8300/platform/h8s/edosk2674/Makefile b/arch/h8300/platform/h8s/edosk2674/Makefile
deleted file mode 100644
index 8e349723bb4f..000000000000
--- a/arch/h8300/platform/h8s/edosk2674/Makefile
+++ /dev/null
@@ -1,5 +0,0 @@
1#
2# Makefile for the linux kernel.
3#
4
5extra-y := crt0_$(MODEL).o
diff --git a/arch/h8300/platform/h8s/edosk2674/crt0_ram.S b/arch/h8300/platform/h8s/edosk2674/crt0_ram.S
deleted file mode 100644
index 5ed191b37cde..000000000000
--- a/arch/h8300/platform/h8s/edosk2674/crt0_ram.S
+++ /dev/null
@@ -1,130 +0,0 @@
1/*
2 * linux/arch/h8300/platform/h8s/edosk2674/crt0_ram.S
3 *
4 * Yoshinori Sato <ysato@users.sourceforge.jp>
5 *
6 * Platform depend startup
7 * Target Archtecture: EDOSK-2674
8 * Memory Layout : RAM
9 */
10
11#define ASSEMBLY
12
13#include <asm/linkage.h>
14#include <asm/regs267x.h>
15
16#if !defined(CONFIG_BLKDEV_RESERVE)
17#if defined(CONFIG_GDB_DEBUG)
18#define RAMEND (__ramend - 0xc000)
19#else
20#define RAMEND __ramend
21#endif
22#else
23#define RAMEND CONFIG_BLKDEV_RESERVE_ADDRESS
24#endif
25
26 .global __start
27 .global __command_line
28 .global __platform_gpio_table
29 .global __target_name
30
31 .h8300s
32
33 .section .text
34 .file "crt0_ram.S"
35
36 /* CPU Reset entry */
37__start:
38 mov.l #RAMEND,sp
39 ldc #0x80,ccr
40 ldc #0x00,exr
41
42 /* Peripheral Setup */
43 bclr #4,@INTCR:8 /* interrupt mode 2 */
44 bset #5,@INTCR:8
45 bclr #0,@IER+1:16
46 bset #1,@ISCRL+1:16 /* IRQ0 Positive Edge */
47 bclr #0,@ISCRL+1:16
48
49#if defined(CONFIG_MTD_UCLINUX)
50 /* move romfs image */
51 jsr @__move_romfs
52#endif
53
54 /* .bss clear */
55 mov.l #__sbss,er5
56 mov.l er5,er6
57 mov.l #__ebss,er4
58 sub.l er5,er4
59 shlr #2,er4
60 sub.l er0,er0
611:
62 mov.l er0,@er5
63 adds #4,er5
64 dec.l #1,er4
65 bne 1b
66
67 /* copy kernel commandline */
68 mov.l #COMMAND_START,er5
69 mov.l #_command_line,er6
70 mov.w #512,r4
71 eepmov.w
72
73 /* uClinux kernel start */
74 ldc #0x90,ccr /* running kernel */
75 mov.l #_init_thread_union,sp
76 add.l #0x2000,sp
77 jsr @_start_kernel
78_exit:
79
80 jmp _exit
81
82 rts
83
84 /* I/O port assign information */
85__platform_gpio_table:
86 mov.l #gpio_table,er0
87 rts
88
89gpio_table:
90 ;; P1DDR
91 ;; used,ddr
92 .byte 0x00,0x00
93 ;; P2DDR
94 .byte 0x00,0x00
95 ;; P3DDR
96 .byte 0x3f,0x3a
97 ;; dummy
98 .byte 0x00,0x00
99 ;; P5DDR
100 .byte 0x00,0x00
101 ;; P6DDR
102 .byte 0x00,0x00
103 ;; P7DDR
104 .byte 0x00,0x00
105 ;; P8DDR
106 .byte 0x00,0x00
107 ;; dummy
108 .byte 0x00,0x00
109 ;; PADDR
110 .byte 0xff,0xff
111 ;; PBDDR
112 .byte 0xff,0x00
113 ;; PCDDR
114 .byte 0xff,0x00
115 ;; PDDDR
116 .byte 0xff,0x00
117 ;; PEDDR
118 .byte 0xff,0x00
119 ;; PFDDR
120 .byte 0xff,0xff
121 ;; PGDDR
122 .byte 0x0f,0x0f
123 ;; PHDDR
124 .byte 0x0f,0x0f
125
126__target_name:
127 .asciz "EDOSK-2674"
128
129 .section .bootvec,"ax"
130 jmp @__start
diff --git a/arch/h8300/platform/h8s/edosk2674/crt0_rom.S b/arch/h8300/platform/h8s/edosk2674/crt0_rom.S
deleted file mode 100644
index 06d1d7f324ca..000000000000
--- a/arch/h8300/platform/h8s/edosk2674/crt0_rom.S
+++ /dev/null
@@ -1,186 +0,0 @@
1/*
2 * linux/arch/h8300/platform/h8s/edosk2674/crt0_rom.S
3 *
4 * Yoshinori Sato <ysato@users.sourceforge.jp>
5 *
6 * Platform depend startup
7 * Target Archtecture: EDOSK-2674
8 * Memory Layout : ROM
9 */
10
11#define ASSEMBLY
12
13#include <asm/linkage.h>
14#include <asm/regs267x.h>
15
16 .global __start
17 .global __command_line
18 .global __platform_gpio_table
19 .global __target_name
20
21 .h8300s
22 .section .text
23 .file "crt0_rom.S"
24
25 /* CPU Reset entry */
26__start:
27 mov.l #__ramend,sp
28 ldc #0x80,ccr
29 ldc #0,exr
30
31 /* Peripheral Setup */
32;BSC/GPIO setup
33 mov.l #init_regs,er0
34 mov.w #0xffff,e2
351:
36 mov.w @er0+,r2
37 beq 2f
38 mov.w @er0+,r1
39 mov.b r1l,@er2
40 bra 1b
41
422:
43;SDRAM setup
44#define SDRAM_SMR 0x400040
45
46 mov.b #0,r0l
47 mov.b r0l,@DRACCR:16
48 mov.w #0x188,r0
49 mov.w r0,@REFCR:16
50 mov.w #0x85b4,r0
51 mov.w r0,@DRAMCR:16
52 mov.b #0,r1l
53 mov.b r1l,@SDRAM_SMR
54 mov.w #0x84b4,r0
55 mov.w r0,@DRAMCR:16
56;special thanks to Arizona Cooperative Power
57
58 /* copy .data */
59 mov.l #__begin_data,er5
60 mov.l #__sdata,er6
61 mov.l #__edata,er4
62 sub.l er6,er4
63 shlr.l #2,er4
641:
65 mov.l @er5+,er0
66 mov.l er0,@er6
67 adds #4,er6
68 dec.l #1,er4
69 bne 1b
70
71 /* .bss clear */
72 mov.l #__sbss,er5
73 mov.l #__ebss,er4
74 sub.l er5,er4
75 shlr.l #2,er4
76 sub.l er0,er0
771:
78 mov.l er0,@er5
79 adds #4,er5
80 dec.l #1,er4
81 bne 1b
82
83 /* copy kernel commandline */
84 mov.l #COMMAND_START,er5
85 mov.l #__command_line,er6
86 mov.w #512,r4
87 eepmov.w
88
89 /* linux kernel start */
90 ldc #0x90,ccr /* running kernel */
91 mov.l #_init_thread_union,sp
92 add.l #0x2000,sp
93 jsr @_start_kernel
94_exit:
95
96 jmp _exit
97
98 rts
99
100 /* I/O port assign information */
101__platform_gpio_table:
102 mov.l #gpio_table,er0
103 rts
104
105#define INIT_REGS_DATA(REGS,DATA) \
106 .word ((REGS) & 0xffff),DATA
107
108init_regs:
109INIT_REGS_DATA(ASTCR,0xff)
110INIT_REGS_DATA(RDNCR,0x00)
111INIT_REGS_DATA(ABWCR,0x80)
112INIT_REGS_DATA(WTCRAH,0x27)
113INIT_REGS_DATA(WTCRAL,0x77)
114INIT_REGS_DATA(WTCRBH,0x71)
115INIT_REGS_DATA(WTCRBL,0x22)
116INIT_REGS_DATA(CSACRH,0x80)
117INIT_REGS_DATA(CSACRL,0x80)
118INIT_REGS_DATA(BROMCRH,0xa0)
119INIT_REGS_DATA(BROMCRL,0xa0)
120INIT_REGS_DATA(P3DDR,0x3a)
121INIT_REGS_DATA(P3ODR,0x06)
122INIT_REGS_DATA(PADDR,0xff)
123INIT_REGS_DATA(PFDDR,0xfe)
124INIT_REGS_DATA(PGDDR,0x0f)
125INIT_REGS_DATA(PHDDR,0x0f)
126INIT_REGS_DATA(PFCR0,0xff)
127INIT_REGS_DATA(PFCR2,0x0d)
128INIT_REGS_DATA(ITSR, 0x00)
129INIT_REGS_DATA(ITSR+1,0x3f)
130INIT_REGS_DATA(INTCR,0x20)
131
132 .word 0
133
134gpio_table:
135 ;; P1DDR
136 .byte 0x00,0x00
137 ;; P2DDR
138 .byte 0x00,0x00
139 ;; P3DDR
140 .byte 0x00,0x00
141 ;; dummy
142 .byte 0x00,0x00
143 ;; P5DDR
144 .byte 0x00,0x00
145 ;; P6DDR
146 .byte 0x00,0x00
147 ;; P7DDR
148 .byte 0x00,0x00
149 ;; P8DDR
150 .byte 0x00,0x00
151 ;; dummy
152 .byte 0x00,0x00
153 ;; PADDR
154 .byte 0x00,0x00
155 ;; PBDDR
156 .byte 0x00,0x00
157 ;; PCDDR
158 .byte 0x00,0x00
159 ;; PDDDR
160 .byte 0x00,0x00
161 ;; PEDDR
162 .byte 0x00,0x00
163 ;; PFDDR
164 .byte 0x00,0x00
165 ;; PGDDR
166 .byte 0x00,0x00
167 ;; PHDDR
168 .byte 0x00,0x00
169
170 .section .rodata
171__target_name:
172 .asciz "EDOSK-2674"
173
174 .section .bss
175__command_line:
176 .space 512
177
178 /* interrupt vector */
179 .section .vectors,"ax"
180 .long __start
181 .long __start
182vector = 2
183 .rept 126
184 .long _interrupt_redirect_table+vector*4
185vector = vector + 1
186 .endr
diff --git a/arch/h8300/platform/h8s/generic/Makefile b/arch/h8300/platform/h8s/generic/Makefile
deleted file mode 100644
index 44b4685c664c..000000000000
--- a/arch/h8300/platform/h8s/generic/Makefile
+++ /dev/null
@@ -1,5 +0,0 @@
1#
2# Makefile for the linux kernel.
3#
4
5extra-y = crt0_$(MODEL).o
diff --git a/arch/h8300/platform/h8s/generic/crt0_ram.S b/arch/h8300/platform/h8s/generic/crt0_ram.S
deleted file mode 100644
index 7018915de74f..000000000000
--- a/arch/h8300/platform/h8s/generic/crt0_ram.S
+++ /dev/null
@@ -1,127 +0,0 @@
1/*
2 * linux/arch/h8300/platform/h8s/edosk2674/crt0_ram.S
3 *
4 * Yoshinori Sato <ysato@users.sourceforge.jp>
5 *
6 * Platform depend startup
7 * Target Archtecture: generic
8 * Memory Layout : RAM
9 */
10
11#define ASSEMBLY
12
13#include <asm/linkage.h>
14#include <asm/regs267x.h>
15
16#if !defined(CONFIG_BLKDEV_RESERVE)
17#if defined(CONFIG_GDB_DEBUG)
18#define RAMEND (__ramend - 0xc000)
19#else
20#define RAMEND __ramend
21#endif
22#else
23#define RAMEND CONFIG_BLKDEV_RESERVE_ADDRESS
24#endif
25
26 .global __start
27 .global __command_line
28 .global __platform_gpio_table
29 .global __target_name
30
31 .h8300s
32
33 .section .text
34 .file "crt0_ram.S"
35
36 /* CPU Reset entry */
37__start:
38 mov.l #RAMEND,sp
39 ldc #0x80,ccr
40 ldc #0x00,exr
41
42 /* Peripheral Setup */
43 bclr #4,@INTCR:8 /* interrupt mode 2 */
44 bset #5,@INTCR:8
45
46#if defined(CONFIG_MTD_UCLINUX)
47 /* move romfs image */
48 jsr @__move_romfs
49#endif
50
51 /* .bss clear */
52 mov.l #__sbss,er5
53 mov.l er5,er6
54 mov.l #__ebss,er4
55 sub.l er5,er4
56 shlr #2,er4
57 sub.l er0,er0
581:
59 mov.l er0,@er5
60 adds #4,er5
61 dec.l #1,er4
62 bne 1b
63
64 /* copy kernel commandline */
65 mov.l #COMMAND_START,er5
66 mov.l #_command_line,er6
67 mov.w #512,r4
68 eepmov.w
69
70 /* uClinux kernel start */
71 ldc #0x90,ccr /* running kernel */
72 mov.l #_init_thread_union,sp
73 add.l #0x2000,sp
74 jsr @_start_kernel
75_exit:
76
77 jmp _exit
78
79 rts
80
81 /* I/O port assign information */
82__platform_gpio_table:
83 mov.l #gpio_table,er0
84 rts
85
86gpio_table:
87 ;; P1DDR
88 ;; used,ddr
89 .byte 0x00,0x00
90 ;; P2DDR
91 .byte 0x00,0x00
92 ;; P3DDR
93 .byte 0x00,0x00
94 ;; dummy
95 .byte 0x00,0x00
96 ;; P5DDR
97 .byte 0x00,0x00
98 ;; P6DDR
99 .byte 0x00,0x00
100 ;; P7DDR
101 .byte 0x00,0x00
102 ;; P8DDR
103 .byte 0x00,0x00
104 ;; dummy
105 .byte 0x00,0x00
106 ;; PADDR
107 .byte 0x00,0x00
108 ;; PBDDR
109 .byte 0x00,0x00
110 ;; PCDDR
111 .byte 0x00,0x00
112 ;; PDDDR
113 .byte 0x00,0x00
114 ;; PEDDR
115 .byte 0x00,0x00
116 ;; PFDDR
117 .byte 0x00,0x00
118 ;; PGDDR
119 .byte 0x00,0x00
120 ;; PHDDR
121 .byte 0x00,0x00
122
123__target_name:
124 .asciz "generic"
125
126 .section .bootvec,"ax"
127 jmp @__start
diff --git a/arch/h8300/platform/h8s/generic/crt0_rom.S b/arch/h8300/platform/h8s/generic/crt0_rom.S
deleted file mode 100644
index 623ba7828193..000000000000
--- a/arch/h8300/platform/h8s/generic/crt0_rom.S
+++ /dev/null
@@ -1,128 +0,0 @@
1/*
2 * linux/arch/h8300/platform/h8s/generic/crt0_rom.S
3 *
4 * Yoshinori Sato <ysato@users.sourceforge.jp>
5 *
6 * Platform depend startup
7 * Target Archtecture: generic
8 * Memory Layout : ROM
9 */
10
11#define ASSEMBLY
12
13#include <asm/linkage.h>
14#include <asm/regs267x.h>
15
16 .global __start
17 .global __command_line
18 .global __platform_gpio_table
19 .global __target_name
20
21 .h8300s
22 .section .text
23 .file "crt0_rom.S"
24
25 /* CPU Reset entry */
26__start:
27 mov.l #__ramend,sp
28 ldc #0x80,ccr
29 ldc #0,exr
30 bclr #4,@INTCR:8
31 bset #5,@INTCR:8 /* Interrupt mode 2 */
32
33 /* Peripheral Setup */
34
35 /* copy .data */
36#if !defined(CONFIG_H8S_SIM)
37 mov.l #__begin_data,er5
38 mov.l #__sdata,er6
39 mov.l #__edata,er4
40 sub.l er6,er4
41 shlr.l #2,er4
421:
43 mov.l @er5+,er0
44 mov.l er0,@er6
45 adds #4,er6
46 dec.l #1,er4
47 bne 1b
48#endif
49
50 /* .bss clear */
51 mov.l #__sbss,er5
52 mov.l #__ebss,er4
53 sub.l er5,er4
54 shlr.l #2,er4
55 sub.l er0,er0
561:
57 mov.l er0,@er5
58 adds #4,er5
59 dec.l #1,er4
60 bne 1b
61
62 /* linux kernel start */
63 ldc #0x90,ccr /* running kernel */
64 mov.l #_init_thread_union,sp
65 add.l #0x2000,sp
66 jsr @_start_kernel
67_exit:
68
69 jmp _exit
70
71 rts
72
73 /* I/O port assign information */
74__platform_gpio_table:
75 mov.l #gpio_table,er0
76 rts
77
78gpio_table:
79 ;; P1DDR
80 .byte 0x00,0x00
81 ;; P2DDR
82 .byte 0x00,0x00
83 ;; P3DDR
84 .byte 0x00,0x00
85 ;; P4DDR
86 .byte 0x00,0x00
87 ;; P5DDR
88 .byte 0x00,0x00
89 ;; P6DDR
90 .byte 0x00,0x00
91 ;; dummy
92 .byte 0x00,0x00
93 ;; P8DDR
94 .byte 0x00,0x00
95 ;; PADDR
96 .byte 0x00,0x00
97 ;; PBDDR
98 .byte 0x00,0x00
99 ;; PCDDR
100 .byte 0x00,0x00
101 ;; PDDDR
102 .byte 0x00,0x00
103 ;; PEDDR
104 .byte 0x00,0x00
105 ;; PFDDR
106 .byte 0x00,0x00
107 ;; PGDDR
108 .byte 0x00,0x00
109 ;; PHDDR
110 .byte 0x00,0x00
111
112 .section .rodata
113__target_name:
114 .asciz "generic"
115
116 .section .bss
117__command_line:
118 .space 512
119
120 /* interrupt vector */
121 .section .vectors,"ax"
122 .long __start
123 .long __start
124vector = 2
125 .rept 126-1
126 .long _interrupt_redirect_table+vector*4
127vector = vector + 1
128 .endr
diff --git a/arch/h8300/platform/h8s/irq.c b/arch/h8300/platform/h8s/irq.c
deleted file mode 100644
index f3a5511c16b1..000000000000
--- a/arch/h8300/platform/h8s/irq.c
+++ /dev/null
@@ -1,104 +0,0 @@
1/*
2 * linux/arch/h8300/platform/h8s/ints_h8s.c
3 * Interrupt handling CPU variants
4 *
5 * Yoshinori Sato <ysato@users.sourceforge.jp>
6 *
7 */
8
9#include <linux/init.h>
10#include <linux/errno.h>
11#include <linux/kernel.h>
12
13#include <asm/ptrace.h>
14#include <asm/traps.h>
15#include <asm/irq.h>
16#include <asm/io.h>
17#include <asm/gpio-internal.h>
18#include <asm/regs267x.h>
19
20/* saved vector list */
21const int __initconst h8300_saved_vectors[] = {
22#if defined(CONFIG_GDB_DEBUG)
23 TRACE_VEC,
24 TRAP3_VEC,
25#endif
26 -1
27};
28
29/* trap entry table */
30const H8300_VECTOR __initconst h8300_trap_table[] = {
31 0,0,0,0,0,
32 trace_break, /* TRACE */
33 0,0,
34 system_call, /* TRAPA #0 */
35 0,0,0,0,0,0,0
36};
37
38/* IRQ pin assignment */
39struct irq_pins {
40 unsigned char port_no;
41 unsigned char bit_no;
42} __attribute__((aligned(1),packed));
43/* ISTR = 0 */
44static const struct irq_pins irq_assign_table0[16]={
45 {H8300_GPIO_P5,H8300_GPIO_B0},{H8300_GPIO_P5,H8300_GPIO_B1},
46 {H8300_GPIO_P5,H8300_GPIO_B2},{H8300_GPIO_P5,H8300_GPIO_B3},
47 {H8300_GPIO_P5,H8300_GPIO_B4},{H8300_GPIO_P5,H8300_GPIO_B5},
48 {H8300_GPIO_P5,H8300_GPIO_B6},{H8300_GPIO_P5,H8300_GPIO_B7},
49 {H8300_GPIO_P6,H8300_GPIO_B0},{H8300_GPIO_P6,H8300_GPIO_B1},
50 {H8300_GPIO_P6,H8300_GPIO_B2},{H8300_GPIO_P6,H8300_GPIO_B3},
51 {H8300_GPIO_P6,H8300_GPIO_B4},{H8300_GPIO_P6,H8300_GPIO_B5},
52 {H8300_GPIO_PF,H8300_GPIO_B1},{H8300_GPIO_PF,H8300_GPIO_B2},
53};
54/* ISTR = 1 */
55static const struct irq_pins irq_assign_table1[16]={
56 {H8300_GPIO_P8,H8300_GPIO_B0},{H8300_GPIO_P8,H8300_GPIO_B1},
57 {H8300_GPIO_P8,H8300_GPIO_B2},{H8300_GPIO_P8,H8300_GPIO_B3},
58 {H8300_GPIO_P8,H8300_GPIO_B4},{H8300_GPIO_P8,H8300_GPIO_B5},
59 {H8300_GPIO_PH,H8300_GPIO_B2},{H8300_GPIO_PH,H8300_GPIO_B3},
60 {H8300_GPIO_P2,H8300_GPIO_B0},{H8300_GPIO_P2,H8300_GPIO_B1},
61 {H8300_GPIO_P2,H8300_GPIO_B2},{H8300_GPIO_P2,H8300_GPIO_B3},
62 {H8300_GPIO_P2,H8300_GPIO_B4},{H8300_GPIO_P2,H8300_GPIO_B5},
63 {H8300_GPIO_P2,H8300_GPIO_B6},{H8300_GPIO_P2,H8300_GPIO_B7},
64};
65
66/* IRQ to GPIO pin translation */
67#define IRQ_GPIO_MAP(irqbit,irq,port,bit) \
68do { \
69 if (*(volatile unsigned short *)ITSR & irqbit) { \
70 port = irq_assign_table1[irq - EXT_IRQ0].port_no; \
71 bit = irq_assign_table1[irq - EXT_IRQ0].bit_no; \
72 } else { \
73 port = irq_assign_table0[irq - EXT_IRQ0].port_no; \
74 bit = irq_assign_table0[irq - EXT_IRQ0].bit_no; \
75 } \
76} while(0)
77
78int h8300_enable_irq_pin(unsigned int irq)
79{
80 if (irq >= EXT_IRQ0 && irq <= EXT_IRQ15) {
81 unsigned short ptn = 1 << (irq - EXT_IRQ0);
82 unsigned int port_no,bit_no;
83 IRQ_GPIO_MAP(ptn, irq, port_no, bit_no);
84 if (H8300_GPIO_RESERVE(port_no, bit_no) == 0)
85 return -EBUSY; /* pin already use */
86 H8300_GPIO_DDR(port_no, bit_no, H8300_GPIO_INPUT);
87 *(volatile unsigned short *)ISR &= ~ptn; /* ISR clear */
88 }
89
90 return 0;
91}
92
93void h8300_disable_irq_pin(unsigned int irq)
94{
95 if (irq >= EXT_IRQ0 && irq <= EXT_IRQ15) {
96 /* disable interrupt & release IRQ pin */
97 unsigned short ptn = 1 << (irq - EXT_IRQ0);
98 unsigned short port_no,bit_no;
99 *(volatile unsigned short *)ISR &= ~ptn;
100 *(volatile unsigned short *)IER &= ~ptn;
101 IRQ_GPIO_MAP(ptn, irq, port_no, bit_no);
102 H8300_GPIO_FREE(port_no, bit_no);
103 }
104}
diff --git a/arch/h8300/platform/h8s/ptrace_h8s.c b/arch/h8300/platform/h8s/ptrace_h8s.c
deleted file mode 100644
index c058ab1a8495..000000000000
--- a/arch/h8300/platform/h8s/ptrace_h8s.c
+++ /dev/null
@@ -1,84 +0,0 @@
1/*
2 * linux/arch/h8300/platform/h8s/ptrace_h8s.c
3 * ptrace cpu depend helper functions
4 *
5 * Yoshinori Sato <ysato@users.sourceforge.jp>
6 *
7 * This file is subject to the terms and conditions of the GNU General
8 * Public License. See the file COPYING in the main directory of
9 * this archive for more details.
10 */
11
12#include <linux/linkage.h>
13#include <linux/sched.h>
14#include <linux/errno.h>
15#include <asm/ptrace.h>
16
17#define CCR_MASK 0x6f
18#define EXR_TRACE 0x80
19
20/* Mapping from PT_xxx to the stack offset at which the register is
21 saved. Notice that usp has no stack-slot and needs to be treated
22 specially (see get_reg/put_reg below). */
23static const int h8300_register_offset[] = {
24 PT_REG(er1), PT_REG(er2), PT_REG(er3), PT_REG(er4),
25 PT_REG(er5), PT_REG(er6), PT_REG(er0), PT_REG(orig_er0),
26 PT_REG(ccr), PT_REG(pc), 0, PT_REG(exr)
27};
28
29/* read register */
30long h8300_get_reg(struct task_struct *task, int regno)
31{
32 switch (regno) {
33 case PT_USP:
34 return task->thread.usp + sizeof(long)*2 + 2;
35 case PT_CCR:
36 case PT_EXR:
37 return *(unsigned short *)(task->thread.esp0 + h8300_register_offset[regno]);
38 default:
39 return *(unsigned long *)(task->thread.esp0 + h8300_register_offset[regno]);
40 }
41}
42
43/* write register */
44int h8300_put_reg(struct task_struct *task, int regno, unsigned long data)
45{
46 unsigned short oldccr;
47 switch (regno) {
48 case PT_USP:
49 task->thread.usp = data - sizeof(long)*2 - 2;
50 case PT_CCR:
51 oldccr = *(unsigned short *)(task->thread.esp0 + h8300_register_offset[regno]);
52 oldccr &= ~CCR_MASK;
53 data &= CCR_MASK;
54 data |= oldccr;
55 *(unsigned short *)(task->thread.esp0 + h8300_register_offset[regno]) = data;
56 break;
57 case PT_EXR:
58 /* exr modify not support */
59 return -EIO;
60 default:
61 *(unsigned long *)(task->thread.esp0 + h8300_register_offset[regno]) = data;
62 break;
63 }
64 return 0;
65}
66
67/* disable singlestep */
68void user_disable_single_step(struct task_struct *child)
69{
70 *(unsigned short *)(child->thread.esp0 + h8300_register_offset[PT_EXR]) &= ~EXR_TRACE;
71}
72
73/* enable singlestep */
74void user_enable_single_step(struct task_struct *child)
75{
76 *(unsigned short *)(child->thread.esp0 + h8300_register_offset[PT_EXR]) |= EXR_TRACE;
77}
78
79asmlinkage void trace_trap(unsigned long bp)
80{
81 (void)bp;
82 force_sig(SIGTRAP,current);
83}
84
diff --git a/arch/hexagon/include/asm/Kbuild b/arch/hexagon/include/asm/Kbuild
index 1da17caac23c..67c3450309b7 100644
--- a/arch/hexagon/include/asm/Kbuild
+++ b/arch/hexagon/include/asm/Kbuild
@@ -53,3 +53,4 @@ generic-y += types.h
53generic-y += ucontext.h 53generic-y += ucontext.h
54generic-y += unaligned.h 54generic-y += unaligned.h
55generic-y += xor.h 55generic-y += xor.h
56generic-y += preempt.h
diff --git a/arch/hexagon/kernel/setup.c b/arch/hexagon/kernel/setup.c
index 29d1f1b00016..0e7c1dbb37b2 100644
--- a/arch/hexagon/kernel/setup.c
+++ b/arch/hexagon/kernel/setup.c
@@ -32,9 +32,6 @@
32#include <asm/hexagon_vm.h> 32#include <asm/hexagon_vm.h>
33#include <asm/vm_mmu.h> 33#include <asm/vm_mmu.h>
34#include <asm/time.h> 34#include <asm/time.h>
35#ifdef CONFIG_OF
36#include <asm/prom.h>
37#endif
38 35
39char cmd_line[COMMAND_LINE_SIZE]; 36char cmd_line[COMMAND_LINE_SIZE];
40static char default_command_line[COMMAND_LINE_SIZE] __initdata = CONFIG_CMDLINE; 37static char default_command_line[COMMAND_LINE_SIZE] __initdata = CONFIG_CMDLINE;
diff --git a/arch/ia64/include/asm/Kbuild b/arch/ia64/include/asm/Kbuild
index a3456f34f672..f93ee087e8fe 100644
--- a/arch/ia64/include/asm/Kbuild
+++ b/arch/ia64/include/asm/Kbuild
@@ -3,4 +3,5 @@ generic-y += clkdev.h
3generic-y += exec.h 3generic-y += exec.h
4generic-y += kvm_para.h 4generic-y += kvm_para.h
5generic-y += trace_clock.h 5generic-y += trace_clock.h
6generic-y += preempt.h
6generic-y += vtime.h \ No newline at end of file 7generic-y += vtime.h \ No newline at end of file
diff --git a/arch/ia64/include/asm/io.h b/arch/ia64/include/asm/io.h
index 74a7cc3293bc..0d2bcb37ec35 100644
--- a/arch/ia64/include/asm/io.h
+++ b/arch/ia64/include/asm/io.h
@@ -424,6 +424,7 @@ extern void __iomem * ioremap(unsigned long offset, unsigned long size);
424extern void __iomem * ioremap_nocache (unsigned long offset, unsigned long size); 424extern void __iomem * ioremap_nocache (unsigned long offset, unsigned long size);
425extern void iounmap (volatile void __iomem *addr); 425extern void iounmap (volatile void __iomem *addr);
426extern void __iomem * early_ioremap (unsigned long phys_addr, unsigned long size); 426extern void __iomem * early_ioremap (unsigned long phys_addr, unsigned long size);
427#define early_memremap(phys_addr, size) early_ioremap(phys_addr, size)
427extern void early_iounmap (volatile void __iomem *addr, unsigned long size); 428extern void early_iounmap (volatile void __iomem *addr, unsigned long size);
428static inline void __iomem * ioremap_cache (unsigned long phys_addr, unsigned long size) 429static inline void __iomem * ioremap_cache (unsigned long phys_addr, unsigned long size)
429{ 430{
diff --git a/arch/ia64/kernel/efi.c b/arch/ia64/kernel/efi.c
index 51bce594eb83..da5b462e6de6 100644
--- a/arch/ia64/kernel/efi.c
+++ b/arch/ia64/kernel/efi.c
@@ -44,10 +44,15 @@
44 44
45#define EFI_DEBUG 0 45#define EFI_DEBUG 0
46 46
47static __initdata unsigned long palo_phys;
48
49static __initdata efi_config_table_type_t arch_tables[] = {
50 {PROCESSOR_ABSTRACTION_LAYER_OVERWRITE_GUID, "PALO", &palo_phys},
51 {NULL_GUID, NULL, 0},
52};
53
47extern efi_status_t efi_call_phys (void *, ...); 54extern efi_status_t efi_call_phys (void *, ...);
48 55
49struct efi efi;
50EXPORT_SYMBOL(efi);
51static efi_runtime_services_t *runtime; 56static efi_runtime_services_t *runtime;
52static u64 mem_limit = ~0UL, max_addr = ~0UL, min_addr = 0UL; 57static u64 mem_limit = ~0UL, max_addr = ~0UL, min_addr = 0UL;
53 58
@@ -423,9 +428,9 @@ static u8 __init palo_checksum(u8 *buffer, u32 length)
423 * Parse and handle PALO table which is published at: 428 * Parse and handle PALO table which is published at:
424 * http://www.dig64.org/home/DIG64_PALO_R1_0.pdf 429 * http://www.dig64.org/home/DIG64_PALO_R1_0.pdf
425 */ 430 */
426static void __init handle_palo(unsigned long palo_phys) 431static void __init handle_palo(unsigned long phys_addr)
427{ 432{
428 struct palo_table *palo = __va(palo_phys); 433 struct palo_table *palo = __va(phys_addr);
429 u8 checksum; 434 u8 checksum;
430 435
431 if (strncmp(palo->signature, PALO_SIG, sizeof(PALO_SIG) - 1)) { 436 if (strncmp(palo->signature, PALO_SIG, sizeof(PALO_SIG) - 1)) {
@@ -467,12 +472,10 @@ void __init
467efi_init (void) 472efi_init (void)
468{ 473{
469 void *efi_map_start, *efi_map_end; 474 void *efi_map_start, *efi_map_end;
470 efi_config_table_t *config_tables;
471 efi_char16_t *c16; 475 efi_char16_t *c16;
472 u64 efi_desc_size; 476 u64 efi_desc_size;
473 char *cp, vendor[100] = "unknown"; 477 char *cp, vendor[100] = "unknown";
474 int i; 478 int i;
475 unsigned long palo_phys;
476 479
477 /* 480 /*
478 * It's too early to be able to use the standard kernel command line 481 * It's too early to be able to use the standard kernel command line
@@ -514,8 +517,6 @@ efi_init (void)
514 efi.systab->hdr.revision >> 16, 517 efi.systab->hdr.revision >> 16,
515 efi.systab->hdr.revision & 0xffff); 518 efi.systab->hdr.revision & 0xffff);
516 519
517 config_tables = __va(efi.systab->tables);
518
519 /* Show what we know for posterity */ 520 /* Show what we know for posterity */
520 c16 = __va(efi.systab->fw_vendor); 521 c16 = __va(efi.systab->fw_vendor);
521 if (c16) { 522 if (c16) {
@@ -528,43 +529,10 @@ efi_init (void)
528 efi.systab->hdr.revision >> 16, 529 efi.systab->hdr.revision >> 16,
529 efi.systab->hdr.revision & 0xffff, vendor); 530 efi.systab->hdr.revision & 0xffff, vendor);
530 531
531 efi.mps = EFI_INVALID_TABLE_ADDR;
532 efi.acpi = EFI_INVALID_TABLE_ADDR;
533 efi.acpi20 = EFI_INVALID_TABLE_ADDR;
534 efi.smbios = EFI_INVALID_TABLE_ADDR;
535 efi.sal_systab = EFI_INVALID_TABLE_ADDR;
536 efi.boot_info = EFI_INVALID_TABLE_ADDR;
537 efi.hcdp = EFI_INVALID_TABLE_ADDR;
538 efi.uga = EFI_INVALID_TABLE_ADDR;
539
540 palo_phys = EFI_INVALID_TABLE_ADDR; 532 palo_phys = EFI_INVALID_TABLE_ADDR;
541 533
542 for (i = 0; i < (int) efi.systab->nr_tables; i++) { 534 if (efi_config_init(arch_tables) != 0)
543 if (efi_guidcmp(config_tables[i].guid, MPS_TABLE_GUID) == 0) { 535 return;
544 efi.mps = config_tables[i].table;
545 printk(" MPS=0x%lx", config_tables[i].table);
546 } else if (efi_guidcmp(config_tables[i].guid, ACPI_20_TABLE_GUID) == 0) {
547 efi.acpi20 = config_tables[i].table;
548 printk(" ACPI 2.0=0x%lx", config_tables[i].table);
549 } else if (efi_guidcmp(config_tables[i].guid, ACPI_TABLE_GUID) == 0) {
550 efi.acpi = config_tables[i].table;
551 printk(" ACPI=0x%lx", config_tables[i].table);
552 } else if (efi_guidcmp(config_tables[i].guid, SMBIOS_TABLE_GUID) == 0) {
553 efi.smbios = config_tables[i].table;
554 printk(" SMBIOS=0x%lx", config_tables[i].table);
555 } else if (efi_guidcmp(config_tables[i].guid, SAL_SYSTEM_TABLE_GUID) == 0) {
556 efi.sal_systab = config_tables[i].table;
557 printk(" SALsystab=0x%lx", config_tables[i].table);
558 } else if (efi_guidcmp(config_tables[i].guid, HCDP_TABLE_GUID) == 0) {
559 efi.hcdp = config_tables[i].table;
560 printk(" HCDP=0x%lx", config_tables[i].table);
561 } else if (efi_guidcmp(config_tables[i].guid,
562 PROCESSOR_ABSTRACTION_LAYER_OVERWRITE_GUID) == 0) {
563 palo_phys = config_tables[i].table;
564 printk(" PALO=0x%lx", config_tables[i].table);
565 }
566 }
567 printk("\n");
568 536
569 if (palo_phys != EFI_INVALID_TABLE_ADDR) 537 if (palo_phys != EFI_INVALID_TABLE_ADDR)
570 handle_palo(palo_phys); 538 handle_palo(palo_phys);
diff --git a/arch/ia64/kernel/setup.c b/arch/ia64/kernel/setup.c
index 4fc2e9569bb2..d86669bcdfb2 100644
--- a/arch/ia64/kernel/setup.c
+++ b/arch/ia64/kernel/setup.c
@@ -1063,6 +1063,7 @@ check_bugs (void)
1063static int __init run_dmi_scan(void) 1063static int __init run_dmi_scan(void)
1064{ 1064{
1065 dmi_scan_machine(); 1065 dmi_scan_machine();
1066 dmi_memdev_walk();
1066 dmi_set_dump_stack_arch_desc(); 1067 dmi_set_dump_stack_arch_desc();
1067 return 0; 1068 return 0;
1068} 1069}
diff --git a/arch/m32r/include/asm/Kbuild b/arch/m32r/include/asm/Kbuild
index bebdc36ebb0a..2b58c5f0bc38 100644
--- a/arch/m32r/include/asm/Kbuild
+++ b/arch/m32r/include/asm/Kbuild
@@ -3,3 +3,4 @@ generic-y += clkdev.h
3generic-y += exec.h 3generic-y += exec.h
4generic-y += module.h 4generic-y += module.h
5generic-y += trace_clock.h 5generic-y += trace_clock.h
6generic-y += preempt.h
diff --git a/arch/m68k/include/asm/Kbuild b/arch/m68k/include/asm/Kbuild
index 09d77a862da3..a5d27f272a59 100644
--- a/arch/m68k/include/asm/Kbuild
+++ b/arch/m68k/include/asm/Kbuild
@@ -31,3 +31,4 @@ generic-y += trace_clock.h
31generic-y += types.h 31generic-y += types.h
32generic-y += word-at-a-time.h 32generic-y += word-at-a-time.h
33generic-y += xor.h 33generic-y += xor.h
34generic-y += preempt.h
diff --git a/arch/metag/include/asm/Kbuild b/arch/metag/include/asm/Kbuild
index 6ae0ccb632cb..84d0c1d6b9b3 100644
--- a/arch/metag/include/asm/Kbuild
+++ b/arch/metag/include/asm/Kbuild
@@ -52,3 +52,4 @@ generic-y += unaligned.h
52generic-y += user.h 52generic-y += user.h
53generic-y += vga.h 53generic-y += vga.h
54generic-y += xor.h 54generic-y += xor.h
55generic-y += preempt.h
diff --git a/arch/metag/include/asm/mach/arch.h b/arch/metag/include/asm/mach/arch.h
index 12c5664fea6e..433f94624fa2 100644
--- a/arch/metag/include/asm/mach/arch.h
+++ b/arch/metag/include/asm/mach/arch.h
@@ -53,7 +53,7 @@ struct machine_desc {
53/* 53/*
54 * Current machine - only accessible during boot. 54 * Current machine - only accessible during boot.
55 */ 55 */
56extern struct machine_desc *machine_desc; 56extern const struct machine_desc *machine_desc;
57 57
58/* 58/*
59 * Machine type table - also only accessible during boot 59 * Machine type table - also only accessible during boot
diff --git a/arch/metag/include/asm/prom.h b/arch/metag/include/asm/prom.h
deleted file mode 100644
index d2aa35d2228e..000000000000
--- a/arch/metag/include/asm/prom.h
+++ /dev/null
@@ -1,23 +0,0 @@
1/*
2 * arch/metag/include/asm/prom.h
3 *
4 * Copyright (C) 2012 Imagination Technologies Ltd.
5 *
6 * Based on ARM version:
7 * Copyright (C) 2009 Canonical Ltd. <jeremy.kerr@canonical.com>
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 *
13 */
14#ifndef __ASM_METAG_PROM_H
15#define __ASM_METAG_PROM_H
16
17#include <asm/setup.h>
18#define HAVE_ARCH_DEVTREE_FIXUPS
19
20extern struct machine_desc *setup_machine_fdt(void *dt);
21extern void copy_fdt(void);
22
23#endif /* __ASM_METAG_PROM_H */
diff --git a/arch/metag/include/asm/setup.h b/arch/metag/include/asm/setup.h
index e13083b15dd0..e9fdee9452b1 100644
--- a/arch/metag/include/asm/setup.h
+++ b/arch/metag/include/asm/setup.h
@@ -3,6 +3,7 @@
3 3
4#include <uapi/asm/setup.h> 4#include <uapi/asm/setup.h>
5 5
6extern const struct machine_desc *setup_machine_fdt(void *dt);
6void per_cpu_trap_init(unsigned long); 7void per_cpu_trap_init(unsigned long);
7extern void __init dump_machine_table(void); 8extern void __init dump_machine_table(void);
8#endif /* _ASM_METAG_SETUP_H */ 9#endif /* _ASM_METAG_SETUP_H */
diff --git a/arch/metag/include/asm/tbx.h b/arch/metag/include/asm/tbx.h
index 287b36ff8ad1..703b9cb0ac5c 100644
--- a/arch/metag/include/asm/tbx.h
+++ b/arch/metag/include/asm/tbx.h
@@ -150,11 +150,9 @@
150#else 150#else
151/* Reserved 0x04-0x09 */ 151/* Reserved 0x04-0x09 */
152#endif 152#endif
153#define TBID_SIGNUM_SWS 0x0A /* KICK received with SigMask != 0 */ 153/* Reserved 0x0A-0x0F */
154#define TBID_SIGNUM_SWK 0x0B /* KICK received with SigMask == 0 */
155/* Reserved 0x0C-0x0F */
156#define TBID_SIGNUM_TRT 0x10 /* Timer trigger */ 154#define TBID_SIGNUM_TRT 0x10 /* Timer trigger */
157#define TBID_SIGNUM_LWK 0x11 /* Low level kick (handler provided by TBI) */ 155#define TBID_SIGNUM_LWK 0x11 /* Low level kick */
158#define TBID_SIGNUM_XXF 0x12 /* Fault handler - receives ALL _xxF sigs */ 156#define TBID_SIGNUM_XXF 0x12 /* Fault handler - receives ALL _xxF sigs */
159#ifdef TBI_1_4 157#ifdef TBI_1_4
160#define TBID_SIGNUM_DFR 0x13 /* Deferred Exception handler */ 158#define TBID_SIGNUM_DFR 0x13 /* Deferred Exception handler */
@@ -183,8 +181,7 @@
183 each hardware signal, sometimes this is a many-to-one relationship. */ 181 each hardware signal, sometimes this is a many-to-one relationship. */
184#define TBI_TRIG_BIT(SigNum) (\ 182#define TBI_TRIG_BIT(SigNum) (\
185 ((SigNum) >= TBID_SIGNUM_TRT) ? 1<<((SigNum)-TBID_SIGNUM_TRT) :\ 183 ((SigNum) >= TBID_SIGNUM_TRT) ? 1<<((SigNum)-TBID_SIGNUM_TRT) :\
186 ( ((SigNum) == TBID_SIGNUM_SWS) || \ 184 ((SigNum) == TBID_SIGNUM_LWK) ? \
187 ((SigNum) == TBID_SIGNUM_SWK) ) ? \
188 TXSTAT_KICK_BIT : TXSTATI_BGNDHALT_BIT ) 185 TXSTAT_KICK_BIT : TXSTATI_BGNDHALT_BIT )
189 186
190/* Return the hardware trigger vector number for entries in the 187/* Return the hardware trigger vector number for entries in the
@@ -687,10 +684,8 @@ typedef union _tbires_tag_ {
687 Triggers will indicate the status of TXSTAT or TXSTATI sampled by the 684 Triggers will indicate the status of TXSTAT or TXSTATI sampled by the
688 code that called the handler. 685 code that called the handler.
689 686
690 InstOrSWSId is defined firstly as 'Inst' if the SigNum is TBID_SIGNUM_SWx 687 Inst is defined as 'Inst' if the SigNum is TBID_SIGNUM_SWx and holds the
691 and hold the actual SWITCH instruction detected, secondly if SigNum 688 actual SWITCH instruction detected, in other cases the value of this
692 is TBID_SIGNUM_SWS the 'SWSId' is defined to hold the Id of the
693 software signal detected, in other cases the value of this
694 parameter is undefined. 689 parameter is undefined.
695 690
696 pTBI points at the PTBI structure related to the thread and processing 691 pTBI points at the PTBI structure related to the thread and processing
@@ -709,7 +704,7 @@ typedef union _tbires_tag_ {
709 704
710 */ 705 */
711typedef TBIRES (*PTBIAPIFN)( TBIRES State, int SigNum, 706typedef TBIRES (*PTBIAPIFN)( TBIRES State, int SigNum,
712 int Triggers, int InstOrSWSId, 707 int Triggers, int Inst,
713 volatile struct _tbi_tag_ *pTBI ); 708 volatile struct _tbi_tag_ *pTBI );
714#endif /* ifndef __ASSEMBLY__ */ 709#endif /* ifndef __ASSEMBLY__ */
715 710
@@ -757,7 +752,7 @@ typedef volatile struct _tbi_tag_ {
757#ifndef __ASSEMBLY__ 752#ifndef __ASSEMBLY__
758/* This handler should be used for TBID_SIGNUM_DFR */ 753/* This handler should be used for TBID_SIGNUM_DFR */
759extern TBIRES __TBIHandleDFR ( TBIRES State, int SigNum, 754extern TBIRES __TBIHandleDFR ( TBIRES State, int SigNum,
760 int Triggers, int InstOrSWSId, 755 int Triggers, int Inst,
761 volatile struct _tbi_tag_ *pTBI ); 756 volatile struct _tbi_tag_ *pTBI );
762#endif 757#endif
763#endif 758#endif
diff --git a/arch/metag/include/asm/topology.h b/arch/metag/include/asm/topology.h
index 23f5118f58db..8e9c0b3b9691 100644
--- a/arch/metag/include/asm/topology.h
+++ b/arch/metag/include/asm/topology.h
@@ -26,6 +26,8 @@
26 .last_balance = jiffies, \ 26 .last_balance = jiffies, \
27 .balance_interval = 1, \ 27 .balance_interval = 1, \
28 .nr_balance_failed = 0, \ 28 .nr_balance_failed = 0, \
29 .max_newidle_lb_cost = 0, \
30 .next_decay_max_lb_cost = jiffies, \
29} 31}
30 32
31#define cpu_to_node(cpu) ((void)(cpu), 0) 33#define cpu_to_node(cpu) ((void)(cpu), 0)
diff --git a/arch/metag/kernel/devtree.c b/arch/metag/kernel/devtree.c
index 7cd02529636e..18dd7aea9fdc 100644
--- a/arch/metag/kernel/devtree.c
+++ b/arch/metag/kernel/devtree.c
@@ -34,6 +34,19 @@ void * __init early_init_dt_alloc_memory_arch(u64 size, u64 align)
34 return alloc_bootmem_align(size, align); 34 return alloc_bootmem_align(size, align);
35} 35}
36 36
37static const void * __init arch_get_next_mach(const char *const **match)
38{
39 static const struct machine_desc *mdesc = __arch_info_begin;
40 const struct machine_desc *m = mdesc;
41
42 if (m >= __arch_info_end)
43 return NULL;
44
45 mdesc++;
46 *match = m->dt_compat;
47 return m;
48}
49
37/** 50/**
38 * setup_machine_fdt - Machine setup when an dtb was passed to the kernel 51 * setup_machine_fdt - Machine setup when an dtb was passed to the kernel
39 * @dt: virtual address pointer to dt blob 52 * @dt: virtual address pointer to dt blob
@@ -41,74 +54,18 @@ void * __init early_init_dt_alloc_memory_arch(u64 size, u64 align)
41 * If a dtb was passed to the kernel, then use it to choose the correct 54 * If a dtb was passed to the kernel, then use it to choose the correct
42 * machine_desc and to setup the system. 55 * machine_desc and to setup the system.
43 */ 56 */
44struct machine_desc * __init setup_machine_fdt(void *dt) 57const struct machine_desc * __init setup_machine_fdt(void *dt)
45{ 58{
46 struct boot_param_header *devtree = dt; 59 const struct machine_desc *mdesc;
47 struct machine_desc *mdesc, *mdesc_best = NULL;
48 unsigned int score, mdesc_score = ~1;
49 unsigned long dt_root;
50 const char *model;
51 60
52 /* check device tree validity */ 61 /* check device tree validity */
53 if (be32_to_cpu(devtree->magic) != OF_DT_HEADER) 62 if (!early_init_dt_scan(dt))
54 return NULL; 63 return NULL;
55 64
56 /* Search the mdescs for the 'best' compatible value match */ 65 mdesc = of_flat_dt_match_machine(NULL, arch_get_next_mach);
57 initial_boot_params = devtree; 66 if (!mdesc)
58 dt_root = of_get_flat_dt_root();
59
60 for_each_machine_desc(mdesc) {
61 score = of_flat_dt_match(dt_root, mdesc->dt_compat);
62 if (score > 0 && score < mdesc_score) {
63 mdesc_best = mdesc;
64 mdesc_score = score;
65 }
66 }
67 if (!mdesc_best) {
68 const char *prop;
69 long size;
70
71 pr_err("\nError: unrecognized/unsupported device tree compatible list:\n[ ");
72
73 prop = of_get_flat_dt_prop(dt_root, "compatible", &size);
74 if (prop) {
75 while (size > 0) {
76 printk("'%s' ", prop);
77 size -= strlen(prop) + 1;
78 prop += strlen(prop) + 1;
79 }
80 }
81 printk("]\n\n");
82
83 dump_machine_table(); /* does not return */ 67 dump_machine_table(); /* does not return */
84 } 68 pr_info("Machine name: %s\n", mdesc->name);
85
86 model = of_get_flat_dt_prop(dt_root, "model", NULL);
87 if (!model)
88 model = of_get_flat_dt_prop(dt_root, "compatible", NULL);
89 if (!model)
90 model = "<unknown>";
91 pr_info("Machine: %s, model: %s\n", mdesc_best->name, model);
92
93 /* Retrieve various information from the /chosen node */
94 of_scan_flat_dt(early_init_dt_scan_chosen, boot_command_line);
95
96 return mdesc_best;
97}
98 69
99/** 70 return mdesc;
100 * copy_fdt - Copy device tree into non-init memory.
101 *
102 * We must copy the flattened device tree blob into non-init memory because the
103 * unflattened device tree will reference the strings in it directly.
104 */
105void __init copy_fdt(void)
106{
107 void *alloc = early_init_dt_alloc_memory_arch(
108 be32_to_cpu(initial_boot_params->totalsize), 0x40);
109 if (alloc) {
110 memcpy(alloc, initial_boot_params,
111 be32_to_cpu(initial_boot_params->totalsize));
112 initial_boot_params = alloc;
113 }
114} 71}
diff --git a/arch/metag/kernel/irq.c b/arch/metag/kernel/irq.c
index 2a2c9d55187e..3b4b7f6c0950 100644
--- a/arch/metag/kernel/irq.c
+++ b/arch/metag/kernel/irq.c
@@ -159,44 +159,30 @@ void irq_ctx_exit(int cpu)
159 159
160extern asmlinkage void __do_softirq(void); 160extern asmlinkage void __do_softirq(void);
161 161
162asmlinkage void do_softirq(void) 162void do_softirq_own_stack(void)
163{ 163{
164 unsigned long flags;
165 struct thread_info *curctx; 164 struct thread_info *curctx;
166 union irq_ctx *irqctx; 165 union irq_ctx *irqctx;
167 u32 *isp; 166 u32 *isp;
168 167
169 if (in_interrupt()) 168 curctx = current_thread_info();
170 return; 169 irqctx = softirq_ctx[smp_processor_id()];
171 170 irqctx->tinfo.task = curctx->task;
172 local_irq_save(flags); 171
173 172 /* build the stack frame on the softirq stack */
174 if (local_softirq_pending()) { 173 isp = (u32 *) ((char *)irqctx + sizeof(struct thread_info));
175 curctx = current_thread_info(); 174
176 irqctx = softirq_ctx[smp_processor_id()]; 175 asm volatile (
177 irqctx->tinfo.task = curctx->task; 176 "MOV D0.5,%0\n"
178 177 "SWAP A0StP,D0.5\n"
179 /* build the stack frame on the softirq stack */ 178 "CALLR D1RtP,___do_softirq\n"
180 isp = (u32 *) ((char *)irqctx + sizeof(struct thread_info)); 179 "MOV A0StP,D0.5\n"
181 180 :
182 asm volatile ( 181 : "r" (isp)
183 "MOV D0.5,%0\n" 182 : "memory", "cc", "D1Ar1", "D0Ar2", "D1Ar3", "D0Ar4",
184 "SWAP A0StP,D0.5\n" 183 "D1Ar5", "D0Ar6", "D0Re0", "D1Re0", "D0.4", "D1RtP",
185 "CALLR D1RtP,___do_softirq\n" 184 "D0.5"
186 "MOV A0StP,D0.5\n" 185 );
187 :
188 : "r" (isp)
189 : "memory", "cc", "D1Ar1", "D0Ar2", "D1Ar3", "D0Ar4",
190 "D1Ar5", "D0Ar6", "D0Re0", "D1Re0", "D0.4", "D1RtP",
191 "D0.5"
192 );
193 /*
194 * Shouldn't happen, we returned above if in_interrupt():
195 */
196 WARN_ON_ONCE(softirq_count());
197 }
198
199 local_irq_restore(flags);
200} 186}
201#endif 187#endif
202 188
diff --git a/arch/metag/kernel/setup.c b/arch/metag/kernel/setup.c
index c396cd0b425f..129c7cdda1ce 100644
--- a/arch/metag/kernel/setup.c
+++ b/arch/metag/kernel/setup.c
@@ -42,7 +42,6 @@
42#include <asm/mmu.h> 42#include <asm/mmu.h>
43#include <asm/mmzone.h> 43#include <asm/mmzone.h>
44#include <asm/processor.h> 44#include <asm/processor.h>
45#include <asm/prom.h>
46#include <asm/sections.h> 45#include <asm/sections.h>
47#include <asm/setup.h> 46#include <asm/setup.h>
48#include <asm/traps.h> 47#include <asm/traps.h>
@@ -115,7 +114,7 @@ extern u32 __dtb_start[];
115extern struct console dash_console; 114extern struct console dash_console;
116#endif 115#endif
117 116
118struct machine_desc *machine_desc __initdata; 117const struct machine_desc *machine_desc __initdata;
119 118
120/* 119/*
121 * Map a Linux CPU number to a hardware thread ID 120 * Map a Linux CPU number to a hardware thread ID
@@ -302,13 +301,9 @@ void __init setup_arch(char **cmdline_p)
302 * rather than the version from the bootloader. This makes call 301 * rather than the version from the bootloader. This makes call
303 * stacks easier to understand and may allow us to unmap the 302 * stacks easier to understand and may allow us to unmap the
304 * bootloader at some point. 303 * bootloader at some point.
305 *
306 * We need to keep the LWK handler that TBI installed in order to
307 * be able to do inter-thread comms.
308 */ 304 */
309 for (i = 0; i <= TBID_SIGNUM_MAX; i++) 305 for (i = 0; i <= TBID_SIGNUM_MAX; i++)
310 if (i != TBID_SIGNUM_LWK) 306 _pTBI->fnSigs[i] = __TBIUnExpXXX;
311 _pTBI->fnSigs[i] = __TBIUnExpXXX;
312 307
313 /* A Meta requirement is that the kernel is loaded (virtually) 308 /* A Meta requirement is that the kernel is loaded (virtually)
314 * at the PAGE_OFFSET. 309 * at the PAGE_OFFSET.
@@ -408,9 +403,7 @@ void __init setup_arch(char **cmdline_p)
408 cpu_2_hwthread_id[smp_processor_id()] = hard_processor_id(); 403 cpu_2_hwthread_id[smp_processor_id()] = hard_processor_id();
409 hwthread_id_2_cpu[hard_processor_id()] = smp_processor_id(); 404 hwthread_id_2_cpu[hard_processor_id()] = smp_processor_id();
410 405
411 /* Copy device tree blob into non-init memory before unflattening */ 406 unflatten_and_copy_device_tree();
412 copy_fdt();
413 unflatten_device_tree();
414 407
415#ifdef CONFIG_SMP 408#ifdef CONFIG_SMP
416 smp_init_cpus(); 409 smp_init_cpus();
diff --git a/arch/metag/kernel/traps.c b/arch/metag/kernel/traps.c
index 25f9d1c2ffec..17b2e2e38d5a 100644
--- a/arch/metag/kernel/traps.c
+++ b/arch/metag/kernel/traps.c
@@ -819,8 +819,7 @@ void per_cpu_trap_init(unsigned long cpu)
819 819
820 set_trigger_mask(TBI_INTS_INIT(thread) | /* interrupts */ 820 set_trigger_mask(TBI_INTS_INIT(thread) | /* interrupts */
821 TBI_TRIG_BIT(TBID_SIGNUM_LWK) | /* low level kick */ 821 TBI_TRIG_BIT(TBID_SIGNUM_LWK) | /* low level kick */
822 TBI_TRIG_BIT(TBID_SIGNUM_SW1) | 822 TBI_TRIG_BIT(TBID_SIGNUM_SW1));
823 TBI_TRIG_BIT(TBID_SIGNUM_SWS));
824 823
825 /* non-priv - use current stack */ 824 /* non-priv - use current stack */
826 int_context.Sig.pCtx = NULL; 825 int_context.Sig.pCtx = NULL;
@@ -842,7 +841,7 @@ void __init trap_init(void)
842 _pTBI->fnSigs[TBID_SIGNUM_SW1] = switch1_handler; 841 _pTBI->fnSigs[TBID_SIGNUM_SW1] = switch1_handler;
843 _pTBI->fnSigs[TBID_SIGNUM_SW2] = switchx_handler; 842 _pTBI->fnSigs[TBID_SIGNUM_SW2] = switchx_handler;
844 _pTBI->fnSigs[TBID_SIGNUM_SW3] = switchx_handler; 843 _pTBI->fnSigs[TBID_SIGNUM_SW3] = switchx_handler;
845 _pTBI->fnSigs[TBID_SIGNUM_SWK] = kick_handler; 844 _pTBI->fnSigs[TBID_SIGNUM_LWK] = kick_handler;
846 845
847#ifdef CONFIG_METAG_META21 846#ifdef CONFIG_METAG_META21
848 _pTBI->fnSigs[TBID_SIGNUM_DFR] = __TBIHandleDFR; 847 _pTBI->fnSigs[TBID_SIGNUM_DFR] = __TBIHandleDFR;
diff --git a/arch/metag/mm/init.c b/arch/metag/mm/init.c
index 123919534b80..249fff66add3 100644
--- a/arch/metag/mm/init.c
+++ b/arch/metag/mm/init.c
@@ -12,7 +12,6 @@
12#include <linux/percpu.h> 12#include <linux/percpu.h>
13#include <linux/memblock.h> 13#include <linux/memblock.h>
14#include <linux/initrd.h> 14#include <linux/initrd.h>
15#include <linux/of_fdt.h>
16 15
17#include <asm/setup.h> 16#include <asm/setup.h>
18#include <asm/page.h> 17#include <asm/page.h>
@@ -405,11 +404,3 @@ void free_initrd_mem(unsigned long start, unsigned long end)
405 "initrd"); 404 "initrd");
406} 405}
407#endif 406#endif
408
409#ifdef CONFIG_OF_FLATTREE
410void __init early_init_dt_setup_initrd_arch(u64 start, u64 end)
411{
412 pr_err("%s(%llx, %llx)\n",
413 __func__, start, end);
414}
415#endif /* CONFIG_OF_FLATTREE */
diff --git a/arch/metag/mm/numa.c b/arch/metag/mm/numa.c
index 9ae578c9b620..b172aa45fcf8 100644
--- a/arch/metag/mm/numa.c
+++ b/arch/metag/mm/numa.c
@@ -34,7 +34,7 @@ void __init setup_bootmem_node(int nid, unsigned long start, unsigned long end)
34 unsigned long pgdat_paddr; 34 unsigned long pgdat_paddr;
35 35
36 /* Don't allow bogus node assignment */ 36 /* Don't allow bogus node assignment */
37 BUG_ON(nid > MAX_NUMNODES || nid <= 0); 37 BUG_ON(nid >= MAX_NUMNODES || nid <= 0);
38 38
39 start_pfn = start >> PAGE_SHIFT; 39 start_pfn = start >> PAGE_SHIFT;
40 end_pfn = end >> PAGE_SHIFT; 40 end_pfn = end >> PAGE_SHIFT;
diff --git a/arch/metag/tbx/tbidefr.S b/arch/metag/tbx/tbidefr.S
index 3eb165ebf540..8f0902b22f70 100644
--- a/arch/metag/tbx/tbidefr.S
+++ b/arch/metag/tbx/tbidefr.S
@@ -20,7 +20,7 @@
20/* D1Ar1:D0Ar2 -- State 20/* D1Ar1:D0Ar2 -- State
21 * D0Ar3 -- SigNum 21 * D0Ar3 -- SigNum
22 * D0Ar4 -- Triggers 22 * D0Ar4 -- Triggers
23 * D1Ar5 -- InstOrSWSId 23 * D1Ar5 -- Inst
24 * D0Ar6 -- pTBI (volatile) 24 * D0Ar6 -- pTBI (volatile)
25 */ 25 */
26___TBIHandleDFR: 26___TBIHandleDFR:
diff --git a/arch/microblaze/Kconfig b/arch/microblaze/Kconfig
index b82f82b74319..655e1cadf692 100644
--- a/arch/microblaze/Kconfig
+++ b/arch/microblaze/Kconfig
@@ -82,11 +82,6 @@ config MMU
82 bool "MMU support" 82 bool "MMU support"
83 default n 83 default n
84 84
85config NO_MMU
86 bool
87 depends on !MMU
88 default y
89
90comment "Boot options" 85comment "Boot options"
91 86
92config CMDLINE_BOOL 87config CMDLINE_BOOL
@@ -250,10 +245,6 @@ config MICROBLAZE_64K_PAGES
250 245
251endchoice 246endchoice
252 247
253config KERNEL_PAD
254 hex "Kernel PAD for unpacking" if ADVANCED_OPTIONS
255 default "0x80000" if MMU
256
257endmenu 248endmenu
258 249
259source "mm/Kconfig" 250source "mm/Kconfig"
diff --git a/arch/microblaze/boot/dts/Makefile b/arch/microblaze/boot/dts/Makefile
index c3b3a5d67b89..c4982d16e555 100644
--- a/arch/microblaze/boot/dts/Makefile
+++ b/arch/microblaze/boot/dts/Makefile
@@ -1,6 +1,4 @@
1# 1#
2# arch/microblaze/boot/Makefile
3#
4 2
5obj-y += linked_dtb.o 3obj-y += linked_dtb.o
6 4
diff --git a/arch/microblaze/include/asm/Kbuild b/arch/microblaze/include/asm/Kbuild
index d3c51a6a601d..ce0bbf8f5640 100644
--- a/arch/microblaze/include/asm/Kbuild
+++ b/arch/microblaze/include/asm/Kbuild
@@ -3,3 +3,4 @@ generic-y += clkdev.h
3generic-y += exec.h 3generic-y += exec.h
4generic-y += trace_clock.h 4generic-y += trace_clock.h
5generic-y += syscalls.h 5generic-y += syscalls.h
6generic-y += preempt.h
diff --git a/arch/microblaze/include/asm/pci.h b/arch/microblaze/include/asm/pci.h
index d52abb6812fa..935f9bec414a 100644
--- a/arch/microblaze/include/asm/pci.h
+++ b/arch/microblaze/include/asm/pci.h
@@ -127,8 +127,6 @@ extern void of_scan_pci_bridge(struct device_node *node,
127extern void of_scan_bus(struct device_node *node, struct pci_bus *bus); 127extern void of_scan_bus(struct device_node *node, struct pci_bus *bus);
128extern void of_rescan_bus(struct device_node *node, struct pci_bus *bus); 128extern void of_rescan_bus(struct device_node *node, struct pci_bus *bus);
129 129
130extern int pci_read_irq_line(struct pci_dev *dev);
131
132extern int pci_bus_find_capability(struct pci_bus *bus, 130extern int pci_bus_find_capability(struct pci_bus *bus,
133 unsigned int devfn, int cap); 131 unsigned int devfn, int cap);
134 132
diff --git a/arch/microblaze/include/asm/prom.h b/arch/microblaze/include/asm/prom.h
index 9977816c5ad3..2f03ac815851 100644
--- a/arch/microblaze/include/asm/prom.h
+++ b/arch/microblaze/include/asm/prom.h
@@ -11,19 +11,10 @@
11 * as published by the Free Software Foundation; either version 11 * as published by the Free Software Foundation; either version
12 * 2 of the License, or (at your option) any later version. 12 * 2 of the License, or (at your option) any later version.
13 */ 13 */
14
15#include <linux/of.h> /* linux/of.h gets to determine #include ordering */
16
17#ifndef _ASM_MICROBLAZE_PROM_H 14#ifndef _ASM_MICROBLAZE_PROM_H
18#define _ASM_MICROBLAZE_PROM_H 15#define _ASM_MICROBLAZE_PROM_H
19#ifdef __KERNEL__
20#ifndef __ASSEMBLY__
21
22#include <linux/types.h>
23#include <asm/irq.h>
24#include <linux/atomic.h>
25 16
26#define HAVE_ARCH_DEVTREE_FIXUPS 17#include <linux/of.h>
27 18
28/* Other Prototypes */ 19/* Other Prototypes */
29enum early_consoles { 20enum early_consoles {
@@ -33,32 +24,4 @@ enum early_consoles {
33 24
34extern int of_early_console(void *version); 25extern int of_early_console(void *version);
35 26
36/*
37 * OF address retreival & translation
38 */
39
40#ifdef CONFIG_PCI
41extern unsigned long pci_address_to_pio(phys_addr_t address);
42#define pci_address_to_pio pci_address_to_pio
43#endif /* CONFIG_PCI */
44
45/* Parse the ibm,dma-window property of an OF node into the busno, phys and
46 * size parameters.
47 */
48void of_parse_dma_window(struct device_node *dn, const void *dma_window_prop,
49 unsigned long *busno, unsigned long *phys, unsigned long *size);
50
51extern void kdump_move_device_tree(void);
52
53#endif /* __ASSEMBLY__ */
54#endif /* __KERNEL__ */
55
56/* These includes are put at the bottom because they may contain things
57 * that are overridden by this file. Ideally they shouldn't be included
58 * by this file, but there are a bunch of .c files that currently depend
59 * on it. Eventually they will be cleaned up. */
60#include <linux/of_fdt.h>
61#include <linux/of_irq.h>
62#include <linux/platform_device.h>
63
64#endif /* _ASM_MICROBLAZE_PROM_H */ 27#endif /* _ASM_MICROBLAZE_PROM_H */
diff --git a/arch/microblaze/kernel/head.S b/arch/microblaze/kernel/head.S
index fcc797feb9db..817b7eec95b6 100644
--- a/arch/microblaze/kernel/head.S
+++ b/arch/microblaze/kernel/head.S
@@ -176,7 +176,7 @@ _invalidate:
176 /* start to do TLB calculation */ 176 /* start to do TLB calculation */
177 addik r12, r0, _end 177 addik r12, r0, _end
178 rsub r12, r3, r12 178 rsub r12, r3, r12
179 addik r12, r12, CONFIG_KERNEL_PAD /* that's the pad */ 179 addik r12, r12, CONFIG_LOWMEM_SIZE >> PTE_SHIFT /* that's the pad */
180 180
181 or r9, r0, r0 /* TLB0 = 0 */ 181 or r9, r0, r0 /* TLB0 = 0 */
182 or r10, r0, r0 /* TLB1 = 0 */ 182 or r10, r0, r0 /* TLB1 = 0 */
diff --git a/arch/microblaze/kernel/hw_exception_handler.S b/arch/microblaze/kernel/hw_exception_handler.S
index 61b3a1fed46f..fc6b89f4dd31 100644
--- a/arch/microblaze/kernel/hw_exception_handler.S
+++ b/arch/microblaze/kernel/hw_exception_handler.S
@@ -193,8 +193,8 @@
193 * - W S REG EXC 193 * - W S REG EXC
194 * 194 *
195 * 195 *
196 * STACK FRAME STRUCTURE (for NO_MMU) 196 * STACK FRAME STRUCTURE (for CONFIG_MMU=n)
197 * --------------------------------- 197 * ----------------------------------------
198 * 198 *
199 * +-------------+ + 0 199 * +-------------+ + 0
200 * | MSR | 200 * | MSR |
diff --git a/arch/microblaze/kernel/prom.c b/arch/microblaze/kernel/prom.c
index 0c4453f134cb..abdfb10e7eca 100644
--- a/arch/microblaze/kernel/prom.c
+++ b/arch/microblaze/kernel/prom.c
@@ -30,6 +30,7 @@
30#include <linux/debugfs.h> 30#include <linux/debugfs.h>
31#include <linux/irq.h> 31#include <linux/irq.h>
32#include <linux/memblock.h> 32#include <linux/memblock.h>
33#include <linux/of_fdt.h>
33 34
34#include <asm/prom.h> 35#include <asm/prom.h>
35#include <asm/page.h> 36#include <asm/page.h>
@@ -41,11 +42,6 @@
41#include <asm/sections.h> 42#include <asm/sections.h>
42#include <asm/pci-bridge.h> 43#include <asm/pci-bridge.h>
43 44
44void __init early_init_dt_add_memory_arch(u64 base, u64 size)
45{
46 memblock_add(base, size);
47}
48
49#ifdef CONFIG_EARLY_PRINTK 45#ifdef CONFIG_EARLY_PRINTK
50static char *stdout; 46static char *stdout;
51 47
@@ -106,21 +102,10 @@ void __init early_init_devtree(void *params)
106{ 102{
107 pr_debug(" -> early_init_devtree(%p)\n", params); 103 pr_debug(" -> early_init_devtree(%p)\n", params);
108 104
109 /* Setup flat device-tree pointer */ 105 early_init_dt_scan(params);
110 initial_boot_params = params; 106 if (!strlen(boot_command_line))
111 107 strlcpy(boot_command_line, cmd_line, COMMAND_LINE_SIZE);
112 /* Retrieve various informations from the /chosen node of the
113 * device-tree, including the platform type, initrd location and
114 * size, TCE reserve, and more ...
115 */
116 of_scan_flat_dt(early_init_dt_scan_chosen, cmd_line);
117
118 /* Scan memory nodes and rebuild MEMBLOCKs */
119 of_scan_flat_dt(early_init_dt_scan_root, NULL);
120 of_scan_flat_dt(early_init_dt_scan_memory, NULL);
121 108
122 /* Save command line for /proc/cmdline and then parse parameters */
123 strlcpy(boot_command_line, cmd_line, COMMAND_LINE_SIZE);
124 parse_early_param(); 109 parse_early_param();
125 110
126 memblock_allow_resize(); 111 memblock_allow_resize();
@@ -130,15 +115,6 @@ void __init early_init_devtree(void *params)
130 pr_debug(" <- early_init_devtree()\n"); 115 pr_debug(" <- early_init_devtree()\n");
131} 116}
132 117
133#ifdef CONFIG_BLK_DEV_INITRD
134void __init early_init_dt_setup_initrd_arch(u64 start, u64 end)
135{
136 initrd_start = (unsigned long)__va(start);
137 initrd_end = (unsigned long)__va(end);
138 initrd_below_start_ok = 1;
139}
140#endif
141
142/******* 118/*******
143 * 119 *
144 * New implementation of the OF "find" APIs, return a refcounted 120 * New implementation of the OF "find" APIs, return a refcounted
diff --git a/arch/microblaze/kernel/setup.c b/arch/microblaze/kernel/setup.c
index 0775e036c526..8de8ebc309f1 100644
--- a/arch/microblaze/kernel/setup.c
+++ b/arch/microblaze/kernel/setup.c
@@ -16,6 +16,7 @@
16#include <linux/initrd.h> 16#include <linux/initrd.h>
17#include <linux/console.h> 17#include <linux/console.h>
18#include <linux/debugfs.h> 18#include <linux/debugfs.h>
19#include <linux/of_fdt.h>
19 20
20#include <asm/setup.h> 21#include <asm/setup.h>
21#include <asm/sections.h> 22#include <asm/sections.h>
@@ -50,7 +51,7 @@ char cmd_line[COMMAND_LINE_SIZE] __attribute__ ((section(".data")));
50 51
51void __init setup_arch(char **cmdline_p) 52void __init setup_arch(char **cmdline_p)
52{ 53{
53 *cmdline_p = cmd_line; 54 *cmdline_p = boot_command_line;
54 55
55 console_verbose(); 56 console_verbose();
56 57
diff --git a/arch/microblaze/kernel/sys_microblaze.c b/arch/microblaze/kernel/sys_microblaze.c
index f905b3ae68c7..f1e1f666ddde 100644
--- a/arch/microblaze/kernel/sys_microblaze.c
+++ b/arch/microblaze/kernel/sys_microblaze.c
@@ -33,12 +33,23 @@
33#include <linux/slab.h> 33#include <linux/slab.h>
34#include <asm/syscalls.h> 34#include <asm/syscalls.h>
35 35
36asmlinkage long sys_mmap(unsigned long addr, unsigned long len, 36SYSCALL_DEFINE6(mmap, unsigned long, addr, unsigned long, len,
37 unsigned long prot, unsigned long flags, 37 unsigned long, prot, unsigned long, flags, unsigned long, fd,
38 unsigned long fd, off_t pgoff) 38 off_t, pgoff)
39{ 39{
40 if (pgoff & ~PAGE_MASK) 40 if (pgoff & ~PAGE_MASK)
41 return -EINVAL; 41 return -EINVAL;
42 42
43 return sys_mmap_pgoff(addr, len, prot, flags, fd, pgoff >> PAGE_SHIFT); 43 return sys_mmap_pgoff(addr, len, prot, flags, fd, pgoff >> PAGE_SHIFT);
44} 44}
45
46SYSCALL_DEFINE6(mmap2, unsigned long, addr, unsigned long, len,
47 unsigned long, prot, unsigned long, flags, unsigned long, fd,
48 unsigned long, pgoff)
49{
50 if (pgoff & (~PAGE_MASK >> 12))
51 return -EINVAL;
52
53 return sys_mmap_pgoff(addr, len, prot, flags, fd,
54 pgoff >> (PAGE_SHIFT - 12));
55}
diff --git a/arch/microblaze/kernel/syscall_table.S b/arch/microblaze/kernel/syscall_table.S
index 4fca56cf02f6..b882ad50535b 100644
--- a/arch/microblaze/kernel/syscall_table.S
+++ b/arch/microblaze/kernel/syscall_table.S
@@ -192,7 +192,7 @@ ENTRY(sys_call_table)
192 .long sys_ni_syscall /* reserved for streams2 */ 192 .long sys_ni_syscall /* reserved for streams2 */
193 .long sys_vfork /* 190 */ 193 .long sys_vfork /* 190 */
194 .long sys_getrlimit 194 .long sys_getrlimit
195 .long sys_mmap_pgoff /* mmap2 */ 195 .long sys_mmap2
196 .long sys_truncate64 196 .long sys_truncate64
197 .long sys_ftruncate64 197 .long sys_ftruncate64
198 .long sys_stat64 /* 195 */ 198 .long sys_stat64 /* 195 */
diff --git a/arch/microblaze/kernel/timer.c b/arch/microblaze/kernel/timer.c
index e4b3f33ef34c..3e39b1082fdf 100644
--- a/arch/microblaze/kernel/timer.c
+++ b/arch/microblaze/kernel/timer.c
@@ -15,6 +15,7 @@
15#include <linux/clk.h> 15#include <linux/clk.h>
16#include <linux/clockchips.h> 16#include <linux/clockchips.h>
17#include <linux/of_address.h> 17#include <linux/of_address.h>
18#include <linux/of_irq.h>
18#include <asm/cpuinfo.h> 19#include <asm/cpuinfo.h>
19#include <linux/cnt32_to_63.h> 20#include <linux/cnt32_to_63.h>
20 21
@@ -148,7 +149,7 @@ static irqreturn_t timer_interrupt(int irq, void *dev_id)
148 149
149static struct irqaction timer_irqaction = { 150static struct irqaction timer_irqaction = {
150 .handler = timer_interrupt, 151 .handler = timer_interrupt,
151 .flags = IRQF_DISABLED | IRQF_TIMER, 152 .flags = IRQF_TIMER,
152 .name = "timer", 153 .name = "timer",
153 .dev_id = &clockevent_xilinx_timer, 154 .dev_id = &clockevent_xilinx_timer,
154}; 155};
diff --git a/arch/microblaze/pci/pci-common.c b/arch/microblaze/pci/pci-common.c
index 1b93bf0892a0..66804adcacf0 100644
--- a/arch/microblaze/pci/pci-common.c
+++ b/arch/microblaze/pci/pci-common.c
@@ -29,6 +29,7 @@
29#include <linux/slab.h> 29#include <linux/slab.h>
30#include <linux/of.h> 30#include <linux/of.h>
31#include <linux/of_address.h> 31#include <linux/of_address.h>
32#include <linux/of_irq.h>
32#include <linux/of_pci.h> 33#include <linux/of_pci.h>
33#include <linux/export.h> 34#include <linux/export.h>
34 35
@@ -193,76 +194,6 @@ void pcibios_set_master(struct pci_dev *dev)
193} 194}
194 195
195/* 196/*
196 * Reads the interrupt pin to determine if interrupt is use by card.
197 * If the interrupt is used, then gets the interrupt line from the
198 * openfirmware and sets it in the pci_dev and pci_config line.
199 */
200int pci_read_irq_line(struct pci_dev *pci_dev)
201{
202 struct of_irq oirq;
203 unsigned int virq;
204
205 /* The current device-tree that iSeries generates from the HV
206 * PCI informations doesn't contain proper interrupt routing,
207 * and all the fallback would do is print out crap, so we
208 * don't attempt to resolve the interrupts here at all, some
209 * iSeries specific fixup does it.
210 *
211 * In the long run, we will hopefully fix the generated device-tree
212 * instead.
213 */
214 pr_debug("PCI: Try to map irq for %s...\n", pci_name(pci_dev));
215
216#ifdef DEBUG
217 memset(&oirq, 0xff, sizeof(oirq));
218#endif
219 /* Try to get a mapping from the device-tree */
220 if (of_irq_map_pci(pci_dev, &oirq)) {
221 u8 line, pin;
222
223 /* If that fails, lets fallback to what is in the config
224 * space and map that through the default controller. We
225 * also set the type to level low since that's what PCI
226 * interrupts are. If your platform does differently, then
227 * either provide a proper interrupt tree or don't use this
228 * function.
229 */
230 if (pci_read_config_byte(pci_dev, PCI_INTERRUPT_PIN, &pin))
231 return -1;
232 if (pin == 0)
233 return -1;
234 if (pci_read_config_byte(pci_dev, PCI_INTERRUPT_LINE, &line) ||
235 line == 0xff || line == 0) {
236 return -1;
237 }
238 pr_debug(" No map ! Using line %d (pin %d) from PCI config\n",
239 line, pin);
240
241 virq = irq_create_mapping(NULL, line);
242 if (virq)
243 irq_set_irq_type(virq, IRQ_TYPE_LEVEL_LOW);
244 } else {
245 pr_debug(" Got one, spec %d cells (0x%08x 0x%08x...) on %s\n",
246 oirq.size, oirq.specifier[0], oirq.specifier[1],
247 of_node_full_name(oirq.controller));
248
249 virq = irq_create_of_mapping(oirq.controller, oirq.specifier,
250 oirq.size);
251 }
252 if (!virq) {
253 pr_debug(" Failed to map !\n");
254 return -1;
255 }
256
257 pr_debug(" Mapped to linux irq %d\n", virq);
258
259 pci_dev->irq = virq;
260
261 return 0;
262}
263EXPORT_SYMBOL(pci_read_irq_line);
264
265/*
266 * Platform support for /proc/bus/pci/X/Y mmap()s, 197 * Platform support for /proc/bus/pci/X/Y mmap()s,
267 * modelled on the sparc64 implementation by Dave Miller. 198 * modelled on the sparc64 implementation by Dave Miller.
268 * -- paulus. 199 * -- paulus.
@@ -960,7 +891,7 @@ void pcibios_setup_bus_devices(struct pci_bus *bus)
960 dev->dev.archdata.dma_data = (void *)PCI_DRAM_OFFSET; 891 dev->dev.archdata.dma_data = (void *)PCI_DRAM_OFFSET;
961 892
962 /* Read default IRQs and fixup if necessary */ 893 /* Read default IRQs and fixup if necessary */
963 pci_read_irq_line(dev); 894 dev->irq = of_irq_parse_and_map_pci(dev, 0, 0);
964 } 895 }
965} 896}
966 897
diff --git a/arch/mips/include/asm/Kbuild b/arch/mips/include/asm/Kbuild
index 454ddf9bb76f..1acbb8b77a71 100644
--- a/arch/mips/include/asm/Kbuild
+++ b/arch/mips/include/asm/Kbuild
@@ -11,5 +11,6 @@ generic-y += sections.h
11generic-y += segment.h 11generic-y += segment.h
12generic-y += serial.h 12generic-y += serial.h
13generic-y += trace_clock.h 13generic-y += trace_clock.h
14generic-y += preempt.h
14generic-y += ucontext.h 15generic-y += ucontext.h
15generic-y += xor.h 16generic-y += xor.h
diff --git a/arch/mips/include/asm/netlogic/xlp-hal/xlp.h b/arch/mips/include/asm/netlogic/xlp-hal/xlp.h
index 17daffb280a3..470f2095b346 100644
--- a/arch/mips/include/asm/netlogic/xlp-hal/xlp.h
+++ b/arch/mips/include/asm/netlogic/xlp-hal/xlp.h
@@ -69,6 +69,7 @@ void nlm_hal_init(void);
69int xlp_get_dram_map(int n, uint64_t *dram_map); 69int xlp_get_dram_map(int n, uint64_t *dram_map);
70 70
71/* Device tree related */ 71/* Device tree related */
72void xlp_early_init_devtree(void);
72void *xlp_dt_init(void *fdtp); 73void *xlp_dt_init(void *fdtp);
73 74
74static inline int cpu_is_xlpii(void) 75static inline int cpu_is_xlpii(void)
diff --git a/arch/mips/include/asm/prom.h b/arch/mips/include/asm/prom.h
index 1e7e0961064b..ccd2b75f152c 100644
--- a/arch/mips/include/asm/prom.h
+++ b/arch/mips/include/asm/prom.h
@@ -17,22 +17,8 @@
17#include <linux/types.h> 17#include <linux/types.h>
18#include <asm/bootinfo.h> 18#include <asm/bootinfo.h>
19 19
20extern int early_init_dt_scan_memory_arch(unsigned long node,
21 const char *uname, int depth, void *data);
22
23extern void device_tree_init(void); 20extern void device_tree_init(void);
24 21
25static inline unsigned long pci_address_to_pio(phys_addr_t address)
26{
27 /*
28 * The ioport address can be directly used by inX() / outX()
29 */
30 BUG_ON(address > IO_SPACE_LIMIT);
31
32 return (unsigned long) address;
33}
34#define pci_address_to_pio pci_address_to_pio
35
36struct boot_param_header; 22struct boot_param_header;
37 23
38extern void __dt_setup_arch(struct boot_param_header *bph); 24extern void __dt_setup_arch(struct boot_param_header *bph);
diff --git a/arch/mips/kernel/prom.c b/arch/mips/kernel/prom.c
index 0fa0b69cdd53..3c3b0df8f48d 100644
--- a/arch/mips/kernel/prom.c
+++ b/arch/mips/kernel/prom.c
@@ -13,12 +13,9 @@
13#include <linux/errno.h> 13#include <linux/errno.h>
14#include <linux/types.h> 14#include <linux/types.h>
15#include <linux/bootmem.h> 15#include <linux/bootmem.h>
16#include <linux/initrd.h>
17#include <linux/debugfs.h> 16#include <linux/debugfs.h>
18#include <linux/of.h> 17#include <linux/of.h>
19#include <linux/of_fdt.h> 18#include <linux/of_fdt.h>
20#include <linux/of_irq.h>
21#include <linux/of_platform.h>
22 19
23#include <asm/page.h> 20#include <asm/page.h>
24#include <asm/prom.h> 21#include <asm/prom.h>
@@ -40,13 +37,6 @@ char *mips_get_machine_name(void)
40} 37}
41 38
42#ifdef CONFIG_OF 39#ifdef CONFIG_OF
43int __init early_init_dt_scan_memory_arch(unsigned long node,
44 const char *uname, int depth,
45 void *data)
46{
47 return early_init_dt_scan_memory(node, uname, depth, data);
48}
49
50void __init early_init_dt_add_memory_arch(u64 base, u64 size) 40void __init early_init_dt_add_memory_arch(u64 base, u64 size)
51{ 41{
52 return add_memory_region(base, size, BOOT_MEM_RAM); 42 return add_memory_region(base, size, BOOT_MEM_RAM);
@@ -57,57 +47,11 @@ void * __init early_init_dt_alloc_memory_arch(u64 size, u64 align)
57 return __alloc_bootmem(size, align, __pa(MAX_DMA_ADDRESS)); 47 return __alloc_bootmem(size, align, __pa(MAX_DMA_ADDRESS));
58} 48}
59 49
60#ifdef CONFIG_BLK_DEV_INITRD
61void __init early_init_dt_setup_initrd_arch(u64 start, u64 end)
62{
63 initrd_start = (unsigned long)__va(start);
64 initrd_end = (unsigned long)__va(end);
65 initrd_below_start_ok = 1;
66}
67#endif
68
69int __init early_init_dt_scan_model(unsigned long node, const char *uname,
70 int depth, void *data)
71{
72 if (!depth) {
73 char *model = of_get_flat_dt_prop(node, "model", NULL);
74
75 if (model)
76 mips_set_machine_name(model);
77 }
78 return 0;
79}
80
81void __init early_init_devtree(void *params)
82{
83 /* Setup flat device-tree pointer */
84 initial_boot_params = params;
85
86 /* Retrieve various informations from the /chosen node of the
87 * device-tree, including the platform type, initrd location and
88 * size, and more ...
89 */
90 of_scan_flat_dt(early_init_dt_scan_chosen, arcs_cmdline);
91
92
93 /* Scan memory nodes */
94 of_scan_flat_dt(early_init_dt_scan_root, NULL);
95 of_scan_flat_dt(early_init_dt_scan_memory_arch, NULL);
96
97 /* try to load the mips machine name */
98 of_scan_flat_dt(early_init_dt_scan_model, NULL);
99}
100
101void __init __dt_setup_arch(struct boot_param_header *bph) 50void __init __dt_setup_arch(struct boot_param_header *bph)
102{ 51{
103 if (be32_to_cpu(bph->magic) != OF_DT_HEADER) { 52 if (!early_init_dt_scan(bph))
104 pr_err("DTB has bad magic, ignoring builtin OF DTB\n");
105
106 return; 53 return;
107 }
108
109 initial_boot_params = bph;
110 54
111 early_init_devtree(initial_boot_params); 55 mips_set_machine_name(of_flat_dt_get_machine_name());
112} 56}
113#endif 57#endif
diff --git a/arch/mips/kernel/rtlx.c b/arch/mips/kernel/rtlx.c
index d763f11e35e2..2c12ea1668d1 100644
--- a/arch/mips/kernel/rtlx.c
+++ b/arch/mips/kernel/rtlx.c
@@ -172,8 +172,9 @@ int rtlx_open(int index, int can_sleep)
172 if (rtlx == NULL) { 172 if (rtlx == NULL) {
173 if( (p = vpe_get_shared(tclimit)) == NULL) { 173 if( (p = vpe_get_shared(tclimit)) == NULL) {
174 if (can_sleep) { 174 if (can_sleep) {
175 __wait_event_interruptible(channel_wqs[index].lx_queue, 175 ret = __wait_event_interruptible(
176 (p = vpe_get_shared(tclimit)), ret); 176 channel_wqs[index].lx_queue,
177 (p = vpe_get_shared(tclimit)));
177 if (ret) 178 if (ret)
178 goto out_fail; 179 goto out_fail;
179 } else { 180 } else {
@@ -263,11 +264,10 @@ unsigned int rtlx_read_poll(int index, int can_sleep)
263 /* data available to read? */ 264 /* data available to read? */
264 if (chan->lx_read == chan->lx_write) { 265 if (chan->lx_read == chan->lx_write) {
265 if (can_sleep) { 266 if (can_sleep) {
266 int ret = 0; 267 int ret = __wait_event_interruptible(
267 268 channel_wqs[index].lx_queue,
268 __wait_event_interruptible(channel_wqs[index].lx_queue,
269 (chan->lx_read != chan->lx_write) || 269 (chan->lx_read != chan->lx_write) ||
270 sp_stopping, ret); 270 sp_stopping);
271 if (ret) 271 if (ret)
272 return ret; 272 return ret;
273 273
@@ -440,14 +440,13 @@ static ssize_t file_write(struct file *file, const char __user * buffer,
440 440
441 /* any space left... */ 441 /* any space left... */
442 if (!rtlx_write_poll(minor)) { 442 if (!rtlx_write_poll(minor)) {
443 int ret = 0; 443 int ret;
444 444
445 if (file->f_flags & O_NONBLOCK) 445 if (file->f_flags & O_NONBLOCK)
446 return -EAGAIN; 446 return -EAGAIN;
447 447
448 __wait_event_interruptible(channel_wqs[minor].rt_queue, 448 ret = __wait_event_interruptible(channel_wqs[minor].rt_queue,
449 rtlx_write_poll(minor), 449 rtlx_write_poll(minor));
450 ret);
451 if (ret) 450 if (ret)
452 return ret; 451 return ret;
453 } 452 }
diff --git a/arch/mips/lantiq/prom.c b/arch/mips/lantiq/prom.c
index 49c460370285..19686c5bc5ed 100644
--- a/arch/mips/lantiq/prom.c
+++ b/arch/mips/lantiq/prom.c
@@ -14,6 +14,7 @@
14 14
15#include <asm/bootinfo.h> 15#include <asm/bootinfo.h>
16#include <asm/time.h> 16#include <asm/time.h>
17#include <asm/prom.h>
17 18
18#include <lantiq.h> 19#include <lantiq.h>
19 20
diff --git a/arch/mips/mm/init.c b/arch/mips/mm/init.c
index e205ef598e97..12156176c7ca 100644
--- a/arch/mips/mm/init.c
+++ b/arch/mips/mm/init.c
@@ -124,7 +124,7 @@ void *kmap_coherent(struct page *page, unsigned long addr)
124 124
125 BUG_ON(Page_dcache_dirty(page)); 125 BUG_ON(Page_dcache_dirty(page));
126 126
127 inc_preempt_count(); 127 pagefault_disable();
128 idx = (addr >> PAGE_SHIFT) & (FIX_N_COLOURS - 1); 128 idx = (addr >> PAGE_SHIFT) & (FIX_N_COLOURS - 1);
129#ifdef CONFIG_MIPS_MT_SMTC 129#ifdef CONFIG_MIPS_MT_SMTC
130 idx += FIX_N_COLOURS * smp_processor_id() + 130 idx += FIX_N_COLOURS * smp_processor_id() +
@@ -193,8 +193,7 @@ void kunmap_coherent(void)
193 write_c0_entryhi(old_ctx); 193 write_c0_entryhi(old_ctx);
194 EXIT_CRITICAL(flags); 194 EXIT_CRITICAL(flags);
195#endif 195#endif
196 dec_preempt_count(); 196 pagefault_enable();
197 preempt_check_resched();
198} 197}
199 198
200void copy_user_highpage(struct page *to, struct page *from, 199void copy_user_highpage(struct page *to, struct page *from,
diff --git a/arch/mips/mti-sead3/sead3-setup.c b/arch/mips/mti-sead3/sead3-setup.c
index b5059dc899f4..928ba84c8a78 100644
--- a/arch/mips/mti-sead3/sead3-setup.c
+++ b/arch/mips/mti-sead3/sead3-setup.c
@@ -10,6 +10,8 @@
10#include <linux/of_fdt.h> 10#include <linux/of_fdt.h>
11#include <linux/bootmem.h> 11#include <linux/bootmem.h>
12 12
13#include <asm/prom.h>
14
13#include <asm/mips-boards/generic.h> 15#include <asm/mips-boards/generic.h>
14 16
15const char *get_system_type(void) 17const char *get_system_type(void)
diff --git a/arch/mips/netlogic/xlp/dt.c b/arch/mips/netlogic/xlp/dt.c
index 88df445dda76..8316d5454b17 100644
--- a/arch/mips/netlogic/xlp/dt.c
+++ b/arch/mips/netlogic/xlp/dt.c
@@ -39,8 +39,11 @@
39#include <linux/of_platform.h> 39#include <linux/of_platform.h>
40#include <linux/of_device.h> 40#include <linux/of_device.h>
41 41
42#include <asm/prom.h>
43
42extern u32 __dtb_xlp_evp_begin[], __dtb_xlp_svp_begin[], 44extern u32 __dtb_xlp_evp_begin[], __dtb_xlp_svp_begin[],
43 __dtb_xlp_fvp_begin[], __dtb_start[]; 45 __dtb_xlp_fvp_begin[], __dtb_start[];
46static void *xlp_fdt_blob;
44 47
45void __init *xlp_dt_init(void *fdtp) 48void __init *xlp_dt_init(void *fdtp)
46{ 49{
@@ -67,19 +70,26 @@ void __init *xlp_dt_init(void *fdtp)
67 break; 70 break;
68 } 71 }
69 } 72 }
70 initial_boot_params = fdtp; 73 xlp_fdt_blob = fdtp;
71 return fdtp; 74 return fdtp;
72} 75}
73 76
77void __init xlp_early_init_devtree(void)
78{
79 __dt_setup_arch(xlp_fdt_blob);
80 strlcpy(arcs_cmdline, boot_command_line, COMMAND_LINE_SIZE);
81}
82
74void __init device_tree_init(void) 83void __init device_tree_init(void)
75{ 84{
76 unsigned long base, size; 85 unsigned long base, size;
86 struct boot_param_header *fdtp = xlp_fdt_blob;
77 87
78 if (!initial_boot_params) 88 if (!fdtp)
79 return; 89 return;
80 90
81 base = virt_to_phys((void *)initial_boot_params); 91 base = virt_to_phys(fdtp);
82 size = be32_to_cpu(initial_boot_params->totalsize); 92 size = be32_to_cpu(fdtp->totalsize);
83 93
84 /* Before we do anything, lets reserve the dt blob */ 94 /* Before we do anything, lets reserve the dt blob */
85 reserve_bootmem(base, size, BOOTMEM_DEFAULT); 95 reserve_bootmem(base, size, BOOTMEM_DEFAULT);
diff --git a/arch/mips/netlogic/xlp/setup.c b/arch/mips/netlogic/xlp/setup.c
index 76a7131e486e..6d981bb337ec 100644
--- a/arch/mips/netlogic/xlp/setup.c
+++ b/arch/mips/netlogic/xlp/setup.c
@@ -98,7 +98,7 @@ void __init plat_mem_setup(void)
98 pm_power_off = nlm_linux_exit; 98 pm_power_off = nlm_linux_exit;
99 99
100 /* memory and bootargs from DT */ 100 /* memory and bootargs from DT */
101 early_init_devtree(initial_boot_params); 101 xlp_early_init_devtree();
102 102
103 if (boot_mem_map.nr_map == 0) { 103 if (boot_mem_map.nr_map == 0) {
104 pr_info("Using DRAM BARs for memory map.\n"); 104 pr_info("Using DRAM BARs for memory map.\n");
diff --git a/arch/mips/pci/fixup-lantiq.c b/arch/mips/pci/fixup-lantiq.c
index 6c829df28dc7..c2ce41ea61d7 100644
--- a/arch/mips/pci/fixup-lantiq.c
+++ b/arch/mips/pci/fixup-lantiq.c
@@ -25,16 +25,5 @@ int pcibios_plat_dev_init(struct pci_dev *dev)
25 25
26int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) 26int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
27{ 27{
28 struct of_irq dev_irq; 28 return of_irq_parse_and_map_pci(dev, slot, pin);
29 int irq;
30
31 if (of_irq_map_pci(dev, &dev_irq)) {
32 dev_err(&dev->dev, "trying to map irq for unknown slot:%d pin:%d\n",
33 slot, pin);
34 return 0;
35 }
36 irq = irq_create_of_mapping(dev_irq.controller, dev_irq.specifier,
37 dev_irq.size);
38 dev_info(&dev->dev, "SLOT:%d PIN:%d IRQ:%d\n", slot, pin, irq);
39 return irq;
40} 29}
diff --git a/arch/mips/pci/pci-rt3883.c b/arch/mips/pci/pci-rt3883.c
index 95c9d41382e7..adeff2bfe4cd 100644
--- a/arch/mips/pci/pci-rt3883.c
+++ b/arch/mips/pci/pci-rt3883.c
@@ -583,29 +583,7 @@ err_put_intc_node:
583 583
584int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) 584int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
585{ 585{
586 struct of_irq dev_irq; 586 return of_irq_parse_and_map_pci(dev, slot, pin);
587 int err;
588 int irq;
589
590 err = of_irq_map_pci(dev, &dev_irq);
591 if (err) {
592 pr_err("pci %s: unable to get irq map, err=%d\n",
593 pci_name((struct pci_dev *) dev), err);
594 return 0;
595 }
596
597 irq = irq_create_of_mapping(dev_irq.controller,
598 dev_irq.specifier,
599 dev_irq.size);
600
601 if (irq == 0)
602 pr_crit("pci %s: no irq found for pin %u\n",
603 pci_name((struct pci_dev *) dev), pin);
604 else
605 pr_info("pci %s: using irq %d for pin %u\n",
606 pci_name((struct pci_dev *) dev), irq, pin);
607
608 return irq;
609} 587}
610 588
611int pcibios_plat_dev_init(struct pci_dev *dev) 589int pcibios_plat_dev_init(struct pci_dev *dev)
diff --git a/arch/mips/ralink/of.c b/arch/mips/ralink/of.c
index 15f21ea96121..eccc5526155e 100644
--- a/arch/mips/ralink/of.c
+++ b/arch/mips/ralink/of.c
@@ -21,6 +21,7 @@
21#include <asm/reboot.h> 21#include <asm/reboot.h>
22#include <asm/bootinfo.h> 22#include <asm/bootinfo.h>
23#include <asm/addrspace.h> 23#include <asm/addrspace.h>
24#include <asm/prom.h>
24 25
25#include "common.h" 26#include "common.h"
26 27
diff --git a/arch/mn10300/include/asm/Kbuild b/arch/mn10300/include/asm/Kbuild
index c5d767028306..74742dc6a3da 100644
--- a/arch/mn10300/include/asm/Kbuild
+++ b/arch/mn10300/include/asm/Kbuild
@@ -2,3 +2,4 @@
2generic-y += clkdev.h 2generic-y += clkdev.h
3generic-y += exec.h 3generic-y += exec.h
4generic-y += trace_clock.h 4generic-y += trace_clock.h
5generic-y += preempt.h
diff --git a/arch/openrisc/include/asm/Kbuild b/arch/openrisc/include/asm/Kbuild
index 195653e851da..78405625e799 100644
--- a/arch/openrisc/include/asm/Kbuild
+++ b/arch/openrisc/include/asm/Kbuild
@@ -67,3 +67,4 @@ generic-y += ucontext.h
67generic-y += user.h 67generic-y += user.h
68generic-y += word-at-a-time.h 68generic-y += word-at-a-time.h
69generic-y += xor.h 69generic-y += xor.h
70generic-y += preempt.h
diff --git a/arch/openrisc/include/asm/prom.h b/arch/openrisc/include/asm/prom.h
deleted file mode 100644
index 93c9980e1b6b..000000000000
--- a/arch/openrisc/include/asm/prom.h
+++ /dev/null
@@ -1,22 +0,0 @@
1/*
2 * OpenRISC Linux
3 *
4 * Linux architectural port borrowing liberally from similar works of
5 * others. All original copyrights apply as per the original source
6 * declaration.
7 *
8 * OpenRISC implementation:
9 * Copyright (C) 2010-2011 Jonas Bonn <jonas@southpole.se>
10 * et al.
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
16 */
17#ifndef _ASM_OPENRISC_PROM_H
18#define _ASM_OPENRISC_PROM_H
19
20#define HAVE_ARCH_DEVTREE_FIXUPS
21
22#endif /* _ASM_OPENRISC_PROM_H */
diff --git a/arch/openrisc/kernel/prom.c b/arch/openrisc/kernel/prom.c
index a63e76872f84..6a44340d1b18 100644
--- a/arch/openrisc/kernel/prom.c
+++ b/arch/openrisc/kernel/prom.c
@@ -18,83 +18,15 @@
18 * 18 *
19 */ 19 */
20 20
21#include <stdarg.h>
22#include <linux/kernel.h>
23#include <linux/string.h>
24#include <linux/init.h> 21#include <linux/init.h>
25#include <linux/threads.h>
26#include <linux/spinlock.h>
27#include <linux/types.h> 22#include <linux/types.h>
28#include <linux/pci.h>
29#include <linux/stringify.h>
30#include <linux/delay.h>
31#include <linux/initrd.h>
32#include <linux/bitops.h>
33#include <linux/module.h>
34#include <linux/kexec.h>
35#include <linux/debugfs.h>
36#include <linux/irq.h>
37#include <linux/memblock.h> 23#include <linux/memblock.h>
38#include <linux/of_fdt.h> 24#include <linux/of_fdt.h>
39 25
40#include <asm/prom.h>
41#include <asm/page.h> 26#include <asm/page.h>
42#include <asm/processor.h>
43#include <asm/irq.h>
44#include <linux/io.h>
45#include <asm/mmu.h>
46#include <asm/pgtable.h>
47#include <asm/sections.h>
48#include <asm/setup.h>
49
50extern char cmd_line[COMMAND_LINE_SIZE];
51
52void __init early_init_dt_add_memory_arch(u64 base, u64 size)
53{
54 size &= PAGE_MASK;
55 memblock_add(base, size);
56}
57 27
58void __init early_init_devtree(void *params) 28void __init early_init_devtree(void *params)
59{ 29{
60 void *alloc; 30 early_init_dt_scan(params);
61
62 /* Setup flat device-tree pointer */
63 initial_boot_params = params;
64
65
66 /* Retrieve various informations from the /chosen node of the
67 * device-tree, including the platform type, initrd location and
68 * size, TCE reserve, and more ...
69 */
70 of_scan_flat_dt(early_init_dt_scan_chosen, cmd_line);
71
72 /* Scan memory nodes and rebuild MEMBLOCKs */
73 of_scan_flat_dt(early_init_dt_scan_root, NULL);
74 of_scan_flat_dt(early_init_dt_scan_memory, NULL);
75
76 /* Save command line for /proc/cmdline and then parse parameters */
77 strlcpy(boot_command_line, cmd_line, COMMAND_LINE_SIZE);
78
79 memblock_allow_resize(); 31 memblock_allow_resize();
80
81 /* We must copy the flattend device tree from init memory to regular
82 * memory because the device tree references the strings in it
83 * directly.
84 */
85
86 alloc = __va(memblock_alloc(initial_boot_params->totalsize, PAGE_SIZE));
87
88 memcpy(alloc, initial_boot_params, initial_boot_params->totalsize);
89
90 initial_boot_params = alloc;
91}
92
93#ifdef CONFIG_BLK_DEV_INITRD
94void __init early_init_dt_setup_initrd_arch(u64 start, u64 end)
95{
96 initrd_start = (unsigned long)__va(start);
97 initrd_end = (unsigned long)__va(end);
98 initrd_below_start_ok = 1;
99} 32}
100#endif
diff --git a/arch/openrisc/kernel/setup.c b/arch/openrisc/kernel/setup.c
index d7359ffbcbdd..09a769b69572 100644
--- a/arch/openrisc/kernel/setup.c
+++ b/arch/openrisc/kernel/setup.c
@@ -50,8 +50,6 @@
50 50
51#include "vmlinux.h" 51#include "vmlinux.h"
52 52
53char __initdata cmd_line[COMMAND_LINE_SIZE] = CONFIG_CMDLINE;
54
55static unsigned long __init setup_memory(void) 53static unsigned long __init setup_memory(void)
56{ 54{
57 unsigned long bootmap_size; 55 unsigned long bootmap_size;
@@ -285,7 +283,7 @@ void __init setup_arch(char **cmdline_p)
285{ 283{
286 unsigned long max_low_pfn; 284 unsigned long max_low_pfn;
287 285
288 unflatten_device_tree(); 286 unflatten_and_copy_device_tree();
289 287
290 setup_cpuinfo(); 288 setup_cpuinfo();
291 289
@@ -316,7 +314,7 @@ void __init setup_arch(char **cmdline_p)
316 conswitchp = &dummy_con; 314 conswitchp = &dummy_con;
317#endif 315#endif
318 316
319 *cmdline_p = cmd_line; 317 *cmdline_p = boot_command_line;
320 318
321 printk(KERN_INFO "OpenRISC Linux -- http://openrisc.net\n"); 319 printk(KERN_INFO "OpenRISC Linux -- http://openrisc.net\n");
322} 320}
diff --git a/arch/parisc/include/asm/Kbuild b/arch/parisc/include/asm/Kbuild
index ff4c9faed546..a603b9ebe54c 100644
--- a/arch/parisc/include/asm/Kbuild
+++ b/arch/parisc/include/asm/Kbuild
@@ -4,3 +4,4 @@ generic-y += word-at-a-time.h auxvec.h user.h cputime.h emergency-restart.h \
4 div64.h irq_regs.h kdebug.h kvm_para.h local64.h local.h param.h \ 4 div64.h irq_regs.h kdebug.h kvm_para.h local64.h local.h param.h \
5 poll.h xor.h clkdev.h exec.h 5 poll.h xor.h clkdev.h exec.h
6generic-y += trace_clock.h 6generic-y += trace_clock.h
7generic-y += preempt.h
diff --git a/arch/parisc/kernel/irq.c b/arch/parisc/kernel/irq.c
index 501ac8b4dcdf..8ceac4785609 100644
--- a/arch/parisc/kernel/irq.c
+++ b/arch/parisc/kernel/irq.c
@@ -495,22 +495,9 @@ static void execute_on_irq_stack(void *func, unsigned long param1)
495 *irq_stack_in_use = 1; 495 *irq_stack_in_use = 1;
496} 496}
497 497
498asmlinkage void do_softirq(void) 498void do_softirq_own_stack(void)
499{ 499{
500 __u32 pending; 500 execute_on_irq_stack(__do_softirq, 0);
501 unsigned long flags;
502
503 if (in_interrupt())
504 return;
505
506 local_irq_save(flags);
507
508 pending = local_softirq_pending();
509
510 if (pending)
511 execute_on_irq_stack(__do_softirq, 0);
512
513 local_irq_restore(flags);
514} 501}
515#endif /* CONFIG_IRQSTACKS */ 502#endif /* CONFIG_IRQSTACKS */
516 503
diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
index 38f3b7e47ec5..2f898d63eb96 100644
--- a/arch/powerpc/Kconfig
+++ b/arch/powerpc/Kconfig
@@ -97,7 +97,7 @@ config PPC
97 select VIRT_TO_BUS if !PPC64 97 select VIRT_TO_BUS if !PPC64
98 select HAVE_IDE 98 select HAVE_IDE
99 select HAVE_IOREMAP_PROT 99 select HAVE_IOREMAP_PROT
100 select HAVE_EFFICIENT_UNALIGNED_ACCESS 100 select HAVE_EFFICIENT_UNALIGNED_ACCESS if !CPU_LITTLE_ENDIAN
101 select HAVE_KPROBES 101 select HAVE_KPROBES
102 select HAVE_ARCH_KGDB 102 select HAVE_ARCH_KGDB
103 select HAVE_KRETPROBES 103 select HAVE_KRETPROBES
@@ -138,6 +138,10 @@ config PPC
138 select OLD_SIGSUSPEND 138 select OLD_SIGSUSPEND
139 select OLD_SIGACTION if PPC32 139 select OLD_SIGACTION if PPC32
140 select HAVE_DEBUG_STACKOVERFLOW 140 select HAVE_DEBUG_STACKOVERFLOW
141 select HAVE_IRQ_EXIT_ON_IRQ_STACK
142
143config GENERIC_CSUM
144 def_bool CPU_LITTLE_ENDIAN
141 145
142config EARLY_PRINTK 146config EARLY_PRINTK
143 bool 147 bool
@@ -404,7 +408,7 @@ config CRASH_DUMP
404 408
405config FA_DUMP 409config FA_DUMP
406 bool "Firmware-assisted dump" 410 bool "Firmware-assisted dump"
407 depends on PPC64 && PPC_RTAS && CRASH_DUMP 411 depends on PPC64 && PPC_RTAS && CRASH_DUMP && KEXEC
408 help 412 help
409 A robust mechanism to get reliable kernel crash dump with 413 A robust mechanism to get reliable kernel crash dump with
410 assistance from firmware. This approach does not use kexec, 414 assistance from firmware. This approach does not use kexec,
@@ -417,7 +421,7 @@ config FA_DUMP
417 421
418config IRQ_ALL_CPUS 422config IRQ_ALL_CPUS
419 bool "Distribute interrupts on all CPUs by default" 423 bool "Distribute interrupts on all CPUs by default"
420 depends on SMP && !MV64360 424 depends on SMP
421 help 425 help
422 This option gives the kernel permission to distribute IRQs across 426 This option gives the kernel permission to distribute IRQs across
423 multiple CPUs. Saying N here will route all IRQs to the first 427 multiple CPUs. Saying N here will route all IRQs to the first
@@ -1009,6 +1013,9 @@ config PHYSICAL_START
1009 default "0x00000000" 1013 default "0x00000000"
1010endif 1014endif
1011 1015
1016config ARCH_RANDOM
1017 def_bool n
1018
1012source "net/Kconfig" 1019source "net/Kconfig"
1013 1020
1014source "drivers/Kconfig" 1021source "drivers/Kconfig"
diff --git a/arch/powerpc/Makefile b/arch/powerpc/Makefile
index 51cfb78d4061..607acf54a425 100644
--- a/arch/powerpc/Makefile
+++ b/arch/powerpc/Makefile
@@ -36,17 +36,26 @@ KBUILD_DEFCONFIG := ppc64_defconfig
36endif 36endif
37 37
38ifeq ($(CONFIG_PPC64),y) 38ifeq ($(CONFIG_PPC64),y)
39OLDARCH := ppc64
40
41new_nm := $(shell if $(NM) --help 2>&1 | grep -- '--synthetic' > /dev/null; then echo y; else echo n; fi) 39new_nm := $(shell if $(NM) --help 2>&1 | grep -- '--synthetic' > /dev/null; then echo y; else echo n; fi)
42 40
43ifeq ($(new_nm),y) 41ifeq ($(new_nm),y)
44NM := $(NM) --synthetic 42NM := $(NM) --synthetic
45endif 43endif
44endif
46 45
46ifeq ($(CONFIG_PPC64),y)
47ifeq ($(CONFIG_CPU_LITTLE_ENDIAN),y)
48OLDARCH := ppc64le
49else
50OLDARCH := ppc64
51endif
52else
53ifeq ($(CONFIG_CPU_LITTLE_ENDIAN),y)
54OLDARCH := ppcle
47else 55else
48OLDARCH := ppc 56OLDARCH := ppc
49endif 57endif
58endif
50 59
51# It seems there are times we use this Makefile without 60# It seems there are times we use this Makefile without
52# including the config file, but this replicates the old behaviour 61# including the config file, but this replicates the old behaviour
@@ -56,11 +65,29 @@ endif
56 65
57UTS_MACHINE := $(OLDARCH) 66UTS_MACHINE := $(OLDARCH)
58 67
68ifeq ($(CONFIG_CPU_LITTLE_ENDIAN),y)
69override CC += -mlittle-endian -mno-strict-align
70override AS += -mlittle-endian
71override LD += -EL
72override CROSS32CC += -mlittle-endian
73override CROSS32AS += -mlittle-endian
74LDEMULATION := lppc
75GNUTARGET := powerpcle
76MULTIPLEWORD := -mno-multiple
77else
78override CC += -mbig-endian
79override AS += -mbig-endian
80override LD += -EB
81LDEMULATION := ppc
82GNUTARGET := powerpc
83MULTIPLEWORD := -mmultiple
84endif
85
59ifeq ($(HAS_BIARCH),y) 86ifeq ($(HAS_BIARCH),y)
60override AS += -a$(CONFIG_WORD_SIZE) 87override AS += -a$(CONFIG_WORD_SIZE)
61override LD += -m elf$(CONFIG_WORD_SIZE)ppc 88override LD += -m elf$(CONFIG_WORD_SIZE)$(LDEMULATION)
62override CC += -m$(CONFIG_WORD_SIZE) 89override CC += -m$(CONFIG_WORD_SIZE)
63override AR := GNUTARGET=elf$(CONFIG_WORD_SIZE)-powerpc $(AR) 90override AR := GNUTARGET=elf$(CONFIG_WORD_SIZE)-$(GNUTARGET) $(AR)
64endif 91endif
65 92
66LDFLAGS_vmlinux-y := -Bstatic 93LDFLAGS_vmlinux-y := -Bstatic
@@ -86,7 +113,7 @@ endif
86CFLAGS-$(CONFIG_PPC64) := -mtraceback=no -mcall-aixdesc 113CFLAGS-$(CONFIG_PPC64) := -mtraceback=no -mcall-aixdesc
87CFLAGS-$(CONFIG_PPC64) += $(call cc-option,-mcmodel=medium,-mminimal-toc) 114CFLAGS-$(CONFIG_PPC64) += $(call cc-option,-mcmodel=medium,-mminimal-toc)
88CFLAGS-$(CONFIG_PPC64) += $(call cc-option,-mno-pointers-to-nested-functions) 115CFLAGS-$(CONFIG_PPC64) += $(call cc-option,-mno-pointers-to-nested-functions)
89CFLAGS-$(CONFIG_PPC32) := -ffixed-r2 -mmultiple 116CFLAGS-$(CONFIG_PPC32) := -ffixed-r2 $(MULTIPLEWORD)
90 117
91ifeq ($(CONFIG_PPC_BOOK3S_64),y) 118ifeq ($(CONFIG_PPC_BOOK3S_64),y)
92CFLAGS-$(CONFIG_GENERIC_CPU) += $(call cc-option,-mtune=power7,-mtune=power4) 119CFLAGS-$(CONFIG_GENERIC_CPU) += $(call cc-option,-mtune=power7,-mtune=power4)
diff --git a/arch/powerpc/boot/Makefile b/arch/powerpc/boot/Makefile
index 15ca2255f438..ca7f08cc4afd 100644
--- a/arch/powerpc/boot/Makefile
+++ b/arch/powerpc/boot/Makefile
@@ -22,7 +22,8 @@ all: $(obj)/zImage
22BOOTCFLAGS := -Wall -Wundef -Wstrict-prototypes -Wno-trigraphs \ 22BOOTCFLAGS := -Wall -Wundef -Wstrict-prototypes -Wno-trigraphs \
23 -fno-strict-aliasing -Os -msoft-float -pipe \ 23 -fno-strict-aliasing -Os -msoft-float -pipe \
24 -fomit-frame-pointer -fno-builtin -fPIC -nostdinc \ 24 -fomit-frame-pointer -fno-builtin -fPIC -nostdinc \
25 -isystem $(shell $(CROSS32CC) -print-file-name=include) 25 -isystem $(shell $(CROSS32CC) -print-file-name=include) \
26 -mbig-endian
26BOOTAFLAGS := -D__ASSEMBLY__ $(BOOTCFLAGS) -traditional -nostdinc 27BOOTAFLAGS := -D__ASSEMBLY__ $(BOOTCFLAGS) -traditional -nostdinc
27 28
28ifdef CONFIG_DEBUG_INFO 29ifdef CONFIG_DEBUG_INFO
diff --git a/arch/powerpc/boot/dts/b4860emu.dts b/arch/powerpc/boot/dts/b4860emu.dts
new file mode 100644
index 000000000000..7290021f2dfc
--- /dev/null
+++ b/arch/powerpc/boot/dts/b4860emu.dts
@@ -0,0 +1,218 @@
1/*
2 * B4860 emulator Device Tree Source
3 *
4 * Copyright 2013 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * This software is provided by Freescale Semiconductor "as is" and any
24 * express or implied warranties, including, but not limited to, the implied
25 * warranties of merchantability and fitness for a particular purpose are
26 * disclaimed. In no event shall Freescale Semiconductor be liable for any
27 * direct, indirect, incidental, special, exemplary, or consequential damages
28 * (including, but not limited to, procurement of substitute goods or services;
29 * loss of use, data, or profits; or business interruption) however caused and
30 * on any theory of liability, whether in contract, strict liability, or tort
31 * (including negligence or otherwise) arising in any way out of the use of
32 * this software, even if advised of the possibility of such damage.
33 */
34
35/dts-v1/;
36
37/include/ "fsl/e6500_power_isa.dtsi"
38
39/ {
40 compatible = "fsl,B4860";
41 #address-cells = <2>;
42 #size-cells = <2>;
43 interrupt-parent = <&mpic>;
44
45 aliases {
46 ccsr = &soc;
47
48 serial0 = &serial0;
49 serial1 = &serial1;
50 serial2 = &serial2;
51 serial3 = &serial3;
52 dma0 = &dma0;
53 dma1 = &dma1;
54 };
55
56 cpus {
57 #address-cells = <1>;
58 #size-cells = <0>;
59
60 cpu0: PowerPC,e6500@0 {
61 device_type = "cpu";
62 reg = <0 1>;
63 next-level-cache = <&L2>;
64 };
65 cpu1: PowerPC,e6500@2 {
66 device_type = "cpu";
67 reg = <2 3>;
68 next-level-cache = <&L2>;
69 };
70 cpu2: PowerPC,e6500@4 {
71 device_type = "cpu";
72 reg = <4 5>;
73 next-level-cache = <&L2>;
74 };
75 cpu3: PowerPC,e6500@6 {
76 device_type = "cpu";
77 reg = <6 7>;
78 next-level-cache = <&L2>;
79 };
80 };
81};
82
83/ {
84 model = "fsl,B4860QDS";
85 compatible = "fsl,B4860EMU", "fsl,B4860QDS";
86 #address-cells = <2>;
87 #size-cells = <2>;
88 interrupt-parent = <&mpic>;
89
90 ifc: localbus@ffe124000 {
91 reg = <0xf 0xfe124000 0 0x2000>;
92 ranges = <0 0 0xf 0xe8000000 0x08000000
93 2 0 0xf 0xff800000 0x00010000
94 3 0 0xf 0xffdf0000 0x00008000>;
95
96 nor@0,0 {
97 #address-cells = <1>;
98 #size-cells = <1>;
99 compatible = "cfi-flash";
100 reg = <0x0 0x0 0x8000000>;
101 bank-width = <2>;
102 device-width = <1>;
103 };
104 };
105
106 memory {
107 device_type = "memory";
108 };
109
110 soc: soc@ffe000000 {
111 ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
112 reg = <0xf 0xfe000000 0 0x00001000>;
113 };
114};
115
116&ifc {
117 #address-cells = <2>;
118 #size-cells = <1>;
119 compatible = "fsl,ifc", "simple-bus";
120 interrupts = <25 2 0 0>;
121};
122
123&soc {
124 #address-cells = <1>;
125 #size-cells = <1>;
126 device_type = "soc";
127 compatible = "simple-bus";
128
129 soc-sram-error {
130 compatible = "fsl,soc-sram-error";
131 interrupts = <16 2 1 2>;
132 };
133
134 corenet-law@0 {
135 compatible = "fsl,corenet-law";
136 reg = <0x0 0x1000>;
137 fsl,num-laws = <32>;
138 };
139
140 ddr1: memory-controller@8000 {
141 compatible = "fsl,qoriq-memory-controller-v4.5", "fsl,qoriq-memory-controller";
142 reg = <0x8000 0x1000>;
143 interrupts = <16 2 1 8>;
144 };
145
146 ddr2: memory-controller@9000 {
147 compatible = "fsl,qoriq-memory-controller-v4.5","fsl,qoriq-memory-controller";
148 reg = <0x9000 0x1000>;
149 interrupts = <16 2 1 9>;
150 };
151
152 cpc: l3-cache-controller@10000 {
153 compatible = "fsl,b4-l3-cache-controller", "cache";
154 reg = <0x10000 0x1000
155 0x11000 0x1000>;
156 interrupts = <16 2 1 4>;
157 };
158
159 corenet-cf@18000 {
160 compatible = "fsl,b4-corenet-cf";
161 reg = <0x18000 0x1000>;
162 interrupts = <16 2 1 0>;
163 fsl,ccf-num-csdids = <32>;
164 fsl,ccf-num-snoopids = <32>;
165 };
166
167 iommu@20000 {
168 compatible = "fsl,pamu-v1.0", "fsl,pamu";
169 reg = <0x20000 0x4000>;
170 #address-cells = <1>;
171 #size-cells = <1>;
172 interrupts = <
173 24 2 0 0
174 16 2 1 1>;
175 pamu0: pamu@0 {
176 reg = <0 0x1000>;
177 fsl,primary-cache-geometry = <8 1>;
178 fsl,secondary-cache-geometry = <32 2>;
179 };
180 };
181
182/include/ "fsl/qoriq-mpic.dtsi"
183
184 guts: global-utilities@e0000 {
185 compatible = "fsl,b4-device-config";
186 reg = <0xe0000 0xe00>;
187 fsl,has-rstcr;
188 fsl,liodn-bits = <12>;
189 };
190
191 clockgen: global-utilities@e1000 {
192 compatible = "fsl,b4-clockgen", "fsl,qoriq-clockgen-2.0";
193 reg = <0xe1000 0x1000>;
194 };
195
196/include/ "fsl/qoriq-dma-0.dtsi"
197 dma@100300 {
198 fsl,iommu-parent = <&pamu0>;
199 fsl,liodn-reg = <&guts 0x580>; /* DMA1LIODNR */
200 };
201
202/include/ "fsl/qoriq-dma-1.dtsi"
203 dma@101300 {
204 fsl,iommu-parent = <&pamu0>;
205 fsl,liodn-reg = <&guts 0x584>; /* DMA2LIODNR */
206 };
207
208/include/ "fsl/qoriq-i2c-0.dtsi"
209/include/ "fsl/qoriq-i2c-1.dtsi"
210/include/ "fsl/qoriq-duart-0.dtsi"
211/include/ "fsl/qoriq-duart-1.dtsi"
212
213 L2: l2-cache-controller@c20000 {
214 compatible = "fsl,b4-l2-cache-controller";
215 reg = <0xc20000 0x1000>;
216 next-level-cache = <&cpc>;
217 };
218};
diff --git a/arch/powerpc/boot/dts/b4qds.dtsi b/arch/powerpc/boot/dts/b4qds.dtsi
index e6d2f8f90544..8b47edcfabf0 100644
--- a/arch/powerpc/boot/dts/b4qds.dtsi
+++ b/arch/powerpc/boot/dts/b4qds.dtsi
@@ -120,25 +120,38 @@
120 }; 120 };
121 121
122 i2c@118000 { 122 i2c@118000 {
123 eeprom@50 { 123 mux@77 {
124 compatible = "at24,24c64"; 124 compatible = "nxp,pca9547";
125 reg = <0x50>; 125 reg = <0x77>;
126 }; 126 #address-cells = <1>;
127 eeprom@51 { 127 #size-cells = <0>;
128 compatible = "at24,24c256"; 128
129 reg = <0x51>; 129 i2c@0 {
130 }; 130 #address-cells = <1>;
131 eeprom@53 { 131 #size-cells = <0>;
132 compatible = "at24,24c256"; 132 reg = <0>;
133 reg = <0x53>; 133
134 }; 134 eeprom@50 {
135 eeprom@57 { 135 compatible = "at24,24c64";
136 compatible = "at24,24c256"; 136 reg = <0x50>;
137 reg = <0x57>; 137 };
138 }; 138 eeprom@51 {
139 rtc@68 { 139 compatible = "at24,24c256";
140 compatible = "dallas,ds3232"; 140 reg = <0x51>;
141 reg = <0x68>; 141 };
142 eeprom@53 {
143 compatible = "at24,24c256";
144 reg = <0x53>;
145 };
146 eeprom@57 {
147 compatible = "at24,24c256";
148 reg = <0x57>;
149 };
150 rtc@68 {
151 compatible = "dallas,ds3232";
152 reg = <0x68>;
153 };
154 };
142 }; 155 };
143 }; 156 };
144 157
diff --git a/arch/powerpc/boot/dts/c293pcie.dts b/arch/powerpc/boot/dts/c293pcie.dts
index 1238bda8901f..6681cc21030b 100644
--- a/arch/powerpc/boot/dts/c293pcie.dts
+++ b/arch/powerpc/boot/dts/c293pcie.dts
@@ -45,6 +45,7 @@
45 ifc: ifc@fffe1e000 { 45 ifc: ifc@fffe1e000 {
46 reg = <0xf 0xffe1e000 0 0x2000>; 46 reg = <0xf 0xffe1e000 0 0x2000>;
47 ranges = <0x0 0x0 0xf 0xec000000 0x04000000 47 ranges = <0x0 0x0 0xf 0xec000000 0x04000000
48 0x1 0x0 0xf 0xff800000 0x00010000
48 0x2 0x0 0xf 0xffdf0000 0x00010000>; 49 0x2 0x0 0xf 0xffdf0000 0x00010000>;
49 50
50 }; 51 };
diff --git a/arch/powerpc/boot/dts/fsl/b4420si-pre.dtsi b/arch/powerpc/boot/dts/fsl/b4420si-pre.dtsi
index 7b4426e0a5a5..c6e451affb05 100644
--- a/arch/powerpc/boot/dts/fsl/b4420si-pre.dtsi
+++ b/arch/powerpc/boot/dts/fsl/b4420si-pre.dtsi
@@ -34,6 +34,8 @@
34 34
35/dts-v1/; 35/dts-v1/;
36 36
37/include/ "e6500_power_isa.dtsi"
38
37/ { 39/ {
38 compatible = "fsl,B4420"; 40 compatible = "fsl,B4420";
39 #address-cells = <2>; 41 #address-cells = <2>;
diff --git a/arch/powerpc/boot/dts/fsl/b4860si-post.dtsi b/arch/powerpc/boot/dts/fsl/b4860si-post.dtsi
index e5cf6c81dd66..981397518fc6 100644
--- a/arch/powerpc/boot/dts/fsl/b4860si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/b4860si-post.dtsi
@@ -41,7 +41,7 @@
41 41
42&rio { 42&rio {
43 compatible = "fsl,srio"; 43 compatible = "fsl,srio";
44 interrupts = <16 2 1 11>; 44 interrupts = <16 2 1 20>;
45 #address-cells = <2>; 45 #address-cells = <2>;
46 #size-cells = <2>; 46 #size-cells = <2>;
47 fsl,iommu-parent = <&pamu0>; 47 fsl,iommu-parent = <&pamu0>;
diff --git a/arch/powerpc/boot/dts/fsl/b4860si-pre.dtsi b/arch/powerpc/boot/dts/fsl/b4860si-pre.dtsi
index 5263fa46a3fb..9bc26b147900 100644
--- a/arch/powerpc/boot/dts/fsl/b4860si-pre.dtsi
+++ b/arch/powerpc/boot/dts/fsl/b4860si-pre.dtsi
@@ -34,6 +34,8 @@
34 34
35/dts-v1/; 35/dts-v1/;
36 36
37/include/ "e6500_power_isa.dtsi"
38
37/ { 39/ {
38 compatible = "fsl,B4860"; 40 compatible = "fsl,B4860";
39 #address-cells = <2>; 41 #address-cells = <2>;
diff --git a/arch/powerpc/boot/dts/fsl/bsc9131si-post.dtsi b/arch/powerpc/boot/dts/fsl/bsc9131si-post.dtsi
index 5180d9d37989..0c0efa94cfb4 100644
--- a/arch/powerpc/boot/dts/fsl/bsc9131si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/bsc9131si-post.dtsi
@@ -130,7 +130,7 @@ usb@22000 {
130 130
131/include/ "pq3-esdhc-0.dtsi" 131/include/ "pq3-esdhc-0.dtsi"
132 sdhc@2e000 { 132 sdhc@2e000 {
133 fsl,sdhci-auto-cmd12; 133 sdhci,auto-cmd12;
134 interrupts = <41 0x2 0 0>; 134 interrupts = <41 0x2 0 0>;
135 }; 135 };
136 136
diff --git a/arch/powerpc/boot/dts/fsl/bsc9131si-pre.dtsi b/arch/powerpc/boot/dts/fsl/bsc9131si-pre.dtsi
index 743e4aeda349..f6ec4a67560c 100644
--- a/arch/powerpc/boot/dts/fsl/bsc9131si-pre.dtsi
+++ b/arch/powerpc/boot/dts/fsl/bsc9131si-pre.dtsi
@@ -33,6 +33,9 @@
33 */ 33 */
34 34
35/dts-v1/; 35/dts-v1/;
36
37/include/ "e500v2_power_isa.dtsi"
38
36/ { 39/ {
37 compatible = "fsl,BSC9131"; 40 compatible = "fsl,BSC9131";
38 #address-cells = <2>; 41 #address-cells = <2>;
diff --git a/arch/powerpc/boot/dts/t4240emu.dts b/arch/powerpc/boot/dts/t4240emu.dts
new file mode 100644
index 000000000000..ee24ab335598
--- /dev/null
+++ b/arch/powerpc/boot/dts/t4240emu.dts
@@ -0,0 +1,268 @@
1/*
2 * T4240 emulator Device Tree Source
3 *
4 * Copyright 2013 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor "AS IS" AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35/dts-v1/;
36
37/include/ "fsl/e6500_power_isa.dtsi"
38/ {
39 compatible = "fsl,T4240";
40 #address-cells = <2>;
41 #size-cells = <2>;
42 interrupt-parent = <&mpic>;
43
44 aliases {
45 ccsr = &soc;
46
47 serial0 = &serial0;
48 serial1 = &serial1;
49 serial2 = &serial2;
50 serial3 = &serial3;
51 dma0 = &dma0;
52 dma1 = &dma1;
53 };
54
55 cpus {
56 #address-cells = <1>;
57 #size-cells = <0>;
58
59 cpu0: PowerPC,e6500@0 {
60 device_type = "cpu";
61 reg = <0 1>;
62 next-level-cache = <&L2_1>;
63 };
64 cpu1: PowerPC,e6500@2 {
65 device_type = "cpu";
66 reg = <2 3>;
67 next-level-cache = <&L2_1>;
68 };
69 cpu2: PowerPC,e6500@4 {
70 device_type = "cpu";
71 reg = <4 5>;
72 next-level-cache = <&L2_1>;
73 };
74 cpu3: PowerPC,e6500@6 {
75 device_type = "cpu";
76 reg = <6 7>;
77 next-level-cache = <&L2_1>;
78 };
79
80 cpu4: PowerPC,e6500@8 {
81 device_type = "cpu";
82 reg = <8 9>;
83 next-level-cache = <&L2_2>;
84 };
85 cpu5: PowerPC,e6500@10 {
86 device_type = "cpu";
87 reg = <10 11>;
88 next-level-cache = <&L2_2>;
89 };
90 cpu6: PowerPC,e6500@12 {
91 device_type = "cpu";
92 reg = <12 13>;
93 next-level-cache = <&L2_2>;
94 };
95 cpu7: PowerPC,e6500@14 {
96 device_type = "cpu";
97 reg = <14 15>;
98 next-level-cache = <&L2_2>;
99 };
100
101 cpu8: PowerPC,e6500@16 {
102 device_type = "cpu";
103 reg = <16 17>;
104 next-level-cache = <&L2_3>;
105 };
106 cpu9: PowerPC,e6500@18 {
107 device_type = "cpu";
108 reg = <18 19>;
109 next-level-cache = <&L2_3>;
110 };
111 cpu10: PowerPC,e6500@20 {
112 device_type = "cpu";
113 reg = <20 21>;
114 next-level-cache = <&L2_3>;
115 };
116 cpu11: PowerPC,e6500@22 {
117 device_type = "cpu";
118 reg = <22 23>;
119 next-level-cache = <&L2_3>;
120 };
121 };
122};
123
124/ {
125 model = "fsl,T4240QDS";
126 compatible = "fsl,T4240EMU", "fsl,T4240QDS";
127 #address-cells = <2>;
128 #size-cells = <2>;
129 interrupt-parent = <&mpic>;
130
131 ifc: localbus@ffe124000 {
132 reg = <0xf 0xfe124000 0 0x2000>;
133 ranges = <0 0 0xf 0xe8000000 0x08000000
134 2 0 0xf 0xff800000 0x00010000
135 3 0 0xf 0xffdf0000 0x00008000>;
136
137 nor@0,0 {
138 #address-cells = <1>;
139 #size-cells = <1>;
140 compatible = "cfi-flash";
141 reg = <0x0 0x0 0x8000000>;
142
143 bank-width = <2>;
144 device-width = <1>;
145 };
146
147 };
148
149 memory {
150 device_type = "memory";
151 };
152
153 soc: soc@ffe000000 {
154 ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
155 reg = <0xf 0xfe000000 0 0x00001000>;
156
157 };
158};
159
160&ifc {
161 #address-cells = <2>;
162 #size-cells = <1>;
163 compatible = "fsl,ifc", "simple-bus";
164 interrupts = <25 2 0 0>;
165};
166
167&soc {
168 #address-cells = <1>;
169 #size-cells = <1>;
170 device_type = "soc";
171 compatible = "simple-bus";
172
173 soc-sram-error {
174 compatible = "fsl,soc-sram-error";
175 interrupts = <16 2 1 29>;
176 };
177
178 corenet-law@0 {
179 compatible = "fsl,corenet-law";
180 reg = <0x0 0x1000>;
181 fsl,num-laws = <32>;
182 };
183
184 ddr1: memory-controller@8000 {
185 compatible = "fsl,qoriq-memory-controller-v4.7",
186 "fsl,qoriq-memory-controller";
187 reg = <0x8000 0x1000>;
188 interrupts = <16 2 1 23>;
189 };
190
191 ddr2: memory-controller@9000 {
192 compatible = "fsl,qoriq-memory-controller-v4.7",
193 "fsl,qoriq-memory-controller";
194 reg = <0x9000 0x1000>;
195 interrupts = <16 2 1 22>;
196 };
197
198 ddr3: memory-controller@a000 {
199 compatible = "fsl,qoriq-memory-controller-v4.7",
200 "fsl,qoriq-memory-controller";
201 reg = <0xa000 0x1000>;
202 interrupts = <16 2 1 21>;
203 };
204
205 cpc: l3-cache-controller@10000 {
206 compatible = "fsl,t4240-l3-cache-controller", "cache";
207 reg = <0x10000 0x1000
208 0x11000 0x1000
209 0x12000 0x1000>;
210 interrupts = <16 2 1 27
211 16 2 1 26
212 16 2 1 25>;
213 };
214
215 corenet-cf@18000 {
216 compatible = "fsl,corenet-cf";
217 reg = <0x18000 0x1000>;
218 interrupts = <16 2 1 31>;
219 fsl,ccf-num-csdids = <32>;
220 fsl,ccf-num-snoopids = <32>;
221 };
222
223 iommu@20000 {
224 compatible = "fsl,pamu-v1.0", "fsl,pamu";
225 reg = <0x20000 0x6000>;
226 interrupts = <
227 24 2 0 0
228 16 2 1 30>;
229 };
230
231/include/ "fsl/qoriq-mpic.dtsi"
232
233 guts: global-utilities@e0000 {
234 compatible = "fsl,t4240-device-config", "fsl,qoriq-device-config-2.0";
235 reg = <0xe0000 0xe00>;
236 fsl,has-rstcr;
237 fsl,liodn-bits = <12>;
238 };
239
240 clockgen: global-utilities@e1000 {
241 compatible = "fsl,t4240-clockgen", "fsl,qoriq-clockgen-2.0";
242 reg = <0xe1000 0x1000>;
243 };
244
245/include/ "fsl/qoriq-dma-0.dtsi"
246/include/ "fsl/qoriq-dma-1.dtsi"
247
248/include/ "fsl/qoriq-i2c-0.dtsi"
249/include/ "fsl/qoriq-i2c-1.dtsi"
250/include/ "fsl/qoriq-duart-0.dtsi"
251/include/ "fsl/qoriq-duart-1.dtsi"
252
253 L2_1: l2-cache-controller@c20000 {
254 compatible = "fsl,t4240-l2-cache-controller";
255 reg = <0xc20000 0x40000>;
256 next-level-cache = <&cpc>;
257 };
258 L2_2: l2-cache-controller@c60000 {
259 compatible = "fsl,t4240-l2-cache-controller";
260 reg = <0xc60000 0x40000>;
261 next-level-cache = <&cpc>;
262 };
263 L2_3: l2-cache-controller@ca0000 {
264 compatible = "fsl,t4240-l2-cache-controller";
265 reg = <0xca0000 0x40000>;
266 next-level-cache = <&cpc>;
267 };
268};
diff --git a/arch/powerpc/boot/dts/t4240qds.dts b/arch/powerpc/boot/dts/t4240qds.dts
index 0555976dd0f3..63e81b010804 100644
--- a/arch/powerpc/boot/dts/t4240qds.dts
+++ b/arch/powerpc/boot/dts/t4240qds.dts
@@ -118,36 +118,53 @@
118 }; 118 };
119 119
120 i2c@118000 { 120 i2c@118000 {
121 eeprom@51 { 121 mux@77 {
122 compatible = "at24,24c256"; 122 compatible = "nxp,pca9547";
123 reg = <0x51>; 123 reg = <0x77>;
124 }; 124 #address-cells = <1>;
125 eeprom@52 { 125 #size-cells = <0>;
126 compatible = "at24,24c256"; 126
127 reg = <0x52>; 127 i2c@0 {
128 }; 128 #address-cells = <1>;
129 eeprom@53 { 129 #size-cells = <0>;
130 compatible = "at24,24c256"; 130 reg = <0>;
131 reg = <0x53>; 131
132 }; 132 eeprom@51 {
133 eeprom@54 { 133 compatible = "at24,24c256";
134 compatible = "at24,24c256"; 134 reg = <0x51>;
135 reg = <0x54>; 135 };
136 }; 136 eeprom@52 {
137 eeprom@55 { 137 compatible = "at24,24c256";
138 compatible = "at24,24c256"; 138 reg = <0x52>;
139 reg = <0x55>; 139 };
140 }; 140 eeprom@53 {
141 eeprom@56 { 141 compatible = "at24,24c256";
142 compatible = "at24,24c256"; 142 reg = <0x53>;
143 reg = <0x56>; 143 };
144 }; 144 eeprom@54 {
145 rtc@68 { 145 compatible = "at24,24c256";
146 compatible = "dallas,ds3232"; 146 reg = <0x54>;
147 reg = <0x68>; 147 };
148 interrupts = <0x1 0x1 0 0>; 148 eeprom@55 {
149 compatible = "at24,24c256";
150 reg = <0x55>;
151 };
152 eeprom@56 {
153 compatible = "at24,24c256";
154 reg = <0x56>;
155 };
156 rtc@68 {
157 compatible = "dallas,ds3232";
158 reg = <0x68>;
159 interrupts = <0x1 0x1 0 0>;
160 };
161 };
149 }; 162 };
150 }; 163 };
164
165 sdhc@114000 {
166 voltage-ranges = <1800 1800 3300 3300>;
167 };
151 }; 168 };
152 169
153 pci0: pcie@ffe240000 { 170 pci0: pcie@ffe240000 {
diff --git a/arch/powerpc/boot/wrapper b/arch/powerpc/boot/wrapper
index cd7af841ba05..2e1af74a64be 100755
--- a/arch/powerpc/boot/wrapper
+++ b/arch/powerpc/boot/wrapper
@@ -147,21 +147,29 @@ link_address='0x400000'
147make_space=y 147make_space=y
148 148
149case "$platform" in 149case "$platform" in
150of)
151 platformo="$object/of.o $object/epapr.o"
152 make_space=n
153 ;;
150pseries) 154pseries)
151 platformo="$object/of.o $object/epapr.o" 155 platformo="$object/of.o $object/epapr.o"
152 link_address='0x4000000' 156 link_address='0x4000000'
157 make_space=n
153 ;; 158 ;;
154maple) 159maple)
155 platformo="$object/of.o $object/epapr.o" 160 platformo="$object/of.o $object/epapr.o"
156 link_address='0x400000' 161 link_address='0x400000'
162 make_space=n
157 ;; 163 ;;
158pmac|chrp) 164pmac|chrp)
159 platformo="$object/of.o $object/epapr.o" 165 platformo="$object/of.o $object/epapr.o"
166 make_space=n
160 ;; 167 ;;
161coff) 168coff)
162 platformo="$object/crt0.o $object/of.o $object/epapr.o" 169 platformo="$object/crt0.o $object/of.o $object/epapr.o"
163 lds=$object/zImage.coff.lds 170 lds=$object/zImage.coff.lds
164 link_address='0x500000' 171 link_address='0x500000'
172 make_space=n
165 pie= 173 pie=
166 ;; 174 ;;
167miboot|uboot*) 175miboot|uboot*)
diff --git a/arch/powerpc/configs/corenet32_smp_defconfig b/arch/powerpc/configs/corenet32_smp_defconfig
index 3dfab4c40c76..bbd794deb6eb 100644
--- a/arch/powerpc/configs/corenet32_smp_defconfig
+++ b/arch/powerpc/configs/corenet32_smp_defconfig
@@ -23,11 +23,7 @@ CONFIG_MODVERSIONS=y
23# CONFIG_BLK_DEV_BSG is not set 23# CONFIG_BLK_DEV_BSG is not set
24CONFIG_PARTITION_ADVANCED=y 24CONFIG_PARTITION_ADVANCED=y
25CONFIG_MAC_PARTITION=y 25CONFIG_MAC_PARTITION=y
26CONFIG_P2041_RDB=y 26CONFIG_CORENET_GENERIC=y
27CONFIG_P3041_DS=y
28CONFIG_P4080_DS=y
29CONFIG_P5020_DS=y
30CONFIG_P5040_DS=y
31CONFIG_HIGHMEM=y 27CONFIG_HIGHMEM=y
32# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set 28# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
33CONFIG_BINFMT_MISC=m 29CONFIG_BINFMT_MISC=m
@@ -104,6 +100,7 @@ CONFIG_FSL_PQ_MDIO=y
104CONFIG_E1000=y 100CONFIG_E1000=y
105CONFIG_E1000E=y 101CONFIG_E1000E=y
106CONFIG_VITESSE_PHY=y 102CONFIG_VITESSE_PHY=y
103CONFIG_AT803X_PHY=y
107CONFIG_FIXED_PHY=y 104CONFIG_FIXED_PHY=y
108# CONFIG_INPUT_MOUSEDEV is not set 105# CONFIG_INPUT_MOUSEDEV is not set
109# CONFIG_INPUT_KEYBOARD is not set 106# CONFIG_INPUT_KEYBOARD is not set
diff --git a/arch/powerpc/configs/corenet64_smp_defconfig b/arch/powerpc/configs/corenet64_smp_defconfig
index fa94fb3bb44d..63508ddee11c 100644
--- a/arch/powerpc/configs/corenet64_smp_defconfig
+++ b/arch/powerpc/configs/corenet64_smp_defconfig
@@ -21,10 +21,7 @@ CONFIG_MODVERSIONS=y
21# CONFIG_BLK_DEV_BSG is not set 21# CONFIG_BLK_DEV_BSG is not set
22CONFIG_PARTITION_ADVANCED=y 22CONFIG_PARTITION_ADVANCED=y
23CONFIG_MAC_PARTITION=y 23CONFIG_MAC_PARTITION=y
24CONFIG_B4_QDS=y 24CONFIG_CORENET_GENERIC=y
25CONFIG_P5020_DS=y
26CONFIG_P5040_DS=y
27CONFIG_T4240_QDS=y
28# CONFIG_PPC_OF_BOOT_TRAMPOLINE is not set 25# CONFIG_PPC_OF_BOOT_TRAMPOLINE is not set
29CONFIG_BINFMT_MISC=m 26CONFIG_BINFMT_MISC=m
30CONFIG_MATH_EMULATION=y 27CONFIG_MATH_EMULATION=y
diff --git a/arch/powerpc/configs/mpc85xx_defconfig b/arch/powerpc/configs/mpc85xx_defconfig
index dc098d988211..d2e0fab5ee5b 100644
--- a/arch/powerpc/configs/mpc85xx_defconfig
+++ b/arch/powerpc/configs/mpc85xx_defconfig
@@ -138,6 +138,7 @@ CONFIG_MARVELL_PHY=y
138CONFIG_DAVICOM_PHY=y 138CONFIG_DAVICOM_PHY=y
139CONFIG_CICADA_PHY=y 139CONFIG_CICADA_PHY=y
140CONFIG_VITESSE_PHY=y 140CONFIG_VITESSE_PHY=y
141CONFIG_AT803X_PHY=y
141CONFIG_FIXED_PHY=y 142CONFIG_FIXED_PHY=y
142CONFIG_INPUT_FF_MEMLESS=m 143CONFIG_INPUT_FF_MEMLESS=m
143# CONFIG_INPUT_MOUSEDEV is not set 144# CONFIG_INPUT_MOUSEDEV is not set
diff --git a/arch/powerpc/configs/mpc85xx_smp_defconfig b/arch/powerpc/configs/mpc85xx_smp_defconfig
index 5bca60161bb3..4cb7b59e98bd 100644
--- a/arch/powerpc/configs/mpc85xx_smp_defconfig
+++ b/arch/powerpc/configs/mpc85xx_smp_defconfig
@@ -138,6 +138,7 @@ CONFIG_MARVELL_PHY=y
138CONFIG_DAVICOM_PHY=y 138CONFIG_DAVICOM_PHY=y
139CONFIG_CICADA_PHY=y 139CONFIG_CICADA_PHY=y
140CONFIG_VITESSE_PHY=y 140CONFIG_VITESSE_PHY=y
141CONFIG_AT803X_PHY=y
141CONFIG_FIXED_PHY=y 142CONFIG_FIXED_PHY=y
142CONFIG_INPUT_FF_MEMLESS=m 143CONFIG_INPUT_FF_MEMLESS=m
143# CONFIG_INPUT_MOUSEDEV is not set 144# CONFIG_INPUT_MOUSEDEV is not set
diff --git a/arch/powerpc/configs/ppc64_defconfig b/arch/powerpc/configs/ppc64_defconfig
index 0e8cfd09da2f..581a3bcae728 100644
--- a/arch/powerpc/configs/ppc64_defconfig
+++ b/arch/powerpc/configs/ppc64_defconfig
@@ -2,7 +2,6 @@ CONFIG_PPC64=y
2CONFIG_ALTIVEC=y 2CONFIG_ALTIVEC=y
3CONFIG_VSX=y 3CONFIG_VSX=y
4CONFIG_SMP=y 4CONFIG_SMP=y
5CONFIG_EXPERIMENTAL=y
6CONFIG_SYSVIPC=y 5CONFIG_SYSVIPC=y
7CONFIG_POSIX_MQUEUE=y 6CONFIG_POSIX_MQUEUE=y
8CONFIG_IRQ_DOMAIN_DEBUG=y 7CONFIG_IRQ_DOMAIN_DEBUG=y
@@ -25,7 +24,6 @@ CONFIG_MODULE_UNLOAD=y
25CONFIG_MODVERSIONS=y 24CONFIG_MODVERSIONS=y
26CONFIG_MODULE_SRCVERSION_ALL=y 25CONFIG_MODULE_SRCVERSION_ALL=y
27CONFIG_PARTITION_ADVANCED=y 26CONFIG_PARTITION_ADVANCED=y
28CONFIG_EFI_PARTITION=y
29CONFIG_PPC_SPLPAR=y 27CONFIG_PPC_SPLPAR=y
30CONFIG_SCANLOG=m 28CONFIG_SCANLOG=m
31CONFIG_PPC_SMLPAR=y 29CONFIG_PPC_SMLPAR=y
@@ -50,12 +48,10 @@ CONFIG_CPU_FREQ_PMAC64=y
50CONFIG_HZ_100=y 48CONFIG_HZ_100=y
51CONFIG_BINFMT_MISC=m 49CONFIG_BINFMT_MISC=m
52CONFIG_PPC_TRANSACTIONAL_MEM=y 50CONFIG_PPC_TRANSACTIONAL_MEM=y
53CONFIG_HOTPLUG_CPU=y
54CONFIG_KEXEC=y 51CONFIG_KEXEC=y
55CONFIG_IRQ_ALL_CPUS=y 52CONFIG_IRQ_ALL_CPUS=y
56CONFIG_MEMORY_HOTREMOVE=y 53CONFIG_MEMORY_HOTREMOVE=y
57CONFIG_SCHED_SMT=y 54CONFIG_SCHED_SMT=y
58CONFIG_PPC_DENORMALISATION=y
59CONFIG_PCCARD=y 55CONFIG_PCCARD=y
60CONFIG_ELECTRA_CF=y 56CONFIG_ELECTRA_CF=y
61CONFIG_HOTPLUG_PCI=y 57CONFIG_HOTPLUG_PCI=y
@@ -89,7 +85,6 @@ CONFIG_NF_CONNTRACK_PPTP=m
89CONFIG_NF_CONNTRACK_SIP=m 85CONFIG_NF_CONNTRACK_SIP=m
90CONFIG_NF_CONNTRACK_TFTP=m 86CONFIG_NF_CONNTRACK_TFTP=m
91CONFIG_NF_CT_NETLINK=m 87CONFIG_NF_CT_NETLINK=m
92CONFIG_NETFILTER_TPROXY=m
93CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m 88CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m
94CONFIG_NETFILTER_XT_TARGET_CONNMARK=m 89CONFIG_NETFILTER_XT_TARGET_CONNMARK=m
95CONFIG_NETFILTER_XT_TARGET_DSCP=m 90CONFIG_NETFILTER_XT_TARGET_DSCP=m
@@ -131,7 +126,6 @@ CONFIG_NETFILTER_XT_MATCH_STRING=m
131CONFIG_NETFILTER_XT_MATCH_TCPMSS=m 126CONFIG_NETFILTER_XT_MATCH_TCPMSS=m
132CONFIG_NETFILTER_XT_MATCH_U32=m 127CONFIG_NETFILTER_XT_MATCH_U32=m
133CONFIG_NF_CONNTRACK_IPV4=m 128CONFIG_NF_CONNTRACK_IPV4=m
134CONFIG_IP_NF_QUEUE=m
135CONFIG_IP_NF_IPTABLES=m 129CONFIG_IP_NF_IPTABLES=m
136CONFIG_IP_NF_MATCH_AH=m 130CONFIG_IP_NF_MATCH_AH=m
137CONFIG_IP_NF_MATCH_ECN=m 131CONFIG_IP_NF_MATCH_ECN=m
@@ -157,6 +151,7 @@ CONFIG_BLK_DEV_LOOP=y
157CONFIG_BLK_DEV_NBD=m 151CONFIG_BLK_DEV_NBD=m
158CONFIG_BLK_DEV_RAM=y 152CONFIG_BLK_DEV_RAM=y
159CONFIG_BLK_DEV_RAM_SIZE=65536 153CONFIG_BLK_DEV_RAM_SIZE=65536
154CONFIG_VIRTIO_BLK=m
160CONFIG_IDE=y 155CONFIG_IDE=y
161CONFIG_BLK_DEV_IDECD=y 156CONFIG_BLK_DEV_IDECD=y
162CONFIG_BLK_DEV_GENERIC=y 157CONFIG_BLK_DEV_GENERIC=y
@@ -185,6 +180,10 @@ CONFIG_SCSI_IPR=y
185CONFIG_SCSI_QLA_FC=m 180CONFIG_SCSI_QLA_FC=m
186CONFIG_SCSI_QLA_ISCSI=m 181CONFIG_SCSI_QLA_ISCSI=m
187CONFIG_SCSI_LPFC=m 182CONFIG_SCSI_LPFC=m
183CONFIG_SCSI_VIRTIO=m
184CONFIG_SCSI_DH=m
185CONFIG_SCSI_DH_RDAC=m
186CONFIG_SCSI_DH_ALUA=m
188CONFIG_ATA=y 187CONFIG_ATA=y
189CONFIG_SATA_SIL24=y 188CONFIG_SATA_SIL24=y
190CONFIG_SATA_SVW=y 189CONFIG_SATA_SVW=y
@@ -203,6 +202,9 @@ CONFIG_DM_SNAPSHOT=m
203CONFIG_DM_MIRROR=m 202CONFIG_DM_MIRROR=m
204CONFIG_DM_ZERO=m 203CONFIG_DM_ZERO=m
205CONFIG_DM_MULTIPATH=m 204CONFIG_DM_MULTIPATH=m
205CONFIG_DM_MULTIPATH_QL=m
206CONFIG_DM_MULTIPATH_ST=m
207CONFIG_DM_UEVENT=y
206CONFIG_ADB_PMU=y 208CONFIG_ADB_PMU=y
207CONFIG_PMAC_SMU=y 209CONFIG_PMAC_SMU=y
208CONFIG_THERM_PM72=y 210CONFIG_THERM_PM72=y
@@ -216,6 +218,8 @@ CONFIG_DUMMY=m
216CONFIG_NETCONSOLE=y 218CONFIG_NETCONSOLE=y
217CONFIG_NETPOLL_TRAP=y 219CONFIG_NETPOLL_TRAP=y
218CONFIG_TUN=m 220CONFIG_TUN=m
221CONFIG_VIRTIO_NET=m
222CONFIG_VHOST_NET=m
219CONFIG_VORTEX=y 223CONFIG_VORTEX=y
220CONFIG_ACENIC=m 224CONFIG_ACENIC=m
221CONFIG_ACENIC_OMIT_TIGON_I=y 225CONFIG_ACENIC_OMIT_TIGON_I=y
@@ -262,6 +266,7 @@ CONFIG_HVC_CONSOLE=y
262CONFIG_HVC_RTAS=y 266CONFIG_HVC_RTAS=y
263CONFIG_HVC_BEAT=y 267CONFIG_HVC_BEAT=y
264CONFIG_HVCS=m 268CONFIG_HVCS=m
269CONFIG_VIRTIO_CONSOLE=m
265CONFIG_IBM_BSR=m 270CONFIG_IBM_BSR=m
266CONFIG_RAW_DRIVER=y 271CONFIG_RAW_DRIVER=y
267CONFIG_I2C_CHARDEV=y 272CONFIG_I2C_CHARDEV=y
@@ -301,7 +306,6 @@ CONFIG_HID_GYRATION=y
301CONFIG_HID_PANTHERLORD=y 306CONFIG_HID_PANTHERLORD=y
302CONFIG_HID_PETALYNX=y 307CONFIG_HID_PETALYNX=y
303CONFIG_HID_SAMSUNG=y 308CONFIG_HID_SAMSUNG=y
304CONFIG_HID_SONY=y
305CONFIG_HID_SUNPLUS=y 309CONFIG_HID_SUNPLUS=y
306CONFIG_USB_HIDDEV=y 310CONFIG_USB_HIDDEV=y
307CONFIG_USB=y 311CONFIG_USB=y
@@ -328,6 +332,8 @@ CONFIG_EDAC_MM_EDAC=y
328CONFIG_EDAC_PASEMI=y 332CONFIG_EDAC_PASEMI=y
329CONFIG_RTC_CLASS=y 333CONFIG_RTC_CLASS=y
330CONFIG_RTC_DRV_DS1307=y 334CONFIG_RTC_DRV_DS1307=y
335CONFIG_VIRTIO_PCI=m
336CONFIG_VIRTIO_BALLOON=m
331CONFIG_EXT2_FS=y 337CONFIG_EXT2_FS=y
332CONFIG_EXT2_FS_XATTR=y 338CONFIG_EXT2_FS_XATTR=y
333CONFIG_EXT2_FS_POSIX_ACL=y 339CONFIG_EXT2_FS_POSIX_ACL=y
@@ -386,21 +392,19 @@ CONFIG_NLS_UTF8=y
386CONFIG_CRC_T10DIF=y 392CONFIG_CRC_T10DIF=y
387CONFIG_MAGIC_SYSRQ=y 393CONFIG_MAGIC_SYSRQ=y
388CONFIG_DEBUG_KERNEL=y 394CONFIG_DEBUG_KERNEL=y
395CONFIG_DEBUG_STACK_USAGE=y
396CONFIG_DEBUG_STACKOVERFLOW=y
389CONFIG_LOCKUP_DETECTOR=y 397CONFIG_LOCKUP_DETECTOR=y
390CONFIG_DEBUG_MUTEXES=y 398CONFIG_DEBUG_MUTEXES=y
391CONFIG_DEBUG_STACK_USAGE=y
392CONFIG_LATENCYTOP=y 399CONFIG_LATENCYTOP=y
393CONFIG_SCHED_TRACER=y 400CONFIG_SCHED_TRACER=y
394CONFIG_BLK_DEV_IO_TRACE=y 401CONFIG_BLK_DEV_IO_TRACE=y
395CONFIG_DEBUG_STACKOVERFLOW=y
396CONFIG_CODE_PATCHING_SELFTEST=y 402CONFIG_CODE_PATCHING_SELFTEST=y
397CONFIG_FTR_FIXUP_SELFTEST=y 403CONFIG_FTR_FIXUP_SELFTEST=y
398CONFIG_MSI_BITMAP_SELFTEST=y 404CONFIG_MSI_BITMAP_SELFTEST=y
399CONFIG_XMON=y 405CONFIG_XMON=y
400CONFIG_BOOTX_TEXT=y 406CONFIG_BOOTX_TEXT=y
401CONFIG_PPC_EARLY_DEBUG=y 407CONFIG_PPC_EARLY_DEBUG=y
402CONFIG_PPC_EARLY_DEBUG_BOOTX=y
403CONFIG_CRYPTO_NULL=m
404CONFIG_CRYPTO_TEST=m 408CONFIG_CRYPTO_TEST=m
405CONFIG_CRYPTO_PCBC=m 409CONFIG_CRYPTO_PCBC=m
406CONFIG_CRYPTO_HMAC=y 410CONFIG_CRYPTO_HMAC=y
@@ -422,4 +426,3 @@ CONFIG_CRYPTO_DEV_NX_ENCRYPT=m
422CONFIG_VIRTUALIZATION=y 426CONFIG_VIRTUALIZATION=y
423CONFIG_KVM_BOOK3S_64=m 427CONFIG_KVM_BOOK3S_64=m
424CONFIG_KVM_BOOK3S_64_HV=y 428CONFIG_KVM_BOOK3S_64_HV=y
425CONFIG_VHOST_NET=m
diff --git a/arch/powerpc/configs/ppc64e_defconfig b/arch/powerpc/configs/ppc64e_defconfig
index 0085dc4642c5..f627fda08953 100644
--- a/arch/powerpc/configs/ppc64e_defconfig
+++ b/arch/powerpc/configs/ppc64e_defconfig
@@ -1,7 +1,6 @@
1CONFIG_PPC64=y 1CONFIG_PPC64=y
2CONFIG_PPC_BOOK3E_64=y 2CONFIG_PPC_BOOK3E_64=y
3CONFIG_SMP=y 3CONFIG_SMP=y
4CONFIG_EXPERIMENTAL=y
5CONFIG_SYSVIPC=y 4CONFIG_SYSVIPC=y
6CONFIG_POSIX_MQUEUE=y 5CONFIG_POSIX_MQUEUE=y
7CONFIG_NO_HZ=y 6CONFIG_NO_HZ=y
@@ -23,7 +22,7 @@ CONFIG_MODULE_SRCVERSION_ALL=y
23CONFIG_PARTITION_ADVANCED=y 22CONFIG_PARTITION_ADVANCED=y
24CONFIG_MAC_PARTITION=y 23CONFIG_MAC_PARTITION=y
25CONFIG_EFI_PARTITION=y 24CONFIG_EFI_PARTITION=y
26CONFIG_P5020_DS=y 25CONFIG_CORENET_GENERIC=y
27CONFIG_CPU_FREQ=y 26CONFIG_CPU_FREQ=y
28CONFIG_CPU_FREQ_GOV_POWERSAVE=y 27CONFIG_CPU_FREQ_GOV_POWERSAVE=y
29CONFIG_CPU_FREQ_GOV_USERSPACE=y 28CONFIG_CPU_FREQ_GOV_USERSPACE=y
@@ -61,7 +60,6 @@ CONFIG_NF_CONNTRACK_PPTP=m
61CONFIG_NF_CONNTRACK_SIP=m 60CONFIG_NF_CONNTRACK_SIP=m
62CONFIG_NF_CONNTRACK_TFTP=m 61CONFIG_NF_CONNTRACK_TFTP=m
63CONFIG_NF_CT_NETLINK=m 62CONFIG_NF_CT_NETLINK=m
64CONFIG_NETFILTER_TPROXY=m
65CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m 63CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m
66CONFIG_NETFILTER_XT_TARGET_CONNMARK=m 64CONFIG_NETFILTER_XT_TARGET_CONNMARK=m
67CONFIG_NETFILTER_XT_TARGET_DSCP=m 65CONFIG_NETFILTER_XT_TARGET_DSCP=m
@@ -103,7 +101,6 @@ CONFIG_NETFILTER_XT_MATCH_STRING=m
103CONFIG_NETFILTER_XT_MATCH_TCPMSS=m 101CONFIG_NETFILTER_XT_MATCH_TCPMSS=m
104CONFIG_NETFILTER_XT_MATCH_U32=m 102CONFIG_NETFILTER_XT_MATCH_U32=m
105CONFIG_NF_CONNTRACK_IPV4=m 103CONFIG_NF_CONNTRACK_IPV4=m
106CONFIG_IP_NF_QUEUE=m
107CONFIG_IP_NF_IPTABLES=m 104CONFIG_IP_NF_IPTABLES=m
108CONFIG_IP_NF_MATCH_AH=m 105CONFIG_IP_NF_MATCH_AH=m
109CONFIG_IP_NF_MATCH_ECN=m 106CONFIG_IP_NF_MATCH_ECN=m
@@ -193,7 +190,6 @@ CONFIG_PPP_SYNC_TTY=m
193CONFIG_INPUT_EVDEV=m 190CONFIG_INPUT_EVDEV=m
194CONFIG_INPUT_MISC=y 191CONFIG_INPUT_MISC=y
195# CONFIG_SERIO_SERPORT is not set 192# CONFIG_SERIO_SERPORT is not set
196CONFIG_VT_HW_CONSOLE_BINDING=y
197CONFIG_SERIAL_8250=y 193CONFIG_SERIAL_8250=y
198CONFIG_SERIAL_8250_CONSOLE=y 194CONFIG_SERIAL_8250_CONSOLE=y
199# CONFIG_HW_RANDOM is not set 195# CONFIG_HW_RANDOM is not set
@@ -230,7 +226,6 @@ CONFIG_HID_NTRIG=y
230CONFIG_HID_PANTHERLORD=y 226CONFIG_HID_PANTHERLORD=y
231CONFIG_HID_PETALYNX=y 227CONFIG_HID_PETALYNX=y
232CONFIG_HID_SAMSUNG=y 228CONFIG_HID_SAMSUNG=y
233CONFIG_HID_SONY=y
234CONFIG_HID_SUNPLUS=y 229CONFIG_HID_SUNPLUS=y
235CONFIG_HID_GREENASIA=y 230CONFIG_HID_GREENASIA=y
236CONFIG_HID_SMARTJOYPLUS=y 231CONFIG_HID_SMARTJOYPLUS=y
@@ -302,19 +297,18 @@ CONFIG_NLS_UTF8=y
302CONFIG_CRC_T10DIF=y 297CONFIG_CRC_T10DIF=y
303CONFIG_MAGIC_SYSRQ=y 298CONFIG_MAGIC_SYSRQ=y
304CONFIG_DEBUG_KERNEL=y 299CONFIG_DEBUG_KERNEL=y
300CONFIG_DEBUG_STACK_USAGE=y
301CONFIG_DEBUG_STACKOVERFLOW=y
305CONFIG_DETECT_HUNG_TASK=y 302CONFIG_DETECT_HUNG_TASK=y
306CONFIG_DEBUG_MUTEXES=y 303CONFIG_DEBUG_MUTEXES=y
307CONFIG_DEBUG_STACK_USAGE=y
308CONFIG_LATENCYTOP=y 304CONFIG_LATENCYTOP=y
309CONFIG_IRQSOFF_TRACER=y 305CONFIG_IRQSOFF_TRACER=y
310CONFIG_SCHED_TRACER=y 306CONFIG_SCHED_TRACER=y
311CONFIG_BLK_DEV_IO_TRACE=y 307CONFIG_BLK_DEV_IO_TRACE=y
312CONFIG_DEBUG_STACKOVERFLOW=y
313CONFIG_CODE_PATCHING_SELFTEST=y 308CONFIG_CODE_PATCHING_SELFTEST=y
314CONFIG_FTR_FIXUP_SELFTEST=y 309CONFIG_FTR_FIXUP_SELFTEST=y
315CONFIG_MSI_BITMAP_SELFTEST=y 310CONFIG_MSI_BITMAP_SELFTEST=y
316CONFIG_XMON=y 311CONFIG_XMON=y
317CONFIG_CRYPTO_NULL=m
318CONFIG_CRYPTO_TEST=m 312CONFIG_CRYPTO_TEST=m
319CONFIG_CRYPTO_CCM=m 313CONFIG_CRYPTO_CCM=m
320CONFIG_CRYPTO_GCM=m 314CONFIG_CRYPTO_GCM=m
diff --git a/arch/powerpc/configs/ppc6xx_defconfig b/arch/powerpc/configs/ppc6xx_defconfig
index 20ebfaf7234b..c2353bf059fd 100644
--- a/arch/powerpc/configs/ppc6xx_defconfig
+++ b/arch/powerpc/configs/ppc6xx_defconfig
@@ -71,7 +71,7 @@ CONFIG_QUICC_ENGINE=y
71CONFIG_QE_GPIO=y 71CONFIG_QE_GPIO=y
72CONFIG_PPC_BESTCOMM=y 72CONFIG_PPC_BESTCOMM=y
73CONFIG_GPIO_MPC8XXX=y 73CONFIG_GPIO_MPC8XXX=y
74CONFIG_MCU_MPC8349EMITX=m 74CONFIG_MCU_MPC8349EMITX=y
75CONFIG_HIGHMEM=y 75CONFIG_HIGHMEM=y
76CONFIG_NO_HZ=y 76CONFIG_NO_HZ=y
77CONFIG_HIGH_RES_TIMERS=y 77CONFIG_HIGH_RES_TIMERS=y
diff --git a/arch/powerpc/configs/pseries_defconfig b/arch/powerpc/configs/pseries_defconfig
index 1d4b9763895d..e9a8b4e0a0f6 100644
--- a/arch/powerpc/configs/pseries_defconfig
+++ b/arch/powerpc/configs/pseries_defconfig
@@ -3,7 +3,6 @@ CONFIG_ALTIVEC=y
3CONFIG_VSX=y 3CONFIG_VSX=y
4CONFIG_SMP=y 4CONFIG_SMP=y
5CONFIG_NR_CPUS=2048 5CONFIG_NR_CPUS=2048
6CONFIG_EXPERIMENTAL=y
7CONFIG_SYSVIPC=y 6CONFIG_SYSVIPC=y
8CONFIG_POSIX_MQUEUE=y 7CONFIG_POSIX_MQUEUE=y
9CONFIG_AUDIT=y 8CONFIG_AUDIT=y
@@ -33,7 +32,6 @@ CONFIG_MODULE_UNLOAD=y
33CONFIG_MODVERSIONS=y 32CONFIG_MODVERSIONS=y
34CONFIG_MODULE_SRCVERSION_ALL=y 33CONFIG_MODULE_SRCVERSION_ALL=y
35CONFIG_PARTITION_ADVANCED=y 34CONFIG_PARTITION_ADVANCED=y
36CONFIG_EFI_PARTITION=y
37CONFIG_PPC_SPLPAR=y 35CONFIG_PPC_SPLPAR=y
38CONFIG_SCANLOG=m 36CONFIG_SCANLOG=m
39CONFIG_PPC_SMLPAR=y 37CONFIG_PPC_SMLPAR=y
@@ -44,7 +42,6 @@ CONFIG_IBMEBUS=y
44CONFIG_HZ_100=y 42CONFIG_HZ_100=y
45CONFIG_BINFMT_MISC=m 43CONFIG_BINFMT_MISC=m
46CONFIG_PPC_TRANSACTIONAL_MEM=y 44CONFIG_PPC_TRANSACTIONAL_MEM=y
47CONFIG_HOTPLUG_CPU=y
48CONFIG_KEXEC=y 45CONFIG_KEXEC=y
49CONFIG_IRQ_ALL_CPUS=y 46CONFIG_IRQ_ALL_CPUS=y
50CONFIG_MEMORY_HOTPLUG=y 47CONFIG_MEMORY_HOTPLUG=y
@@ -52,7 +49,6 @@ CONFIG_MEMORY_HOTREMOVE=y
52CONFIG_PPC_64K_PAGES=y 49CONFIG_PPC_64K_PAGES=y
53CONFIG_PPC_SUBPAGE_PROT=y 50CONFIG_PPC_SUBPAGE_PROT=y
54CONFIG_SCHED_SMT=y 51CONFIG_SCHED_SMT=y
55CONFIG_PPC_DENORMALISATION=y
56CONFIG_HOTPLUG_PCI=y 52CONFIG_HOTPLUG_PCI=y
57CONFIG_HOTPLUG_PCI_RPA=m 53CONFIG_HOTPLUG_PCI_RPA=m
58CONFIG_HOTPLUG_PCI_RPA_DLPAR=m 54CONFIG_HOTPLUG_PCI_RPA_DLPAR=m
@@ -113,7 +109,6 @@ CONFIG_NETFILTER_XT_MATCH_TCPMSS=m
113CONFIG_NETFILTER_XT_MATCH_TIME=m 109CONFIG_NETFILTER_XT_MATCH_TIME=m
114CONFIG_NETFILTER_XT_MATCH_U32=m 110CONFIG_NETFILTER_XT_MATCH_U32=m
115CONFIG_NF_CONNTRACK_IPV4=m 111CONFIG_NF_CONNTRACK_IPV4=m
116CONFIG_IP_NF_QUEUE=m
117CONFIG_IP_NF_IPTABLES=m 112CONFIG_IP_NF_IPTABLES=m
118CONFIG_IP_NF_MATCH_AH=m 113CONFIG_IP_NF_MATCH_AH=m
119CONFIG_IP_NF_MATCH_ECN=m 114CONFIG_IP_NF_MATCH_ECN=m
@@ -132,6 +127,7 @@ CONFIG_BLK_DEV_LOOP=y
132CONFIG_BLK_DEV_NBD=m 127CONFIG_BLK_DEV_NBD=m
133CONFIG_BLK_DEV_RAM=y 128CONFIG_BLK_DEV_RAM=y
134CONFIG_BLK_DEV_RAM_SIZE=65536 129CONFIG_BLK_DEV_RAM_SIZE=65536
130CONFIG_VIRTIO_BLK=m
135CONFIG_IDE=y 131CONFIG_IDE=y
136CONFIG_BLK_DEV_IDECD=y 132CONFIG_BLK_DEV_IDECD=y
137CONFIG_BLK_DEV_GENERIC=y 133CONFIG_BLK_DEV_GENERIC=y
@@ -157,6 +153,10 @@ CONFIG_SCSI_IPR=y
157CONFIG_SCSI_QLA_FC=m 153CONFIG_SCSI_QLA_FC=m
158CONFIG_SCSI_QLA_ISCSI=m 154CONFIG_SCSI_QLA_ISCSI=m
159CONFIG_SCSI_LPFC=m 155CONFIG_SCSI_LPFC=m
156CONFIG_SCSI_VIRTIO=m
157CONFIG_SCSI_DH=m
158CONFIG_SCSI_DH_RDAC=m
159CONFIG_SCSI_DH_ALUA=m
160CONFIG_ATA=y 160CONFIG_ATA=y
161# CONFIG_ATA_SFF is not set 161# CONFIG_ATA_SFF is not set
162CONFIG_MD=y 162CONFIG_MD=y
@@ -174,11 +174,16 @@ CONFIG_DM_SNAPSHOT=m
174CONFIG_DM_MIRROR=m 174CONFIG_DM_MIRROR=m
175CONFIG_DM_ZERO=m 175CONFIG_DM_ZERO=m
176CONFIG_DM_MULTIPATH=m 176CONFIG_DM_MULTIPATH=m
177CONFIG_DM_MULTIPATH_QL=m
178CONFIG_DM_MULTIPATH_ST=m
179CONFIG_DM_UEVENT=y
177CONFIG_BONDING=m 180CONFIG_BONDING=m
178CONFIG_DUMMY=m 181CONFIG_DUMMY=m
179CONFIG_NETCONSOLE=y 182CONFIG_NETCONSOLE=y
180CONFIG_NETPOLL_TRAP=y 183CONFIG_NETPOLL_TRAP=y
181CONFIG_TUN=m 184CONFIG_TUN=m
185CONFIG_VIRTIO_NET=m
186CONFIG_VHOST_NET=m
182CONFIG_VORTEX=y 187CONFIG_VORTEX=y
183CONFIG_ACENIC=m 188CONFIG_ACENIC=m
184CONFIG_ACENIC_OMIT_TIGON_I=y 189CONFIG_ACENIC_OMIT_TIGON_I=y
@@ -216,6 +221,7 @@ CONFIG_SERIAL_JSM=m
216CONFIG_HVC_CONSOLE=y 221CONFIG_HVC_CONSOLE=y
217CONFIG_HVC_RTAS=y 222CONFIG_HVC_RTAS=y
218CONFIG_HVCS=m 223CONFIG_HVCS=m
224CONFIG_VIRTIO_CONSOLE=m
219CONFIG_IBM_BSR=m 225CONFIG_IBM_BSR=m
220CONFIG_GEN_RTC=y 226CONFIG_GEN_RTC=y
221CONFIG_RAW_DRIVER=y 227CONFIG_RAW_DRIVER=y
@@ -237,7 +243,6 @@ CONFIG_HID_GYRATION=y
237CONFIG_HID_PANTHERLORD=y 243CONFIG_HID_PANTHERLORD=y
238CONFIG_HID_PETALYNX=y 244CONFIG_HID_PETALYNX=y
239CONFIG_HID_SAMSUNG=y 245CONFIG_HID_SAMSUNG=y
240CONFIG_HID_SONY=y
241CONFIG_HID_SUNPLUS=y 246CONFIG_HID_SUNPLUS=y
242CONFIG_USB_HIDDEV=y 247CONFIG_USB_HIDDEV=y
243CONFIG_USB=y 248CONFIG_USB=y
@@ -258,6 +263,8 @@ CONFIG_INFINIBAND_IPOIB=m
258CONFIG_INFINIBAND_IPOIB_CM=y 263CONFIG_INFINIBAND_IPOIB_CM=y
259CONFIG_INFINIBAND_SRP=m 264CONFIG_INFINIBAND_SRP=m
260CONFIG_INFINIBAND_ISER=m 265CONFIG_INFINIBAND_ISER=m
266CONFIG_VIRTIO_PCI=m
267CONFIG_VIRTIO_BALLOON=m
261CONFIG_EXT2_FS=y 268CONFIG_EXT2_FS=y
262CONFIG_EXT2_FS_XATTR=y 269CONFIG_EXT2_FS_XATTR=y
263CONFIG_EXT2_FS_POSIX_ACL=y 270CONFIG_EXT2_FS_POSIX_ACL=y
@@ -314,18 +321,17 @@ CONFIG_NLS_UTF8=y
314CONFIG_CRC_T10DIF=y 321CONFIG_CRC_T10DIF=y
315CONFIG_MAGIC_SYSRQ=y 322CONFIG_MAGIC_SYSRQ=y
316CONFIG_DEBUG_KERNEL=y 323CONFIG_DEBUG_KERNEL=y
317CONFIG_LOCKUP_DETECTOR=y
318CONFIG_DEBUG_STACK_USAGE=y 324CONFIG_DEBUG_STACK_USAGE=y
325CONFIG_DEBUG_STACKOVERFLOW=y
326CONFIG_LOCKUP_DETECTOR=y
319CONFIG_LATENCYTOP=y 327CONFIG_LATENCYTOP=y
320CONFIG_SCHED_TRACER=y 328CONFIG_SCHED_TRACER=y
321CONFIG_BLK_DEV_IO_TRACE=y 329CONFIG_BLK_DEV_IO_TRACE=y
322CONFIG_DEBUG_STACKOVERFLOW=y
323CONFIG_CODE_PATCHING_SELFTEST=y 330CONFIG_CODE_PATCHING_SELFTEST=y
324CONFIG_FTR_FIXUP_SELFTEST=y 331CONFIG_FTR_FIXUP_SELFTEST=y
325CONFIG_MSI_BITMAP_SELFTEST=y 332CONFIG_MSI_BITMAP_SELFTEST=y
326CONFIG_XMON=y 333CONFIG_XMON=y
327CONFIG_XMON_DEFAULT=y 334CONFIG_XMON_DEFAULT=y
328CONFIG_CRYPTO_NULL=m
329CONFIG_CRYPTO_TEST=m 335CONFIG_CRYPTO_TEST=m
330CONFIG_CRYPTO_PCBC=m 336CONFIG_CRYPTO_PCBC=m
331CONFIG_CRYPTO_HMAC=y 337CONFIG_CRYPTO_HMAC=y
@@ -347,4 +353,3 @@ CONFIG_CRYPTO_DEV_NX_ENCRYPT=m
347CONFIG_VIRTUALIZATION=y 353CONFIG_VIRTUALIZATION=y
348CONFIG_KVM_BOOK3S_64=m 354CONFIG_KVM_BOOK3S_64=m
349CONFIG_KVM_BOOK3S_64_HV=y 355CONFIG_KVM_BOOK3S_64_HV=y
350CONFIG_VHOST_NET=m
diff --git a/arch/powerpc/include/asm/Kbuild b/arch/powerpc/include/asm/Kbuild
index 704e6f10ae80..d8f9d2f18a23 100644
--- a/arch/powerpc/include/asm/Kbuild
+++ b/arch/powerpc/include/asm/Kbuild
@@ -2,4 +2,5 @@
2generic-y += clkdev.h 2generic-y += clkdev.h
3generic-y += rwsem.h 3generic-y += rwsem.h
4generic-y += trace_clock.h 4generic-y += trace_clock.h
5generic-y += preempt.h
5generic-y += vtime.h \ No newline at end of file 6generic-y += vtime.h \ No newline at end of file
diff --git a/arch/powerpc/include/asm/archrandom.h b/arch/powerpc/include/asm/archrandom.h
new file mode 100644
index 000000000000..d853d163ba47
--- /dev/null
+++ b/arch/powerpc/include/asm/archrandom.h
@@ -0,0 +1,32 @@
1#ifndef _ASM_POWERPC_ARCHRANDOM_H
2#define _ASM_POWERPC_ARCHRANDOM_H
3
4#ifdef CONFIG_ARCH_RANDOM
5
6#include <asm/machdep.h>
7
8static inline int arch_get_random_long(unsigned long *v)
9{
10 if (ppc_md.get_random_long)
11 return ppc_md.get_random_long(v);
12
13 return 0;
14}
15
16static inline int arch_get_random_int(unsigned int *v)
17{
18 unsigned long val;
19 int rc;
20
21 rc = arch_get_random_long(&val);
22 if (rc)
23 *v = val;
24
25 return rc;
26}
27
28int powernv_get_random_long(unsigned long *v);
29
30#endif /* CONFIG_ARCH_RANDOM */
31
32#endif /* _ASM_POWERPC_ARCHRANDOM_H */
diff --git a/arch/powerpc/include/asm/checksum.h b/arch/powerpc/include/asm/checksum.h
index ce0c28495f9a..8251a3ba870f 100644
--- a/arch/powerpc/include/asm/checksum.h
+++ b/arch/powerpc/include/asm/checksum.h
@@ -14,6 +14,9 @@
14 * which always checksum on 4 octet boundaries. ihl is the number 14 * which always checksum on 4 octet boundaries. ihl is the number
15 * of 32-bit words and is always >= 5. 15 * of 32-bit words and is always >= 5.
16 */ 16 */
17#ifdef CONFIG_GENERIC_CSUM
18#include <asm-generic/checksum.h>
19#else
17extern __sum16 ip_fast_csum(const void *iph, unsigned int ihl); 20extern __sum16 ip_fast_csum(const void *iph, unsigned int ihl);
18 21
19/* 22/*
@@ -123,5 +126,7 @@ static inline __wsum csum_tcpudp_nofold(__be32 saddr, __be32 daddr,
123 return sum; 126 return sum;
124#endif 127#endif
125} 128}
129
130#endif
126#endif /* __KERNEL__ */ 131#endif /* __KERNEL__ */
127#endif 132#endif
diff --git a/arch/powerpc/include/asm/emulated_ops.h b/arch/powerpc/include/asm/emulated_ops.h
index 5a8b82aa7241..4358e3002f35 100644
--- a/arch/powerpc/include/asm/emulated_ops.h
+++ b/arch/powerpc/include/asm/emulated_ops.h
@@ -43,6 +43,7 @@ extern struct ppc_emulated {
43 struct ppc_emulated_entry popcntb; 43 struct ppc_emulated_entry popcntb;
44 struct ppc_emulated_entry spe; 44 struct ppc_emulated_entry spe;
45 struct ppc_emulated_entry string; 45 struct ppc_emulated_entry string;
46 struct ppc_emulated_entry sync;
46 struct ppc_emulated_entry unaligned; 47 struct ppc_emulated_entry unaligned;
47#ifdef CONFIG_MATH_EMULATION 48#ifdef CONFIG_MATH_EMULATION
48 struct ppc_emulated_entry math; 49 struct ppc_emulated_entry math;
diff --git a/arch/powerpc/include/asm/hvsi.h b/arch/powerpc/include/asm/hvsi.h
index d3f64f361814..d4a5315718ca 100644
--- a/arch/powerpc/include/asm/hvsi.h
+++ b/arch/powerpc/include/asm/hvsi.h
@@ -25,7 +25,7 @@
25struct hvsi_header { 25struct hvsi_header {
26 uint8_t type; 26 uint8_t type;
27 uint8_t len; 27 uint8_t len;
28 uint16_t seqno; 28 __be16 seqno;
29} __attribute__((packed)); 29} __attribute__((packed));
30 30
31struct hvsi_data { 31struct hvsi_data {
@@ -35,24 +35,24 @@ struct hvsi_data {
35 35
36struct hvsi_control { 36struct hvsi_control {
37 struct hvsi_header hdr; 37 struct hvsi_header hdr;
38 uint16_t verb; 38 __be16 verb;
39 /* optional depending on verb: */ 39 /* optional depending on verb: */
40 uint32_t word; 40 __be32 word;
41 uint32_t mask; 41 __be32 mask;
42} __attribute__((packed)); 42} __attribute__((packed));
43 43
44struct hvsi_query { 44struct hvsi_query {
45 struct hvsi_header hdr; 45 struct hvsi_header hdr;
46 uint16_t verb; 46 __be16 verb;
47} __attribute__((packed)); 47} __attribute__((packed));
48 48
49struct hvsi_query_response { 49struct hvsi_query_response {
50 struct hvsi_header hdr; 50 struct hvsi_header hdr;
51 uint16_t verb; 51 __be16 verb;
52 uint16_t query_seqno; 52 __be16 query_seqno;
53 union { 53 union {
54 uint8_t version; 54 uint8_t version;
55 uint32_t mctrl_word; 55 __be32 mctrl_word;
56 } u; 56 } u;
57} __attribute__((packed)); 57} __attribute__((packed));
58 58
diff --git a/arch/powerpc/include/asm/io.h b/arch/powerpc/include/asm/io.h
index 5a64757dc0d1..575fbf81fad0 100644
--- a/arch/powerpc/include/asm/io.h
+++ b/arch/powerpc/include/asm/io.h
@@ -21,7 +21,7 @@ extern struct pci_dev *isa_bridge_pcidev;
21/* 21/*
22 * has legacy ISA devices ? 22 * has legacy ISA devices ?
23 */ 23 */
24#define arch_has_dev_port() (isa_bridge_pcidev != NULL) 24#define arch_has_dev_port() (isa_bridge_pcidev != NULL || isa_io_special)
25#endif 25#endif
26 26
27#include <linux/device.h> 27#include <linux/device.h>
@@ -113,7 +113,7 @@ extern bool isa_io_special;
113 113
114/* gcc 4.0 and older doesn't have 'Z' constraint */ 114/* gcc 4.0 and older doesn't have 'Z' constraint */
115#if __GNUC__ < 4 || (__GNUC__ == 4 && __GNUC_MINOR__ == 0) 115#if __GNUC__ < 4 || (__GNUC__ == 4 && __GNUC_MINOR__ == 0)
116#define DEF_MMIO_IN_LE(name, size, insn) \ 116#define DEF_MMIO_IN_X(name, size, insn) \
117static inline u##size name(const volatile u##size __iomem *addr) \ 117static inline u##size name(const volatile u##size __iomem *addr) \
118{ \ 118{ \
119 u##size ret; \ 119 u##size ret; \
@@ -122,7 +122,7 @@ static inline u##size name(const volatile u##size __iomem *addr) \
122 return ret; \ 122 return ret; \
123} 123}
124 124
125#define DEF_MMIO_OUT_LE(name, size, insn) \ 125#define DEF_MMIO_OUT_X(name, size, insn) \
126static inline void name(volatile u##size __iomem *addr, u##size val) \ 126static inline void name(volatile u##size __iomem *addr, u##size val) \
127{ \ 127{ \
128 __asm__ __volatile__("sync;"#insn" %1,0,%2" \ 128 __asm__ __volatile__("sync;"#insn" %1,0,%2" \
@@ -130,7 +130,7 @@ static inline void name(volatile u##size __iomem *addr, u##size val) \
130 IO_SET_SYNC_FLAG(); \ 130 IO_SET_SYNC_FLAG(); \
131} 131}
132#else /* newer gcc */ 132#else /* newer gcc */
133#define DEF_MMIO_IN_LE(name, size, insn) \ 133#define DEF_MMIO_IN_X(name, size, insn) \
134static inline u##size name(const volatile u##size __iomem *addr) \ 134static inline u##size name(const volatile u##size __iomem *addr) \
135{ \ 135{ \
136 u##size ret; \ 136 u##size ret; \
@@ -139,7 +139,7 @@ static inline u##size name(const volatile u##size __iomem *addr) \
139 return ret; \ 139 return ret; \
140} 140}
141 141
142#define DEF_MMIO_OUT_LE(name, size, insn) \ 142#define DEF_MMIO_OUT_X(name, size, insn) \
143static inline void name(volatile u##size __iomem *addr, u##size val) \ 143static inline void name(volatile u##size __iomem *addr, u##size val) \
144{ \ 144{ \
145 __asm__ __volatile__("sync;"#insn" %1,%y0" \ 145 __asm__ __volatile__("sync;"#insn" %1,%y0" \
@@ -148,7 +148,7 @@ static inline void name(volatile u##size __iomem *addr, u##size val) \
148} 148}
149#endif 149#endif
150 150
151#define DEF_MMIO_IN_BE(name, size, insn) \ 151#define DEF_MMIO_IN_D(name, size, insn) \
152static inline u##size name(const volatile u##size __iomem *addr) \ 152static inline u##size name(const volatile u##size __iomem *addr) \
153{ \ 153{ \
154 u##size ret; \ 154 u##size ret; \
@@ -157,7 +157,7 @@ static inline u##size name(const volatile u##size __iomem *addr) \
157 return ret; \ 157 return ret; \
158} 158}
159 159
160#define DEF_MMIO_OUT_BE(name, size, insn) \ 160#define DEF_MMIO_OUT_D(name, size, insn) \
161static inline void name(volatile u##size __iomem *addr, u##size val) \ 161static inline void name(volatile u##size __iomem *addr, u##size val) \
162{ \ 162{ \
163 __asm__ __volatile__("sync;"#insn"%U0%X0 %1,%0" \ 163 __asm__ __volatile__("sync;"#insn"%U0%X0 %1,%0" \
@@ -165,22 +165,37 @@ static inline void name(volatile u##size __iomem *addr, u##size val) \
165 IO_SET_SYNC_FLAG(); \ 165 IO_SET_SYNC_FLAG(); \
166} 166}
167 167
168DEF_MMIO_IN_D(in_8, 8, lbz);
169DEF_MMIO_OUT_D(out_8, 8, stb);
168 170
169DEF_MMIO_IN_BE(in_8, 8, lbz); 171#ifdef __BIG_ENDIAN__
170DEF_MMIO_IN_BE(in_be16, 16, lhz); 172DEF_MMIO_IN_D(in_be16, 16, lhz);
171DEF_MMIO_IN_BE(in_be32, 32, lwz); 173DEF_MMIO_IN_D(in_be32, 32, lwz);
172DEF_MMIO_IN_LE(in_le16, 16, lhbrx); 174DEF_MMIO_IN_X(in_le16, 16, lhbrx);
173DEF_MMIO_IN_LE(in_le32, 32, lwbrx); 175DEF_MMIO_IN_X(in_le32, 32, lwbrx);
174 176
175DEF_MMIO_OUT_BE(out_8, 8, stb); 177DEF_MMIO_OUT_D(out_be16, 16, sth);
176DEF_MMIO_OUT_BE(out_be16, 16, sth); 178DEF_MMIO_OUT_D(out_be32, 32, stw);
177DEF_MMIO_OUT_BE(out_be32, 32, stw); 179DEF_MMIO_OUT_X(out_le16, 16, sthbrx);
178DEF_MMIO_OUT_LE(out_le16, 16, sthbrx); 180DEF_MMIO_OUT_X(out_le32, 32, stwbrx);
179DEF_MMIO_OUT_LE(out_le32, 32, stwbrx); 181#else
182DEF_MMIO_IN_X(in_be16, 16, lhbrx);
183DEF_MMIO_IN_X(in_be32, 32, lwbrx);
184DEF_MMIO_IN_D(in_le16, 16, lhz);
185DEF_MMIO_IN_D(in_le32, 32, lwz);
186
187DEF_MMIO_OUT_X(out_be16, 16, sthbrx);
188DEF_MMIO_OUT_X(out_be32, 32, stwbrx);
189DEF_MMIO_OUT_D(out_le16, 16, sth);
190DEF_MMIO_OUT_D(out_le32, 32, stw);
191
192#endif /* __BIG_ENDIAN */
180 193
181#ifdef __powerpc64__ 194#ifdef __powerpc64__
182DEF_MMIO_OUT_BE(out_be64, 64, std); 195
183DEF_MMIO_IN_BE(in_be64, 64, ld); 196#ifdef __BIG_ENDIAN__
197DEF_MMIO_OUT_D(out_be64, 64, std);
198DEF_MMIO_IN_D(in_be64, 64, ld);
184 199
185/* There is no asm instructions for 64 bits reverse loads and stores */ 200/* There is no asm instructions for 64 bits reverse loads and stores */
186static inline u64 in_le64(const volatile u64 __iomem *addr) 201static inline u64 in_le64(const volatile u64 __iomem *addr)
@@ -192,6 +207,22 @@ static inline void out_le64(volatile u64 __iomem *addr, u64 val)
192{ 207{
193 out_be64(addr, swab64(val)); 208 out_be64(addr, swab64(val));
194} 209}
210#else
211DEF_MMIO_OUT_D(out_le64, 64, std);
212DEF_MMIO_IN_D(in_le64, 64, ld);
213
214/* There is no asm instructions for 64 bits reverse loads and stores */
215static inline u64 in_be64(const volatile u64 __iomem *addr)
216{
217 return swab64(in_le64(addr));
218}
219
220static inline void out_be64(volatile u64 __iomem *addr, u64 val)
221{
222 out_le64(addr, swab64(val));
223}
224
225#endif
195#endif /* __powerpc64__ */ 226#endif /* __powerpc64__ */
196 227
197/* 228/*
diff --git a/arch/powerpc/include/asm/lppaca.h b/arch/powerpc/include/asm/lppaca.h
index 4470d1e34d23..844c28de7ec0 100644
--- a/arch/powerpc/include/asm/lppaca.h
+++ b/arch/powerpc/include/asm/lppaca.h
@@ -84,8 +84,8 @@ struct lppaca {
84 * the processor is yielded (either because of an OS yield or a 84 * the processor is yielded (either because of an OS yield or a
85 * hypervisor preempt). An even value implies that the processor is 85 * hypervisor preempt). An even value implies that the processor is
86 * currently executing. 86 * currently executing.
87 * NOTE: This value will ALWAYS be zero for dedicated processors and 87 * NOTE: Even dedicated processor partitions can yield so this
88 * will NEVER be zero for shared processors (ie, initialized to a 1). 88 * field cannot be used to determine if we are shared or dedicated.
89 */ 89 */
90 volatile __be32 yield_count; 90 volatile __be32 yield_count;
91 volatile __be32 dispersion_count; /* dispatch changed physical cpu */ 91 volatile __be32 dispersion_count; /* dispatch changed physical cpu */
@@ -106,15 +106,15 @@ extern struct lppaca lppaca[];
106#define lppaca_of(cpu) (*paca[cpu].lppaca_ptr) 106#define lppaca_of(cpu) (*paca[cpu].lppaca_ptr)
107 107
108/* 108/*
109 * Old kernels used a reserved bit in the VPA to determine if it was running 109 * We are using a non architected field to determine if a partition is
110 * in shared processor mode. New kernels look for a non zero yield count 110 * shared or dedicated. This currently works on both KVM and PHYP, but
111 * but KVM still needs to set the bit to keep the old stuff happy. 111 * we will have to transition to something better.
112 */ 112 */
113#define LPPACA_OLD_SHARED_PROC 2 113#define LPPACA_OLD_SHARED_PROC 2
114 114
115static inline bool lppaca_shared_proc(struct lppaca *l) 115static inline bool lppaca_shared_proc(struct lppaca *l)
116{ 116{
117 return l->yield_count != 0; 117 return !!(l->__old_status & LPPACA_OLD_SHARED_PROC);
118} 118}
119 119
120/* 120/*
diff --git a/arch/powerpc/include/asm/machdep.h b/arch/powerpc/include/asm/machdep.h
index 8b480901165a..ad3025d0880b 100644
--- a/arch/powerpc/include/asm/machdep.h
+++ b/arch/powerpc/include/asm/machdep.h
@@ -78,6 +78,18 @@ struct machdep_calls {
78 long index); 78 long index);
79 void (*tce_flush)(struct iommu_table *tbl); 79 void (*tce_flush)(struct iommu_table *tbl);
80 80
81 /* _rm versions are for real mode use only */
82 int (*tce_build_rm)(struct iommu_table *tbl,
83 long index,
84 long npages,
85 unsigned long uaddr,
86 enum dma_data_direction direction,
87 struct dma_attrs *attrs);
88 void (*tce_free_rm)(struct iommu_table *tbl,
89 long index,
90 long npages);
91 void (*tce_flush_rm)(struct iommu_table *tbl);
92
81 void __iomem * (*ioremap)(phys_addr_t addr, unsigned long size, 93 void __iomem * (*ioremap)(phys_addr_t addr, unsigned long size,
82 unsigned long flags, void *caller); 94 unsigned long flags, void *caller);
83 void (*iounmap)(volatile void __iomem *token); 95 void (*iounmap)(volatile void __iomem *token);
@@ -263,6 +275,10 @@ struct machdep_calls {
263 ssize_t (*cpu_probe)(const char *, size_t); 275 ssize_t (*cpu_probe)(const char *, size_t);
264 ssize_t (*cpu_release)(const char *, size_t); 276 ssize_t (*cpu_release)(const char *, size_t);
265#endif 277#endif
278
279#ifdef CONFIG_ARCH_RANDOM
280 int (*get_random_long)(unsigned long *v);
281#endif
266}; 282};
267 283
268extern void e500_idle(void); 284extern void e500_idle(void);
diff --git a/arch/powerpc/include/asm/mmu-hash64.h b/arch/powerpc/include/asm/mmu-hash64.h
index c4cf01197273..807014dde821 100644
--- a/arch/powerpc/include/asm/mmu-hash64.h
+++ b/arch/powerpc/include/asm/mmu-hash64.h
@@ -135,8 +135,8 @@ extern char initial_stab[];
135#ifndef __ASSEMBLY__ 135#ifndef __ASSEMBLY__
136 136
137struct hash_pte { 137struct hash_pte {
138 unsigned long v; 138 __be64 v;
139 unsigned long r; 139 __be64 r;
140}; 140};
141 141
142extern struct hash_pte *htab_address; 142extern struct hash_pte *htab_address;
diff --git a/arch/powerpc/include/asm/opal.h b/arch/powerpc/include/asm/opal.h
index c5cd72833d6e..033c06be1d84 100644
--- a/arch/powerpc/include/asm/opal.h
+++ b/arch/powerpc/include/asm/opal.h
@@ -129,6 +129,9 @@ extern int opal_enter_rtas(struct rtas_args *args,
129#define OPAL_LPC_READ 67 129#define OPAL_LPC_READ 67
130#define OPAL_LPC_WRITE 68 130#define OPAL_LPC_WRITE 68
131#define OPAL_RETURN_CPU 69 131#define OPAL_RETURN_CPU 69
132#define OPAL_FLASH_VALIDATE 76
133#define OPAL_FLASH_MANAGE 77
134#define OPAL_FLASH_UPDATE 78
132 135
133#ifndef __ASSEMBLY__ 136#ifndef __ASSEMBLY__
134 137
@@ -460,10 +463,12 @@ enum {
460 463
461enum { 464enum {
462 OPAL_PHB_ERROR_DATA_TYPE_P7IOC = 1, 465 OPAL_PHB_ERROR_DATA_TYPE_P7IOC = 1,
466 OPAL_PHB_ERROR_DATA_TYPE_PHB3 = 2
463}; 467};
464 468
465enum { 469enum {
466 OPAL_P7IOC_NUM_PEST_REGS = 128, 470 OPAL_P7IOC_NUM_PEST_REGS = 128,
471 OPAL_PHB3_NUM_PEST_REGS = 256
467}; 472};
468 473
469struct OpalIoPhbErrorCommon { 474struct OpalIoPhbErrorCommon {
@@ -531,28 +536,94 @@ struct OpalIoP7IOCPhbErrorData {
531 uint64_t pestB[OPAL_P7IOC_NUM_PEST_REGS]; 536 uint64_t pestB[OPAL_P7IOC_NUM_PEST_REGS];
532}; 537};
533 538
539struct OpalIoPhb3ErrorData {
540 struct OpalIoPhbErrorCommon common;
541
542 uint32_t brdgCtl;
543
544 /* PHB3 UTL regs */
545 uint32_t portStatusReg;
546 uint32_t rootCmplxStatus;
547 uint32_t busAgentStatus;
548
549 /* PHB3 cfg regs */
550 uint32_t deviceStatus;
551 uint32_t slotStatus;
552 uint32_t linkStatus;
553 uint32_t devCmdStatus;
554 uint32_t devSecStatus;
555
556 /* cfg AER regs */
557 uint32_t rootErrorStatus;
558 uint32_t uncorrErrorStatus;
559 uint32_t corrErrorStatus;
560 uint32_t tlpHdr1;
561 uint32_t tlpHdr2;
562 uint32_t tlpHdr3;
563 uint32_t tlpHdr4;
564 uint32_t sourceId;
565
566 uint32_t rsv3;
567
568 /* Record data about the call to allocate a buffer */
569 uint64_t errorClass;
570 uint64_t correlator;
571
572 uint64_t nFir; /* 000 */
573 uint64_t nFirMask; /* 003 */
574 uint64_t nFirWOF; /* 008 */
575
576 /* PHB3 MMIO Error Regs */
577 uint64_t phbPlssr; /* 120 */
578 uint64_t phbCsr; /* 110 */
579 uint64_t lemFir; /* C00 */
580 uint64_t lemErrorMask; /* C18 */
581 uint64_t lemWOF; /* C40 */
582 uint64_t phbErrorStatus; /* C80 */
583 uint64_t phbFirstErrorStatus; /* C88 */
584 uint64_t phbErrorLog0; /* CC0 */
585 uint64_t phbErrorLog1; /* CC8 */
586 uint64_t mmioErrorStatus; /* D00 */
587 uint64_t mmioFirstErrorStatus; /* D08 */
588 uint64_t mmioErrorLog0; /* D40 */
589 uint64_t mmioErrorLog1; /* D48 */
590 uint64_t dma0ErrorStatus; /* D80 */
591 uint64_t dma0FirstErrorStatus; /* D88 */
592 uint64_t dma0ErrorLog0; /* DC0 */
593 uint64_t dma0ErrorLog1; /* DC8 */
594 uint64_t dma1ErrorStatus; /* E00 */
595 uint64_t dma1FirstErrorStatus; /* E08 */
596 uint64_t dma1ErrorLog0; /* E40 */
597 uint64_t dma1ErrorLog1; /* E48 */
598 uint64_t pestA[OPAL_PHB3_NUM_PEST_REGS];
599 uint64_t pestB[OPAL_PHB3_NUM_PEST_REGS];
600};
601
534typedef struct oppanel_line { 602typedef struct oppanel_line {
535 const char * line; 603 const char * line;
536 uint64_t line_len; 604 uint64_t line_len;
537} oppanel_line_t; 605} oppanel_line_t;
538 606
607/* /sys/firmware/opal */
608extern struct kobject *opal_kobj;
609
539/* API functions */ 610/* API functions */
540int64_t opal_console_write(int64_t term_number, int64_t *length, 611int64_t opal_console_write(int64_t term_number, __be64 *length,
541 const uint8_t *buffer); 612 const uint8_t *buffer);
542int64_t opal_console_read(int64_t term_number, int64_t *length, 613int64_t opal_console_read(int64_t term_number, __be64 *length,
543 uint8_t *buffer); 614 uint8_t *buffer);
544int64_t opal_console_write_buffer_space(int64_t term_number, 615int64_t opal_console_write_buffer_space(int64_t term_number,
545 int64_t *length); 616 __be64 *length);
546int64_t opal_rtc_read(uint32_t *year_month_day, 617int64_t opal_rtc_read(__be32 *year_month_day,
547 uint64_t *hour_minute_second_millisecond); 618 __be64 *hour_minute_second_millisecond);
548int64_t opal_rtc_write(uint32_t year_month_day, 619int64_t opal_rtc_write(uint32_t year_month_day,
549 uint64_t hour_minute_second_millisecond); 620 uint64_t hour_minute_second_millisecond);
550int64_t opal_cec_power_down(uint64_t request); 621int64_t opal_cec_power_down(uint64_t request);
551int64_t opal_cec_reboot(void); 622int64_t opal_cec_reboot(void);
552int64_t opal_read_nvram(uint64_t buffer, uint64_t size, uint64_t offset); 623int64_t opal_read_nvram(uint64_t buffer, uint64_t size, uint64_t offset);
553int64_t opal_write_nvram(uint64_t buffer, uint64_t size, uint64_t offset); 624int64_t opal_write_nvram(uint64_t buffer, uint64_t size, uint64_t offset);
554int64_t opal_handle_interrupt(uint64_t isn, uint64_t *outstanding_event_mask); 625int64_t opal_handle_interrupt(uint64_t isn, __be64 *outstanding_event_mask);
555int64_t opal_poll_events(uint64_t *outstanding_event_mask); 626int64_t opal_poll_events(__be64 *outstanding_event_mask);
556int64_t opal_pci_set_hub_tce_memory(uint64_t hub_id, uint64_t tce_mem_addr, 627int64_t opal_pci_set_hub_tce_memory(uint64_t hub_id, uint64_t tce_mem_addr,
557 uint64_t tce_mem_size); 628 uint64_t tce_mem_size);
558int64_t opal_pci_set_phb_tce_memory(uint64_t phb_id, uint64_t tce_mem_addr, 629int64_t opal_pci_set_phb_tce_memory(uint64_t phb_id, uint64_t tce_mem_addr,
@@ -560,9 +631,9 @@ int64_t opal_pci_set_phb_tce_memory(uint64_t phb_id, uint64_t tce_mem_addr,
560int64_t opal_pci_config_read_byte(uint64_t phb_id, uint64_t bus_dev_func, 631int64_t opal_pci_config_read_byte(uint64_t phb_id, uint64_t bus_dev_func,
561 uint64_t offset, uint8_t *data); 632 uint64_t offset, uint8_t *data);
562int64_t opal_pci_config_read_half_word(uint64_t phb_id, uint64_t bus_dev_func, 633int64_t opal_pci_config_read_half_word(uint64_t phb_id, uint64_t bus_dev_func,
563 uint64_t offset, uint16_t *data); 634 uint64_t offset, __be16 *data);
564int64_t opal_pci_config_read_word(uint64_t phb_id, uint64_t bus_dev_func, 635int64_t opal_pci_config_read_word(uint64_t phb_id, uint64_t bus_dev_func,
565 uint64_t offset, uint32_t *data); 636 uint64_t offset, __be32 *data);
566int64_t opal_pci_config_write_byte(uint64_t phb_id, uint64_t bus_dev_func, 637int64_t opal_pci_config_write_byte(uint64_t phb_id, uint64_t bus_dev_func,
567 uint64_t offset, uint8_t data); 638 uint64_t offset, uint8_t data);
568int64_t opal_pci_config_write_half_word(uint64_t phb_id, uint64_t bus_dev_func, 639int64_t opal_pci_config_write_half_word(uint64_t phb_id, uint64_t bus_dev_func,
@@ -570,14 +641,14 @@ int64_t opal_pci_config_write_half_word(uint64_t phb_id, uint64_t bus_dev_func,
570int64_t opal_pci_config_write_word(uint64_t phb_id, uint64_t bus_dev_func, 641int64_t opal_pci_config_write_word(uint64_t phb_id, uint64_t bus_dev_func,
571 uint64_t offset, uint32_t data); 642 uint64_t offset, uint32_t data);
572int64_t opal_set_xive(uint32_t isn, uint16_t server, uint8_t priority); 643int64_t opal_set_xive(uint32_t isn, uint16_t server, uint8_t priority);
573int64_t opal_get_xive(uint32_t isn, uint16_t *server, uint8_t *priority); 644int64_t opal_get_xive(uint32_t isn, __be16 *server, uint8_t *priority);
574int64_t opal_register_exception_handler(uint64_t opal_exception, 645int64_t opal_register_exception_handler(uint64_t opal_exception,
575 uint64_t handler_address, 646 uint64_t handler_address,
576 uint64_t glue_cache_line); 647 uint64_t glue_cache_line);
577int64_t opal_pci_eeh_freeze_status(uint64_t phb_id, uint64_t pe_number, 648int64_t opal_pci_eeh_freeze_status(uint64_t phb_id, uint64_t pe_number,
578 uint8_t *freeze_state, 649 uint8_t *freeze_state,
579 uint16_t *pci_error_type, 650 __be16 *pci_error_type,
580 uint64_t *phb_status); 651 __be64 *phb_status);
581int64_t opal_pci_eeh_freeze_clear(uint64_t phb_id, uint64_t pe_number, 652int64_t opal_pci_eeh_freeze_clear(uint64_t phb_id, uint64_t pe_number,
582 uint64_t eeh_action_token); 653 uint64_t eeh_action_token);
583int64_t opal_pci_shpc(uint64_t phb_id, uint64_t shpc_action, uint8_t *state); 654int64_t opal_pci_shpc(uint64_t phb_id, uint64_t shpc_action, uint8_t *state);
@@ -614,13 +685,13 @@ int64_t opal_pci_msi_eoi(uint64_t phb_id, uint32_t hw_irq);
614int64_t opal_pci_set_xive_pe(uint64_t phb_id, uint32_t pe_number, 685int64_t opal_pci_set_xive_pe(uint64_t phb_id, uint32_t pe_number,
615 uint32_t xive_num); 686 uint32_t xive_num);
616int64_t opal_get_xive_source(uint64_t phb_id, uint32_t xive_num, 687int64_t opal_get_xive_source(uint64_t phb_id, uint32_t xive_num,
617 int32_t *interrupt_source_number); 688 __be32 *interrupt_source_number);
618int64_t opal_get_msi_32(uint64_t phb_id, uint32_t mve_number, uint32_t xive_num, 689int64_t opal_get_msi_32(uint64_t phb_id, uint32_t mve_number, uint32_t xive_num,
619 uint8_t msi_range, uint32_t *msi_address, 690 uint8_t msi_range, __be32 *msi_address,
620 uint32_t *message_data); 691 __be32 *message_data);
621int64_t opal_get_msi_64(uint64_t phb_id, uint32_t mve_number, 692int64_t opal_get_msi_64(uint64_t phb_id, uint32_t mve_number,
622 uint32_t xive_num, uint8_t msi_range, 693 uint32_t xive_num, uint8_t msi_range,
623 uint64_t *msi_address, uint32_t *message_data); 694 __be64 *msi_address, __be32 *message_data);
624int64_t opal_start_cpu(uint64_t thread_number, uint64_t start_address); 695int64_t opal_start_cpu(uint64_t thread_number, uint64_t start_address);
625int64_t opal_query_cpu_status(uint64_t thread_number, uint8_t *thread_status); 696int64_t opal_query_cpu_status(uint64_t thread_number, uint8_t *thread_status);
626int64_t opal_write_oppanel(oppanel_line_t *lines, uint64_t num_lines); 697int64_t opal_write_oppanel(oppanel_line_t *lines, uint64_t num_lines);
@@ -642,7 +713,7 @@ int64_t opal_pci_fence_phb(uint64_t phb_id);
642int64_t opal_pci_reinit(uint64_t phb_id, uint8_t reinit_scope); 713int64_t opal_pci_reinit(uint64_t phb_id, uint8_t reinit_scope);
643int64_t opal_pci_mask_pe_error(uint64_t phb_id, uint16_t pe_number, uint8_t error_type, uint8_t mask_action); 714int64_t opal_pci_mask_pe_error(uint64_t phb_id, uint16_t pe_number, uint8_t error_type, uint8_t mask_action);
644int64_t opal_set_slot_led_status(uint64_t phb_id, uint64_t slot_id, uint8_t led_type, uint8_t led_action); 715int64_t opal_set_slot_led_status(uint64_t phb_id, uint64_t slot_id, uint8_t led_type, uint8_t led_action);
645int64_t opal_get_epow_status(uint64_t *status); 716int64_t opal_get_epow_status(__be64 *status);
646int64_t opal_set_system_attention_led(uint8_t led_action); 717int64_t opal_set_system_attention_led(uint8_t led_action);
647int64_t opal_pci_next_error(uint64_t phb_id, uint64_t *first_frozen_pe, 718int64_t opal_pci_next_error(uint64_t phb_id, uint64_t *first_frozen_pe,
648 uint16_t *pci_error_type, uint16_t *severity); 719 uint16_t *pci_error_type, uint16_t *severity);
@@ -656,6 +727,9 @@ int64_t opal_lpc_write(uint32_t chip_id, enum OpalLPCAddressType addr_type,
656 uint32_t addr, uint32_t data, uint32_t sz); 727 uint32_t addr, uint32_t data, uint32_t sz);
657int64_t opal_lpc_read(uint32_t chip_id, enum OpalLPCAddressType addr_type, 728int64_t opal_lpc_read(uint32_t chip_id, enum OpalLPCAddressType addr_type,
658 uint32_t addr, uint32_t *data, uint32_t sz); 729 uint32_t addr, uint32_t *data, uint32_t sz);
730int64_t opal_validate_flash(uint64_t buffer, uint32_t *size, uint32_t *result);
731int64_t opal_manage_flash(uint8_t op);
732int64_t opal_update_flash(uint64_t blk_list);
659 733
660/* Internal functions */ 734/* Internal functions */
661extern int early_init_dt_scan_opal(unsigned long node, const char *uname, int depth, void *data); 735extern int early_init_dt_scan_opal(unsigned long node, const char *uname, int depth, void *data);
@@ -684,6 +758,7 @@ extern int opal_set_rtc_time(struct rtc_time *tm);
684extern void opal_get_rtc_time(struct rtc_time *tm); 758extern void opal_get_rtc_time(struct rtc_time *tm);
685extern unsigned long opal_get_boot_time(void); 759extern unsigned long opal_get_boot_time(void);
686extern void opal_nvram_init(void); 760extern void opal_nvram_init(void);
761extern void opal_flash_init(void);
687 762
688extern int opal_machine_check(struct pt_regs *regs); 763extern int opal_machine_check(struct pt_regs *regs);
689 764
diff --git a/arch/powerpc/include/asm/page.h b/arch/powerpc/include/asm/page.h
index b9f426212d3a..32e4e212b9c1 100644
--- a/arch/powerpc/include/asm/page.h
+++ b/arch/powerpc/include/asm/page.h
@@ -78,7 +78,7 @@ extern unsigned int HPAGE_SHIFT;
78 * 78 *
79 * Also, KERNELBASE >= PAGE_OFFSET and PHYSICAL_START >= MEMORY_START 79 * Also, KERNELBASE >= PAGE_OFFSET and PHYSICAL_START >= MEMORY_START
80 * 80 *
81 * There are two was to determine a physical address from a virtual one: 81 * There are two ways to determine a physical address from a virtual one:
82 * va = pa + PAGE_OFFSET - MEMORY_START 82 * va = pa + PAGE_OFFSET - MEMORY_START
83 * va = pa + KERNELBASE - PHYSICAL_START 83 * va = pa + KERNELBASE - PHYSICAL_START
84 * 84 *
@@ -403,7 +403,7 @@ void arch_free_page(struct page *page, int order);
403 403
404struct vm_area_struct; 404struct vm_area_struct;
405 405
406#ifdef CONFIG_PPC_64K_PAGES 406#if defined(CONFIG_PPC_64K_PAGES) && defined(CONFIG_PPC64)
407typedef pte_t *pgtable_t; 407typedef pte_t *pgtable_t;
408#else 408#else
409typedef struct page *pgtable_t; 409typedef struct page *pgtable_t;
diff --git a/arch/powerpc/include/asm/pgtable-ppc64.h b/arch/powerpc/include/asm/pgtable-ppc64.h
index 46db09414a10..4a191c472867 100644
--- a/arch/powerpc/include/asm/pgtable-ppc64.h
+++ b/arch/powerpc/include/asm/pgtable-ppc64.h
@@ -394,6 +394,8 @@ static inline void mark_hpte_slot_valid(unsigned char *hpte_slot_array,
394 hpte_slot_array[index] = hidx << 4 | 0x1 << 3; 394 hpte_slot_array[index] = hidx << 4 | 0x1 << 3;
395} 395}
396 396
397struct page *realmode_pfn_to_page(unsigned long pfn);
398
397static inline char *get_hpte_slot_array(pmd_t *pmdp) 399static inline char *get_hpte_slot_array(pmd_t *pmdp)
398{ 400{
399 /* 401 /*
diff --git a/arch/powerpc/include/asm/ppc-opcode.h b/arch/powerpc/include/asm/ppc-opcode.h
index d7fe9f5b46d4..3132bb9365f3 100644
--- a/arch/powerpc/include/asm/ppc-opcode.h
+++ b/arch/powerpc/include/asm/ppc-opcode.h
@@ -143,6 +143,8 @@
143#define PPC_INST_LSWX 0x7c00042a 143#define PPC_INST_LSWX 0x7c00042a
144#define PPC_INST_LWARX 0x7c000028 144#define PPC_INST_LWARX 0x7c000028
145#define PPC_INST_LWSYNC 0x7c2004ac 145#define PPC_INST_LWSYNC 0x7c2004ac
146#define PPC_INST_SYNC 0x7c0004ac
147#define PPC_INST_SYNC_MASK 0xfc0007fe
146#define PPC_INST_LXVD2X 0x7c000698 148#define PPC_INST_LXVD2X 0x7c000698
147#define PPC_INST_MCRXR 0x7c000400 149#define PPC_INST_MCRXR 0x7c000400
148#define PPC_INST_MCRXR_MASK 0xfc0007fe 150#define PPC_INST_MCRXR_MASK 0xfc0007fe
@@ -181,6 +183,7 @@
181#define PPC_INST_TLBIVAX 0x7c000624 183#define PPC_INST_TLBIVAX 0x7c000624
182#define PPC_INST_TLBSRX_DOT 0x7c0006a5 184#define PPC_INST_TLBSRX_DOT 0x7c0006a5
183#define PPC_INST_XXLOR 0xf0000510 185#define PPC_INST_XXLOR 0xf0000510
186#define PPC_INST_XXSWAPD 0xf0000250
184#define PPC_INST_XVCPSGNDP 0xf0000780 187#define PPC_INST_XVCPSGNDP 0xf0000780
185#define PPC_INST_TRECHKPT 0x7c0007dd 188#define PPC_INST_TRECHKPT 0x7c0007dd
186#define PPC_INST_TRECLAIM 0x7c00075d 189#define PPC_INST_TRECLAIM 0x7c00075d
@@ -200,6 +203,7 @@
200/* Misc instructions for BPF compiler */ 203/* Misc instructions for BPF compiler */
201#define PPC_INST_LD 0xe8000000 204#define PPC_INST_LD 0xe8000000
202#define PPC_INST_LHZ 0xa0000000 205#define PPC_INST_LHZ 0xa0000000
206#define PPC_INST_LHBRX 0x7c00062c
203#define PPC_INST_LWZ 0x80000000 207#define PPC_INST_LWZ 0x80000000
204#define PPC_INST_STD 0xf8000000 208#define PPC_INST_STD 0xf8000000
205#define PPC_INST_STDU 0xf8000001 209#define PPC_INST_STDU 0xf8000001
@@ -218,7 +222,7 @@
218#define PPC_INST_MULLW 0x7c0001d6 222#define PPC_INST_MULLW 0x7c0001d6
219#define PPC_INST_MULHWU 0x7c000016 223#define PPC_INST_MULHWU 0x7c000016
220#define PPC_INST_MULLI 0x1c000000 224#define PPC_INST_MULLI 0x1c000000
221#define PPC_INST_DIVWU 0x7c0003d6 225#define PPC_INST_DIVWU 0x7c000396
222#define PPC_INST_RLWINM 0x54000000 226#define PPC_INST_RLWINM 0x54000000
223#define PPC_INST_RLDICR 0x78000004 227#define PPC_INST_RLDICR 0x78000004
224#define PPC_INST_SLW 0x7c000030 228#define PPC_INST_SLW 0x7c000030
@@ -344,6 +348,8 @@
344 VSX_XX1((s), a, b)) 348 VSX_XX1((s), a, b))
345#define XXLOR(t, a, b) stringify_in_c(.long PPC_INST_XXLOR | \ 349#define XXLOR(t, a, b) stringify_in_c(.long PPC_INST_XXLOR | \
346 VSX_XX3((t), a, b)) 350 VSX_XX3((t), a, b))
351#define XXSWAPD(t, a) stringify_in_c(.long PPC_INST_XXSWAPD | \
352 VSX_XX3((t), a, a))
347#define XVCPSGNDP(t, a, b) stringify_in_c(.long (PPC_INST_XVCPSGNDP | \ 353#define XVCPSGNDP(t, a, b) stringify_in_c(.long (PPC_INST_XVCPSGNDP | \
348 VSX_XX3((t), (a), (b)))) 354 VSX_XX3((t), (a), (b))))
349 355
diff --git a/arch/powerpc/include/asm/ppc_asm.h b/arch/powerpc/include/asm/ppc_asm.h
index 599545738af3..3c1acc31a092 100644
--- a/arch/powerpc/include/asm/ppc_asm.h
+++ b/arch/powerpc/include/asm/ppc_asm.h
@@ -98,123 +98,51 @@ END_FW_FTR_SECTION_IFSET(FW_FEATURE_SPLPAR)
98#define REST_8GPRS(n, base) REST_4GPRS(n, base); REST_4GPRS(n+4, base) 98#define REST_8GPRS(n, base) REST_4GPRS(n, base); REST_4GPRS(n+4, base)
99#define REST_10GPRS(n, base) REST_8GPRS(n, base); REST_2GPRS(n+8, base) 99#define REST_10GPRS(n, base) REST_8GPRS(n, base); REST_2GPRS(n+8, base)
100 100
101#define SAVE_FPR(n, base) stfd n,THREAD_FPR0+8*TS_FPRWIDTH*(n)(base) 101#define SAVE_FPR(n, base) stfd n,8*TS_FPRWIDTH*(n)(base)
102#define SAVE_2FPRS(n, base) SAVE_FPR(n, base); SAVE_FPR(n+1, base) 102#define SAVE_2FPRS(n, base) SAVE_FPR(n, base); SAVE_FPR(n+1, base)
103#define SAVE_4FPRS(n, base) SAVE_2FPRS(n, base); SAVE_2FPRS(n+2, base) 103#define SAVE_4FPRS(n, base) SAVE_2FPRS(n, base); SAVE_2FPRS(n+2, base)
104#define SAVE_8FPRS(n, base) SAVE_4FPRS(n, base); SAVE_4FPRS(n+4, base) 104#define SAVE_8FPRS(n, base) SAVE_4FPRS(n, base); SAVE_4FPRS(n+4, base)
105#define SAVE_16FPRS(n, base) SAVE_8FPRS(n, base); SAVE_8FPRS(n+8, base) 105#define SAVE_16FPRS(n, base) SAVE_8FPRS(n, base); SAVE_8FPRS(n+8, base)
106#define SAVE_32FPRS(n, base) SAVE_16FPRS(n, base); SAVE_16FPRS(n+16, base) 106#define SAVE_32FPRS(n, base) SAVE_16FPRS(n, base); SAVE_16FPRS(n+16, base)
107#define REST_FPR(n, base) lfd n,THREAD_FPR0+8*TS_FPRWIDTH*(n)(base) 107#define REST_FPR(n, base) lfd n,8*TS_FPRWIDTH*(n)(base)
108#define REST_2FPRS(n, base) REST_FPR(n, base); REST_FPR(n+1, base) 108#define REST_2FPRS(n, base) REST_FPR(n, base); REST_FPR(n+1, base)
109#define REST_4FPRS(n, base) REST_2FPRS(n, base); REST_2FPRS(n+2, base) 109#define REST_4FPRS(n, base) REST_2FPRS(n, base); REST_2FPRS(n+2, base)
110#define REST_8FPRS(n, base) REST_4FPRS(n, base); REST_4FPRS(n+4, base) 110#define REST_8FPRS(n, base) REST_4FPRS(n, base); REST_4FPRS(n+4, base)
111#define REST_16FPRS(n, base) REST_8FPRS(n, base); REST_8FPRS(n+8, base) 111#define REST_16FPRS(n, base) REST_8FPRS(n, base); REST_8FPRS(n+8, base)
112#define REST_32FPRS(n, base) REST_16FPRS(n, base); REST_16FPRS(n+16, base) 112#define REST_32FPRS(n, base) REST_16FPRS(n, base); REST_16FPRS(n+16, base)
113 113
114#define SAVE_VR(n,b,base) li b,THREAD_VR0+(16*(n)); stvx n,base,b 114#define SAVE_VR(n,b,base) li b,16*(n); stvx n,base,b
115#define SAVE_2VRS(n,b,base) SAVE_VR(n,b,base); SAVE_VR(n+1,b,base) 115#define SAVE_2VRS(n,b,base) SAVE_VR(n,b,base); SAVE_VR(n+1,b,base)
116#define SAVE_4VRS(n,b,base) SAVE_2VRS(n,b,base); SAVE_2VRS(n+2,b,base) 116#define SAVE_4VRS(n,b,base) SAVE_2VRS(n,b,base); SAVE_2VRS(n+2,b,base)
117#define SAVE_8VRS(n,b,base) SAVE_4VRS(n,b,base); SAVE_4VRS(n+4,b,base) 117#define SAVE_8VRS(n,b,base) SAVE_4VRS(n,b,base); SAVE_4VRS(n+4,b,base)
118#define SAVE_16VRS(n,b,base) SAVE_8VRS(n,b,base); SAVE_8VRS(n+8,b,base) 118#define SAVE_16VRS(n,b,base) SAVE_8VRS(n,b,base); SAVE_8VRS(n+8,b,base)
119#define SAVE_32VRS(n,b,base) SAVE_16VRS(n,b,base); SAVE_16VRS(n+16,b,base) 119#define SAVE_32VRS(n,b,base) SAVE_16VRS(n,b,base); SAVE_16VRS(n+16,b,base)
120#define REST_VR(n,b,base) li b,THREAD_VR0+(16*(n)); lvx n,base,b 120#define REST_VR(n,b,base) li b,16*(n); lvx n,base,b
121#define REST_2VRS(n,b,base) REST_VR(n,b,base); REST_VR(n+1,b,base) 121#define REST_2VRS(n,b,base) REST_VR(n,b,base); REST_VR(n+1,b,base)
122#define REST_4VRS(n,b,base) REST_2VRS(n,b,base); REST_2VRS(n+2,b,base) 122#define REST_4VRS(n,b,base) REST_2VRS(n,b,base); REST_2VRS(n+2,b,base)
123#define REST_8VRS(n,b,base) REST_4VRS(n,b,base); REST_4VRS(n+4,b,base) 123#define REST_8VRS(n,b,base) REST_4VRS(n,b,base); REST_4VRS(n+4,b,base)
124#define REST_16VRS(n,b,base) REST_8VRS(n,b,base); REST_8VRS(n+8,b,base) 124#define REST_16VRS(n,b,base) REST_8VRS(n,b,base); REST_8VRS(n+8,b,base)
125#define REST_32VRS(n,b,base) REST_16VRS(n,b,base); REST_16VRS(n+16,b,base) 125#define REST_32VRS(n,b,base) REST_16VRS(n,b,base); REST_16VRS(n+16,b,base)
126 126
127/* Save/restore FPRs, VRs and VSRs from their checkpointed backups in 127#ifdef __BIG_ENDIAN__
128 * thread_struct: 128#define STXVD2X_ROT(n,b,base) STXVD2X(n,b,base)
129 */ 129#define LXVD2X_ROT(n,b,base) LXVD2X(n,b,base)
130#define SAVE_FPR_TRANSACT(n, base) stfd n,THREAD_TRANSACT_FPR0+ \ 130#else
131 8*TS_FPRWIDTH*(n)(base) 131#define STXVD2X_ROT(n,b,base) XXSWAPD(n,n); \
132#define SAVE_2FPRS_TRANSACT(n, base) SAVE_FPR_TRANSACT(n, base); \ 132 STXVD2X(n,b,base); \
133 SAVE_FPR_TRANSACT(n+1, base) 133 XXSWAPD(n,n)
134#define SAVE_4FPRS_TRANSACT(n, base) SAVE_2FPRS_TRANSACT(n, base); \
135 SAVE_2FPRS_TRANSACT(n+2, base)
136#define SAVE_8FPRS_TRANSACT(n, base) SAVE_4FPRS_TRANSACT(n, base); \
137 SAVE_4FPRS_TRANSACT(n+4, base)
138#define SAVE_16FPRS_TRANSACT(n, base) SAVE_8FPRS_TRANSACT(n, base); \
139 SAVE_8FPRS_TRANSACT(n+8, base)
140#define SAVE_32FPRS_TRANSACT(n, base) SAVE_16FPRS_TRANSACT(n, base); \
141 SAVE_16FPRS_TRANSACT(n+16, base)
142
143#define REST_FPR_TRANSACT(n, base) lfd n,THREAD_TRANSACT_FPR0+ \
144 8*TS_FPRWIDTH*(n)(base)
145#define REST_2FPRS_TRANSACT(n, base) REST_FPR_TRANSACT(n, base); \
146 REST_FPR_TRANSACT(n+1, base)
147#define REST_4FPRS_TRANSACT(n, base) REST_2FPRS_TRANSACT(n, base); \
148 REST_2FPRS_TRANSACT(n+2, base)
149#define REST_8FPRS_TRANSACT(n, base) REST_4FPRS_TRANSACT(n, base); \
150 REST_4FPRS_TRANSACT(n+4, base)
151#define REST_16FPRS_TRANSACT(n, base) REST_8FPRS_TRANSACT(n, base); \
152 REST_8FPRS_TRANSACT(n+8, base)
153#define REST_32FPRS_TRANSACT(n, base) REST_16FPRS_TRANSACT(n, base); \
154 REST_16FPRS_TRANSACT(n+16, base)
155
156
157#define SAVE_VR_TRANSACT(n,b,base) li b,THREAD_TRANSACT_VR0+(16*(n)); \
158 stvx n,b,base
159#define SAVE_2VRS_TRANSACT(n,b,base) SAVE_VR_TRANSACT(n,b,base); \
160 SAVE_VR_TRANSACT(n+1,b,base)
161#define SAVE_4VRS_TRANSACT(n,b,base) SAVE_2VRS_TRANSACT(n,b,base); \
162 SAVE_2VRS_TRANSACT(n+2,b,base)
163#define SAVE_8VRS_TRANSACT(n,b,base) SAVE_4VRS_TRANSACT(n,b,base); \
164 SAVE_4VRS_TRANSACT(n+4,b,base)
165#define SAVE_16VRS_TRANSACT(n,b,base) SAVE_8VRS_TRANSACT(n,b,base); \
166 SAVE_8VRS_TRANSACT(n+8,b,base)
167#define SAVE_32VRS_TRANSACT(n,b,base) SAVE_16VRS_TRANSACT(n,b,base); \
168 SAVE_16VRS_TRANSACT(n+16,b,base)
169
170#define REST_VR_TRANSACT(n,b,base) li b,THREAD_TRANSACT_VR0+(16*(n)); \
171 lvx n,b,base
172#define REST_2VRS_TRANSACT(n,b,base) REST_VR_TRANSACT(n,b,base); \
173 REST_VR_TRANSACT(n+1,b,base)
174#define REST_4VRS_TRANSACT(n,b,base) REST_2VRS_TRANSACT(n,b,base); \
175 REST_2VRS_TRANSACT(n+2,b,base)
176#define REST_8VRS_TRANSACT(n,b,base) REST_4VRS_TRANSACT(n,b,base); \
177 REST_4VRS_TRANSACT(n+4,b,base)
178#define REST_16VRS_TRANSACT(n,b,base) REST_8VRS_TRANSACT(n,b,base); \
179 REST_8VRS_TRANSACT(n+8,b,base)
180#define REST_32VRS_TRANSACT(n,b,base) REST_16VRS_TRANSACT(n,b,base); \
181 REST_16VRS_TRANSACT(n+16,b,base)
182
183
184#define SAVE_VSR_TRANSACT(n,b,base) li b,THREAD_TRANSACT_VSR0+(16*(n)); \
185 STXVD2X(n,R##base,R##b)
186#define SAVE_2VSRS_TRANSACT(n,b,base) SAVE_VSR_TRANSACT(n,b,base); \
187 SAVE_VSR_TRANSACT(n+1,b,base)
188#define SAVE_4VSRS_TRANSACT(n,b,base) SAVE_2VSRS_TRANSACT(n,b,base); \
189 SAVE_2VSRS_TRANSACT(n+2,b,base)
190#define SAVE_8VSRS_TRANSACT(n,b,base) SAVE_4VSRS_TRANSACT(n,b,base); \
191 SAVE_4VSRS_TRANSACT(n+4,b,base)
192#define SAVE_16VSRS_TRANSACT(n,b,base) SAVE_8VSRS_TRANSACT(n,b,base); \
193 SAVE_8VSRS_TRANSACT(n+8,b,base)
194#define SAVE_32VSRS_TRANSACT(n,b,base) SAVE_16VSRS_TRANSACT(n,b,base); \
195 SAVE_16VSRS_TRANSACT(n+16,b,base)
196
197#define REST_VSR_TRANSACT(n,b,base) li b,THREAD_TRANSACT_VSR0+(16*(n)); \
198 LXVD2X(n,R##base,R##b)
199#define REST_2VSRS_TRANSACT(n,b,base) REST_VSR_TRANSACT(n,b,base); \
200 REST_VSR_TRANSACT(n+1,b,base)
201#define REST_4VSRS_TRANSACT(n,b,base) REST_2VSRS_TRANSACT(n,b,base); \
202 REST_2VSRS_TRANSACT(n+2,b,base)
203#define REST_8VSRS_TRANSACT(n,b,base) REST_4VSRS_TRANSACT(n,b,base); \
204 REST_4VSRS_TRANSACT(n+4,b,base)
205#define REST_16VSRS_TRANSACT(n,b,base) REST_8VSRS_TRANSACT(n,b,base); \
206 REST_8VSRS_TRANSACT(n+8,b,base)
207#define REST_32VSRS_TRANSACT(n,b,base) REST_16VSRS_TRANSACT(n,b,base); \
208 REST_16VSRS_TRANSACT(n+16,b,base)
209 134
135#define LXVD2X_ROT(n,b,base) LXVD2X(n,b,base); \
136 XXSWAPD(n,n)
137#endif
210/* Save the lower 32 VSRs in the thread VSR region */ 138/* Save the lower 32 VSRs in the thread VSR region */
211#define SAVE_VSR(n,b,base) li b,THREAD_VSR0+(16*(n)); STXVD2X(n,R##base,R##b) 139#define SAVE_VSR(n,b,base) li b,16*(n); STXVD2X_ROT(n,R##base,R##b)
212#define SAVE_2VSRS(n,b,base) SAVE_VSR(n,b,base); SAVE_VSR(n+1,b,base) 140#define SAVE_2VSRS(n,b,base) SAVE_VSR(n,b,base); SAVE_VSR(n+1,b,base)
213#define SAVE_4VSRS(n,b,base) SAVE_2VSRS(n,b,base); SAVE_2VSRS(n+2,b,base) 141#define SAVE_4VSRS(n,b,base) SAVE_2VSRS(n,b,base); SAVE_2VSRS(n+2,b,base)
214#define SAVE_8VSRS(n,b,base) SAVE_4VSRS(n,b,base); SAVE_4VSRS(n+4,b,base) 142#define SAVE_8VSRS(n,b,base) SAVE_4VSRS(n,b,base); SAVE_4VSRS(n+4,b,base)
215#define SAVE_16VSRS(n,b,base) SAVE_8VSRS(n,b,base); SAVE_8VSRS(n+8,b,base) 143#define SAVE_16VSRS(n,b,base) SAVE_8VSRS(n,b,base); SAVE_8VSRS(n+8,b,base)
216#define SAVE_32VSRS(n,b,base) SAVE_16VSRS(n,b,base); SAVE_16VSRS(n+16,b,base) 144#define SAVE_32VSRS(n,b,base) SAVE_16VSRS(n,b,base); SAVE_16VSRS(n+16,b,base)
217#define REST_VSR(n,b,base) li b,THREAD_VSR0+(16*(n)); LXVD2X(n,R##base,R##b) 145#define REST_VSR(n,b,base) li b,16*(n); LXVD2X_ROT(n,R##base,R##b)
218#define REST_2VSRS(n,b,base) REST_VSR(n,b,base); REST_VSR(n+1,b,base) 146#define REST_2VSRS(n,b,base) REST_VSR(n,b,base); REST_VSR(n+1,b,base)
219#define REST_4VSRS(n,b,base) REST_2VSRS(n,b,base); REST_2VSRS(n+2,b,base) 147#define REST_4VSRS(n,b,base) REST_2VSRS(n,b,base); REST_2VSRS(n+2,b,base)
220#define REST_8VSRS(n,b,base) REST_4VSRS(n,b,base); REST_4VSRS(n+4,b,base) 148#define REST_8VSRS(n,b,base) REST_4VSRS(n,b,base); REST_4VSRS(n+4,b,base)
@@ -478,13 +406,6 @@ BEGIN_FTR_SECTION_NESTED(945) \
478 std ra,TASKTHREADPPR(rb); \ 406 std ra,TASKTHREADPPR(rb); \
479END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,945) 407END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,945)
480 408
481#define RESTORE_PPR(ra, rb) \
482BEGIN_FTR_SECTION_NESTED(946) \
483 ld ra,PACACURRENT(r13); \
484 ld rb,TASKTHREADPPR(ra); \
485 mtspr SPRN_PPR,rb; /* Restore PPR */ \
486END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,946)
487
488#endif 409#endif
489 410
490/* 411/*
@@ -832,6 +753,35 @@ END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,946)
832#define N_SLINE 68 753#define N_SLINE 68
833#define N_SO 100 754#define N_SO 100
834 755
835#endif /* __ASSEMBLY__ */ 756/*
757 * Create an endian fixup trampoline
758 *
759 * This starts with a "tdi 0,0,0x48" instruction which is
760 * essentially a "trap never", and thus akin to a nop.
761 *
762 * The opcode for this instruction read with the wrong endian
763 * however results in a b . + 8
764 *
765 * So essentially we use that trick to execute the following
766 * trampoline in "reverse endian" if we are running with the
767 * MSR_LE bit set the "wrong" way for whatever endianness the
768 * kernel is built for.
769 */
836 770
771#ifdef CONFIG_PPC_BOOK3E
772#define FIXUP_ENDIAN
773#else
774#define FIXUP_ENDIAN \
775 tdi 0,0,0x48; /* Reverse endian of b . + 8 */ \
776 b $+36; /* Skip trampoline if endian is good */ \
777 .long 0x05009f42; /* bcl 20,31,$+4 */ \
778 .long 0xa602487d; /* mflr r10 */ \
779 .long 0x1c004a39; /* addi r10,r10,28 */ \
780 .long 0xa600607d; /* mfmsr r11 */ \
781 .long 0x01006b69; /* xori r11,r11,1 */ \
782 .long 0xa6035a7d; /* mtsrr0 r10 */ \
783 .long 0xa6037b7d; /* mtsrr1 r11 */ \
784 .long 0x2400004c /* rfid */
785#endif /* !CONFIG_PPC_BOOK3E */
786#endif /* __ASSEMBLY__ */
837#endif /* _ASM_POWERPC_PPC_ASM_H */ 787#endif /* _ASM_POWERPC_PPC_ASM_H */
diff --git a/arch/powerpc/include/asm/processor.h b/arch/powerpc/include/asm/processor.h
index ce4de5aed7b5..7794b2b04eb2 100644
--- a/arch/powerpc/include/asm/processor.h
+++ b/arch/powerpc/include/asm/processor.h
@@ -14,8 +14,18 @@
14 14
15#ifdef CONFIG_VSX 15#ifdef CONFIG_VSX
16#define TS_FPRWIDTH 2 16#define TS_FPRWIDTH 2
17
18#ifdef __BIG_ENDIAN__
19#define TS_FPROFFSET 0
20#define TS_VSRLOWOFFSET 1
21#else
22#define TS_FPROFFSET 1
23#define TS_VSRLOWOFFSET 0
24#endif
25
17#else 26#else
18#define TS_FPRWIDTH 1 27#define TS_FPRWIDTH 1
28#define TS_FPROFFSET 0
19#endif 29#endif
20 30
21#ifdef CONFIG_PPC64 31#ifdef CONFIG_PPC64
@@ -142,26 +152,22 @@ typedef struct {
142 unsigned long seg; 152 unsigned long seg;
143} mm_segment_t; 153} mm_segment_t;
144 154
145#define TS_FPROFFSET 0 155#define TS_FPR(i) fp_state.fpr[i][TS_FPROFFSET]
146#define TS_VSRLOWOFFSET 1 156#define TS_TRANS_FPR(i) transact_fp.fpr[i][TS_FPROFFSET]
147#define TS_FPR(i) fpr[i][TS_FPROFFSET]
148#define TS_TRANS_FPR(i) transact_fpr[i][TS_FPROFFSET]
149 157
150struct thread_struct { 158/* FP and VSX 0-31 register set */
151 unsigned long ksp; /* Kernel stack pointer */ 159struct thread_fp_state {
152#ifdef CONFIG_PPC64 160 u64 fpr[32][TS_FPRWIDTH] __attribute__((aligned(16)));
153 unsigned long ksp_vsid; 161 u64 fpscr; /* Floating point status */
154#endif 162};
155 struct pt_regs *regs; /* Pointer to saved register state */ 163
156 mm_segment_t fs; /* for get_fs() validation */ 164/* Complete AltiVec register set including VSCR */
157#ifdef CONFIG_BOOKE 165struct thread_vr_state {
158 /* BookE base exception scratch space; align on cacheline */ 166 vector128 vr[32] __attribute__((aligned(16)));
159 unsigned long normsave[8] ____cacheline_aligned; 167 vector128 vscr __attribute__((aligned(16)));
160#endif 168};
161#ifdef CONFIG_PPC32 169
162 void *pgdir; /* root of page-table tree */ 170struct debug_reg {
163 unsigned long ksp_limit; /* if ksp <= ksp_limit stack overflow */
164#endif
165#ifdef CONFIG_PPC_ADV_DEBUG_REGS 171#ifdef CONFIG_PPC_ADV_DEBUG_REGS
166 /* 172 /*
167 * The following help to manage the use of Debug Control Registers 173 * The following help to manage the use of Debug Control Registers
@@ -198,13 +204,26 @@ struct thread_struct {
198 unsigned long dvc2; 204 unsigned long dvc2;
199#endif 205#endif
200#endif 206#endif
201 /* FP and VSX 0-31 register set */ 207};
202 double fpr[32][TS_FPRWIDTH] __attribute__((aligned(16)));
203 struct {
204 208
205 unsigned int pad; 209struct thread_struct {
206 unsigned int val; /* Floating point status */ 210 unsigned long ksp; /* Kernel stack pointer */
207 } fpscr; 211#ifdef CONFIG_PPC64
212 unsigned long ksp_vsid;
213#endif
214 struct pt_regs *regs; /* Pointer to saved register state */
215 mm_segment_t fs; /* for get_fs() validation */
216#ifdef CONFIG_BOOKE
217 /* BookE base exception scratch space; align on cacheline */
218 unsigned long normsave[8] ____cacheline_aligned;
219#endif
220#ifdef CONFIG_PPC32
221 void *pgdir; /* root of page-table tree */
222 unsigned long ksp_limit; /* if ksp <= ksp_limit stack overflow */
223#endif
224 struct debug_reg debug;
225 struct thread_fp_state fp_state;
226 struct thread_fp_state *fp_save_area;
208 int fpexc_mode; /* floating-point exception mode */ 227 int fpexc_mode; /* floating-point exception mode */
209 unsigned int align_ctl; /* alignment handling control */ 228 unsigned int align_ctl; /* alignment handling control */
210#ifdef CONFIG_PPC64 229#ifdef CONFIG_PPC64
@@ -222,10 +241,8 @@ struct thread_struct {
222 struct arch_hw_breakpoint hw_brk; /* info on the hardware breakpoint */ 241 struct arch_hw_breakpoint hw_brk; /* info on the hardware breakpoint */
223 unsigned long trap_nr; /* last trap # on this thread */ 242 unsigned long trap_nr; /* last trap # on this thread */
224#ifdef CONFIG_ALTIVEC 243#ifdef CONFIG_ALTIVEC
225 /* Complete AltiVec register set */ 244 struct thread_vr_state vr_state;
226 vector128 vr[32] __attribute__((aligned(16))); 245 struct thread_vr_state *vr_save_area;
227 /* AltiVec status */
228 vector128 vscr __attribute__((aligned(16)));
229 unsigned long vrsave; 246 unsigned long vrsave;
230 int used_vr; /* set if process has used altivec */ 247 int used_vr; /* set if process has used altivec */
231#endif /* CONFIG_ALTIVEC */ 248#endif /* CONFIG_ALTIVEC */
@@ -262,13 +279,8 @@ struct thread_struct {
262 * transact_fpr[] is the new set of transactional values. 279 * transact_fpr[] is the new set of transactional values.
263 * VRs work the same way. 280 * VRs work the same way.
264 */ 281 */
265 double transact_fpr[32][TS_FPRWIDTH]; 282 struct thread_fp_state transact_fp;
266 struct { 283 struct thread_vr_state transact_vr;
267 unsigned int pad;
268 unsigned int val; /* Floating point status */
269 } transact_fpscr;
270 vector128 transact_vr[32] __attribute__((aligned(16)));
271 vector128 transact_vscr __attribute__((aligned(16)));
272 unsigned long transact_vrsave; 284 unsigned long transact_vrsave;
273#endif /* CONFIG_PPC_TRANSACTIONAL_MEM */ 285#endif /* CONFIG_PPC_TRANSACTIONAL_MEM */
274#ifdef CONFIG_KVM_BOOK3S_32_HANDLER 286#ifdef CONFIG_KVM_BOOK3S_32_HANDLER
@@ -322,8 +334,6 @@ struct thread_struct {
322 .ksp = INIT_SP, \ 334 .ksp = INIT_SP, \
323 .regs = (struct pt_regs *)INIT_SP - 1, /* XXX bogus, I think */ \ 335 .regs = (struct pt_regs *)INIT_SP - 1, /* XXX bogus, I think */ \
324 .fs = KERNEL_DS, \ 336 .fs = KERNEL_DS, \
325 .fpr = {{0}}, \
326 .fpscr = { .val = 0, }, \
327 .fpexc_mode = 0, \ 337 .fpexc_mode = 0, \
328 .ppr = INIT_PPR, \ 338 .ppr = INIT_PPR, \
329} 339}
@@ -361,6 +371,11 @@ extern int set_endian(struct task_struct *tsk, unsigned int val);
361extern int get_unalign_ctl(struct task_struct *tsk, unsigned long adr); 371extern int get_unalign_ctl(struct task_struct *tsk, unsigned long adr);
362extern int set_unalign_ctl(struct task_struct *tsk, unsigned int val); 372extern int set_unalign_ctl(struct task_struct *tsk, unsigned int val);
363 373
374extern void load_fp_state(struct thread_fp_state *fp);
375extern void store_fp_state(struct thread_fp_state *fp);
376extern void load_vr_state(struct thread_vr_state *vr);
377extern void store_vr_state(struct thread_vr_state *vr);
378
364static inline unsigned int __unpack_fe01(unsigned long msr_bits) 379static inline unsigned int __unpack_fe01(unsigned long msr_bits)
365{ 380{
366 return ((msr_bits & MSR_FE0) >> 10) | ((msr_bits & MSR_FE1) >> 8); 381 return ((msr_bits & MSR_FE0) >> 10) | ((msr_bits & MSR_FE1) >> 8);
diff --git a/arch/powerpc/include/asm/prom.h b/arch/powerpc/include/asm/prom.h
index 7d0c7f3a7171..d977b9b78696 100644
--- a/arch/powerpc/include/asm/prom.h
+++ b/arch/powerpc/include/asm/prom.h
@@ -1,4 +1,3 @@
1#include <linux/of.h> /* linux/of.h gets to determine #include ordering */
2#ifndef _POWERPC_PROM_H 1#ifndef _POWERPC_PROM_H
3#define _POWERPC_PROM_H 2#define _POWERPC_PROM_H
4#ifdef __KERNEL__ 3#ifdef __KERNEL__
@@ -20,21 +19,17 @@
20#include <asm/irq.h> 19#include <asm/irq.h>
21#include <linux/atomic.h> 20#include <linux/atomic.h>
22 21
23#define HAVE_ARCH_DEVTREE_FIXUPS 22/* These includes should be removed once implicit includes are cleaned up. */
23#include <linux/of.h>
24#include <linux/of_fdt.h>
25#include <linux/of_address.h>
26#include <linux/of_irq.h>
27#include <linux/platform_device.h>
24 28
25/* 29/*
26 * OF address retreival & translation 30 * OF address retreival & translation
27 */ 31 */
28 32
29/* Translate a DMA address from device space to CPU space */
30extern u64 of_translate_dma_address(struct device_node *dev,
31 const __be32 *in_addr);
32
33#ifdef CONFIG_PCI
34extern unsigned long pci_address_to_pio(phys_addr_t address);
35#define pci_address_to_pio pci_address_to_pio
36#endif /* CONFIG_PCI */
37
38/* Parse the ibm,dma-window property of an OF node into the busno, phys and 33/* Parse the ibm,dma-window property of an OF node into the busno, phys and
39 * size parameters. 34 * size parameters.
40 */ 35 */
@@ -44,16 +39,6 @@ void of_parse_dma_window(struct device_node *dn, const __be32 *dma_window,
44 39
45extern void kdump_move_device_tree(void); 40extern void kdump_move_device_tree(void);
46 41
47/* cache lookup */
48struct device_node *of_find_next_cache_node(struct device_node *np);
49
50#ifdef CONFIG_NUMA
51extern int of_node_to_nid(struct device_node *device);
52#else
53static inline int of_node_to_nid(struct device_node *device) { return 0; }
54#endif
55#define of_node_to_nid of_node_to_nid
56
57extern void of_instantiate_rtc(void); 42extern void of_instantiate_rtc(void);
58 43
59extern int of_get_ibm_chip_id(struct device_node *np); 44extern int of_get_ibm_chip_id(struct device_node *np);
@@ -143,14 +128,5 @@ struct of_drconf_cell {
143 */ 128 */
144extern unsigned char ibm_architecture_vec[]; 129extern unsigned char ibm_architecture_vec[];
145 130
146/* These includes are put at the bottom because they may contain things
147 * that are overridden by this file. Ideally they shouldn't be included
148 * by this file, but there are a bunch of .c files that currently depend
149 * on it. Eventually they will be cleaned up. */
150#include <linux/of_fdt.h>
151#include <linux/of_address.h>
152#include <linux/of_irq.h>
153#include <linux/platform_device.h>
154
155#endif /* __KERNEL__ */ 131#endif /* __KERNEL__ */
156#endif /* _POWERPC_PROM_H */ 132#endif /* _POWERPC_PROM_H */
diff --git a/arch/powerpc/include/asm/reg.h b/arch/powerpc/include/asm/reg.h
index 10d1ef016bf1..126f6e98f84d 100644
--- a/arch/powerpc/include/asm/reg.h
+++ b/arch/powerpc/include/asm/reg.h
@@ -115,7 +115,12 @@
115#define MSR_64BIT MSR_SF 115#define MSR_64BIT MSR_SF
116 116
117/* Server variant */ 117/* Server variant */
118#define MSR_ (MSR_ME | MSR_RI | MSR_IR | MSR_DR | MSR_ISF |MSR_HV) 118#define __MSR (MSR_ME | MSR_RI | MSR_IR | MSR_DR | MSR_ISF |MSR_HV)
119#ifdef __BIG_ENDIAN__
120#define MSR_ __MSR
121#else
122#define MSR_ (__MSR | MSR_LE)
123#endif
119#define MSR_KERNEL (MSR_ | MSR_64BIT) 124#define MSR_KERNEL (MSR_ | MSR_64BIT)
120#define MSR_USER32 (MSR_ | MSR_PR | MSR_EE) 125#define MSR_USER32 (MSR_ | MSR_PR | MSR_EE)
121#define MSR_USER64 (MSR_USER32 | MSR_64BIT) 126#define MSR_USER64 (MSR_USER32 | MSR_64BIT)
diff --git a/arch/powerpc/include/asm/reg_booke.h b/arch/powerpc/include/asm/reg_booke.h
index ed8f836da094..2e31aacd8acc 100644
--- a/arch/powerpc/include/asm/reg_booke.h
+++ b/arch/powerpc/include/asm/reg_booke.h
@@ -381,7 +381,7 @@
381#define DBCR0_IA34T 0x00004000 /* Instr Addr 3-4 range Toggle */ 381#define DBCR0_IA34T 0x00004000 /* Instr Addr 3-4 range Toggle */
382#define DBCR0_FT 0x00000001 /* Freeze Timers on debug event */ 382#define DBCR0_FT 0x00000001 /* Freeze Timers on debug event */
383 383
384#define dbcr_iac_range(task) ((task)->thread.dbcr0) 384#define dbcr_iac_range(task) ((task)->thread.debug.dbcr0)
385#define DBCR_IAC12I DBCR0_IA12 /* Range Inclusive */ 385#define DBCR_IAC12I DBCR0_IA12 /* Range Inclusive */
386#define DBCR_IAC12X (DBCR0_IA12 | DBCR0_IA12X) /* Range Exclusive */ 386#define DBCR_IAC12X (DBCR0_IA12 | DBCR0_IA12X) /* Range Exclusive */
387#define DBCR_IAC12MODE (DBCR0_IA12 | DBCR0_IA12X) /* IAC 1-2 Mode Bits */ 387#define DBCR_IAC12MODE (DBCR0_IA12 | DBCR0_IA12X) /* IAC 1-2 Mode Bits */
@@ -395,7 +395,7 @@
395#define DBCR1_DAC1W 0x20000000 /* DAC1 Write Debug Event */ 395#define DBCR1_DAC1W 0x20000000 /* DAC1 Write Debug Event */
396#define DBCR1_DAC2W 0x10000000 /* DAC2 Write Debug Event */ 396#define DBCR1_DAC2W 0x10000000 /* DAC2 Write Debug Event */
397 397
398#define dbcr_dac(task) ((task)->thread.dbcr1) 398#define dbcr_dac(task) ((task)->thread.debug.dbcr1)
399#define DBCR_DAC1R DBCR1_DAC1R 399#define DBCR_DAC1R DBCR1_DAC1R
400#define DBCR_DAC1W DBCR1_DAC1W 400#define DBCR_DAC1W DBCR1_DAC1W
401#define DBCR_DAC2R DBCR1_DAC2R 401#define DBCR_DAC2R DBCR1_DAC2R
@@ -441,7 +441,7 @@
441#define DBCR0_CRET 0x00000020 /* Critical Return Debug Event */ 441#define DBCR0_CRET 0x00000020 /* Critical Return Debug Event */
442#define DBCR0_FT 0x00000001 /* Freeze Timers on debug event */ 442#define DBCR0_FT 0x00000001 /* Freeze Timers on debug event */
443 443
444#define dbcr_dac(task) ((task)->thread.dbcr0) 444#define dbcr_dac(task) ((task)->thread.debug.dbcr0)
445#define DBCR_DAC1R DBCR0_DAC1R 445#define DBCR_DAC1R DBCR0_DAC1R
446#define DBCR_DAC1W DBCR0_DAC1W 446#define DBCR_DAC1W DBCR0_DAC1W
447#define DBCR_DAC2R DBCR0_DAC2R 447#define DBCR_DAC2R DBCR0_DAC2R
@@ -475,7 +475,7 @@
475#define DBCR1_IAC34MX 0x000000C0 /* Instr Addr 3-4 range eXclusive */ 475#define DBCR1_IAC34MX 0x000000C0 /* Instr Addr 3-4 range eXclusive */
476#define DBCR1_IAC34AT 0x00000001 /* Instr Addr 3-4 range Toggle */ 476#define DBCR1_IAC34AT 0x00000001 /* Instr Addr 3-4 range Toggle */
477 477
478#define dbcr_iac_range(task) ((task)->thread.dbcr1) 478#define dbcr_iac_range(task) ((task)->thread.debug.dbcr1)
479#define DBCR_IAC12I DBCR1_IAC12M /* Range Inclusive */ 479#define DBCR_IAC12I DBCR1_IAC12M /* Range Inclusive */
480#define DBCR_IAC12X DBCR1_IAC12MX /* Range Exclusive */ 480#define DBCR_IAC12X DBCR1_IAC12MX /* Range Exclusive */
481#define DBCR_IAC12MODE DBCR1_IAC12MX /* IAC 1-2 Mode Bits */ 481#define DBCR_IAC12MODE DBCR1_IAC12MX /* IAC 1-2 Mode Bits */
diff --git a/arch/powerpc/include/asm/scom.h b/arch/powerpc/include/asm/scom.h
index 0cabfd7bc2d1..f5cde45b1161 100644
--- a/arch/powerpc/include/asm/scom.h
+++ b/arch/powerpc/include/asm/scom.h
@@ -54,8 +54,8 @@ struct scom_controller {
54 scom_map_t (*map)(struct device_node *ctrl_dev, u64 reg, u64 count); 54 scom_map_t (*map)(struct device_node *ctrl_dev, u64 reg, u64 count);
55 void (*unmap)(scom_map_t map); 55 void (*unmap)(scom_map_t map);
56 56
57 u64 (*read)(scom_map_t map, u32 reg); 57 int (*read)(scom_map_t map, u64 reg, u64 *value);
58 void (*write)(scom_map_t map, u32 reg, u64 value); 58 int (*write)(scom_map_t map, u64 reg, u64 value);
59}; 59};
60 60
61extern const struct scom_controller *scom_controller; 61extern const struct scom_controller *scom_controller;
@@ -133,10 +133,18 @@ static inline void scom_unmap(scom_map_t map)
133 * scom_read - Read a SCOM register 133 * scom_read - Read a SCOM register
134 * @map: Result of scom_map 134 * @map: Result of scom_map
135 * @reg: Register index within that map 135 * @reg: Register index within that map
136 * @value: Updated with the value read
137 *
138 * Returns 0 (success) or a negative error code
136 */ 139 */
137static inline u64 scom_read(scom_map_t map, u32 reg) 140static inline int scom_read(scom_map_t map, u64 reg, u64 *value)
138{ 141{
139 return scom_controller->read(map, reg); 142 int rc;
143
144 rc = scom_controller->read(map, reg, value);
145 if (rc)
146 *value = 0xfffffffffffffffful;
147 return rc;
140} 148}
141 149
142/** 150/**
@@ -144,12 +152,15 @@ static inline u64 scom_read(scom_map_t map, u32 reg)
144 * @map: Result of scom_map 152 * @map: Result of scom_map
145 * @reg: Register index within that map 153 * @reg: Register index within that map
146 * @value: Value to write 154 * @value: Value to write
155 *
156 * Returns 0 (success) or a negative error code
147 */ 157 */
148static inline void scom_write(scom_map_t map, u32 reg, u64 value) 158static inline int scom_write(scom_map_t map, u64 reg, u64 value)
149{ 159{
150 scom_controller->write(map, reg, value); 160 return scom_controller->write(map, reg, value);
151} 161}
152 162
163
153#endif /* CONFIG_PPC_SCOM */ 164#endif /* CONFIG_PPC_SCOM */
154#endif /* __ASSEMBLY__ */ 165#endif /* __ASSEMBLY__ */
155#endif /* __KERNEL__ */ 166#endif /* __KERNEL__ */
diff --git a/arch/powerpc/include/asm/setup.h b/arch/powerpc/include/asm/setup.h
index d3ca85529b8b..703a8412dac2 100644
--- a/arch/powerpc/include/asm/setup.h
+++ b/arch/powerpc/include/asm/setup.h
@@ -23,6 +23,10 @@ extern void reloc_got2(unsigned long);
23 23
24#define PTRRELOC(x) ((typeof(x)) add_reloc_offset((unsigned long)(x))) 24#define PTRRELOC(x) ((typeof(x)) add_reloc_offset((unsigned long)(x)))
25 25
26void check_for_initrd(void);
27void do_init_bootmem(void);
28void setup_panic(void);
29
26#endif /* !__ASSEMBLY__ */ 30#endif /* !__ASSEMBLY__ */
27 31
28#endif /* _ASM_POWERPC_SETUP_H */ 32#endif /* _ASM_POWERPC_SETUP_H */
diff --git a/arch/powerpc/include/asm/sfp-machine.h b/arch/powerpc/include/asm/sfp-machine.h
index 3a7a67a0d006..d89beaba26ff 100644
--- a/arch/powerpc/include/asm/sfp-machine.h
+++ b/arch/powerpc/include/asm/sfp-machine.h
@@ -125,7 +125,7 @@
125#define FP_EX_DIVZERO (1 << (31 - 5)) 125#define FP_EX_DIVZERO (1 << (31 - 5))
126#define FP_EX_INEXACT (1 << (31 - 6)) 126#define FP_EX_INEXACT (1 << (31 - 6))
127 127
128#define __FPU_FPSCR (current->thread.fpscr.val) 128#define __FPU_FPSCR (current->thread.fp_state.fpscr)
129 129
130/* We only actually write to the destination register 130/* We only actually write to the destination register
131 * if exceptions signalled (if any) will not trap. 131 * if exceptions signalled (if any) will not trap.
diff --git a/arch/powerpc/include/asm/string.h b/arch/powerpc/include/asm/string.h
index e40010abcaf1..0dffad6bcc84 100644
--- a/arch/powerpc/include/asm/string.h
+++ b/arch/powerpc/include/asm/string.h
@@ -10,7 +10,9 @@
10#define __HAVE_ARCH_STRNCMP 10#define __HAVE_ARCH_STRNCMP
11#define __HAVE_ARCH_STRCAT 11#define __HAVE_ARCH_STRCAT
12#define __HAVE_ARCH_MEMSET 12#define __HAVE_ARCH_MEMSET
13#ifdef __BIG_ENDIAN__
13#define __HAVE_ARCH_MEMCPY 14#define __HAVE_ARCH_MEMCPY
15#endif
14#define __HAVE_ARCH_MEMMOVE 16#define __HAVE_ARCH_MEMMOVE
15#define __HAVE_ARCH_MEMCMP 17#define __HAVE_ARCH_MEMCMP
16#define __HAVE_ARCH_MEMCHR 18#define __HAVE_ARCH_MEMCHR
@@ -22,7 +24,9 @@ extern int strcmp(const char *,const char *);
22extern int strncmp(const char *, const char *, __kernel_size_t); 24extern int strncmp(const char *, const char *, __kernel_size_t);
23extern char * strcat(char *, const char *); 25extern char * strcat(char *, const char *);
24extern void * memset(void *,int,__kernel_size_t); 26extern void * memset(void *,int,__kernel_size_t);
27#ifdef __BIG_ENDIAN__
25extern void * memcpy(void *,const void *,__kernel_size_t); 28extern void * memcpy(void *,const void *,__kernel_size_t);
29#endif
26extern void * memmove(void *,const void *,__kernel_size_t); 30extern void * memmove(void *,const void *,__kernel_size_t);
27extern int memcmp(const void *,const void *,__kernel_size_t); 31extern int memcmp(const void *,const void *,__kernel_size_t);
28extern void * memchr(const void *,int,__kernel_size_t); 32extern void * memchr(const void *,int,__kernel_size_t);
diff --git a/arch/powerpc/include/asm/switch_to.h b/arch/powerpc/include/asm/switch_to.h
index 2be5618cdec6..9ee12610af02 100644
--- a/arch/powerpc/include/asm/switch_to.h
+++ b/arch/powerpc/include/asm/switch_to.h
@@ -35,6 +35,7 @@ extern void giveup_vsx(struct task_struct *);
35extern void enable_kernel_spe(void); 35extern void enable_kernel_spe(void);
36extern void giveup_spe(struct task_struct *); 36extern void giveup_spe(struct task_struct *);
37extern void load_up_spe(struct task_struct *); 37extern void load_up_spe(struct task_struct *);
38extern void switch_booke_debug_regs(struct thread_struct *new_thread);
38 39
39#ifndef CONFIG_SMP 40#ifndef CONFIG_SMP
40extern void discard_lazy_cpu_state(void); 41extern void discard_lazy_cpu_state(void);
diff --git a/arch/powerpc/include/asm/uprobes.h b/arch/powerpc/include/asm/uprobes.h
index 23016020915e..75c6ecdb8f37 100644
--- a/arch/powerpc/include/asm/uprobes.h
+++ b/arch/powerpc/include/asm/uprobes.h
@@ -37,6 +37,7 @@ typedef ppc_opcode_t uprobe_opcode_t;
37struct arch_uprobe { 37struct arch_uprobe {
38 union { 38 union {
39 u8 insn[MAX_UINSN_BYTES]; 39 u8 insn[MAX_UINSN_BYTES];
40 u8 ixol[MAX_UINSN_BYTES];
40 u32 ainsn; 41 u32 ainsn;
41 }; 42 };
42}; 43};
@@ -45,11 +46,4 @@ struct arch_uprobe_task {
45 unsigned long saved_trap_nr; 46 unsigned long saved_trap_nr;
46}; 47};
47 48
48extern int arch_uprobe_analyze_insn(struct arch_uprobe *aup, struct mm_struct *mm, unsigned long addr);
49extern int arch_uprobe_pre_xol(struct arch_uprobe *aup, struct pt_regs *regs);
50extern int arch_uprobe_post_xol(struct arch_uprobe *aup, struct pt_regs *regs);
51extern bool arch_uprobe_xol_was_trapped(struct task_struct *tsk);
52extern int arch_uprobe_exception_notify(struct notifier_block *self, unsigned long val, void *data);
53extern void arch_uprobe_abort_xol(struct arch_uprobe *aup, struct pt_regs *regs);
54extern unsigned long arch_uretprobe_hijack_return_addr(unsigned long trampoline_vaddr, struct pt_regs *regs);
55#endif /* _ASM_UPROBES_H */ 49#endif /* _ASM_UPROBES_H */
diff --git a/arch/powerpc/include/asm/word-at-a-time.h b/arch/powerpc/include/asm/word-at-a-time.h
index d0b6d4ac6dda..9a5c928bb3c6 100644
--- a/arch/powerpc/include/asm/word-at-a-time.h
+++ b/arch/powerpc/include/asm/word-at-a-time.h
@@ -8,6 +8,8 @@
8#include <linux/kernel.h> 8#include <linux/kernel.h>
9#include <asm/asm-compat.h> 9#include <asm/asm-compat.h>
10 10
11#ifdef __BIG_ENDIAN__
12
11struct word_at_a_time { 13struct word_at_a_time {
12 const unsigned long high_bits, low_bits; 14 const unsigned long high_bits, low_bits;
13}; 15};
@@ -38,4 +40,80 @@ static inline bool has_zero(unsigned long val, unsigned long *data, const struct
38 return (val + c->high_bits) & ~rhs; 40 return (val + c->high_bits) & ~rhs;
39} 41}
40 42
43#else
44
45struct word_at_a_time {
46 const unsigned long one_bits, high_bits;
47};
48
49#define WORD_AT_A_TIME_CONSTANTS { REPEAT_BYTE(0x01), REPEAT_BYTE(0x80) }
50
51#ifdef CONFIG_64BIT
52
53/* Alan Modra's little-endian strlen tail for 64-bit */
54#define create_zero_mask(mask) (mask)
55
56static inline unsigned long find_zero(unsigned long mask)
57{
58 unsigned long leading_zero_bits;
59 long trailing_zero_bit_mask;
60
61 asm ("addi %1,%2,-1\n\t"
62 "andc %1,%1,%2\n\t"
63 "popcntd %0,%1"
64 : "=r" (leading_zero_bits), "=&r" (trailing_zero_bit_mask)
65 : "r" (mask));
66 return leading_zero_bits >> 3;
67}
68
69#else /* 32-bit case */
70
71/*
72 * This is largely generic for little-endian machines, but the
73 * optimal byte mask counting is probably going to be something
74 * that is architecture-specific. If you have a reliably fast
75 * bit count instruction, that might be better than the multiply
76 * and shift, for example.
77 */
78
79/* Carl Chatfield / Jan Achrenius G+ version for 32-bit */
80static inline long count_masked_bytes(long mask)
81{
82 /* (000000 0000ff 00ffff ffffff) -> ( 1 1 2 3 ) */
83 long a = (0x0ff0001+mask) >> 23;
84 /* Fix the 1 for 00 case */
85 return a & mask;
86}
87
88static inline unsigned long create_zero_mask(unsigned long bits)
89{
90 bits = (bits - 1) & ~bits;
91 return bits >> 7;
92}
93
94static inline unsigned long find_zero(unsigned long mask)
95{
96 return count_masked_bytes(mask);
97}
98
99#endif
100
101/* Return nonzero if it has a zero */
102static inline unsigned long has_zero(unsigned long a, unsigned long *bits, const struct word_at_a_time *c)
103{
104 unsigned long mask = ((a - c->one_bits) & ~a) & c->high_bits;
105 *bits = mask;
106 return mask;
107}
108
109static inline unsigned long prep_zero_mask(unsigned long a, unsigned long bits, const struct word_at_a_time *c)
110{
111 return bits;
112}
113
114/* The mask we created is directly usable as a bytemask */
115#define zero_bytemask(mask) (mask)
116
117#endif
118
41#endif /* _ASM_WORD_AT_A_TIME_H */ 119#endif /* _ASM_WORD_AT_A_TIME_H */
diff --git a/arch/powerpc/include/asm/xor.h b/arch/powerpc/include/asm/xor.h
index c82eb12a5b18..0abb97f3be10 100644
--- a/arch/powerpc/include/asm/xor.h
+++ b/arch/powerpc/include/asm/xor.h
@@ -1 +1,68 @@
1/*
2 * This program is free software; you can redistribute it and/or modify
3 * it under the terms of the GNU General Public License as published by
4 * the Free Software Foundation; either version 2 of the License, or
5 * (at your option) any later version.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 *
12 * You should have received a copy of the GNU General Public License
13 * along with this program; if not, write to the Free Software
14 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
15 *
16 * Copyright (C) IBM Corporation, 2012
17 *
18 * Author: Anton Blanchard <anton@au.ibm.com>
19 */
20#ifndef _ASM_POWERPC_XOR_H
21#define _ASM_POWERPC_XOR_H
22
23#ifdef CONFIG_ALTIVEC
24
25#include <asm/cputable.h>
26
27void xor_altivec_2(unsigned long bytes, unsigned long *v1_in,
28 unsigned long *v2_in);
29void xor_altivec_3(unsigned long bytes, unsigned long *v1_in,
30 unsigned long *v2_in, unsigned long *v3_in);
31void xor_altivec_4(unsigned long bytes, unsigned long *v1_in,
32 unsigned long *v2_in, unsigned long *v3_in,
33 unsigned long *v4_in);
34void xor_altivec_5(unsigned long bytes, unsigned long *v1_in,
35 unsigned long *v2_in, unsigned long *v3_in,
36 unsigned long *v4_in, unsigned long *v5_in);
37
38static struct xor_block_template xor_block_altivec = {
39 .name = "altivec",
40 .do_2 = xor_altivec_2,
41 .do_3 = xor_altivec_3,
42 .do_4 = xor_altivec_4,
43 .do_5 = xor_altivec_5,
44};
45
46#define XOR_SPEED_ALTIVEC() \
47 do { \
48 if (cpu_has_feature(CPU_FTR_ALTIVEC)) \
49 xor_speed(&xor_block_altivec); \
50 } while (0)
51#else
52#define XOR_SPEED_ALTIVEC()
53#endif
54
55/* Also try the generic routines. */
1#include <asm-generic/xor.h> 56#include <asm-generic/xor.h>
57
58#undef XOR_TRY_TEMPLATES
59#define XOR_TRY_TEMPLATES \
60do { \
61 xor_speed(&xor_block_8regs); \
62 xor_speed(&xor_block_8regs_p); \
63 xor_speed(&xor_block_32regs); \
64 xor_speed(&xor_block_32regs_p); \
65 XOR_SPEED_ALTIVEC(); \
66} while (0)
67
68#endif /* _ASM_POWERPC_XOR_H */
diff --git a/arch/powerpc/include/uapi/asm/byteorder.h b/arch/powerpc/include/uapi/asm/byteorder.h
index aa6cc4fac965..ca931d074000 100644
--- a/arch/powerpc/include/uapi/asm/byteorder.h
+++ b/arch/powerpc/include/uapi/asm/byteorder.h
@@ -7,6 +7,10 @@
7 * as published by the Free Software Foundation; either version 7 * as published by the Free Software Foundation; either version
8 * 2 of the License, or (at your option) any later version. 8 * 2 of the License, or (at your option) any later version.
9 */ 9 */
10#ifdef __LITTLE_ENDIAN__
11#include <linux/byteorder/little_endian.h>
12#else
10#include <linux/byteorder/big_endian.h> 13#include <linux/byteorder/big_endian.h>
14#endif
11 15
12#endif /* _ASM_POWERPC_BYTEORDER_H */ 16#endif /* _ASM_POWERPC_BYTEORDER_H */
diff --git a/arch/powerpc/kernel/align.c b/arch/powerpc/kernel/align.c
index a27ccd5dc6b9..de91f3ae631e 100644
--- a/arch/powerpc/kernel/align.c
+++ b/arch/powerpc/kernel/align.c
@@ -54,8 +54,6 @@ struct aligninfo {
54/* DSISR bits reported for a DCBZ instruction: */ 54/* DSISR bits reported for a DCBZ instruction: */
55#define DCBZ 0x5f /* 8xx/82xx dcbz faults when cache not enabled */ 55#define DCBZ 0x5f /* 8xx/82xx dcbz faults when cache not enabled */
56 56
57#define SWAP(a, b) (t = (a), (a) = (b), (b) = t)
58
59/* 57/*
60 * The PowerPC stores certain bits of the instruction that caused the 58 * The PowerPC stores certain bits of the instruction that caused the
61 * alignment exception in the DSISR register. This array maps those 59 * alignment exception in the DSISR register. This array maps those
@@ -256,11 +254,17 @@ static int emulate_dcbz(struct pt_regs *regs, unsigned char __user *addr)
256 * bottom 4 bytes of each register, and the loads clear the 254 * bottom 4 bytes of each register, and the loads clear the
257 * top 4 bytes of the affected register. 255 * top 4 bytes of the affected register.
258 */ 256 */
257#ifdef __BIG_ENDIAN__
259#ifdef CONFIG_PPC64 258#ifdef CONFIG_PPC64
260#define REG_BYTE(rp, i) *((u8 *)((rp) + ((i) >> 2)) + ((i) & 3) + 4) 259#define REG_BYTE(rp, i) *((u8 *)((rp) + ((i) >> 2)) + ((i) & 3) + 4)
261#else 260#else
262#define REG_BYTE(rp, i) *((u8 *)(rp) + (i)) 261#define REG_BYTE(rp, i) *((u8 *)(rp) + (i))
263#endif 262#endif
263#endif
264
265#ifdef __LITTLE_ENDIAN__
266#define REG_BYTE(rp, i) (*(((u8 *)((rp) + ((i)>>2)) + ((i)&3))))
267#endif
264 268
265#define SWIZ_PTR(p) ((unsigned char __user *)((p) ^ swiz)) 269#define SWIZ_PTR(p) ((unsigned char __user *)((p) ^ swiz))
266 270
@@ -305,6 +309,15 @@ static int emulate_multiple(struct pt_regs *regs, unsigned char __user *addr,
305 nb0 = nb + reg * 4 - 128; 309 nb0 = nb + reg * 4 - 128;
306 nb = 128 - reg * 4; 310 nb = 128 - reg * 4;
307 } 311 }
312#ifdef __LITTLE_ENDIAN__
313 /*
314 * String instructions are endian neutral but the code
315 * below is not. Force byte swapping on so that the
316 * effects of swizzling are undone in the load/store
317 * loops below.
318 */
319 flags ^= SW;
320#endif
308 } else { 321 } else {
309 /* lwm, stmw */ 322 /* lwm, stmw */
310 nb = (32 - reg) * 4; 323 nb = (32 - reg) * 4;
@@ -458,7 +471,7 @@ static struct aligninfo spe_aligninfo[32] = {
458static int emulate_spe(struct pt_regs *regs, unsigned int reg, 471static int emulate_spe(struct pt_regs *regs, unsigned int reg,
459 unsigned int instr) 472 unsigned int instr)
460{ 473{
461 int t, ret; 474 int ret;
462 union { 475 union {
463 u64 ll; 476 u64 ll;
464 u32 w[2]; 477 u32 w[2];
@@ -581,24 +594,18 @@ static int emulate_spe(struct pt_regs *regs, unsigned int reg,
581 if (flags & SW) { 594 if (flags & SW) {
582 switch (flags & 0xf0) { 595 switch (flags & 0xf0) {
583 case E8: 596 case E8:
584 SWAP(data.v[0], data.v[7]); 597 data.ll = swab64(data.ll);
585 SWAP(data.v[1], data.v[6]);
586 SWAP(data.v[2], data.v[5]);
587 SWAP(data.v[3], data.v[4]);
588 break; 598 break;
589 case E4: 599 case E4:
590 600 data.w[0] = swab32(data.w[0]);
591 SWAP(data.v[0], data.v[3]); 601 data.w[1] = swab32(data.w[1]);
592 SWAP(data.v[1], data.v[2]);
593 SWAP(data.v[4], data.v[7]);
594 SWAP(data.v[5], data.v[6]);
595 break; 602 break;
596 /* Its half word endian */ 603 /* Its half word endian */
597 default: 604 default:
598 SWAP(data.v[0], data.v[1]); 605 data.h[0] = swab16(data.h[0]);
599 SWAP(data.v[2], data.v[3]); 606 data.h[1] = swab16(data.h[1]);
600 SWAP(data.v[4], data.v[5]); 607 data.h[2] = swab16(data.h[2]);
601 SWAP(data.v[6], data.v[7]); 608 data.h[3] = swab16(data.h[3]);
602 break; 609 break;
603 } 610 }
604 } 611 }
@@ -658,14 +665,31 @@ static int emulate_vsx(unsigned char __user *addr, unsigned int reg,
658 flush_vsx_to_thread(current); 665 flush_vsx_to_thread(current);
659 666
660 if (reg < 32) 667 if (reg < 32)
661 ptr = (char *) &current->thread.TS_FPR(reg); 668 ptr = (char *) &current->thread.fp_state.fpr[reg][0];
662 else 669 else
663 ptr = (char *) &current->thread.vr[reg - 32]; 670 ptr = (char *) &current->thread.vr_state.vr[reg - 32];
664 671
665 lptr = (unsigned long *) ptr; 672 lptr = (unsigned long *) ptr;
666 673
674#ifdef __LITTLE_ENDIAN__
675 if (flags & SW) {
676 elsize = length;
677 sw = length-1;
678 } else {
679 /*
680 * The elements are BE ordered, even in LE mode, so process
681 * them in reverse order.
682 */
683 addr += length - elsize;
684
685 /* 8 byte memory accesses go in the top 8 bytes of the VR */
686 if (length == 8)
687 ptr += 8;
688 }
689#else
667 if (flags & SW) 690 if (flags & SW)
668 sw = elsize-1; 691 sw = elsize-1;
692#endif
669 693
670 for (j = 0; j < length; j += elsize) { 694 for (j = 0; j < length; j += elsize) {
671 for (i = 0; i < elsize; ++i) { 695 for (i = 0; i < elsize; ++i) {
@@ -675,19 +699,31 @@ static int emulate_vsx(unsigned char __user *addr, unsigned int reg,
675 ret |= __get_user(ptr[i^sw], addr + i); 699 ret |= __get_user(ptr[i^sw], addr + i);
676 } 700 }
677 ptr += elsize; 701 ptr += elsize;
702#ifdef __LITTLE_ENDIAN__
703 addr -= elsize;
704#else
678 addr += elsize; 705 addr += elsize;
706#endif
679 } 707 }
680 708
709#ifdef __BIG_ENDIAN__
710#define VSX_HI 0
711#define VSX_LO 1
712#else
713#define VSX_HI 1
714#define VSX_LO 0
715#endif
716
681 if (!ret) { 717 if (!ret) {
682 if (flags & U) 718 if (flags & U)
683 regs->gpr[areg] = regs->dar; 719 regs->gpr[areg] = regs->dar;
684 720
685 /* Splat load copies the same data to top and bottom 8 bytes */ 721 /* Splat load copies the same data to top and bottom 8 bytes */
686 if (flags & SPLT) 722 if (flags & SPLT)
687 lptr[1] = lptr[0]; 723 lptr[VSX_LO] = lptr[VSX_HI];
688 /* For 8 byte loads, zero the top 8 bytes */ 724 /* For 8 byte loads, zero the low 8 bytes */
689 else if (!(flags & ST) && (8 == length)) 725 else if (!(flags & ST) && (8 == length))
690 lptr[1] = 0; 726 lptr[VSX_LO] = 0;
691 } else 727 } else
692 return -EFAULT; 728 return -EFAULT;
693 729
@@ -710,18 +746,28 @@ int fix_alignment(struct pt_regs *regs)
710 unsigned int dsisr; 746 unsigned int dsisr;
711 unsigned char __user *addr; 747 unsigned char __user *addr;
712 unsigned long p, swiz; 748 unsigned long p, swiz;
713 int ret, t; 749 int ret, i;
714 union { 750 union data {
715 u64 ll; 751 u64 ll;
716 double dd; 752 double dd;
717 unsigned char v[8]; 753 unsigned char v[8];
718 struct { 754 struct {
755#ifdef __LITTLE_ENDIAN__
756 int low32;
757 unsigned hi32;
758#else
719 unsigned hi32; 759 unsigned hi32;
720 int low32; 760 int low32;
761#endif
721 } x32; 762 } x32;
722 struct { 763 struct {
764#ifdef __LITTLE_ENDIAN__
765 short low16;
766 unsigned char hi48[6];
767#else
723 unsigned char hi48[6]; 768 unsigned char hi48[6];
724 short low16; 769 short low16;
770#endif
725 } x16; 771 } x16;
726 } data; 772 } data;
727 773
@@ -780,8 +826,9 @@ int fix_alignment(struct pt_regs *regs)
780 826
781 /* Byteswap little endian loads and stores */ 827 /* Byteswap little endian loads and stores */
782 swiz = 0; 828 swiz = 0;
783 if (regs->msr & MSR_LE) { 829 if ((regs->msr & MSR_LE) != (MSR_KERNEL & MSR_LE)) {
784 flags ^= SW; 830 flags ^= SW;
831#ifdef __BIG_ENDIAN__
785 /* 832 /*
786 * So-called "PowerPC little endian" mode works by 833 * So-called "PowerPC little endian" mode works by
787 * swizzling addresses rather than by actually doing 834 * swizzling addresses rather than by actually doing
@@ -794,6 +841,7 @@ int fix_alignment(struct pt_regs *regs)
794 */ 841 */
795 if (cpu_has_feature(CPU_FTR_PPC_LE)) 842 if (cpu_has_feature(CPU_FTR_PPC_LE))
796 swiz = 7; 843 swiz = 7;
844#endif
797 } 845 }
798 846
799 /* DAR has the operand effective address */ 847 /* DAR has the operand effective address */
@@ -818,7 +866,7 @@ int fix_alignment(struct pt_regs *regs)
818 elsize = 8; 866 elsize = 8;
819 867
820 flags = 0; 868 flags = 0;
821 if (regs->msr & MSR_LE) 869 if ((regs->msr & MSR_LE) != (MSR_KERNEL & MSR_LE))
822 flags |= SW; 870 flags |= SW;
823 if (instruction & 0x100) 871 if (instruction & 0x100)
824 flags |= ST; 872 flags |= ST;
@@ -878,32 +926,36 @@ int fix_alignment(struct pt_regs *regs)
878 * get it from register values 926 * get it from register values
879 */ 927 */
880 if (!(flags & ST)) { 928 if (!(flags & ST)) {
881 data.ll = 0; 929 unsigned int start = 0;
882 ret = 0; 930
883 p = (unsigned long) addr;
884 switch (nb) { 931 switch (nb) {
885 case 8:
886 ret |= __get_user_inatomic(data.v[0], SWIZ_PTR(p++));
887 ret |= __get_user_inatomic(data.v[1], SWIZ_PTR(p++));
888 ret |= __get_user_inatomic(data.v[2], SWIZ_PTR(p++));
889 ret |= __get_user_inatomic(data.v[3], SWIZ_PTR(p++));
890 case 4: 932 case 4:
891 ret |= __get_user_inatomic(data.v[4], SWIZ_PTR(p++)); 933 start = offsetof(union data, x32.low32);
892 ret |= __get_user_inatomic(data.v[5], SWIZ_PTR(p++)); 934 break;
893 case 2: 935 case 2:
894 ret |= __get_user_inatomic(data.v[6], SWIZ_PTR(p++)); 936 start = offsetof(union data, x16.low16);
895 ret |= __get_user_inatomic(data.v[7], SWIZ_PTR(p++)); 937 break;
896 if (unlikely(ret))
897 return -EFAULT;
898 } 938 }
939
940 data.ll = 0;
941 ret = 0;
942 p = (unsigned long)addr;
943
944 for (i = 0; i < nb; i++)
945 ret |= __get_user_inatomic(data.v[start + i],
946 SWIZ_PTR(p++));
947
948 if (unlikely(ret))
949 return -EFAULT;
950
899 } else if (flags & F) { 951 } else if (flags & F) {
900 data.dd = current->thread.TS_FPR(reg); 952 data.ll = current->thread.TS_FPR(reg);
901 if (flags & S) { 953 if (flags & S) {
902 /* Single-precision FP store requires conversion... */ 954 /* Single-precision FP store requires conversion... */
903#ifdef CONFIG_PPC_FPU 955#ifdef CONFIG_PPC_FPU
904 preempt_disable(); 956 preempt_disable();
905 enable_kernel_fp(); 957 enable_kernel_fp();
906 cvt_df(&data.dd, (float *)&data.v[4]); 958 cvt_df(&data.dd, (float *)&data.x32.low32);
907 preempt_enable(); 959 preempt_enable();
908#else 960#else
909 return 0; 961 return 0;
@@ -915,17 +967,13 @@ int fix_alignment(struct pt_regs *regs)
915 if (flags & SW) { 967 if (flags & SW) {
916 switch (nb) { 968 switch (nb) {
917 case 8: 969 case 8:
918 SWAP(data.v[0], data.v[7]); 970 data.ll = swab64(data.ll);
919 SWAP(data.v[1], data.v[6]);
920 SWAP(data.v[2], data.v[5]);
921 SWAP(data.v[3], data.v[4]);
922 break; 971 break;
923 case 4: 972 case 4:
924 SWAP(data.v[4], data.v[7]); 973 data.x32.low32 = swab32(data.x32.low32);
925 SWAP(data.v[5], data.v[6]);
926 break; 974 break;
927 case 2: 975 case 2:
928 SWAP(data.v[6], data.v[7]); 976 data.x16.low16 = swab16(data.x16.low16);
929 break; 977 break;
930 } 978 }
931 } 979 }
@@ -947,7 +995,7 @@ int fix_alignment(struct pt_regs *regs)
947#ifdef CONFIG_PPC_FPU 995#ifdef CONFIG_PPC_FPU
948 preempt_disable(); 996 preempt_disable();
949 enable_kernel_fp(); 997 enable_kernel_fp();
950 cvt_fd((float *)&data.v[4], &data.dd); 998 cvt_fd((float *)&data.x32.low32, &data.dd);
951 preempt_enable(); 999 preempt_enable();
952#else 1000#else
953 return 0; 1001 return 0;
@@ -957,25 +1005,28 @@ int fix_alignment(struct pt_regs *regs)
957 1005
958 /* Store result to memory or update registers */ 1006 /* Store result to memory or update registers */
959 if (flags & ST) { 1007 if (flags & ST) {
960 ret = 0; 1008 unsigned int start = 0;
961 p = (unsigned long) addr; 1009
962 switch (nb) { 1010 switch (nb) {
963 case 8:
964 ret |= __put_user_inatomic(data.v[0], SWIZ_PTR(p++));
965 ret |= __put_user_inatomic(data.v[1], SWIZ_PTR(p++));
966 ret |= __put_user_inatomic(data.v[2], SWIZ_PTR(p++));
967 ret |= __put_user_inatomic(data.v[3], SWIZ_PTR(p++));
968 case 4: 1011 case 4:
969 ret |= __put_user_inatomic(data.v[4], SWIZ_PTR(p++)); 1012 start = offsetof(union data, x32.low32);
970 ret |= __put_user_inatomic(data.v[5], SWIZ_PTR(p++)); 1013 break;
971 case 2: 1014 case 2:
972 ret |= __put_user_inatomic(data.v[6], SWIZ_PTR(p++)); 1015 start = offsetof(union data, x16.low16);
973 ret |= __put_user_inatomic(data.v[7], SWIZ_PTR(p++)); 1016 break;
974 } 1017 }
1018
1019 ret = 0;
1020 p = (unsigned long)addr;
1021
1022 for (i = 0; i < nb; i++)
1023 ret |= __put_user_inatomic(data.v[start + i],
1024 SWIZ_PTR(p++));
1025
975 if (unlikely(ret)) 1026 if (unlikely(ret))
976 return -EFAULT; 1027 return -EFAULT;
977 } else if (flags & F) 1028 } else if (flags & F)
978 current->thread.TS_FPR(reg) = data.dd; 1029 current->thread.TS_FPR(reg) = data.ll;
979 else 1030 else
980 regs->gpr[reg] = data.ll; 1031 regs->gpr[reg] = data.ll;
981 1032
diff --git a/arch/powerpc/kernel/asm-offsets.c b/arch/powerpc/kernel/asm-offsets.c
index 502c7a4e73f7..e60a3697932c 100644
--- a/arch/powerpc/kernel/asm-offsets.c
+++ b/arch/powerpc/kernel/asm-offsets.c
@@ -90,16 +90,17 @@ int main(void)
90 DEFINE(THREAD_NORMSAVES, offsetof(struct thread_struct, normsave[0])); 90 DEFINE(THREAD_NORMSAVES, offsetof(struct thread_struct, normsave[0]));
91#endif 91#endif
92 DEFINE(THREAD_FPEXC_MODE, offsetof(struct thread_struct, fpexc_mode)); 92 DEFINE(THREAD_FPEXC_MODE, offsetof(struct thread_struct, fpexc_mode));
93 DEFINE(THREAD_FPR0, offsetof(struct thread_struct, fpr[0])); 93 DEFINE(THREAD_FPSTATE, offsetof(struct thread_struct, fp_state));
94 DEFINE(THREAD_FPSCR, offsetof(struct thread_struct, fpscr)); 94 DEFINE(THREAD_FPSAVEAREA, offsetof(struct thread_struct, fp_save_area));
95 DEFINE(FPSTATE_FPSCR, offsetof(struct thread_fp_state, fpscr));
95#ifdef CONFIG_ALTIVEC 96#ifdef CONFIG_ALTIVEC
96 DEFINE(THREAD_VR0, offsetof(struct thread_struct, vr[0])); 97 DEFINE(THREAD_VRSTATE, offsetof(struct thread_struct, vr_state));
98 DEFINE(THREAD_VRSAVEAREA, offsetof(struct thread_struct, vr_save_area));
97 DEFINE(THREAD_VRSAVE, offsetof(struct thread_struct, vrsave)); 99 DEFINE(THREAD_VRSAVE, offsetof(struct thread_struct, vrsave));
98 DEFINE(THREAD_VSCR, offsetof(struct thread_struct, vscr));
99 DEFINE(THREAD_USED_VR, offsetof(struct thread_struct, used_vr)); 100 DEFINE(THREAD_USED_VR, offsetof(struct thread_struct, used_vr));
101 DEFINE(VRSTATE_VSCR, offsetof(struct thread_vr_state, vscr));
100#endif /* CONFIG_ALTIVEC */ 102#endif /* CONFIG_ALTIVEC */
101#ifdef CONFIG_VSX 103#ifdef CONFIG_VSX
102 DEFINE(THREAD_VSR0, offsetof(struct thread_struct, fpr));
103 DEFINE(THREAD_USED_VSR, offsetof(struct thread_struct, used_vsr)); 104 DEFINE(THREAD_USED_VSR, offsetof(struct thread_struct, used_vsr));
104#endif /* CONFIG_VSX */ 105#endif /* CONFIG_VSX */
105#ifdef CONFIG_PPC64 106#ifdef CONFIG_PPC64
@@ -114,7 +115,7 @@ int main(void)
114#endif /* CONFIG_SPE */ 115#endif /* CONFIG_SPE */
115#endif /* CONFIG_PPC64 */ 116#endif /* CONFIG_PPC64 */
116#if defined(CONFIG_4xx) || defined(CONFIG_BOOKE) 117#if defined(CONFIG_4xx) || defined(CONFIG_BOOKE)
117 DEFINE(THREAD_DBCR0, offsetof(struct thread_struct, dbcr0)); 118 DEFINE(THREAD_DBCR0, offsetof(struct thread_struct, debug.dbcr0));
118#endif 119#endif
119#ifdef CONFIG_KVM_BOOK3S_32_HANDLER 120#ifdef CONFIG_KVM_BOOK3S_32_HANDLER
120 DEFINE(THREAD_KVM_SVCPU, offsetof(struct thread_struct, kvm_shadow_vcpu)); 121 DEFINE(THREAD_KVM_SVCPU, offsetof(struct thread_struct, kvm_shadow_vcpu));
@@ -143,20 +144,12 @@ int main(void)
143 DEFINE(THREAD_TM_PPR, offsetof(struct thread_struct, tm_ppr)); 144 DEFINE(THREAD_TM_PPR, offsetof(struct thread_struct, tm_ppr));
144 DEFINE(THREAD_TM_DSCR, offsetof(struct thread_struct, tm_dscr)); 145 DEFINE(THREAD_TM_DSCR, offsetof(struct thread_struct, tm_dscr));
145 DEFINE(PT_CKPT_REGS, offsetof(struct thread_struct, ckpt_regs)); 146 DEFINE(PT_CKPT_REGS, offsetof(struct thread_struct, ckpt_regs));
146 DEFINE(THREAD_TRANSACT_VR0, offsetof(struct thread_struct, 147 DEFINE(THREAD_TRANSACT_VRSTATE, offsetof(struct thread_struct,
147 transact_vr[0])); 148 transact_vr));
148 DEFINE(THREAD_TRANSACT_VSCR, offsetof(struct thread_struct,
149 transact_vscr));
150 DEFINE(THREAD_TRANSACT_VRSAVE, offsetof(struct thread_struct, 149 DEFINE(THREAD_TRANSACT_VRSAVE, offsetof(struct thread_struct,
151 transact_vrsave)); 150 transact_vrsave));
152 DEFINE(THREAD_TRANSACT_FPR0, offsetof(struct thread_struct, 151 DEFINE(THREAD_TRANSACT_FPSTATE, offsetof(struct thread_struct,
153 transact_fpr[0])); 152 transact_fp));
154 DEFINE(THREAD_TRANSACT_FPSCR, offsetof(struct thread_struct,
155 transact_fpscr));
156#ifdef CONFIG_VSX
157 DEFINE(THREAD_TRANSACT_VSR0, offsetof(struct thread_struct,
158 transact_fpr[0]));
159#endif
160 /* Local pt_regs on stack for Transactional Memory funcs. */ 153 /* Local pt_regs on stack for Transactional Memory funcs. */
161 DEFINE(TM_FRAME_SIZE, STACK_FRAME_OVERHEAD + 154 DEFINE(TM_FRAME_SIZE, STACK_FRAME_OVERHEAD +
162 sizeof(struct pt_regs) + 16); 155 sizeof(struct pt_regs) + 16);
diff --git a/arch/powerpc/kernel/eeh.c b/arch/powerpc/kernel/eeh.c
index 55593ee2d5aa..1fb331db34c8 100644
--- a/arch/powerpc/kernel/eeh.c
+++ b/arch/powerpc/kernel/eeh.c
@@ -327,11 +327,11 @@ static int eeh_phb_check_failure(struct eeh_pe *pe)
327 /* Isolate the PHB and send event */ 327 /* Isolate the PHB and send event */
328 eeh_pe_state_mark(phb_pe, EEH_PE_ISOLATED); 328 eeh_pe_state_mark(phb_pe, EEH_PE_ISOLATED);
329 eeh_serialize_unlock(flags); 329 eeh_serialize_unlock(flags);
330 eeh_send_failure_event(phb_pe);
331 330
332 pr_err("EEH: PHB#%x failure detected\n", 331 pr_err("EEH: PHB#%x failure detected\n",
333 phb_pe->phb->global_number); 332 phb_pe->phb->global_number);
334 dump_stack(); 333 dump_stack();
334 eeh_send_failure_event(phb_pe);
335 335
336 return 1; 336 return 1;
337out: 337out:
@@ -454,8 +454,6 @@ int eeh_dev_check_failure(struct eeh_dev *edev)
454 eeh_pe_state_mark(pe, EEH_PE_ISOLATED); 454 eeh_pe_state_mark(pe, EEH_PE_ISOLATED);
455 eeh_serialize_unlock(flags); 455 eeh_serialize_unlock(flags);
456 456
457 eeh_send_failure_event(pe);
458
459 /* Most EEH events are due to device driver bugs. Having 457 /* Most EEH events are due to device driver bugs. Having
460 * a stack trace will help the device-driver authors figure 458 * a stack trace will help the device-driver authors figure
461 * out what happened. So print that out. 459 * out what happened. So print that out.
@@ -464,6 +462,8 @@ int eeh_dev_check_failure(struct eeh_dev *edev)
464 pe->addr, pe->phb->global_number); 462 pe->addr, pe->phb->global_number);
465 dump_stack(); 463 dump_stack();
466 464
465 eeh_send_failure_event(pe);
466
467 return 1; 467 return 1;
468 468
469dn_unlock: 469dn_unlock:
diff --git a/arch/powerpc/kernel/entry_64.S b/arch/powerpc/kernel/entry_64.S
index c04cdf70d487..bbfb0294b354 100644
--- a/arch/powerpc/kernel/entry_64.S
+++ b/arch/powerpc/kernel/entry_64.S
@@ -673,9 +673,7 @@ _GLOBAL(ret_from_except_lite)
673 673
674resume_kernel: 674resume_kernel:
675 /* check current_thread_info, _TIF_EMULATE_STACK_STORE */ 675 /* check current_thread_info, _TIF_EMULATE_STACK_STORE */
676 CURRENT_THREAD_INFO(r9, r1) 676 andis. r8,r4,_TIF_EMULATE_STACK_STORE@h
677 ld r8,TI_FLAGS(r9)
678 andis. r8,r8,_TIF_EMULATE_STACK_STORE@h
679 beq+ 1f 677 beq+ 1f
680 678
681 addi r8,r1,INT_FRAME_SIZE /* Get the kprobed function entry */ 679 addi r8,r1,INT_FRAME_SIZE /* Get the kprobed function entry */
@@ -820,6 +818,12 @@ fast_exception_return:
820 andi. r0,r3,MSR_RI 818 andi. r0,r3,MSR_RI
821 beq- unrecov_restore 819 beq- unrecov_restore
822 820
821 /* Load PPR from thread struct before we clear MSR:RI */
822BEGIN_FTR_SECTION
823 ld r2,PACACURRENT(r13)
824 ld r2,TASKTHREADPPR(r2)
825END_FTR_SECTION_IFSET(CPU_FTR_HAS_PPR)
826
823 /* 827 /*
824 * Clear RI before restoring r13. If we are returning to 828 * Clear RI before restoring r13. If we are returning to
825 * userspace and we take an exception after restoring r13, 829 * userspace and we take an exception after restoring r13,
@@ -840,8 +844,10 @@ fast_exception_return:
840 */ 844 */
841 andi. r0,r3,MSR_PR 845 andi. r0,r3,MSR_PR
842 beq 1f 846 beq 1f
847BEGIN_FTR_SECTION
848 mtspr SPRN_PPR,r2 /* Restore PPR */
849END_FTR_SECTION_IFSET(CPU_FTR_HAS_PPR)
843 ACCOUNT_CPU_USER_EXIT(r2, r4) 850 ACCOUNT_CPU_USER_EXIT(r2, r4)
844 RESTORE_PPR(r2, r4)
845 REST_GPR(13, r1) 851 REST_GPR(13, r1)
8461: 8521:
847 mtspr SPRN_SRR1,r3 853 mtspr SPRN_SRR1,r3
@@ -1017,7 +1023,7 @@ _GLOBAL(enter_rtas)
1017 1023
1018 li r9,1 1024 li r9,1
1019 rldicr r9,r9,MSR_SF_LG,(63-MSR_SF_LG) 1025 rldicr r9,r9,MSR_SF_LG,(63-MSR_SF_LG)
1020 ori r9,r9,MSR_IR|MSR_DR|MSR_FE0|MSR_FE1|MSR_FP|MSR_RI 1026 ori r9,r9,MSR_IR|MSR_DR|MSR_FE0|MSR_FE1|MSR_FP|MSR_RI|MSR_LE
1021 andc r6,r0,r9 1027 andc r6,r0,r9
1022 sync /* disable interrupts so SRR0/1 */ 1028 sync /* disable interrupts so SRR0/1 */
1023 mtmsrd r0 /* don't get trashed */ 1029 mtmsrd r0 /* don't get trashed */
@@ -1032,6 +1038,8 @@ _GLOBAL(enter_rtas)
1032 b . /* prevent speculative execution */ 1038 b . /* prevent speculative execution */
1033 1039
1034_STATIC(rtas_return_loc) 1040_STATIC(rtas_return_loc)
1041 FIXUP_ENDIAN
1042
1035 /* relocation is off at this point */ 1043 /* relocation is off at this point */
1036 GET_PACA(r4) 1044 GET_PACA(r4)
1037 clrldi r4,r4,2 /* convert to realmode address */ 1045 clrldi r4,r4,2 /* convert to realmode address */
@@ -1103,28 +1111,30 @@ _GLOBAL(enter_prom)
1103 std r10,_CCR(r1) 1111 std r10,_CCR(r1)
1104 std r11,_MSR(r1) 1112 std r11,_MSR(r1)
1105 1113
1106 /* Get the PROM entrypoint */ 1114 /* Put PROM address in SRR0 */
1107 mtlr r4 1115 mtsrr0 r4
1108 1116
1109 /* Switch MSR to 32 bits mode 1117 /* Setup our trampoline return addr in LR */
1118 bcl 20,31,$+4
11190: mflr r4
1120 addi r4,r4,(1f - 0b)
1121 mtlr r4
1122
1123 /* Prepare a 32-bit mode big endian MSR
1110 */ 1124 */
1111#ifdef CONFIG_PPC_BOOK3E 1125#ifdef CONFIG_PPC_BOOK3E
1112 rlwinm r11,r11,0,1,31 1126 rlwinm r11,r11,0,1,31
1113 mtmsr r11 1127 mtsrr1 r11
1128 rfi
1114#else /* CONFIG_PPC_BOOK3E */ 1129#else /* CONFIG_PPC_BOOK3E */
1115 mfmsr r11 1130 LOAD_REG_IMMEDIATE(r12, MSR_SF | MSR_ISF | MSR_LE)
1116 li r12,1 1131 andc r11,r11,r12
1117 rldicr r12,r12,MSR_SF_LG,(63-MSR_SF_LG) 1132 mtsrr1 r11
1118 andc r11,r11,r12 1133 rfid
1119 li r12,1
1120 rldicr r12,r12,MSR_ISF_LG,(63-MSR_ISF_LG)
1121 andc r11,r11,r12
1122 mtmsrd r11
1123#endif /* CONFIG_PPC_BOOK3E */ 1134#endif /* CONFIG_PPC_BOOK3E */
1124 isync
1125 1135
1126 /* Enter PROM here... */ 11361: /* Return from OF */
1127 blrl 1137 FIXUP_ENDIAN
1128 1138
1129 /* Just make sure that r1 top 32 bits didn't get 1139 /* Just make sure that r1 top 32 bits didn't get
1130 * corrupt by OF 1140 * corrupt by OF
diff --git a/arch/powerpc/kernel/epapr_paravirt.c b/arch/powerpc/kernel/epapr_paravirt.c
index 6300c13bbde4..7898be90f2dc 100644
--- a/arch/powerpc/kernel/epapr_paravirt.c
+++ b/arch/powerpc/kernel/epapr_paravirt.c
@@ -18,6 +18,7 @@
18 */ 18 */
19 19
20#include <linux/of.h> 20#include <linux/of.h>
21#include <linux/of_fdt.h>
21#include <asm/epapr_hcalls.h> 22#include <asm/epapr_hcalls.h>
22#include <asm/cacheflush.h> 23#include <asm/cacheflush.h>
23#include <asm/code-patching.h> 24#include <asm/code-patching.h>
diff --git a/arch/powerpc/kernel/exceptions-64e.S b/arch/powerpc/kernel/exceptions-64e.S
index 2d067049db27..e7751561fd1d 100644
--- a/arch/powerpc/kernel/exceptions-64e.S
+++ b/arch/powerpc/kernel/exceptions-64e.S
@@ -399,7 +399,7 @@ interrupt_end_book3e:
399 399
400/* Altivec Unavailable Interrupt */ 400/* Altivec Unavailable Interrupt */
401 START_EXCEPTION(altivec_unavailable); 401 START_EXCEPTION(altivec_unavailable);
402 NORMAL_EXCEPTION_PROLOG(0x200, BOOKE_INTERRUPT_ALTIVEC_UNAVAIL, 402 NORMAL_EXCEPTION_PROLOG(0x200, BOOKE_INTERRUPT_SPE_ALTIVEC_UNAVAIL,
403 PROLOG_ADDITION_NONE) 403 PROLOG_ADDITION_NONE)
404 /* we can probably do a shorter exception entry for that one... */ 404 /* we can probably do a shorter exception entry for that one... */
405 EXCEPTION_COMMON(0x200, PACA_EXGEN, INTS_KEEP) 405 EXCEPTION_COMMON(0x200, PACA_EXGEN, INTS_KEEP)
@@ -421,7 +421,8 @@ END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
421 421
422/* AltiVec Assist */ 422/* AltiVec Assist */
423 START_EXCEPTION(altivec_assist); 423 START_EXCEPTION(altivec_assist);
424 NORMAL_EXCEPTION_PROLOG(0x220, BOOKE_INTERRUPT_ALTIVEC_ASSIST, 424 NORMAL_EXCEPTION_PROLOG(0x220,
425 BOOKE_INTERRUPT_SPE_FP_DATA_ALTIVEC_ASSIST,
425 PROLOG_ADDITION_NONE) 426 PROLOG_ADDITION_NONE)
426 EXCEPTION_COMMON(0x220, PACA_EXGEN, INTS_DISABLE) 427 EXCEPTION_COMMON(0x220, PACA_EXGEN, INTS_DISABLE)
427 bl .save_nvgprs 428 bl .save_nvgprs
@@ -607,6 +608,7 @@ kernel_dbg_exc:
607 NORMAL_EXCEPTION_PROLOG(0x260, BOOKE_INTERRUPT_PERFORMANCE_MONITOR, 608 NORMAL_EXCEPTION_PROLOG(0x260, BOOKE_INTERRUPT_PERFORMANCE_MONITOR,
608 PROLOG_ADDITION_NONE) 609 PROLOG_ADDITION_NONE)
609 EXCEPTION_COMMON(0x260, PACA_EXGEN, INTS_DISABLE) 610 EXCEPTION_COMMON(0x260, PACA_EXGEN, INTS_DISABLE)
611 CHECK_NAPPING()
610 addi r3,r1,STACK_FRAME_OVERHEAD 612 addi r3,r1,STACK_FRAME_OVERHEAD
611 bl .performance_monitor_exception 613 bl .performance_monitor_exception
612 b .ret_from_except_lite 614 b .ret_from_except_lite
diff --git a/arch/powerpc/kernel/fpu.S b/arch/powerpc/kernel/fpu.S
index caeaabf11a2f..f7f5b8bed68f 100644
--- a/arch/powerpc/kernel/fpu.S
+++ b/arch/powerpc/kernel/fpu.S
@@ -35,15 +35,6 @@ END_FTR_SECTION_IFSET(CPU_FTR_VSX); \
352: REST_32VSRS(n,c,base); \ 352: REST_32VSRS(n,c,base); \
363: 363:
37 37
38#define __REST_32FPVSRS_TRANSACT(n,c,base) \
39BEGIN_FTR_SECTION \
40 b 2f; \
41END_FTR_SECTION_IFSET(CPU_FTR_VSX); \
42 REST_32FPRS_TRANSACT(n,base); \
43 b 3f; \
442: REST_32VSRS_TRANSACT(n,c,base); \
453:
46
47#define __SAVE_32FPVSRS(n,c,base) \ 38#define __SAVE_32FPVSRS(n,c,base) \
48BEGIN_FTR_SECTION \ 39BEGIN_FTR_SECTION \
49 b 2f; \ 40 b 2f; \
@@ -54,40 +45,12 @@ END_FTR_SECTION_IFSET(CPU_FTR_VSX); \
543: 453:
55#else 46#else
56#define __REST_32FPVSRS(n,b,base) REST_32FPRS(n, base) 47#define __REST_32FPVSRS(n,b,base) REST_32FPRS(n, base)
57#define __REST_32FPVSRS_TRANSACT(n,b,base) REST_32FPRS(n, base)
58#define __SAVE_32FPVSRS(n,b,base) SAVE_32FPRS(n, base) 48#define __SAVE_32FPVSRS(n,b,base) SAVE_32FPRS(n, base)
59#endif 49#endif
60#define REST_32FPVSRS(n,c,base) __REST_32FPVSRS(n,__REG_##c,__REG_##base) 50#define REST_32FPVSRS(n,c,base) __REST_32FPVSRS(n,__REG_##c,__REG_##base)
61#define REST_32FPVSRS_TRANSACT(n,c,base) \
62 __REST_32FPVSRS_TRANSACT(n,__REG_##c,__REG_##base)
63#define SAVE_32FPVSRS(n,c,base) __SAVE_32FPVSRS(n,__REG_##c,__REG_##base) 51#define SAVE_32FPVSRS(n,c,base) __SAVE_32FPVSRS(n,__REG_##c,__REG_##base)
64 52
65#ifdef CONFIG_PPC_TRANSACTIONAL_MEM 53#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
66/*
67 * Wrapper to call load_up_fpu from C.
68 * void do_load_up_fpu(struct pt_regs *regs);
69 */
70_GLOBAL(do_load_up_fpu)
71 mflr r0
72 std r0, 16(r1)
73 stdu r1, -112(r1)
74
75 subi r6, r3, STACK_FRAME_OVERHEAD
76 /* load_up_fpu expects r12=MSR, r13=PACA, and returns
77 * with r12 = new MSR.
78 */
79 ld r12,_MSR(r6)
80 GET_PACA(r13)
81
82 bl load_up_fpu
83 std r12,_MSR(r6)
84
85 ld r0, 112+16(r1)
86 addi r1, r1, 112
87 mtlr r0
88 blr
89
90
91/* void do_load_up_transact_fpu(struct thread_struct *thread) 54/* void do_load_up_transact_fpu(struct thread_struct *thread)
92 * 55 *
93 * This is similar to load_up_fpu but for the transactional version of the FP 56 * This is similar to load_up_fpu but for the transactional version of the FP
@@ -105,9 +68,10 @@ END_FTR_SECTION_IFSET(CPU_FTR_VSX)
105 SYNC 68 SYNC
106 MTMSRD(r5) 69 MTMSRD(r5)
107 70
108 lfd fr0,THREAD_TRANSACT_FPSCR(r3) 71 addi r7,r3,THREAD_TRANSACT_FPSTATE
72 lfd fr0,FPSTATE_FPSCR(r7)
109 MTFSF_L(fr0) 73 MTFSF_L(fr0)
110 REST_32FPVSRS_TRANSACT(0, R4, R3) 74 REST_32FPVSRS(0, R4, R7)
111 75
112 /* FP/VSX off again */ 76 /* FP/VSX off again */
113 MTMSRD(r6) 77 MTMSRD(r6)
@@ -117,11 +81,33 @@ END_FTR_SECTION_IFSET(CPU_FTR_VSX)
117#endif /* CONFIG_PPC_TRANSACTIONAL_MEM */ 81#endif /* CONFIG_PPC_TRANSACTIONAL_MEM */
118 82
119/* 83/*
84 * Load state from memory into FP registers including FPSCR.
85 * Assumes the caller has enabled FP in the MSR.
86 */
87_GLOBAL(load_fp_state)
88 lfd fr0,FPSTATE_FPSCR(r3)
89 MTFSF_L(fr0)
90 REST_32FPVSRS(0, R4, R3)
91 blr
92
93/*
94 * Store FP state into memory, including FPSCR
95 * Assumes the caller has enabled FP in the MSR.
96 */
97_GLOBAL(store_fp_state)
98 SAVE_32FPVSRS(0, R4, R3)
99 mffs fr0
100 stfd fr0,FPSTATE_FPSCR(r3)
101 blr
102
103/*
120 * This task wants to use the FPU now. 104 * This task wants to use the FPU now.
121 * On UP, disable FP for the task which had the FPU previously, 105 * On UP, disable FP for the task which had the FPU previously,
122 * and save its floating-point registers in its thread_struct. 106 * and save its floating-point registers in its thread_struct.
123 * Load up this task's FP registers from its thread_struct, 107 * Load up this task's FP registers from its thread_struct,
124 * enable the FPU for the current task and return to the task. 108 * enable the FPU for the current task and return to the task.
109 * Note that on 32-bit this can only use registers that will be
110 * restored by fast_exception_return, i.e. r3 - r6, r10 and r11.
125 */ 111 */
126_GLOBAL(load_up_fpu) 112_GLOBAL(load_up_fpu)
127 mfmsr r5 113 mfmsr r5
@@ -147,9 +133,10 @@ END_FTR_SECTION_IFSET(CPU_FTR_VSX)
147 beq 1f 133 beq 1f
148 toreal(r4) 134 toreal(r4)
149 addi r4,r4,THREAD /* want last_task_used_math->thread */ 135 addi r4,r4,THREAD /* want last_task_used_math->thread */
150 SAVE_32FPVSRS(0, R5, R4) 136 addi r10,r4,THREAD_FPSTATE
137 SAVE_32FPVSRS(0, R5, R10)
151 mffs fr0 138 mffs fr0
152 stfd fr0,THREAD_FPSCR(r4) 139 stfd fr0,FPSTATE_FPSCR(r10)
153 PPC_LL r5,PT_REGS(r4) 140 PPC_LL r5,PT_REGS(r4)
154 toreal(r5) 141 toreal(r5)
155 PPC_LL r4,_MSR-STACK_FRAME_OVERHEAD(r5) 142 PPC_LL r4,_MSR-STACK_FRAME_OVERHEAD(r5)
@@ -160,7 +147,7 @@ END_FTR_SECTION_IFSET(CPU_FTR_VSX)
160#endif /* CONFIG_SMP */ 147#endif /* CONFIG_SMP */
161 /* enable use of FP after return */ 148 /* enable use of FP after return */
162#ifdef CONFIG_PPC32 149#ifdef CONFIG_PPC32
163 mfspr r5,SPRN_SPRG_THREAD /* current task's THREAD (phys) */ 150 mfspr r5,SPRN_SPRG_THREAD /* current task's THREAD (phys) */
164 lwz r4,THREAD_FPEXC_MODE(r5) 151 lwz r4,THREAD_FPEXC_MODE(r5)
165 ori r9,r9,MSR_FP /* enable FP for current */ 152 ori r9,r9,MSR_FP /* enable FP for current */
166 or r9,r9,r4 153 or r9,r9,r4
@@ -172,9 +159,10 @@ END_FTR_SECTION_IFSET(CPU_FTR_VSX)
172 or r12,r12,r4 159 or r12,r12,r4
173 std r12,_MSR(r1) 160 std r12,_MSR(r1)
174#endif 161#endif
175 lfd fr0,THREAD_FPSCR(r5) 162 addi r10,r5,THREAD_FPSTATE
163 lfd fr0,FPSTATE_FPSCR(r10)
176 MTFSF_L(fr0) 164 MTFSF_L(fr0)
177 REST_32FPVSRS(0, R4, R5) 165 REST_32FPVSRS(0, R4, R10)
178#ifndef CONFIG_SMP 166#ifndef CONFIG_SMP
179 subi r4,r5,THREAD 167 subi r4,r5,THREAD
180 fromreal(r4) 168 fromreal(r4)
@@ -206,11 +194,15 @@ END_FTR_SECTION_IFSET(CPU_FTR_VSX)
206 PPC_LCMPI 0,r3,0 194 PPC_LCMPI 0,r3,0
207 beqlr- /* if no previous owner, done */ 195 beqlr- /* if no previous owner, done */
208 addi r3,r3,THREAD /* want THREAD of task */ 196 addi r3,r3,THREAD /* want THREAD of task */
197 PPC_LL r6,THREAD_FPSAVEAREA(r3)
209 PPC_LL r5,PT_REGS(r3) 198 PPC_LL r5,PT_REGS(r3)
210 PPC_LCMPI 0,r5,0 199 PPC_LCMPI 0,r6,0
211 SAVE_32FPVSRS(0, R4 ,R3) 200 bne 2f
201 addi r6,r3,THREAD_FPSTATE
2022: PPC_LCMPI 0,r5,0
203 SAVE_32FPVSRS(0, R4, R6)
212 mffs fr0 204 mffs fr0
213 stfd fr0,THREAD_FPSCR(r3) 205 stfd fr0,FPSTATE_FPSCR(r6)
214 beq 1f 206 beq 1f
215 PPC_LL r4,_MSR-STACK_FRAME_OVERHEAD(r5) 207 PPC_LL r4,_MSR-STACK_FRAME_OVERHEAD(r5)
216 li r3,MSR_FP|MSR_FE0|MSR_FE1 208 li r3,MSR_FP|MSR_FE0|MSR_FE1
diff --git a/arch/powerpc/kernel/ftrace.c b/arch/powerpc/kernel/ftrace.c
index 1fb78561096a..9b27b293a922 100644
--- a/arch/powerpc/kernel/ftrace.c
+++ b/arch/powerpc/kernel/ftrace.c
@@ -174,7 +174,11 @@ __ftrace_make_nop(struct module *mod,
174 174
175 pr_devel(" %08x %08x\n", jmp[0], jmp[1]); 175 pr_devel(" %08x %08x\n", jmp[0], jmp[1]);
176 176
177#ifdef __LITTLE_ENDIAN__
178 ptr = ((unsigned long)jmp[1] << 32) + jmp[0];
179#else
177 ptr = ((unsigned long)jmp[0] << 32) + jmp[1]; 180 ptr = ((unsigned long)jmp[0] << 32) + jmp[1];
181#endif
178 182
179 /* This should match what was called */ 183 /* This should match what was called */
180 if (ptr != ppc_function_entry((void *)addr)) { 184 if (ptr != ppc_function_entry((void *)addr)) {
diff --git a/arch/powerpc/kernel/head_64.S b/arch/powerpc/kernel/head_64.S
index 3d11d8038dee..2ae41aba4053 100644
--- a/arch/powerpc/kernel/head_64.S
+++ b/arch/powerpc/kernel/head_64.S
@@ -68,6 +68,7 @@ _stext:
68_GLOBAL(__start) 68_GLOBAL(__start)
69 /* NOP this out unconditionally */ 69 /* NOP this out unconditionally */
70BEGIN_FTR_SECTION 70BEGIN_FTR_SECTION
71 FIXUP_ENDIAN
71 b .__start_initialization_multiplatform 72 b .__start_initialization_multiplatform
72END_FTR_SECTION(0, 1) 73END_FTR_SECTION(0, 1)
73 74
@@ -115,6 +116,7 @@ __run_at_load:
115 */ 116 */
116 .globl __secondary_hold 117 .globl __secondary_hold
117__secondary_hold: 118__secondary_hold:
119 FIXUP_ENDIAN
118#ifndef CONFIG_PPC_BOOK3E 120#ifndef CONFIG_PPC_BOOK3E
119 mfmsr r24 121 mfmsr r24
120 ori r24,r24,MSR_RI 122 ori r24,r24,MSR_RI
@@ -205,6 +207,7 @@ _GLOBAL(generic_secondary_thread_init)
205 * as SCOM before entry). 207 * as SCOM before entry).
206 */ 208 */
207_GLOBAL(generic_secondary_smp_init) 209_GLOBAL(generic_secondary_smp_init)
210 FIXUP_ENDIAN
208 mr r24,r3 211 mr r24,r3
209 mr r25,r4 212 mr r25,r4
210 213
diff --git a/arch/powerpc/kernel/head_8xx.S b/arch/powerpc/kernel/head_8xx.S
index 1b92a97b1b04..7ee876d2adb5 100644
--- a/arch/powerpc/kernel/head_8xx.S
+++ b/arch/powerpc/kernel/head_8xx.S
@@ -858,6 +858,9 @@ initial_mmu:
858 addis r11, r11, 0x0080 /* Add 8M */ 858 addis r11, r11, 0x0080 /* Add 8M */
859 mtspr SPRN_MD_RPN, r11 859 mtspr SPRN_MD_RPN, r11
860 860
861 addi r10, r10, 0x0100
862 mtspr SPRN_MD_CTR, r10
863
861 addis r8, r8, 0x0080 /* Add 8M */ 864 addis r8, r8, 0x0080 /* Add 8M */
862 mtspr SPRN_MD_EPN, r8 865 mtspr SPRN_MD_EPN, r8
863 mtspr SPRN_MD_TWC, r9 866 mtspr SPRN_MD_TWC, r9
diff --git a/arch/powerpc/kernel/head_fsl_booke.S b/arch/powerpc/kernel/head_fsl_booke.S
index 289afaffbbb5..f45726a1d963 100644
--- a/arch/powerpc/kernel/head_fsl_booke.S
+++ b/arch/powerpc/kernel/head_fsl_booke.S
@@ -555,27 +555,27 @@ END_FTR_SECTION_IFSET(CPU_FTR_EMB_HV)
555#ifdef CONFIG_SPE 555#ifdef CONFIG_SPE
556 /* SPE Unavailable */ 556 /* SPE Unavailable */
557 START_EXCEPTION(SPEUnavailable) 557 START_EXCEPTION(SPEUnavailable)
558 NORMAL_EXCEPTION_PROLOG(SPE_UNAVAIL) 558 NORMAL_EXCEPTION_PROLOG(SPE_ALTIVEC_UNAVAIL)
559 beq 1f 559 beq 1f
560 bl load_up_spe 560 bl load_up_spe
561 b fast_exception_return 561 b fast_exception_return
5621: addi r3,r1,STACK_FRAME_OVERHEAD 5621: addi r3,r1,STACK_FRAME_OVERHEAD
563 EXC_XFER_EE_LITE(0x2010, KernelSPE) 563 EXC_XFER_EE_LITE(0x2010, KernelSPE)
564#else 564#else
565 EXCEPTION(0x2020, SPE_UNAVAIL, SPEUnavailable, \ 565 EXCEPTION(0x2020, SPE_ALTIVEC_UNAVAIL, SPEUnavailable, \
566 unknown_exception, EXC_XFER_EE) 566 unknown_exception, EXC_XFER_EE)
567#endif /* CONFIG_SPE */ 567#endif /* CONFIG_SPE */
568 568
569 /* SPE Floating Point Data */ 569 /* SPE Floating Point Data */
570#ifdef CONFIG_SPE 570#ifdef CONFIG_SPE
571 EXCEPTION(0x2030, SPE_FP_DATA, SPEFloatingPointData, \ 571 EXCEPTION(0x2030, SPE_FP_DATA_ALTIVEC_ASSIST, SPEFloatingPointData,
572 SPEFloatingPointException, EXC_XFER_EE); 572 SPEFloatingPointException, EXC_XFER_EE)
573 573
574 /* SPE Floating Point Round */ 574 /* SPE Floating Point Round */
575 EXCEPTION(0x2050, SPE_FP_ROUND, SPEFloatingPointRound, \ 575 EXCEPTION(0x2050, SPE_FP_ROUND, SPEFloatingPointRound, \
576 SPEFloatingPointRoundException, EXC_XFER_EE) 576 SPEFloatingPointRoundException, EXC_XFER_EE)
577#else 577#else
578 EXCEPTION(0x2040, SPE_FP_DATA, SPEFloatingPointData, \ 578 EXCEPTION(0x2040, SPE_FP_DATA_ALTIVEC_ASSIST, SPEFloatingPointData,
579 unknown_exception, EXC_XFER_EE) 579 unknown_exception, EXC_XFER_EE)
580 EXCEPTION(0x2050, SPE_FP_ROUND, SPEFloatingPointRound, \ 580 EXCEPTION(0x2050, SPE_FP_ROUND, SPEFloatingPointRound, \
581 unknown_exception, EXC_XFER_EE) 581 unknown_exception, EXC_XFER_EE)
diff --git a/arch/powerpc/kernel/irq.c b/arch/powerpc/kernel/irq.c
index c7cb8c232d2f..ba0165615215 100644
--- a/arch/powerpc/kernel/irq.c
+++ b/arch/powerpc/kernel/irq.c
@@ -594,7 +594,7 @@ void irq_ctx_init(void)
594 } 594 }
595} 595}
596 596
597static inline void do_softirq_onstack(void) 597void do_softirq_own_stack(void)
598{ 598{
599 struct thread_info *curtp, *irqtp; 599 struct thread_info *curtp, *irqtp;
600 600
@@ -612,21 +612,6 @@ static inline void do_softirq_onstack(void)
612 set_bits(irqtp->flags, &curtp->flags); 612 set_bits(irqtp->flags, &curtp->flags);
613} 613}
614 614
615void do_softirq(void)
616{
617 unsigned long flags;
618
619 if (in_interrupt())
620 return;
621
622 local_irq_save(flags);
623
624 if (local_softirq_pending())
625 do_softirq_onstack();
626
627 local_irq_restore(flags);
628}
629
630irq_hw_number_t virq_to_hw(unsigned int virq) 615irq_hw_number_t virq_to_hw(unsigned int virq)
631{ 616{
632 struct irq_data *irq_data = irq_get_irq_data(virq); 617 struct irq_data *irq_data = irq_get_irq_data(virq);
diff --git a/arch/powerpc/kernel/kgdb.c b/arch/powerpc/kernel/kgdb.c
index c1eef241017a..83e89d310734 100644
--- a/arch/powerpc/kernel/kgdb.c
+++ b/arch/powerpc/kernel/kgdb.c
@@ -151,15 +151,16 @@ static int kgdb_handle_breakpoint(struct pt_regs *regs)
151 return 1; 151 return 1;
152} 152}
153 153
154static DEFINE_PER_CPU(struct thread_info, kgdb_thread_info);
154static int kgdb_singlestep(struct pt_regs *regs) 155static int kgdb_singlestep(struct pt_regs *regs)
155{ 156{
156 struct thread_info *thread_info, *exception_thread_info; 157 struct thread_info *thread_info, *exception_thread_info;
157 struct thread_info *backup_current_thread_info; 158 struct thread_info *backup_current_thread_info =
159 &__get_cpu_var(kgdb_thread_info);
158 160
159 if (user_mode(regs)) 161 if (user_mode(regs))
160 return 0; 162 return 0;
161 163
162 backup_current_thread_info = kmalloc(sizeof(struct thread_info), GFP_KERNEL);
163 /* 164 /*
164 * On Book E and perhaps other processors, singlestep is handled on 165 * On Book E and perhaps other processors, singlestep is handled on
165 * the critical exception stack. This causes current_thread_info() 166 * the critical exception stack. This causes current_thread_info()
@@ -185,7 +186,6 @@ static int kgdb_singlestep(struct pt_regs *regs)
185 /* Restore current_thread_info lastly. */ 186 /* Restore current_thread_info lastly. */
186 memcpy(exception_thread_info, backup_current_thread_info, sizeof *thread_info); 187 memcpy(exception_thread_info, backup_current_thread_info, sizeof *thread_info);
187 188
188 kfree(backup_current_thread_info);
189 return 1; 189 return 1;
190} 190}
191 191
diff --git a/arch/powerpc/kernel/legacy_serial.c b/arch/powerpc/kernel/legacy_serial.c
index 22e88dd2f34a..40bd7bd4e19a 100644
--- a/arch/powerpc/kernel/legacy_serial.c
+++ b/arch/powerpc/kernel/legacy_serial.c
@@ -35,7 +35,7 @@ static struct legacy_serial_info {
35 phys_addr_t taddr; 35 phys_addr_t taddr;
36} legacy_serial_infos[MAX_LEGACY_SERIAL_PORTS]; 36} legacy_serial_infos[MAX_LEGACY_SERIAL_PORTS];
37 37
38static struct __initdata of_device_id legacy_serial_parents[] = { 38static struct of_device_id legacy_serial_parents[] __initdata = {
39 {.type = "soc",}, 39 {.type = "soc",},
40 {.type = "tsi-bridge",}, 40 {.type = "tsi-bridge",},
41 {.type = "opb", }, 41 {.type = "opb", },
diff --git a/arch/powerpc/kernel/machine_kexec_64.c b/arch/powerpc/kernel/machine_kexec_64.c
index 611acdf30096..be4e6d648f60 100644
--- a/arch/powerpc/kernel/machine_kexec_64.c
+++ b/arch/powerpc/kernel/machine_kexec_64.c
@@ -312,7 +312,7 @@ static union thread_union kexec_stack __init_task_data =
312 */ 312 */
313struct paca_struct kexec_paca; 313struct paca_struct kexec_paca;
314 314
315/* Our assembly helper, in kexec_stub.S */ 315/* Our assembly helper, in misc_64.S */
316extern void kexec_sequence(void *newstack, unsigned long start, 316extern void kexec_sequence(void *newstack, unsigned long start,
317 void *image, void *control, 317 void *image, void *control,
318 void (*clear_all)(void)) __noreturn; 318 void (*clear_all)(void)) __noreturn;
diff --git a/arch/powerpc/kernel/misc_32.S b/arch/powerpc/kernel/misc_32.S
index 2b0ad9845363..e47d268727a4 100644
--- a/arch/powerpc/kernel/misc_32.S
+++ b/arch/powerpc/kernel/misc_32.S
@@ -659,6 +659,20 @@ _GLOBAL(__lshrdi3)
659 blr 659 blr
660 660
661/* 661/*
662 * 64-bit comparison: __cmpdi2(s64 a, s64 b)
663 * Returns 0 if a < b, 1 if a == b, 2 if a > b.
664 */
665_GLOBAL(__cmpdi2)
666 cmpw r3,r5
667 li r3,1
668 bne 1f
669 cmplw r4,r6
670 beqlr
6711: li r3,0
672 bltlr
673 li r3,2
674 blr
675/*
662 * 64-bit comparison: __ucmpdi2(u64 a, u64 b) 676 * 64-bit comparison: __ucmpdi2(u64 a, u64 b)
663 * Returns 0 if a < b, 1 if a == b, 2 if a > b. 677 * Returns 0 if a < b, 1 if a == b, 2 if a > b.
664 */ 678 */
diff --git a/arch/powerpc/kernel/module.c b/arch/powerpc/kernel/module.c
index 2d275707f419..9547381b631a 100644
--- a/arch/powerpc/kernel/module.c
+++ b/arch/powerpc/kernel/module.c
@@ -25,8 +25,7 @@
25#include <asm/uaccess.h> 25#include <asm/uaccess.h>
26#include <asm/firmware.h> 26#include <asm/firmware.h>
27#include <linux/sort.h> 27#include <linux/sort.h>
28 28#include <asm/setup.h>
29#include "setup.h"
30 29
31LIST_HEAD(module_bug_list); 30LIST_HEAD(module_bug_list);
32 31
diff --git a/arch/powerpc/kernel/module_32.c b/arch/powerpc/kernel/module_32.c
index 2e3200ca485f..6cff040bf456 100644
--- a/arch/powerpc/kernel/module_32.c
+++ b/arch/powerpc/kernel/module_32.c
@@ -26,8 +26,7 @@
26#include <linux/cache.h> 26#include <linux/cache.h>
27#include <linux/bug.h> 27#include <linux/bug.h>
28#include <linux/sort.h> 28#include <linux/sort.h>
29 29#include <asm/setup.h>
30#include "setup.h"
31 30
32#if 0 31#if 0
33#define DEBUGP printk 32#define DEBUGP printk
diff --git a/arch/powerpc/kernel/module_64.c b/arch/powerpc/kernel/module_64.c
index 6ee59a0eb268..12664c130d73 100644
--- a/arch/powerpc/kernel/module_64.c
+++ b/arch/powerpc/kernel/module_64.c
@@ -26,8 +26,7 @@
26#include <asm/firmware.h> 26#include <asm/firmware.h>
27#include <asm/code-patching.h> 27#include <asm/code-patching.h>
28#include <linux/sort.h> 28#include <linux/sort.h>
29 29#include <asm/setup.h>
30#include "setup.h"
31 30
32/* FIXME: We don't do .init separately. To do this, we'd need to have 31/* FIXME: We don't do .init separately. To do this, we'd need to have
33 a separate r2 value in the init and core section, and stub between 32 a separate r2 value in the init and core section, and stub between
@@ -62,6 +61,16 @@ struct ppc64_stub_entry
62 r2) into the stub. */ 61 r2) into the stub. */
63static struct ppc64_stub_entry ppc64_stub = 62static struct ppc64_stub_entry ppc64_stub =
64{ .jump = { 63{ .jump = {
64#ifdef __LITTLE_ENDIAN__
65 0x00, 0x00, 0x82, 0x3d, /* addis r12,r2, <high> */
66 0x00, 0x00, 0x8c, 0x39, /* addi r12,r12, <low> */
67 /* Save current r2 value in magic place on the stack. */
68 0x28, 0x00, 0x41, 0xf8, /* std r2,40(r1) */
69 0x20, 0x00, 0x6c, 0xe9, /* ld r11,32(r12) */
70 0x28, 0x00, 0x4c, 0xe8, /* ld r2,40(r12) */
71 0xa6, 0x03, 0x69, 0x7d, /* mtctr r11 */
72 0x20, 0x04, 0x80, 0x4e /* bctr */
73#else
65 0x3d, 0x82, 0x00, 0x00, /* addis r12,r2, <high> */ 74 0x3d, 0x82, 0x00, 0x00, /* addis r12,r2, <high> */
66 0x39, 0x8c, 0x00, 0x00, /* addi r12,r12, <low> */ 75 0x39, 0x8c, 0x00, 0x00, /* addi r12,r12, <low> */
67 /* Save current r2 value in magic place on the stack. */ 76 /* Save current r2 value in magic place on the stack. */
@@ -70,6 +79,7 @@ static struct ppc64_stub_entry ppc64_stub =
70 0xe8, 0x4c, 0x00, 0x28, /* ld r2,40(r12) */ 79 0xe8, 0x4c, 0x00, 0x28, /* ld r2,40(r12) */
71 0x7d, 0x69, 0x03, 0xa6, /* mtctr r11 */ 80 0x7d, 0x69, 0x03, 0xa6, /* mtctr r11 */
72 0x4e, 0x80, 0x04, 0x20 /* bctr */ 81 0x4e, 0x80, 0x04, 0x20 /* bctr */
82#endif
73} }; 83} };
74 84
75/* Count how many different 24-bit relocations (different symbol, 85/* Count how many different 24-bit relocations (different symbol,
@@ -269,8 +279,13 @@ static inline int create_stub(Elf64_Shdr *sechdrs,
269 279
270 *entry = ppc64_stub; 280 *entry = ppc64_stub;
271 281
282#ifdef __LITTLE_ENDIAN__
283 loc1 = (Elf64_Half *)&entry->jump[0];
284 loc2 = (Elf64_Half *)&entry->jump[4];
285#else
272 loc1 = (Elf64_Half *)&entry->jump[2]; 286 loc1 = (Elf64_Half *)&entry->jump[2];
273 loc2 = (Elf64_Half *)&entry->jump[6]; 287 loc2 = (Elf64_Half *)&entry->jump[6];
288#endif
274 289
275 /* Stub uses address relative to r2. */ 290 /* Stub uses address relative to r2. */
276 reladdr = (unsigned long)entry - my_r2(sechdrs, me); 291 reladdr = (unsigned long)entry - my_r2(sechdrs, me);
diff --git a/arch/powerpc/kernel/nvram_64.c b/arch/powerpc/kernel/nvram_64.c
index 8213ee1eb05a..fd82c289ab1c 100644
--- a/arch/powerpc/kernel/nvram_64.c
+++ b/arch/powerpc/kernel/nvram_64.c
@@ -223,9 +223,13 @@ static int __init nvram_write_header(struct nvram_partition * part)
223{ 223{
224 loff_t tmp_index; 224 loff_t tmp_index;
225 int rc; 225 int rc;
226 226 struct nvram_header phead;
227
228 memcpy(&phead, &part->header, NVRAM_HEADER_LEN);
229 phead.length = cpu_to_be16(phead.length);
230
227 tmp_index = part->index; 231 tmp_index = part->index;
228 rc = ppc_md.nvram_write((char *)&part->header, NVRAM_HEADER_LEN, &tmp_index); 232 rc = ppc_md.nvram_write((char *)&phead, NVRAM_HEADER_LEN, &tmp_index);
229 233
230 return rc; 234 return rc;
231} 235}
@@ -505,6 +509,8 @@ int __init nvram_scan_partitions(void)
505 509
506 memcpy(&phead, header, NVRAM_HEADER_LEN); 510 memcpy(&phead, header, NVRAM_HEADER_LEN);
507 511
512 phead.length = be16_to_cpu(phead.length);
513
508 err = 0; 514 err = 0;
509 c_sum = nvram_checksum(&phead); 515 c_sum = nvram_checksum(&phead);
510 if (c_sum != phead.checksum) { 516 if (c_sum != phead.checksum) {
diff --git a/arch/powerpc/kernel/paca.c b/arch/powerpc/kernel/paca.c
index 3fc16e3beb9f..0620eaaaad45 100644
--- a/arch/powerpc/kernel/paca.c
+++ b/arch/powerpc/kernel/paca.c
@@ -46,7 +46,7 @@ struct lppaca lppaca[] = {
46static struct lppaca *extra_lppacas; 46static struct lppaca *extra_lppacas;
47static long __initdata lppaca_size; 47static long __initdata lppaca_size;
48 48
49static void allocate_lppacas(int nr_cpus, unsigned long limit) 49static void __init allocate_lppacas(int nr_cpus, unsigned long limit)
50{ 50{
51 if (nr_cpus <= NR_LPPACAS) 51 if (nr_cpus <= NR_LPPACAS)
52 return; 52 return;
@@ -57,7 +57,7 @@ static void allocate_lppacas(int nr_cpus, unsigned long limit)
57 PAGE_SIZE, limit)); 57 PAGE_SIZE, limit));
58} 58}
59 59
60static struct lppaca *new_lppaca(int cpu) 60static struct lppaca * __init new_lppaca(int cpu)
61{ 61{
62 struct lppaca *lp; 62 struct lppaca *lp;
63 63
@@ -70,7 +70,7 @@ static struct lppaca *new_lppaca(int cpu)
70 return lp; 70 return lp;
71} 71}
72 72
73static void free_lppacas(void) 73static void __init free_lppacas(void)
74{ 74{
75 long new_size = 0, nr; 75 long new_size = 0, nr;
76 76
diff --git a/arch/powerpc/kernel/pci-common.c b/arch/powerpc/kernel/pci-common.c
index 905a24bb7acc..a1e3e40ca3fd 100644
--- a/arch/powerpc/kernel/pci-common.c
+++ b/arch/powerpc/kernel/pci-common.c
@@ -228,7 +228,7 @@ int pcibios_add_platform_entries(struct pci_dev *pdev)
228 */ 228 */
229static int pci_read_irq_line(struct pci_dev *pci_dev) 229static int pci_read_irq_line(struct pci_dev *pci_dev)
230{ 230{
231 struct of_irq oirq; 231 struct of_phandle_args oirq;
232 unsigned int virq; 232 unsigned int virq;
233 233
234 pr_debug("PCI: Try to map irq for %s...\n", pci_name(pci_dev)); 234 pr_debug("PCI: Try to map irq for %s...\n", pci_name(pci_dev));
@@ -237,7 +237,7 @@ static int pci_read_irq_line(struct pci_dev *pci_dev)
237 memset(&oirq, 0xff, sizeof(oirq)); 237 memset(&oirq, 0xff, sizeof(oirq));
238#endif 238#endif
239 /* Try to get a mapping from the device-tree */ 239 /* Try to get a mapping from the device-tree */
240 if (of_irq_map_pci(pci_dev, &oirq)) { 240 if (of_irq_parse_pci(pci_dev, &oirq)) {
241 u8 line, pin; 241 u8 line, pin;
242 242
243 /* If that fails, lets fallback to what is in the config 243 /* If that fails, lets fallback to what is in the config
@@ -263,11 +263,10 @@ static int pci_read_irq_line(struct pci_dev *pci_dev)
263 irq_set_irq_type(virq, IRQ_TYPE_LEVEL_LOW); 263 irq_set_irq_type(virq, IRQ_TYPE_LEVEL_LOW);
264 } else { 264 } else {
265 pr_debug(" Got one, spec %d cells (0x%08x 0x%08x...) on %s\n", 265 pr_debug(" Got one, spec %d cells (0x%08x 0x%08x...) on %s\n",
266 oirq.size, oirq.specifier[0], oirq.specifier[1], 266 oirq.args_count, oirq.args[0], oirq.args[1],
267 of_node_full_name(oirq.controller)); 267 of_node_full_name(oirq.np));
268 268
269 virq = irq_create_of_mapping(oirq.controller, oirq.specifier, 269 virq = irq_create_of_mapping(&oirq);
270 oirq.size);
271 } 270 }
272 if(virq == NO_IRQ) { 271 if(virq == NO_IRQ) {
273 pr_debug(" Failed to map !\n"); 272 pr_debug(" Failed to map !\n");
diff --git a/arch/powerpc/kernel/pci_of_scan.c b/arch/powerpc/kernel/pci_of_scan.c
index 4368ec6fdc8c..ac0b034f9ae0 100644
--- a/arch/powerpc/kernel/pci_of_scan.c
+++ b/arch/powerpc/kernel/pci_of_scan.c
@@ -302,7 +302,7 @@ static struct pci_dev *of_scan_pci_dev(struct pci_bus *bus,
302 struct device_node *dn) 302 struct device_node *dn)
303{ 303{
304 struct pci_dev *dev = NULL; 304 struct pci_dev *dev = NULL;
305 const u32 *reg; 305 const __be32 *reg;
306 int reglen, devfn; 306 int reglen, devfn;
307 307
308 pr_debug(" * %s\n", dn->full_name); 308 pr_debug(" * %s\n", dn->full_name);
@@ -312,7 +312,7 @@ static struct pci_dev *of_scan_pci_dev(struct pci_bus *bus,
312 reg = of_get_property(dn, "reg", &reglen); 312 reg = of_get_property(dn, "reg", &reglen);
313 if (reg == NULL || reglen < 20) 313 if (reg == NULL || reglen < 20)
314 return NULL; 314 return NULL;
315 devfn = (reg[0] >> 8) & 0xff; 315 devfn = (of_read_number(reg, 1) >> 8) & 0xff;
316 316
317 /* Check if the PCI device is already there */ 317 /* Check if the PCI device is already there */
318 dev = pci_get_slot(bus, devfn); 318 dev = pci_get_slot(bus, devfn);
diff --git a/arch/powerpc/kernel/ppc_ksyms.c b/arch/powerpc/kernel/ppc_ksyms.c
index 21646dbe1bb3..3bd77edd7610 100644
--- a/arch/powerpc/kernel/ppc_ksyms.c
+++ b/arch/powerpc/kernel/ppc_ksyms.c
@@ -79,10 +79,12 @@ EXPORT_SYMBOL(strlen);
79EXPORT_SYMBOL(strcmp); 79EXPORT_SYMBOL(strcmp);
80EXPORT_SYMBOL(strncmp); 80EXPORT_SYMBOL(strncmp);
81 81
82#ifndef CONFIG_GENERIC_CSUM
82EXPORT_SYMBOL(csum_partial); 83EXPORT_SYMBOL(csum_partial);
83EXPORT_SYMBOL(csum_partial_copy_generic); 84EXPORT_SYMBOL(csum_partial_copy_generic);
84EXPORT_SYMBOL(ip_fast_csum); 85EXPORT_SYMBOL(ip_fast_csum);
85EXPORT_SYMBOL(csum_tcpudp_magic); 86EXPORT_SYMBOL(csum_tcpudp_magic);
87#endif
86 88
87EXPORT_SYMBOL(__copy_tofrom_user); 89EXPORT_SYMBOL(__copy_tofrom_user);
88EXPORT_SYMBOL(__clear_user); 90EXPORT_SYMBOL(__clear_user);
@@ -98,9 +100,13 @@ EXPORT_SYMBOL(start_thread);
98 100
99#ifdef CONFIG_PPC_FPU 101#ifdef CONFIG_PPC_FPU
100EXPORT_SYMBOL(giveup_fpu); 102EXPORT_SYMBOL(giveup_fpu);
103EXPORT_SYMBOL(load_fp_state);
104EXPORT_SYMBOL(store_fp_state);
101#endif 105#endif
102#ifdef CONFIG_ALTIVEC 106#ifdef CONFIG_ALTIVEC
103EXPORT_SYMBOL(giveup_altivec); 107EXPORT_SYMBOL(giveup_altivec);
108EXPORT_SYMBOL(load_vr_state);
109EXPORT_SYMBOL(store_vr_state);
104#endif /* CONFIG_ALTIVEC */ 110#endif /* CONFIG_ALTIVEC */
105#ifdef CONFIG_VSX 111#ifdef CONFIG_VSX
106EXPORT_SYMBOL(giveup_vsx); 112EXPORT_SYMBOL(giveup_vsx);
@@ -143,10 +149,14 @@ EXPORT_SYMBOL(__ashldi3);
143EXPORT_SYMBOL(__lshrdi3); 149EXPORT_SYMBOL(__lshrdi3);
144int __ucmpdi2(unsigned long long, unsigned long long); 150int __ucmpdi2(unsigned long long, unsigned long long);
145EXPORT_SYMBOL(__ucmpdi2); 151EXPORT_SYMBOL(__ucmpdi2);
152int __cmpdi2(long long, long long);
153EXPORT_SYMBOL(__cmpdi2);
146#endif 154#endif
147long long __bswapdi2(long long); 155long long __bswapdi2(long long);
148EXPORT_SYMBOL(__bswapdi2); 156EXPORT_SYMBOL(__bswapdi2);
157#ifdef __BIG_ENDIAN__
149EXPORT_SYMBOL(memcpy); 158EXPORT_SYMBOL(memcpy);
159#endif
150EXPORT_SYMBOL(memset); 160EXPORT_SYMBOL(memset);
151EXPORT_SYMBOL(memmove); 161EXPORT_SYMBOL(memmove);
152EXPORT_SYMBOL(memcmp); 162EXPORT_SYMBOL(memcmp);
diff --git a/arch/powerpc/kernel/process.c b/arch/powerpc/kernel/process.c
index 96d2fdf3aa9e..75c2d1009985 100644
--- a/arch/powerpc/kernel/process.c
+++ b/arch/powerpc/kernel/process.c
@@ -314,28 +314,28 @@ static DEFINE_PER_CPU(struct arch_hw_breakpoint, current_brk);
314 */ 314 */
315static void set_debug_reg_defaults(struct thread_struct *thread) 315static void set_debug_reg_defaults(struct thread_struct *thread)
316{ 316{
317 thread->iac1 = thread->iac2 = 0; 317 thread->debug.iac1 = thread->debug.iac2 = 0;
318#if CONFIG_PPC_ADV_DEBUG_IACS > 2 318#if CONFIG_PPC_ADV_DEBUG_IACS > 2
319 thread->iac3 = thread->iac4 = 0; 319 thread->debug.iac3 = thread->debug.iac4 = 0;
320#endif 320#endif
321 thread->dac1 = thread->dac2 = 0; 321 thread->debug.dac1 = thread->debug.dac2 = 0;
322#if CONFIG_PPC_ADV_DEBUG_DVCS > 0 322#if CONFIG_PPC_ADV_DEBUG_DVCS > 0
323 thread->dvc1 = thread->dvc2 = 0; 323 thread->debug.dvc1 = thread->debug.dvc2 = 0;
324#endif 324#endif
325 thread->dbcr0 = 0; 325 thread->debug.dbcr0 = 0;
326#ifdef CONFIG_BOOKE 326#ifdef CONFIG_BOOKE
327 /* 327 /*
328 * Force User/Supervisor bits to b11 (user-only MSR[PR]=1) 328 * Force User/Supervisor bits to b11 (user-only MSR[PR]=1)
329 */ 329 */
330 thread->dbcr1 = DBCR1_IAC1US | DBCR1_IAC2US | \ 330 thread->debug.dbcr1 = DBCR1_IAC1US | DBCR1_IAC2US |
331 DBCR1_IAC3US | DBCR1_IAC4US; 331 DBCR1_IAC3US | DBCR1_IAC4US;
332 /* 332 /*
333 * Force Data Address Compare User/Supervisor bits to be User-only 333 * Force Data Address Compare User/Supervisor bits to be User-only
334 * (0b11 MSR[PR]=1) and set all other bits in DBCR2 register to be 0. 334 * (0b11 MSR[PR]=1) and set all other bits in DBCR2 register to be 0.
335 */ 335 */
336 thread->dbcr2 = DBCR2_DAC1US | DBCR2_DAC2US; 336 thread->debug.dbcr2 = DBCR2_DAC1US | DBCR2_DAC2US;
337#else 337#else
338 thread->dbcr1 = 0; 338 thread->debug.dbcr1 = 0;
339#endif 339#endif
340} 340}
341 341
@@ -348,22 +348,22 @@ static void prime_debug_regs(struct thread_struct *thread)
348 */ 348 */
349 mtmsr(mfmsr() & ~MSR_DE); 349 mtmsr(mfmsr() & ~MSR_DE);
350 350
351 mtspr(SPRN_IAC1, thread->iac1); 351 mtspr(SPRN_IAC1, thread->debug.iac1);
352 mtspr(SPRN_IAC2, thread->iac2); 352 mtspr(SPRN_IAC2, thread->debug.iac2);
353#if CONFIG_PPC_ADV_DEBUG_IACS > 2 353#if CONFIG_PPC_ADV_DEBUG_IACS > 2
354 mtspr(SPRN_IAC3, thread->iac3); 354 mtspr(SPRN_IAC3, thread->debug.iac3);
355 mtspr(SPRN_IAC4, thread->iac4); 355 mtspr(SPRN_IAC4, thread->debug.iac4);
356#endif 356#endif
357 mtspr(SPRN_DAC1, thread->dac1); 357 mtspr(SPRN_DAC1, thread->debug.dac1);
358 mtspr(SPRN_DAC2, thread->dac2); 358 mtspr(SPRN_DAC2, thread->debug.dac2);
359#if CONFIG_PPC_ADV_DEBUG_DVCS > 0 359#if CONFIG_PPC_ADV_DEBUG_DVCS > 0
360 mtspr(SPRN_DVC1, thread->dvc1); 360 mtspr(SPRN_DVC1, thread->debug.dvc1);
361 mtspr(SPRN_DVC2, thread->dvc2); 361 mtspr(SPRN_DVC2, thread->debug.dvc2);
362#endif 362#endif
363 mtspr(SPRN_DBCR0, thread->dbcr0); 363 mtspr(SPRN_DBCR0, thread->debug.dbcr0);
364 mtspr(SPRN_DBCR1, thread->dbcr1); 364 mtspr(SPRN_DBCR1, thread->debug.dbcr1);
365#ifdef CONFIG_BOOKE 365#ifdef CONFIG_BOOKE
366 mtspr(SPRN_DBCR2, thread->dbcr2); 366 mtspr(SPRN_DBCR2, thread->debug.dbcr2);
367#endif 367#endif
368} 368}
369/* 369/*
@@ -371,12 +371,13 @@ static void prime_debug_regs(struct thread_struct *thread)
371 * debug registers, set the debug registers from the values 371 * debug registers, set the debug registers from the values
372 * stored in the new thread. 372 * stored in the new thread.
373 */ 373 */
374static void switch_booke_debug_regs(struct thread_struct *new_thread) 374void switch_booke_debug_regs(struct thread_struct *new_thread)
375{ 375{
376 if ((current->thread.dbcr0 & DBCR0_IDM) 376 if ((current->thread.debug.dbcr0 & DBCR0_IDM)
377 || (new_thread->dbcr0 & DBCR0_IDM)) 377 || (new_thread->debug.dbcr0 & DBCR0_IDM))
378 prime_debug_regs(new_thread); 378 prime_debug_regs(new_thread);
379} 379}
380EXPORT_SYMBOL_GPL(switch_booke_debug_regs);
380#else /* !CONFIG_PPC_ADV_DEBUG_REGS */ 381#else /* !CONFIG_PPC_ADV_DEBUG_REGS */
381#ifndef CONFIG_HAVE_HW_BREAKPOINT 382#ifndef CONFIG_HAVE_HW_BREAKPOINT
382static void set_debug_reg_defaults(struct thread_struct *thread) 383static void set_debug_reg_defaults(struct thread_struct *thread)
@@ -596,12 +597,13 @@ struct task_struct *__switch_to(struct task_struct *prev,
596 struct task_struct *new) 597 struct task_struct *new)
597{ 598{
598 struct thread_struct *new_thread, *old_thread; 599 struct thread_struct *new_thread, *old_thread;
599 unsigned long flags;
600 struct task_struct *last; 600 struct task_struct *last;
601#ifdef CONFIG_PPC_BOOK3S_64 601#ifdef CONFIG_PPC_BOOK3S_64
602 struct ppc64_tlb_batch *batch; 602 struct ppc64_tlb_batch *batch;
603#endif 603#endif
604 604
605 WARN_ON(!irqs_disabled());
606
605 /* Back up the TAR across context switches. 607 /* Back up the TAR across context switches.
606 * Note that the TAR is not available for use in the kernel. (To 608 * Note that the TAR is not available for use in the kernel. (To
607 * provide this, the TAR should be backed up/restored on exception 609 * provide this, the TAR should be backed up/restored on exception
@@ -721,8 +723,6 @@ struct task_struct *__switch_to(struct task_struct *prev,
721 } 723 }
722#endif /* CONFIG_PPC_BOOK3S_64 */ 724#endif /* CONFIG_PPC_BOOK3S_64 */
723 725
724 local_irq_save(flags);
725
726 /* 726 /*
727 * We can't take a PMU exception inside _switch() since there is a 727 * We can't take a PMU exception inside _switch() since there is a
728 * window where the kernel stack SLB and the kernel stack are out 728 * window where the kernel stack SLB and the kernel stack are out
@@ -742,8 +742,6 @@ struct task_struct *__switch_to(struct task_struct *prev,
742 } 742 }
743#endif /* CONFIG_PPC_BOOK3S_64 */ 743#endif /* CONFIG_PPC_BOOK3S_64 */
744 744
745 local_irq_restore(flags);
746
747 return last; 745 return last;
748} 746}
749 747
@@ -1008,6 +1006,11 @@ int copy_thread(unsigned long clone_flags, unsigned long usp,
1008 p->thread.ptrace_bps[0] = NULL; 1006 p->thread.ptrace_bps[0] = NULL;
1009#endif 1007#endif
1010 1008
1009 p->thread.fp_save_area = NULL;
1010#ifdef CONFIG_ALTIVEC
1011 p->thread.vr_save_area = NULL;
1012#endif
1013
1011#ifdef CONFIG_PPC_STD_MMU_64 1014#ifdef CONFIG_PPC_STD_MMU_64
1012 if (mmu_has_feature(MMU_FTR_SLB)) { 1015 if (mmu_has_feature(MMU_FTR_SLB)) {
1013 unsigned long sp_vsid; 1016 unsigned long sp_vsid;
@@ -1113,12 +1116,12 @@ void start_thread(struct pt_regs *regs, unsigned long start, unsigned long sp)
1113#ifdef CONFIG_VSX 1116#ifdef CONFIG_VSX
1114 current->thread.used_vsr = 0; 1117 current->thread.used_vsr = 0;
1115#endif 1118#endif
1116 memset(current->thread.fpr, 0, sizeof(current->thread.fpr)); 1119 memset(&current->thread.fp_state, 0, sizeof(current->thread.fp_state));
1117 current->thread.fpscr.val = 0; 1120 current->thread.fp_save_area = NULL;
1118#ifdef CONFIG_ALTIVEC 1121#ifdef CONFIG_ALTIVEC
1119 memset(current->thread.vr, 0, sizeof(current->thread.vr)); 1122 memset(&current->thread.vr_state, 0, sizeof(current->thread.vr_state));
1120 memset(&current->thread.vscr, 0, sizeof(current->thread.vscr)); 1123 current->thread.vr_state.vscr.u[3] = 0x00010000; /* Java mode disabled */
1121 current->thread.vscr.u[3] = 0x00010000; /* Java mode disabled */ 1124 current->thread.vr_save_area = NULL;
1122 current->thread.vrsave = 0; 1125 current->thread.vrsave = 0;
1123 current->thread.used_vr = 0; 1126 current->thread.used_vr = 0;
1124#endif /* CONFIG_ALTIVEC */ 1127#endif /* CONFIG_ALTIVEC */
diff --git a/arch/powerpc/kernel/prom.c b/arch/powerpc/kernel/prom.c
index b7634ce41dbc..f3a47098fb8e 100644
--- a/arch/powerpc/kernel/prom.c
+++ b/arch/powerpc/kernel/prom.c
@@ -546,15 +546,6 @@ void __init early_init_dt_add_memory_arch(u64 base, u64 size)
546 memblock_add(base, size); 546 memblock_add(base, size);
547} 547}
548 548
549#ifdef CONFIG_BLK_DEV_INITRD
550void __init early_init_dt_setup_initrd_arch(u64 start, u64 end)
551{
552 initrd_start = (unsigned long)__va(start);
553 initrd_end = (unsigned long)__va(end);
554 initrd_below_start_ok = 1;
555}
556#endif
557
558static void __init early_reserve_mem_dt(void) 549static void __init early_reserve_mem_dt(void)
559{ 550{
560 unsigned long i, len, dt_root; 551 unsigned long i, len, dt_root;
@@ -761,37 +752,6 @@ void __init early_init_devtree(void *params)
761 *******/ 752 *******/
762 753
763/** 754/**
764 * of_find_next_cache_node - Find a node's subsidiary cache
765 * @np: node of type "cpu" or "cache"
766 *
767 * Returns a node pointer with refcount incremented, use
768 * of_node_put() on it when done. Caller should hold a reference
769 * to np.
770 */
771struct device_node *of_find_next_cache_node(struct device_node *np)
772{
773 struct device_node *child;
774 const phandle *handle;
775
776 handle = of_get_property(np, "l2-cache", NULL);
777 if (!handle)
778 handle = of_get_property(np, "next-level-cache", NULL);
779
780 if (handle)
781 return of_find_node_by_phandle(*handle);
782
783 /* OF on pmac has nodes instead of properties named "l2-cache"
784 * beneath CPU nodes.
785 */
786 if (!strcmp(np->type, "cpu"))
787 for_each_child_of_node(np, child)
788 if (!strcmp(child->type, "cache"))
789 return child;
790
791 return NULL;
792}
793
794/**
795 * of_get_ibm_chip_id - Returns the IBM "chip-id" of a device 755 * of_get_ibm_chip_id - Returns the IBM "chip-id" of a device
796 * @np: device node of the device 756 * @np: device node of the device
797 * 757 *
diff --git a/arch/powerpc/kernel/prom_init.c b/arch/powerpc/kernel/prom_init.c
index 5fe2842e8bab..cb64a6e1dc51 100644
--- a/arch/powerpc/kernel/prom_init.c
+++ b/arch/powerpc/kernel/prom_init.c
@@ -858,7 +858,8 @@ static void __init prom_send_capabilities(void)
858{ 858{
859 ihandle root; 859 ihandle root;
860 prom_arg_t ret; 860 prom_arg_t ret;
861 __be32 *cores; 861 u32 cores;
862 unsigned char *ptcores;
862 863
863 root = call_prom("open", 1, 1, ADDR("/")); 864 root = call_prom("open", 1, 1, ADDR("/"));
864 if (root != 0) { 865 if (root != 0) {
@@ -868,15 +869,30 @@ static void __init prom_send_capabilities(void)
868 * (we assume this is the same for all cores) and use it to 869 * (we assume this is the same for all cores) and use it to
869 * divide NR_CPUS. 870 * divide NR_CPUS.
870 */ 871 */
871 cores = (__be32 *)&ibm_architecture_vec[IBM_ARCH_VEC_NRCORES_OFFSET]; 872
872 if (be32_to_cpup(cores) != NR_CPUS) { 873 /* The core value may start at an odd address. If such a word
874 * access is made at a cache line boundary, this leads to an
875 * exception which may not be handled at this time.
876 * Forcing a per byte access to avoid exception.
877 */
878 ptcores = &ibm_architecture_vec[IBM_ARCH_VEC_NRCORES_OFFSET];
879 cores = 0;
880 cores |= ptcores[0] << 24;
881 cores |= ptcores[1] << 16;
882 cores |= ptcores[2] << 8;
883 cores |= ptcores[3];
884 if (cores != NR_CPUS) {
873 prom_printf("WARNING ! " 885 prom_printf("WARNING ! "
874 "ibm_architecture_vec structure inconsistent: %lu!\n", 886 "ibm_architecture_vec structure inconsistent: %lu!\n",
875 be32_to_cpup(cores)); 887 cores);
876 } else { 888 } else {
877 *cores = cpu_to_be32(DIV_ROUND_UP(NR_CPUS, prom_count_smt_threads())); 889 cores = DIV_ROUND_UP(NR_CPUS, prom_count_smt_threads());
878 prom_printf("Max number of cores passed to firmware: %lu (NR_CPUS = %lu)\n", 890 prom_printf("Max number of cores passed to firmware: %lu (NR_CPUS = %lu)\n",
879 be32_to_cpup(cores), NR_CPUS); 891 cores, NR_CPUS);
892 ptcores[0] = (cores >> 24) & 0xff;
893 ptcores[1] = (cores >> 16) & 0xff;
894 ptcores[2] = (cores >> 8) & 0xff;
895 ptcores[3] = cores & 0xff;
880 } 896 }
881 897
882 /* try calling the ibm,client-architecture-support method */ 898 /* try calling the ibm,client-architecture-support method */
diff --git a/arch/powerpc/kernel/ptrace.c b/arch/powerpc/kernel/ptrace.c
index 9a0d24c390a3..75fb40498b41 100644
--- a/arch/powerpc/kernel/ptrace.c
+++ b/arch/powerpc/kernel/ptrace.c
@@ -362,7 +362,7 @@ static int fpr_get(struct task_struct *target, const struct user_regset *regset,
362 void *kbuf, void __user *ubuf) 362 void *kbuf, void __user *ubuf)
363{ 363{
364#ifdef CONFIG_VSX 364#ifdef CONFIG_VSX
365 double buf[33]; 365 u64 buf[33];
366 int i; 366 int i;
367#endif 367#endif
368 flush_fp_to_thread(target); 368 flush_fp_to_thread(target);
@@ -371,15 +371,15 @@ static int fpr_get(struct task_struct *target, const struct user_regset *regset,
371 /* copy to local buffer then write that out */ 371 /* copy to local buffer then write that out */
372 for (i = 0; i < 32 ; i++) 372 for (i = 0; i < 32 ; i++)
373 buf[i] = target->thread.TS_FPR(i); 373 buf[i] = target->thread.TS_FPR(i);
374 memcpy(&buf[32], &target->thread.fpscr, sizeof(double)); 374 buf[32] = target->thread.fp_state.fpscr;
375 return user_regset_copyout(&pos, &count, &kbuf, &ubuf, buf, 0, -1); 375 return user_regset_copyout(&pos, &count, &kbuf, &ubuf, buf, 0, -1);
376 376
377#else 377#else
378 BUILD_BUG_ON(offsetof(struct thread_struct, fpscr) != 378 BUILD_BUG_ON(offsetof(struct thread_fp_state, fpscr) !=
379 offsetof(struct thread_struct, TS_FPR(32))); 379 offsetof(struct thread_fp_state, fpr[32][0]));
380 380
381 return user_regset_copyout(&pos, &count, &kbuf, &ubuf, 381 return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
382 &target->thread.fpr, 0, -1); 382 &target->thread.fp_state, 0, -1);
383#endif 383#endif
384} 384}
385 385
@@ -388,7 +388,7 @@ static int fpr_set(struct task_struct *target, const struct user_regset *regset,
388 const void *kbuf, const void __user *ubuf) 388 const void *kbuf, const void __user *ubuf)
389{ 389{
390#ifdef CONFIG_VSX 390#ifdef CONFIG_VSX
391 double buf[33]; 391 u64 buf[33];
392 int i; 392 int i;
393#endif 393#endif
394 flush_fp_to_thread(target); 394 flush_fp_to_thread(target);
@@ -400,14 +400,14 @@ static int fpr_set(struct task_struct *target, const struct user_regset *regset,
400 return i; 400 return i;
401 for (i = 0; i < 32 ; i++) 401 for (i = 0; i < 32 ; i++)
402 target->thread.TS_FPR(i) = buf[i]; 402 target->thread.TS_FPR(i) = buf[i];
403 memcpy(&target->thread.fpscr, &buf[32], sizeof(double)); 403 target->thread.fp_state.fpscr = buf[32];
404 return 0; 404 return 0;
405#else 405#else
406 BUILD_BUG_ON(offsetof(struct thread_struct, fpscr) != 406 BUILD_BUG_ON(offsetof(struct thread_fp_state, fpscr) !=
407 offsetof(struct thread_struct, TS_FPR(32))); 407 offsetof(struct thread_fp_state, fpr[32][0]));
408 408
409 return user_regset_copyin(&pos, &count, &kbuf, &ubuf, 409 return user_regset_copyin(&pos, &count, &kbuf, &ubuf,
410 &target->thread.fpr, 0, -1); 410 &target->thread.fp_state, 0, -1);
411#endif 411#endif
412} 412}
413 413
@@ -440,11 +440,11 @@ static int vr_get(struct task_struct *target, const struct user_regset *regset,
440 440
441 flush_altivec_to_thread(target); 441 flush_altivec_to_thread(target);
442 442
443 BUILD_BUG_ON(offsetof(struct thread_struct, vscr) != 443 BUILD_BUG_ON(offsetof(struct thread_vr_state, vscr) !=
444 offsetof(struct thread_struct, vr[32])); 444 offsetof(struct thread_vr_state, vr[32]));
445 445
446 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, 446 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
447 &target->thread.vr, 0, 447 &target->thread.vr_state, 0,
448 33 * sizeof(vector128)); 448 33 * sizeof(vector128));
449 if (!ret) { 449 if (!ret) {
450 /* 450 /*
@@ -471,11 +471,12 @@ static int vr_set(struct task_struct *target, const struct user_regset *regset,
471 471
472 flush_altivec_to_thread(target); 472 flush_altivec_to_thread(target);
473 473
474 BUILD_BUG_ON(offsetof(struct thread_struct, vscr) != 474 BUILD_BUG_ON(offsetof(struct thread_vr_state, vscr) !=
475 offsetof(struct thread_struct, vr[32])); 475 offsetof(struct thread_vr_state, vr[32]));
476 476
477 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, 477 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
478 &target->thread.vr, 0, 33 * sizeof(vector128)); 478 &target->thread.vr_state, 0,
479 33 * sizeof(vector128));
479 if (!ret && count > 0) { 480 if (!ret && count > 0) {
480 /* 481 /*
481 * We use only the first word of vrsave. 482 * We use only the first word of vrsave.
@@ -514,13 +515,13 @@ static int vsr_get(struct task_struct *target, const struct user_regset *regset,
514 unsigned int pos, unsigned int count, 515 unsigned int pos, unsigned int count,
515 void *kbuf, void __user *ubuf) 516 void *kbuf, void __user *ubuf)
516{ 517{
517 double buf[32]; 518 u64 buf[32];
518 int ret, i; 519 int ret, i;
519 520
520 flush_vsx_to_thread(target); 521 flush_vsx_to_thread(target);
521 522
522 for (i = 0; i < 32 ; i++) 523 for (i = 0; i < 32 ; i++)
523 buf[i] = target->thread.fpr[i][TS_VSRLOWOFFSET]; 524 buf[i] = target->thread.fp_state.fpr[i][TS_VSRLOWOFFSET];
524 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, 525 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
525 buf, 0, 32 * sizeof(double)); 526 buf, 0, 32 * sizeof(double));
526 527
@@ -531,7 +532,7 @@ static int vsr_set(struct task_struct *target, const struct user_regset *regset,
531 unsigned int pos, unsigned int count, 532 unsigned int pos, unsigned int count,
532 const void *kbuf, const void __user *ubuf) 533 const void *kbuf, const void __user *ubuf)
533{ 534{
534 double buf[32]; 535 u64 buf[32];
535 int ret,i; 536 int ret,i;
536 537
537 flush_vsx_to_thread(target); 538 flush_vsx_to_thread(target);
@@ -539,7 +540,7 @@ static int vsr_set(struct task_struct *target, const struct user_regset *regset,
539 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, 540 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
540 buf, 0, 32 * sizeof(double)); 541 buf, 0, 32 * sizeof(double));
541 for (i = 0; i < 32 ; i++) 542 for (i = 0; i < 32 ; i++)
542 target->thread.fpr[i][TS_VSRLOWOFFSET] = buf[i]; 543 target->thread.fp_state.fpr[i][TS_VSRLOWOFFSET] = buf[i];
543 544
544 545
545 return ret; 546 return ret;
@@ -657,7 +658,7 @@ static const struct user_regset native_regsets[] = {
657#endif 658#endif
658#ifdef CONFIG_SPE 659#ifdef CONFIG_SPE
659 [REGSET_SPE] = { 660 [REGSET_SPE] = {
660 .n = 35, 661 .core_note_type = NT_PPC_SPE, .n = 35,
661 .size = sizeof(u32), .align = sizeof(u32), 662 .size = sizeof(u32), .align = sizeof(u32),
662 .active = evr_active, .get = evr_get, .set = evr_set 663 .active = evr_active, .get = evr_get, .set = evr_set
663 }, 664 },
@@ -854,8 +855,8 @@ void user_enable_single_step(struct task_struct *task)
854 855
855 if (regs != NULL) { 856 if (regs != NULL) {
856#ifdef CONFIG_PPC_ADV_DEBUG_REGS 857#ifdef CONFIG_PPC_ADV_DEBUG_REGS
857 task->thread.dbcr0 &= ~DBCR0_BT; 858 task->thread.debug.dbcr0 &= ~DBCR0_BT;
858 task->thread.dbcr0 |= DBCR0_IDM | DBCR0_IC; 859 task->thread.debug.dbcr0 |= DBCR0_IDM | DBCR0_IC;
859 regs->msr |= MSR_DE; 860 regs->msr |= MSR_DE;
860#else 861#else
861 regs->msr &= ~MSR_BE; 862 regs->msr &= ~MSR_BE;
@@ -871,8 +872,8 @@ void user_enable_block_step(struct task_struct *task)
871 872
872 if (regs != NULL) { 873 if (regs != NULL) {
873#ifdef CONFIG_PPC_ADV_DEBUG_REGS 874#ifdef CONFIG_PPC_ADV_DEBUG_REGS
874 task->thread.dbcr0 &= ~DBCR0_IC; 875 task->thread.debug.dbcr0 &= ~DBCR0_IC;
875 task->thread.dbcr0 = DBCR0_IDM | DBCR0_BT; 876 task->thread.debug.dbcr0 = DBCR0_IDM | DBCR0_BT;
876 regs->msr |= MSR_DE; 877 regs->msr |= MSR_DE;
877#else 878#else
878 regs->msr &= ~MSR_SE; 879 regs->msr &= ~MSR_SE;
@@ -894,16 +895,16 @@ void user_disable_single_step(struct task_struct *task)
894 * And, after doing so, if all debug flags are off, turn 895 * And, after doing so, if all debug flags are off, turn
895 * off DBCR0(IDM) and MSR(DE) .... Torez 896 * off DBCR0(IDM) and MSR(DE) .... Torez
896 */ 897 */
897 task->thread.dbcr0 &= ~DBCR0_IC; 898 task->thread.debug.dbcr0 &= ~(DBCR0_IC|DBCR0_BT);
898 /* 899 /*
899 * Test to see if any of the DBCR_ACTIVE_EVENTS bits are set. 900 * Test to see if any of the DBCR_ACTIVE_EVENTS bits are set.
900 */ 901 */
901 if (!DBCR_ACTIVE_EVENTS(task->thread.dbcr0, 902 if (!DBCR_ACTIVE_EVENTS(task->thread.debug.dbcr0,
902 task->thread.dbcr1)) { 903 task->thread.debug.dbcr1)) {
903 /* 904 /*
904 * All debug events were off..... 905 * All debug events were off.....
905 */ 906 */
906 task->thread.dbcr0 &= ~DBCR0_IDM; 907 task->thread.debug.dbcr0 &= ~DBCR0_IDM;
907 regs->msr &= ~MSR_DE; 908 regs->msr &= ~MSR_DE;
908 } 909 }
909#else 910#else
@@ -1022,14 +1023,14 @@ int ptrace_set_debugreg(struct task_struct *task, unsigned long addr,
1022 */ 1023 */
1023 1024
1024 /* DAC's hold the whole address without any mode flags */ 1025 /* DAC's hold the whole address without any mode flags */
1025 task->thread.dac1 = data & ~0x3UL; 1026 task->thread.debug.dac1 = data & ~0x3UL;
1026 1027
1027 if (task->thread.dac1 == 0) { 1028 if (task->thread.debug.dac1 == 0) {
1028 dbcr_dac(task) &= ~(DBCR_DAC1R | DBCR_DAC1W); 1029 dbcr_dac(task) &= ~(DBCR_DAC1R | DBCR_DAC1W);
1029 if (!DBCR_ACTIVE_EVENTS(task->thread.dbcr0, 1030 if (!DBCR_ACTIVE_EVENTS(task->thread.debug.dbcr0,
1030 task->thread.dbcr1)) { 1031 task->thread.debug.dbcr1)) {
1031 task->thread.regs->msr &= ~MSR_DE; 1032 task->thread.regs->msr &= ~MSR_DE;
1032 task->thread.dbcr0 &= ~DBCR0_IDM; 1033 task->thread.debug.dbcr0 &= ~DBCR0_IDM;
1033 } 1034 }
1034 return 0; 1035 return 0;
1035 } 1036 }
@@ -1041,7 +1042,7 @@ int ptrace_set_debugreg(struct task_struct *task, unsigned long addr,
1041 1042
1042 /* Set the Internal Debugging flag (IDM bit 1) for the DBCR0 1043 /* Set the Internal Debugging flag (IDM bit 1) for the DBCR0
1043 register */ 1044 register */
1044 task->thread.dbcr0 |= DBCR0_IDM; 1045 task->thread.debug.dbcr0 |= DBCR0_IDM;
1045 1046
1046 /* Check for write and read flags and set DBCR0 1047 /* Check for write and read flags and set DBCR0
1047 accordingly */ 1048 accordingly */
@@ -1071,10 +1072,10 @@ static long set_instruction_bp(struct task_struct *child,
1071 struct ppc_hw_breakpoint *bp_info) 1072 struct ppc_hw_breakpoint *bp_info)
1072{ 1073{
1073 int slot; 1074 int slot;
1074 int slot1_in_use = ((child->thread.dbcr0 & DBCR0_IAC1) != 0); 1075 int slot1_in_use = ((child->thread.debug.dbcr0 & DBCR0_IAC1) != 0);
1075 int slot2_in_use = ((child->thread.dbcr0 & DBCR0_IAC2) != 0); 1076 int slot2_in_use = ((child->thread.debug.dbcr0 & DBCR0_IAC2) != 0);
1076 int slot3_in_use = ((child->thread.dbcr0 & DBCR0_IAC3) != 0); 1077 int slot3_in_use = ((child->thread.debug.dbcr0 & DBCR0_IAC3) != 0);
1077 int slot4_in_use = ((child->thread.dbcr0 & DBCR0_IAC4) != 0); 1078 int slot4_in_use = ((child->thread.debug.dbcr0 & DBCR0_IAC4) != 0);
1078 1079
1079 if (dbcr_iac_range(child) & DBCR_IAC12MODE) 1080 if (dbcr_iac_range(child) & DBCR_IAC12MODE)
1080 slot2_in_use = 1; 1081 slot2_in_use = 1;
@@ -1093,9 +1094,9 @@ static long set_instruction_bp(struct task_struct *child,
1093 /* We need a pair of IAC regsisters */ 1094 /* We need a pair of IAC regsisters */
1094 if ((!slot1_in_use) && (!slot2_in_use)) { 1095 if ((!slot1_in_use) && (!slot2_in_use)) {
1095 slot = 1; 1096 slot = 1;
1096 child->thread.iac1 = bp_info->addr; 1097 child->thread.debug.iac1 = bp_info->addr;
1097 child->thread.iac2 = bp_info->addr2; 1098 child->thread.debug.iac2 = bp_info->addr2;
1098 child->thread.dbcr0 |= DBCR0_IAC1; 1099 child->thread.debug.dbcr0 |= DBCR0_IAC1;
1099 if (bp_info->addr_mode == 1100 if (bp_info->addr_mode ==
1100 PPC_BREAKPOINT_MODE_RANGE_EXCLUSIVE) 1101 PPC_BREAKPOINT_MODE_RANGE_EXCLUSIVE)
1101 dbcr_iac_range(child) |= DBCR_IAC12X; 1102 dbcr_iac_range(child) |= DBCR_IAC12X;
@@ -1104,9 +1105,9 @@ static long set_instruction_bp(struct task_struct *child,
1104#if CONFIG_PPC_ADV_DEBUG_IACS > 2 1105#if CONFIG_PPC_ADV_DEBUG_IACS > 2
1105 } else if ((!slot3_in_use) && (!slot4_in_use)) { 1106 } else if ((!slot3_in_use) && (!slot4_in_use)) {
1106 slot = 3; 1107 slot = 3;
1107 child->thread.iac3 = bp_info->addr; 1108 child->thread.debug.iac3 = bp_info->addr;
1108 child->thread.iac4 = bp_info->addr2; 1109 child->thread.debug.iac4 = bp_info->addr2;
1109 child->thread.dbcr0 |= DBCR0_IAC3; 1110 child->thread.debug.dbcr0 |= DBCR0_IAC3;
1110 if (bp_info->addr_mode == 1111 if (bp_info->addr_mode ==
1111 PPC_BREAKPOINT_MODE_RANGE_EXCLUSIVE) 1112 PPC_BREAKPOINT_MODE_RANGE_EXCLUSIVE)
1112 dbcr_iac_range(child) |= DBCR_IAC34X; 1113 dbcr_iac_range(child) |= DBCR_IAC34X;
@@ -1126,30 +1127,30 @@ static long set_instruction_bp(struct task_struct *child,
1126 */ 1127 */
1127 if (slot2_in_use || (slot3_in_use == slot4_in_use)) { 1128 if (slot2_in_use || (slot3_in_use == slot4_in_use)) {
1128 slot = 1; 1129 slot = 1;
1129 child->thread.iac1 = bp_info->addr; 1130 child->thread.debug.iac1 = bp_info->addr;
1130 child->thread.dbcr0 |= DBCR0_IAC1; 1131 child->thread.debug.dbcr0 |= DBCR0_IAC1;
1131 goto out; 1132 goto out;
1132 } 1133 }
1133 } 1134 }
1134 if (!slot2_in_use) { 1135 if (!slot2_in_use) {
1135 slot = 2; 1136 slot = 2;
1136 child->thread.iac2 = bp_info->addr; 1137 child->thread.debug.iac2 = bp_info->addr;
1137 child->thread.dbcr0 |= DBCR0_IAC2; 1138 child->thread.debug.dbcr0 |= DBCR0_IAC2;
1138#if CONFIG_PPC_ADV_DEBUG_IACS > 2 1139#if CONFIG_PPC_ADV_DEBUG_IACS > 2
1139 } else if (!slot3_in_use) { 1140 } else if (!slot3_in_use) {
1140 slot = 3; 1141 slot = 3;
1141 child->thread.iac3 = bp_info->addr; 1142 child->thread.debug.iac3 = bp_info->addr;
1142 child->thread.dbcr0 |= DBCR0_IAC3; 1143 child->thread.debug.dbcr0 |= DBCR0_IAC3;
1143 } else if (!slot4_in_use) { 1144 } else if (!slot4_in_use) {
1144 slot = 4; 1145 slot = 4;
1145 child->thread.iac4 = bp_info->addr; 1146 child->thread.debug.iac4 = bp_info->addr;
1146 child->thread.dbcr0 |= DBCR0_IAC4; 1147 child->thread.debug.dbcr0 |= DBCR0_IAC4;
1147#endif 1148#endif
1148 } else 1149 } else
1149 return -ENOSPC; 1150 return -ENOSPC;
1150 } 1151 }
1151out: 1152out:
1152 child->thread.dbcr0 |= DBCR0_IDM; 1153 child->thread.debug.dbcr0 |= DBCR0_IDM;
1153 child->thread.regs->msr |= MSR_DE; 1154 child->thread.regs->msr |= MSR_DE;
1154 1155
1155 return slot; 1156 return slot;
@@ -1159,49 +1160,49 @@ static int del_instruction_bp(struct task_struct *child, int slot)
1159{ 1160{
1160 switch (slot) { 1161 switch (slot) {
1161 case 1: 1162 case 1:
1162 if ((child->thread.dbcr0 & DBCR0_IAC1) == 0) 1163 if ((child->thread.debug.dbcr0 & DBCR0_IAC1) == 0)
1163 return -ENOENT; 1164 return -ENOENT;
1164 1165
1165 if (dbcr_iac_range(child) & DBCR_IAC12MODE) { 1166 if (dbcr_iac_range(child) & DBCR_IAC12MODE) {
1166 /* address range - clear slots 1 & 2 */ 1167 /* address range - clear slots 1 & 2 */
1167 child->thread.iac2 = 0; 1168 child->thread.debug.iac2 = 0;
1168 dbcr_iac_range(child) &= ~DBCR_IAC12MODE; 1169 dbcr_iac_range(child) &= ~DBCR_IAC12MODE;
1169 } 1170 }
1170 child->thread.iac1 = 0; 1171 child->thread.debug.iac1 = 0;
1171 child->thread.dbcr0 &= ~DBCR0_IAC1; 1172 child->thread.debug.dbcr0 &= ~DBCR0_IAC1;
1172 break; 1173 break;
1173 case 2: 1174 case 2:
1174 if ((child->thread.dbcr0 & DBCR0_IAC2) == 0) 1175 if ((child->thread.debug.dbcr0 & DBCR0_IAC2) == 0)
1175 return -ENOENT; 1176 return -ENOENT;
1176 1177
1177 if (dbcr_iac_range(child) & DBCR_IAC12MODE) 1178 if (dbcr_iac_range(child) & DBCR_IAC12MODE)
1178 /* used in a range */ 1179 /* used in a range */
1179 return -EINVAL; 1180 return -EINVAL;
1180 child->thread.iac2 = 0; 1181 child->thread.debug.iac2 = 0;
1181 child->thread.dbcr0 &= ~DBCR0_IAC2; 1182 child->thread.debug.dbcr0 &= ~DBCR0_IAC2;
1182 break; 1183 break;
1183#if CONFIG_PPC_ADV_DEBUG_IACS > 2 1184#if CONFIG_PPC_ADV_DEBUG_IACS > 2
1184 case 3: 1185 case 3:
1185 if ((child->thread.dbcr0 & DBCR0_IAC3) == 0) 1186 if ((child->thread.debug.dbcr0 & DBCR0_IAC3) == 0)
1186 return -ENOENT; 1187 return -ENOENT;
1187 1188
1188 if (dbcr_iac_range(child) & DBCR_IAC34MODE) { 1189 if (dbcr_iac_range(child) & DBCR_IAC34MODE) {
1189 /* address range - clear slots 3 & 4 */ 1190 /* address range - clear slots 3 & 4 */
1190 child->thread.iac4 = 0; 1191 child->thread.debug.iac4 = 0;
1191 dbcr_iac_range(child) &= ~DBCR_IAC34MODE; 1192 dbcr_iac_range(child) &= ~DBCR_IAC34MODE;
1192 } 1193 }
1193 child->thread.iac3 = 0; 1194 child->thread.debug.iac3 = 0;
1194 child->thread.dbcr0 &= ~DBCR0_IAC3; 1195 child->thread.debug.dbcr0 &= ~DBCR0_IAC3;
1195 break; 1196 break;
1196 case 4: 1197 case 4:
1197 if ((child->thread.dbcr0 & DBCR0_IAC4) == 0) 1198 if ((child->thread.debug.dbcr0 & DBCR0_IAC4) == 0)
1198 return -ENOENT; 1199 return -ENOENT;
1199 1200
1200 if (dbcr_iac_range(child) & DBCR_IAC34MODE) 1201 if (dbcr_iac_range(child) & DBCR_IAC34MODE)
1201 /* Used in a range */ 1202 /* Used in a range */
1202 return -EINVAL; 1203 return -EINVAL;
1203 child->thread.iac4 = 0; 1204 child->thread.debug.iac4 = 0;
1204 child->thread.dbcr0 &= ~DBCR0_IAC4; 1205 child->thread.debug.dbcr0 &= ~DBCR0_IAC4;
1205 break; 1206 break;
1206#endif 1207#endif
1207 default: 1208 default:
@@ -1231,18 +1232,18 @@ static int set_dac(struct task_struct *child, struct ppc_hw_breakpoint *bp_info)
1231 dbcr_dac(child) |= DBCR_DAC1R; 1232 dbcr_dac(child) |= DBCR_DAC1R;
1232 if (bp_info->trigger_type & PPC_BREAKPOINT_TRIGGER_WRITE) 1233 if (bp_info->trigger_type & PPC_BREAKPOINT_TRIGGER_WRITE)
1233 dbcr_dac(child) |= DBCR_DAC1W; 1234 dbcr_dac(child) |= DBCR_DAC1W;
1234 child->thread.dac1 = (unsigned long)bp_info->addr; 1235 child->thread.debug.dac1 = (unsigned long)bp_info->addr;
1235#if CONFIG_PPC_ADV_DEBUG_DVCS > 0 1236#if CONFIG_PPC_ADV_DEBUG_DVCS > 0
1236 if (byte_enable) { 1237 if (byte_enable) {
1237 child->thread.dvc1 = 1238 child->thread.debug.dvc1 =
1238 (unsigned long)bp_info->condition_value; 1239 (unsigned long)bp_info->condition_value;
1239 child->thread.dbcr2 |= 1240 child->thread.debug.dbcr2 |=
1240 ((byte_enable << DBCR2_DVC1BE_SHIFT) | 1241 ((byte_enable << DBCR2_DVC1BE_SHIFT) |
1241 (condition_mode << DBCR2_DVC1M_SHIFT)); 1242 (condition_mode << DBCR2_DVC1M_SHIFT));
1242 } 1243 }
1243#endif 1244#endif
1244#ifdef CONFIG_PPC_ADV_DEBUG_DAC_RANGE 1245#ifdef CONFIG_PPC_ADV_DEBUG_DAC_RANGE
1245 } else if (child->thread.dbcr2 & DBCR2_DAC12MODE) { 1246 } else if (child->thread.debug.dbcr2 & DBCR2_DAC12MODE) {
1246 /* Both dac1 and dac2 are part of a range */ 1247 /* Both dac1 and dac2 are part of a range */
1247 return -ENOSPC; 1248 return -ENOSPC;
1248#endif 1249#endif
@@ -1252,19 +1253,19 @@ static int set_dac(struct task_struct *child, struct ppc_hw_breakpoint *bp_info)
1252 dbcr_dac(child) |= DBCR_DAC2R; 1253 dbcr_dac(child) |= DBCR_DAC2R;
1253 if (bp_info->trigger_type & PPC_BREAKPOINT_TRIGGER_WRITE) 1254 if (bp_info->trigger_type & PPC_BREAKPOINT_TRIGGER_WRITE)
1254 dbcr_dac(child) |= DBCR_DAC2W; 1255 dbcr_dac(child) |= DBCR_DAC2W;
1255 child->thread.dac2 = (unsigned long)bp_info->addr; 1256 child->thread.debug.dac2 = (unsigned long)bp_info->addr;
1256#if CONFIG_PPC_ADV_DEBUG_DVCS > 0 1257#if CONFIG_PPC_ADV_DEBUG_DVCS > 0
1257 if (byte_enable) { 1258 if (byte_enable) {
1258 child->thread.dvc2 = 1259 child->thread.debug.dvc2 =
1259 (unsigned long)bp_info->condition_value; 1260 (unsigned long)bp_info->condition_value;
1260 child->thread.dbcr2 |= 1261 child->thread.debug.dbcr2 |=
1261 ((byte_enable << DBCR2_DVC2BE_SHIFT) | 1262 ((byte_enable << DBCR2_DVC2BE_SHIFT) |
1262 (condition_mode << DBCR2_DVC2M_SHIFT)); 1263 (condition_mode << DBCR2_DVC2M_SHIFT));
1263 } 1264 }
1264#endif 1265#endif
1265 } else 1266 } else
1266 return -ENOSPC; 1267 return -ENOSPC;
1267 child->thread.dbcr0 |= DBCR0_IDM; 1268 child->thread.debug.dbcr0 |= DBCR0_IDM;
1268 child->thread.regs->msr |= MSR_DE; 1269 child->thread.regs->msr |= MSR_DE;
1269 1270
1270 return slot + 4; 1271 return slot + 4;
@@ -1276,32 +1277,32 @@ static int del_dac(struct task_struct *child, int slot)
1276 if ((dbcr_dac(child) & (DBCR_DAC1R | DBCR_DAC1W)) == 0) 1277 if ((dbcr_dac(child) & (DBCR_DAC1R | DBCR_DAC1W)) == 0)
1277 return -ENOENT; 1278 return -ENOENT;
1278 1279
1279 child->thread.dac1 = 0; 1280 child->thread.debug.dac1 = 0;
1280 dbcr_dac(child) &= ~(DBCR_DAC1R | DBCR_DAC1W); 1281 dbcr_dac(child) &= ~(DBCR_DAC1R | DBCR_DAC1W);
1281#ifdef CONFIG_PPC_ADV_DEBUG_DAC_RANGE 1282#ifdef CONFIG_PPC_ADV_DEBUG_DAC_RANGE
1282 if (child->thread.dbcr2 & DBCR2_DAC12MODE) { 1283 if (child->thread.debug.dbcr2 & DBCR2_DAC12MODE) {
1283 child->thread.dac2 = 0; 1284 child->thread.debug.dac2 = 0;
1284 child->thread.dbcr2 &= ~DBCR2_DAC12MODE; 1285 child->thread.debug.dbcr2 &= ~DBCR2_DAC12MODE;
1285 } 1286 }
1286 child->thread.dbcr2 &= ~(DBCR2_DVC1M | DBCR2_DVC1BE); 1287 child->thread.debug.dbcr2 &= ~(DBCR2_DVC1M | DBCR2_DVC1BE);
1287#endif 1288#endif
1288#if CONFIG_PPC_ADV_DEBUG_DVCS > 0 1289#if CONFIG_PPC_ADV_DEBUG_DVCS > 0
1289 child->thread.dvc1 = 0; 1290 child->thread.debug.dvc1 = 0;
1290#endif 1291#endif
1291 } else if (slot == 2) { 1292 } else if (slot == 2) {
1292 if ((dbcr_dac(child) & (DBCR_DAC2R | DBCR_DAC2W)) == 0) 1293 if ((dbcr_dac(child) & (DBCR_DAC2R | DBCR_DAC2W)) == 0)
1293 return -ENOENT; 1294 return -ENOENT;
1294 1295
1295#ifdef CONFIG_PPC_ADV_DEBUG_DAC_RANGE 1296#ifdef CONFIG_PPC_ADV_DEBUG_DAC_RANGE
1296 if (child->thread.dbcr2 & DBCR2_DAC12MODE) 1297 if (child->thread.debug.dbcr2 & DBCR2_DAC12MODE)
1297 /* Part of a range */ 1298 /* Part of a range */
1298 return -EINVAL; 1299 return -EINVAL;
1299 child->thread.dbcr2 &= ~(DBCR2_DVC2M | DBCR2_DVC2BE); 1300 child->thread.debug.dbcr2 &= ~(DBCR2_DVC2M | DBCR2_DVC2BE);
1300#endif 1301#endif
1301#if CONFIG_PPC_ADV_DEBUG_DVCS > 0 1302#if CONFIG_PPC_ADV_DEBUG_DVCS > 0
1302 child->thread.dvc2 = 0; 1303 child->thread.debug.dvc2 = 0;
1303#endif 1304#endif
1304 child->thread.dac2 = 0; 1305 child->thread.debug.dac2 = 0;
1305 dbcr_dac(child) &= ~(DBCR_DAC2R | DBCR_DAC2W); 1306 dbcr_dac(child) &= ~(DBCR_DAC2R | DBCR_DAC2W);
1306 } else 1307 } else
1307 return -EINVAL; 1308 return -EINVAL;
@@ -1343,22 +1344,22 @@ static int set_dac_range(struct task_struct *child,
1343 return -EIO; 1344 return -EIO;
1344 } 1345 }
1345 1346
1346 if (child->thread.dbcr0 & 1347 if (child->thread.debug.dbcr0 &
1347 (DBCR0_DAC1R | DBCR0_DAC1W | DBCR0_DAC2R | DBCR0_DAC2W)) 1348 (DBCR0_DAC1R | DBCR0_DAC1W | DBCR0_DAC2R | DBCR0_DAC2W))
1348 return -ENOSPC; 1349 return -ENOSPC;
1349 1350
1350 if (bp_info->trigger_type & PPC_BREAKPOINT_TRIGGER_READ) 1351 if (bp_info->trigger_type & PPC_BREAKPOINT_TRIGGER_READ)
1351 child->thread.dbcr0 |= (DBCR0_DAC1R | DBCR0_IDM); 1352 child->thread.debug.dbcr0 |= (DBCR0_DAC1R | DBCR0_IDM);
1352 if (bp_info->trigger_type & PPC_BREAKPOINT_TRIGGER_WRITE) 1353 if (bp_info->trigger_type & PPC_BREAKPOINT_TRIGGER_WRITE)
1353 child->thread.dbcr0 |= (DBCR0_DAC1W | DBCR0_IDM); 1354 child->thread.debug.dbcr0 |= (DBCR0_DAC1W | DBCR0_IDM);
1354 child->thread.dac1 = bp_info->addr; 1355 child->thread.debug.dac1 = bp_info->addr;
1355 child->thread.dac2 = bp_info->addr2; 1356 child->thread.debug.dac2 = bp_info->addr2;
1356 if (mode == PPC_BREAKPOINT_MODE_RANGE_INCLUSIVE) 1357 if (mode == PPC_BREAKPOINT_MODE_RANGE_INCLUSIVE)
1357 child->thread.dbcr2 |= DBCR2_DAC12M; 1358 child->thread.debug.dbcr2 |= DBCR2_DAC12M;
1358 else if (mode == PPC_BREAKPOINT_MODE_RANGE_EXCLUSIVE) 1359 else if (mode == PPC_BREAKPOINT_MODE_RANGE_EXCLUSIVE)
1359 child->thread.dbcr2 |= DBCR2_DAC12MX; 1360 child->thread.debug.dbcr2 |= DBCR2_DAC12MX;
1360 else /* PPC_BREAKPOINT_MODE_MASK */ 1361 else /* PPC_BREAKPOINT_MODE_MASK */
1361 child->thread.dbcr2 |= DBCR2_DAC12MM; 1362 child->thread.debug.dbcr2 |= DBCR2_DAC12MM;
1362 child->thread.regs->msr |= MSR_DE; 1363 child->thread.regs->msr |= MSR_DE;
1363 1364
1364 return 5; 1365 return 5;
@@ -1489,9 +1490,9 @@ static long ppc_del_hwdebug(struct task_struct *child, long data)
1489 rc = del_dac(child, (int)data - 4); 1490 rc = del_dac(child, (int)data - 4);
1490 1491
1491 if (!rc) { 1492 if (!rc) {
1492 if (!DBCR_ACTIVE_EVENTS(child->thread.dbcr0, 1493 if (!DBCR_ACTIVE_EVENTS(child->thread.debug.dbcr0,
1493 child->thread.dbcr1)) { 1494 child->thread.debug.dbcr1)) {
1494 child->thread.dbcr0 &= ~DBCR0_IDM; 1495 child->thread.debug.dbcr0 &= ~DBCR0_IDM;
1495 child->thread.regs->msr &= ~MSR_DE; 1496 child->thread.regs->msr &= ~MSR_DE;
1496 } 1497 }
1497 } 1498 }
@@ -1554,10 +1555,10 @@ long arch_ptrace(struct task_struct *child, long request,
1554 1555
1555 flush_fp_to_thread(child); 1556 flush_fp_to_thread(child);
1556 if (fpidx < (PT_FPSCR - PT_FPR0)) 1557 if (fpidx < (PT_FPSCR - PT_FPR0))
1557 tmp = ((unsigned long *)child->thread.fpr) 1558 memcpy(&tmp, &child->thread.fp_state.fpr,
1558 [fpidx * TS_FPRWIDTH]; 1559 sizeof(long));
1559 else 1560 else
1560 tmp = child->thread.fpscr.val; 1561 tmp = child->thread.fp_state.fpscr;
1561 } 1562 }
1562 ret = put_user(tmp, datalp); 1563 ret = put_user(tmp, datalp);
1563 break; 1564 break;
@@ -1587,10 +1588,10 @@ long arch_ptrace(struct task_struct *child, long request,
1587 1588
1588 flush_fp_to_thread(child); 1589 flush_fp_to_thread(child);
1589 if (fpidx < (PT_FPSCR - PT_FPR0)) 1590 if (fpidx < (PT_FPSCR - PT_FPR0))
1590 ((unsigned long *)child->thread.fpr) 1591 memcpy(&child->thread.fp_state.fpr, &data,
1591 [fpidx * TS_FPRWIDTH] = data; 1592 sizeof(long));
1592 else 1593 else
1593 child->thread.fpscr.val = data; 1594 child->thread.fp_state.fpscr = data;
1594 ret = 0; 1595 ret = 0;
1595 } 1596 }
1596 break; 1597 break;
@@ -1669,7 +1670,7 @@ long arch_ptrace(struct task_struct *child, long request,
1669 if (addr > 0) 1670 if (addr > 0)
1670 break; 1671 break;
1671#ifdef CONFIG_PPC_ADV_DEBUG_REGS 1672#ifdef CONFIG_PPC_ADV_DEBUG_REGS
1672 ret = put_user(child->thread.dac1, datalp); 1673 ret = put_user(child->thread.debug.dac1, datalp);
1673#else 1674#else
1674 dabr_fake = ((child->thread.hw_brk.address & (~HW_BRK_TYPE_DABR)) | 1675 dabr_fake = ((child->thread.hw_brk.address & (~HW_BRK_TYPE_DABR)) |
1675 (child->thread.hw_brk.type & HW_BRK_TYPE_DABR)); 1676 (child->thread.hw_brk.type & HW_BRK_TYPE_DABR));
diff --git a/arch/powerpc/kernel/ptrace32.c b/arch/powerpc/kernel/ptrace32.c
index f51599e941c7..f52b7db327c8 100644
--- a/arch/powerpc/kernel/ptrace32.c
+++ b/arch/powerpc/kernel/ptrace32.c
@@ -43,7 +43,6 @@
43#define FPRNUMBER(i) (((i) - PT_FPR0) >> 1) 43#define FPRNUMBER(i) (((i) - PT_FPR0) >> 1)
44#define FPRHALF(i) (((i) - PT_FPR0) & 1) 44#define FPRHALF(i) (((i) - PT_FPR0) & 1)
45#define FPRINDEX(i) TS_FPRWIDTH * FPRNUMBER(i) * 2 + FPRHALF(i) 45#define FPRINDEX(i) TS_FPRWIDTH * FPRNUMBER(i) * 2 + FPRHALF(i)
46#define FPRINDEX_3264(i) (TS_FPRWIDTH * ((i) - PT_FPR0))
47 46
48long compat_arch_ptrace(struct task_struct *child, compat_long_t request, 47long compat_arch_ptrace(struct task_struct *child, compat_long_t request,
49 compat_ulong_t caddr, compat_ulong_t cdata) 48 compat_ulong_t caddr, compat_ulong_t cdata)
@@ -105,7 +104,7 @@ long compat_arch_ptrace(struct task_struct *child, compat_long_t request,
105 * to be an array of unsigned int (32 bits) - the 104 * to be an array of unsigned int (32 bits) - the
106 * index passed in is based on this assumption. 105 * index passed in is based on this assumption.
107 */ 106 */
108 tmp = ((unsigned int *)child->thread.fpr) 107 tmp = ((unsigned int *)child->thread.fp_state.fpr)
109 [FPRINDEX(index)]; 108 [FPRINDEX(index)];
110 } 109 }
111 ret = put_user((unsigned int)tmp, (u32 __user *)data); 110 ret = put_user((unsigned int)tmp, (u32 __user *)data);
@@ -147,8 +146,7 @@ long compat_arch_ptrace(struct task_struct *child, compat_long_t request,
147 if (numReg >= PT_FPR0) { 146 if (numReg >= PT_FPR0) {
148 flush_fp_to_thread(child); 147 flush_fp_to_thread(child);
149 /* get 64 bit FPR */ 148 /* get 64 bit FPR */
150 tmp = ((u64 *)child->thread.fpr) 149 tmp = child->thread.fp_state.fpr[numReg - PT_FPR0][0];
151 [FPRINDEX_3264(numReg)];
152 } else { /* register within PT_REGS struct */ 150 } else { /* register within PT_REGS struct */
153 unsigned long tmp2; 151 unsigned long tmp2;
154 ret = ptrace_get_reg(child, numReg, &tmp2); 152 ret = ptrace_get_reg(child, numReg, &tmp2);
@@ -207,7 +205,7 @@ long compat_arch_ptrace(struct task_struct *child, compat_long_t request,
207 * to be an array of unsigned int (32 bits) - the 205 * to be an array of unsigned int (32 bits) - the
208 * index passed in is based on this assumption. 206 * index passed in is based on this assumption.
209 */ 207 */
210 ((unsigned int *)child->thread.fpr) 208 ((unsigned int *)child->thread.fp_state.fpr)
211 [FPRINDEX(index)] = data; 209 [FPRINDEX(index)] = data;
212 ret = 0; 210 ret = 0;
213 } 211 }
@@ -251,8 +249,7 @@ long compat_arch_ptrace(struct task_struct *child, compat_long_t request,
251 u64 *tmp; 249 u64 *tmp;
252 flush_fp_to_thread(child); 250 flush_fp_to_thread(child);
253 /* get 64 bit FPR ... */ 251 /* get 64 bit FPR ... */
254 tmp = &(((u64 *)child->thread.fpr) 252 tmp = &child->thread.fp_state.fpr[numReg - PT_FPR0][0];
255 [FPRINDEX_3264(numReg)]);
256 /* ... write the 32 bit part we want */ 253 /* ... write the 32 bit part we want */
257 ((u32 *)tmp)[index % 2] = data; 254 ((u32 *)tmp)[index % 2] = data;
258 ret = 0; 255 ret = 0;
@@ -269,7 +266,7 @@ long compat_arch_ptrace(struct task_struct *child, compat_long_t request,
269 if (addr > 0) 266 if (addr > 0)
270 break; 267 break;
271#ifdef CONFIG_PPC_ADV_DEBUG_REGS 268#ifdef CONFIG_PPC_ADV_DEBUG_REGS
272 ret = put_user(child->thread.dac1, (u32 __user *)data); 269 ret = put_user(child->thread.debug.dac1, (u32 __user *)data);
273#else 270#else
274 dabr_fake = ( 271 dabr_fake = (
275 (child->thread.hw_brk.address & (~HW_BRK_TYPE_DABR)) | 272 (child->thread.hw_brk.address & (~HW_BRK_TYPE_DABR)) |
diff --git a/arch/powerpc/kernel/rtas_pci.c b/arch/powerpc/kernel/rtas_pci.c
index 6e7b7cdeec65..7d4c7172f38e 100644
--- a/arch/powerpc/kernel/rtas_pci.c
+++ b/arch/powerpc/kernel/rtas_pci.c
@@ -223,7 +223,7 @@ unsigned long get_phb_buid(struct device_node *phb)
223static int phb_set_bus_ranges(struct device_node *dev, 223static int phb_set_bus_ranges(struct device_node *dev,
224 struct pci_controller *phb) 224 struct pci_controller *phb)
225{ 225{
226 const int *bus_range; 226 const __be32 *bus_range;
227 unsigned int len; 227 unsigned int len;
228 228
229 bus_range = of_get_property(dev, "bus-range", &len); 229 bus_range = of_get_property(dev, "bus-range", &len);
@@ -231,8 +231,8 @@ static int phb_set_bus_ranges(struct device_node *dev,
231 return 1; 231 return 1;
232 } 232 }
233 233
234 phb->first_busno = bus_range[0]; 234 phb->first_busno = be32_to_cpu(bus_range[0]);
235 phb->last_busno = bus_range[1]; 235 phb->last_busno = be32_to_cpu(bus_range[1]);
236 236
237 return 0; 237 return 0;
238} 238}
diff --git a/arch/powerpc/kernel/setup-common.c b/arch/powerpc/kernel/setup-common.c
index 3d261c071fc8..febc80445d25 100644
--- a/arch/powerpc/kernel/setup-common.c
+++ b/arch/powerpc/kernel/setup-common.c
@@ -62,8 +62,6 @@
62#include <mm/mmu_decl.h> 62#include <mm/mmu_decl.h>
63#include <asm/fadump.h> 63#include <asm/fadump.h>
64 64
65#include "setup.h"
66
67#ifdef DEBUG 65#ifdef DEBUG
68#include <asm/udbg.h> 66#include <asm/udbg.h>
69#define DBG(fmt...) udbg_printf(fmt) 67#define DBG(fmt...) udbg_printf(fmt)
diff --git a/arch/powerpc/kernel/setup.h b/arch/powerpc/kernel/setup.h
deleted file mode 100644
index 4c67ad7fae08..000000000000
--- a/arch/powerpc/kernel/setup.h
+++ /dev/null
@@ -1,9 +0,0 @@
1#ifndef _POWERPC_KERNEL_SETUP_H
2#define _POWERPC_KERNEL_SETUP_H
3
4void check_for_initrd(void);
5void do_init_bootmem(void);
6void setup_panic(void);
7extern int do_early_xmon;
8
9#endif /* _POWERPC_KERNEL_SETUP_H */
diff --git a/arch/powerpc/kernel/setup_32.c b/arch/powerpc/kernel/setup_32.c
index a4bbcae72578..b903dc5cf944 100644
--- a/arch/powerpc/kernel/setup_32.c
+++ b/arch/powerpc/kernel/setup_32.c
@@ -40,8 +40,6 @@
40#include <asm/mmu_context.h> 40#include <asm/mmu_context.h>
41#include <asm/epapr_hcalls.h> 41#include <asm/epapr_hcalls.h>
42 42
43#include "setup.h"
44
45#define DBG(fmt...) 43#define DBG(fmt...)
46 44
47extern void bootx_init(unsigned long r4, unsigned long phys); 45extern void bootx_init(unsigned long r4, unsigned long phys);
diff --git a/arch/powerpc/kernel/setup_64.c b/arch/powerpc/kernel/setup_64.c
index 278ca93e1f28..4085aaa9478f 100644
--- a/arch/powerpc/kernel/setup_64.c
+++ b/arch/powerpc/kernel/setup_64.c
@@ -68,8 +68,6 @@
68#include <asm/hugetlb.h> 68#include <asm/hugetlb.h>
69#include <asm/epapr_hcalls.h> 69#include <asm/epapr_hcalls.h>
70 70
71#include "setup.h"
72
73#ifdef DEBUG 71#ifdef DEBUG
74#define DBG(fmt...) udbg_printf(fmt) 72#define DBG(fmt...) udbg_printf(fmt)
75#else 73#else
diff --git a/arch/powerpc/kernel/signal_32.c b/arch/powerpc/kernel/signal_32.c
index bebdf1a1a540..1a410aa57fb7 100644
--- a/arch/powerpc/kernel/signal_32.c
+++ b/arch/powerpc/kernel/signal_32.c
@@ -265,27 +265,27 @@ struct rt_sigframe {
265unsigned long copy_fpr_to_user(void __user *to, 265unsigned long copy_fpr_to_user(void __user *to,
266 struct task_struct *task) 266 struct task_struct *task)
267{ 267{
268 double buf[ELF_NFPREG]; 268 u64 buf[ELF_NFPREG];
269 int i; 269 int i;
270 270
271 /* save FPR copy to local buffer then write to the thread_struct */ 271 /* save FPR copy to local buffer then write to the thread_struct */
272 for (i = 0; i < (ELF_NFPREG - 1) ; i++) 272 for (i = 0; i < (ELF_NFPREG - 1) ; i++)
273 buf[i] = task->thread.TS_FPR(i); 273 buf[i] = task->thread.TS_FPR(i);
274 memcpy(&buf[i], &task->thread.fpscr, sizeof(double)); 274 buf[i] = task->thread.fp_state.fpscr;
275 return __copy_to_user(to, buf, ELF_NFPREG * sizeof(double)); 275 return __copy_to_user(to, buf, ELF_NFPREG * sizeof(double));
276} 276}
277 277
278unsigned long copy_fpr_from_user(struct task_struct *task, 278unsigned long copy_fpr_from_user(struct task_struct *task,
279 void __user *from) 279 void __user *from)
280{ 280{
281 double buf[ELF_NFPREG]; 281 u64 buf[ELF_NFPREG];
282 int i; 282 int i;
283 283
284 if (__copy_from_user(buf, from, ELF_NFPREG * sizeof(double))) 284 if (__copy_from_user(buf, from, ELF_NFPREG * sizeof(double)))
285 return 1; 285 return 1;
286 for (i = 0; i < (ELF_NFPREG - 1) ; i++) 286 for (i = 0; i < (ELF_NFPREG - 1) ; i++)
287 task->thread.TS_FPR(i) = buf[i]; 287 task->thread.TS_FPR(i) = buf[i];
288 memcpy(&task->thread.fpscr, &buf[i], sizeof(double)); 288 task->thread.fp_state.fpscr = buf[i];
289 289
290 return 0; 290 return 0;
291} 291}
@@ -293,25 +293,25 @@ unsigned long copy_fpr_from_user(struct task_struct *task,
293unsigned long copy_vsx_to_user(void __user *to, 293unsigned long copy_vsx_to_user(void __user *to,
294 struct task_struct *task) 294 struct task_struct *task)
295{ 295{
296 double buf[ELF_NVSRHALFREG]; 296 u64 buf[ELF_NVSRHALFREG];
297 int i; 297 int i;
298 298
299 /* save FPR copy to local buffer then write to the thread_struct */ 299 /* save FPR copy to local buffer then write to the thread_struct */
300 for (i = 0; i < ELF_NVSRHALFREG; i++) 300 for (i = 0; i < ELF_NVSRHALFREG; i++)
301 buf[i] = task->thread.fpr[i][TS_VSRLOWOFFSET]; 301 buf[i] = task->thread.fp_state.fpr[i][TS_VSRLOWOFFSET];
302 return __copy_to_user(to, buf, ELF_NVSRHALFREG * sizeof(double)); 302 return __copy_to_user(to, buf, ELF_NVSRHALFREG * sizeof(double));
303} 303}
304 304
305unsigned long copy_vsx_from_user(struct task_struct *task, 305unsigned long copy_vsx_from_user(struct task_struct *task,
306 void __user *from) 306 void __user *from)
307{ 307{
308 double buf[ELF_NVSRHALFREG]; 308 u64 buf[ELF_NVSRHALFREG];
309 int i; 309 int i;
310 310
311 if (__copy_from_user(buf, from, ELF_NVSRHALFREG * sizeof(double))) 311 if (__copy_from_user(buf, from, ELF_NVSRHALFREG * sizeof(double)))
312 return 1; 312 return 1;
313 for (i = 0; i < ELF_NVSRHALFREG ; i++) 313 for (i = 0; i < ELF_NVSRHALFREG ; i++)
314 task->thread.fpr[i][TS_VSRLOWOFFSET] = buf[i]; 314 task->thread.fp_state.fpr[i][TS_VSRLOWOFFSET] = buf[i];
315 return 0; 315 return 0;
316} 316}
317 317
@@ -319,27 +319,27 @@ unsigned long copy_vsx_from_user(struct task_struct *task,
319unsigned long copy_transact_fpr_to_user(void __user *to, 319unsigned long copy_transact_fpr_to_user(void __user *to,
320 struct task_struct *task) 320 struct task_struct *task)
321{ 321{
322 double buf[ELF_NFPREG]; 322 u64 buf[ELF_NFPREG];
323 int i; 323 int i;
324 324
325 /* save FPR copy to local buffer then write to the thread_struct */ 325 /* save FPR copy to local buffer then write to the thread_struct */
326 for (i = 0; i < (ELF_NFPREG - 1) ; i++) 326 for (i = 0; i < (ELF_NFPREG - 1) ; i++)
327 buf[i] = task->thread.TS_TRANS_FPR(i); 327 buf[i] = task->thread.TS_TRANS_FPR(i);
328 memcpy(&buf[i], &task->thread.transact_fpscr, sizeof(double)); 328 buf[i] = task->thread.transact_fp.fpscr;
329 return __copy_to_user(to, buf, ELF_NFPREG * sizeof(double)); 329 return __copy_to_user(to, buf, ELF_NFPREG * sizeof(double));
330} 330}
331 331
332unsigned long copy_transact_fpr_from_user(struct task_struct *task, 332unsigned long copy_transact_fpr_from_user(struct task_struct *task,
333 void __user *from) 333 void __user *from)
334{ 334{
335 double buf[ELF_NFPREG]; 335 u64 buf[ELF_NFPREG];
336 int i; 336 int i;
337 337
338 if (__copy_from_user(buf, from, ELF_NFPREG * sizeof(double))) 338 if (__copy_from_user(buf, from, ELF_NFPREG * sizeof(double)))
339 return 1; 339 return 1;
340 for (i = 0; i < (ELF_NFPREG - 1) ; i++) 340 for (i = 0; i < (ELF_NFPREG - 1) ; i++)
341 task->thread.TS_TRANS_FPR(i) = buf[i]; 341 task->thread.TS_TRANS_FPR(i) = buf[i];
342 memcpy(&task->thread.transact_fpscr, &buf[i], sizeof(double)); 342 task->thread.transact_fp.fpscr = buf[i];
343 343
344 return 0; 344 return 0;
345} 345}
@@ -347,25 +347,25 @@ unsigned long copy_transact_fpr_from_user(struct task_struct *task,
347unsigned long copy_transact_vsx_to_user(void __user *to, 347unsigned long copy_transact_vsx_to_user(void __user *to,
348 struct task_struct *task) 348 struct task_struct *task)
349{ 349{
350 double buf[ELF_NVSRHALFREG]; 350 u64 buf[ELF_NVSRHALFREG];
351 int i; 351 int i;
352 352
353 /* save FPR copy to local buffer then write to the thread_struct */ 353 /* save FPR copy to local buffer then write to the thread_struct */
354 for (i = 0; i < ELF_NVSRHALFREG; i++) 354 for (i = 0; i < ELF_NVSRHALFREG; i++)
355 buf[i] = task->thread.transact_fpr[i][TS_VSRLOWOFFSET]; 355 buf[i] = task->thread.transact_fp.fpr[i][TS_VSRLOWOFFSET];
356 return __copy_to_user(to, buf, ELF_NVSRHALFREG * sizeof(double)); 356 return __copy_to_user(to, buf, ELF_NVSRHALFREG * sizeof(double));
357} 357}
358 358
359unsigned long copy_transact_vsx_from_user(struct task_struct *task, 359unsigned long copy_transact_vsx_from_user(struct task_struct *task,
360 void __user *from) 360 void __user *from)
361{ 361{
362 double buf[ELF_NVSRHALFREG]; 362 u64 buf[ELF_NVSRHALFREG];
363 int i; 363 int i;
364 364
365 if (__copy_from_user(buf, from, ELF_NVSRHALFREG * sizeof(double))) 365 if (__copy_from_user(buf, from, ELF_NVSRHALFREG * sizeof(double)))
366 return 1; 366 return 1;
367 for (i = 0; i < ELF_NVSRHALFREG ; i++) 367 for (i = 0; i < ELF_NVSRHALFREG ; i++)
368 task->thread.transact_fpr[i][TS_VSRLOWOFFSET] = buf[i]; 368 task->thread.transact_fp.fpr[i][TS_VSRLOWOFFSET] = buf[i];
369 return 0; 369 return 0;
370} 370}
371#endif /* CONFIG_PPC_TRANSACTIONAL_MEM */ 371#endif /* CONFIG_PPC_TRANSACTIONAL_MEM */
@@ -373,14 +373,14 @@ unsigned long copy_transact_vsx_from_user(struct task_struct *task,
373inline unsigned long copy_fpr_to_user(void __user *to, 373inline unsigned long copy_fpr_to_user(void __user *to,
374 struct task_struct *task) 374 struct task_struct *task)
375{ 375{
376 return __copy_to_user(to, task->thread.fpr, 376 return __copy_to_user(to, task->thread.fp_state.fpr,
377 ELF_NFPREG * sizeof(double)); 377 ELF_NFPREG * sizeof(double));
378} 378}
379 379
380inline unsigned long copy_fpr_from_user(struct task_struct *task, 380inline unsigned long copy_fpr_from_user(struct task_struct *task,
381 void __user *from) 381 void __user *from)
382{ 382{
383 return __copy_from_user(task->thread.fpr, from, 383 return __copy_from_user(task->thread.fp_state.fpr, from,
384 ELF_NFPREG * sizeof(double)); 384 ELF_NFPREG * sizeof(double));
385} 385}
386 386
@@ -388,14 +388,14 @@ inline unsigned long copy_fpr_from_user(struct task_struct *task,
388inline unsigned long copy_transact_fpr_to_user(void __user *to, 388inline unsigned long copy_transact_fpr_to_user(void __user *to,
389 struct task_struct *task) 389 struct task_struct *task)
390{ 390{
391 return __copy_to_user(to, task->thread.transact_fpr, 391 return __copy_to_user(to, task->thread.transact_fp.fpr,
392 ELF_NFPREG * sizeof(double)); 392 ELF_NFPREG * sizeof(double));
393} 393}
394 394
395inline unsigned long copy_transact_fpr_from_user(struct task_struct *task, 395inline unsigned long copy_transact_fpr_from_user(struct task_struct *task,
396 void __user *from) 396 void __user *from)
397{ 397{
398 return __copy_from_user(task->thread.transact_fpr, from, 398 return __copy_from_user(task->thread.transact_fp.fpr, from,
399 ELF_NFPREG * sizeof(double)); 399 ELF_NFPREG * sizeof(double));
400} 400}
401#endif /* CONFIG_PPC_TRANSACTIONAL_MEM */ 401#endif /* CONFIG_PPC_TRANSACTIONAL_MEM */
@@ -423,7 +423,7 @@ static int save_user_regs(struct pt_regs *regs, struct mcontext __user *frame,
423 /* save altivec registers */ 423 /* save altivec registers */
424 if (current->thread.used_vr) { 424 if (current->thread.used_vr) {
425 flush_altivec_to_thread(current); 425 flush_altivec_to_thread(current);
426 if (__copy_to_user(&frame->mc_vregs, current->thread.vr, 426 if (__copy_to_user(&frame->mc_vregs, &current->thread.vr_state,
427 ELF_NVRREG * sizeof(vector128))) 427 ELF_NVRREG * sizeof(vector128)))
428 return 1; 428 return 1;
429 /* set MSR_VEC in the saved MSR value to indicate that 429 /* set MSR_VEC in the saved MSR value to indicate that
@@ -534,17 +534,17 @@ static int save_tm_user_regs(struct pt_regs *regs,
534 /* save altivec registers */ 534 /* save altivec registers */
535 if (current->thread.used_vr) { 535 if (current->thread.used_vr) {
536 flush_altivec_to_thread(current); 536 flush_altivec_to_thread(current);
537 if (__copy_to_user(&frame->mc_vregs, current->thread.vr, 537 if (__copy_to_user(&frame->mc_vregs, &current->thread.vr_state,
538 ELF_NVRREG * sizeof(vector128))) 538 ELF_NVRREG * sizeof(vector128)))
539 return 1; 539 return 1;
540 if (msr & MSR_VEC) { 540 if (msr & MSR_VEC) {
541 if (__copy_to_user(&tm_frame->mc_vregs, 541 if (__copy_to_user(&tm_frame->mc_vregs,
542 current->thread.transact_vr, 542 &current->thread.transact_vr,
543 ELF_NVRREG * sizeof(vector128))) 543 ELF_NVRREG * sizeof(vector128)))
544 return 1; 544 return 1;
545 } else { 545 } else {
546 if (__copy_to_user(&tm_frame->mc_vregs, 546 if (__copy_to_user(&tm_frame->mc_vregs,
547 current->thread.vr, 547 &current->thread.vr_state,
548 ELF_NVRREG * sizeof(vector128))) 548 ELF_NVRREG * sizeof(vector128)))
549 return 1; 549 return 1;
550 } 550 }
@@ -692,11 +692,12 @@ static long restore_user_regs(struct pt_regs *regs,
692 regs->msr &= ~MSR_VEC; 692 regs->msr &= ~MSR_VEC;
693 if (msr & MSR_VEC) { 693 if (msr & MSR_VEC) {
694 /* restore altivec registers from the stack */ 694 /* restore altivec registers from the stack */
695 if (__copy_from_user(current->thread.vr, &sr->mc_vregs, 695 if (__copy_from_user(&current->thread.vr_state, &sr->mc_vregs,
696 sizeof(sr->mc_vregs))) 696 sizeof(sr->mc_vregs)))
697 return 1; 697 return 1;
698 } else if (current->thread.used_vr) 698 } else if (current->thread.used_vr)
699 memset(current->thread.vr, 0, ELF_NVRREG * sizeof(vector128)); 699 memset(&current->thread.vr_state, 0,
700 ELF_NVRREG * sizeof(vector128));
700 701
701 /* Always get VRSAVE back */ 702 /* Always get VRSAVE back */
702 if (__get_user(current->thread.vrsave, (u32 __user *)&sr->mc_vregs[32])) 703 if (__get_user(current->thread.vrsave, (u32 __user *)&sr->mc_vregs[32]))
@@ -722,7 +723,7 @@ static long restore_user_regs(struct pt_regs *regs,
722 return 1; 723 return 1;
723 } else if (current->thread.used_vsr) 724 } else if (current->thread.used_vsr)
724 for (i = 0; i < 32 ; i++) 725 for (i = 0; i < 32 ; i++)
725 current->thread.fpr[i][TS_VSRLOWOFFSET] = 0; 726 current->thread.fp_state.fpr[i][TS_VSRLOWOFFSET] = 0;
726#endif /* CONFIG_VSX */ 727#endif /* CONFIG_VSX */
727 /* 728 /*
728 * force the process to reload the FP registers from 729 * force the process to reload the FP registers from
@@ -798,15 +799,16 @@ static long restore_tm_user_regs(struct pt_regs *regs,
798 regs->msr &= ~MSR_VEC; 799 regs->msr &= ~MSR_VEC;
799 if (msr & MSR_VEC) { 800 if (msr & MSR_VEC) {
800 /* restore altivec registers from the stack */ 801 /* restore altivec registers from the stack */
801 if (__copy_from_user(current->thread.vr, &sr->mc_vregs, 802 if (__copy_from_user(&current->thread.vr_state, &sr->mc_vregs,
802 sizeof(sr->mc_vregs)) || 803 sizeof(sr->mc_vregs)) ||
803 __copy_from_user(current->thread.transact_vr, 804 __copy_from_user(&current->thread.transact_vr,
804 &tm_sr->mc_vregs, 805 &tm_sr->mc_vregs,
805 sizeof(sr->mc_vregs))) 806 sizeof(sr->mc_vregs)))
806 return 1; 807 return 1;
807 } else if (current->thread.used_vr) { 808 } else if (current->thread.used_vr) {
808 memset(current->thread.vr, 0, ELF_NVRREG * sizeof(vector128)); 809 memset(&current->thread.vr_state, 0,
809 memset(current->thread.transact_vr, 0, 810 ELF_NVRREG * sizeof(vector128));
811 memset(&current->thread.transact_vr, 0,
810 ELF_NVRREG * sizeof(vector128)); 812 ELF_NVRREG * sizeof(vector128));
811 } 813 }
812 814
@@ -838,8 +840,8 @@ static long restore_tm_user_regs(struct pt_regs *regs,
838 return 1; 840 return 1;
839 } else if (current->thread.used_vsr) 841 } else if (current->thread.used_vsr)
840 for (i = 0; i < 32 ; i++) { 842 for (i = 0; i < 32 ; i++) {
841 current->thread.fpr[i][TS_VSRLOWOFFSET] = 0; 843 current->thread.fp_state.fpr[i][TS_VSRLOWOFFSET] = 0;
842 current->thread.transact_fpr[i][TS_VSRLOWOFFSET] = 0; 844 current->thread.transact_fp.fpr[i][TS_VSRLOWOFFSET] = 0;
843 } 845 }
844#endif /* CONFIG_VSX */ 846#endif /* CONFIG_VSX */
845 847
@@ -1030,7 +1032,7 @@ int handle_rt_signal32(unsigned long sig, struct k_sigaction *ka,
1030 if (__put_user(0, &rt_sf->uc.uc_link)) 1032 if (__put_user(0, &rt_sf->uc.uc_link))
1031 goto badframe; 1033 goto badframe;
1032 1034
1033 current->thread.fpscr.val = 0; /* turn off all fp exceptions */ 1035 current->thread.fp_state.fpscr = 0; /* turn off all fp exceptions */
1034 1036
1035 /* create a stack frame for the caller of the handler */ 1037 /* create a stack frame for the caller of the handler */
1036 newsp = ((unsigned long)rt_sf) - (__SIGNAL_FRAMESIZE + 16); 1038 newsp = ((unsigned long)rt_sf) - (__SIGNAL_FRAMESIZE + 16);
@@ -1045,8 +1047,9 @@ int handle_rt_signal32(unsigned long sig, struct k_sigaction *ka,
1045 regs->gpr[5] = (unsigned long) &rt_sf->uc; 1047 regs->gpr[5] = (unsigned long) &rt_sf->uc;
1046 regs->gpr[6] = (unsigned long) rt_sf; 1048 regs->gpr[6] = (unsigned long) rt_sf;
1047 regs->nip = (unsigned long) ka->sa.sa_handler; 1049 regs->nip = (unsigned long) ka->sa.sa_handler;
1048 /* enter the signal handler in big-endian mode */ 1050 /* enter the signal handler in native-endian mode */
1049 regs->msr &= ~MSR_LE; 1051 regs->msr &= ~MSR_LE;
1052 regs->msr |= (MSR_KERNEL & MSR_LE);
1050#ifdef CONFIG_PPC_TRANSACTIONAL_MEM 1053#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1051 /* Remove TM bits from thread's MSR. The MSR in the sigcontext 1054 /* Remove TM bits from thread's MSR. The MSR in the sigcontext
1052 * just indicates to userland that we were doing a transaction, but we 1055 * just indicates to userland that we were doing a transaction, but we
@@ -1309,7 +1312,7 @@ int sys_debug_setcontext(struct ucontext __user *ctx,
1309 unsigned char tmp; 1312 unsigned char tmp;
1310 unsigned long new_msr = regs->msr; 1313 unsigned long new_msr = regs->msr;
1311#ifdef CONFIG_PPC_ADV_DEBUG_REGS 1314#ifdef CONFIG_PPC_ADV_DEBUG_REGS
1312 unsigned long new_dbcr0 = current->thread.dbcr0; 1315 unsigned long new_dbcr0 = current->thread.debug.dbcr0;
1313#endif 1316#endif
1314 1317
1315 for (i=0; i<ndbg; i++) { 1318 for (i=0; i<ndbg; i++) {
@@ -1324,7 +1327,7 @@ int sys_debug_setcontext(struct ucontext __user *ctx,
1324 } else { 1327 } else {
1325 new_dbcr0 &= ~DBCR0_IC; 1328 new_dbcr0 &= ~DBCR0_IC;
1326 if (!DBCR_ACTIVE_EVENTS(new_dbcr0, 1329 if (!DBCR_ACTIVE_EVENTS(new_dbcr0,
1327 current->thread.dbcr1)) { 1330 current->thread.debug.dbcr1)) {
1328 new_msr &= ~MSR_DE; 1331 new_msr &= ~MSR_DE;
1329 new_dbcr0 &= ~DBCR0_IDM; 1332 new_dbcr0 &= ~DBCR0_IDM;
1330 } 1333 }
@@ -1359,7 +1362,7 @@ int sys_debug_setcontext(struct ucontext __user *ctx,
1359 the user is really doing something wrong. */ 1362 the user is really doing something wrong. */
1360 regs->msr = new_msr; 1363 regs->msr = new_msr;
1361#ifdef CONFIG_PPC_ADV_DEBUG_REGS 1364#ifdef CONFIG_PPC_ADV_DEBUG_REGS
1362 current->thread.dbcr0 = new_dbcr0; 1365 current->thread.debug.dbcr0 = new_dbcr0;
1363#endif 1366#endif
1364 1367
1365 if (!access_ok(VERIFY_READ, ctx, sizeof(*ctx)) 1368 if (!access_ok(VERIFY_READ, ctx, sizeof(*ctx))
@@ -1462,7 +1465,7 @@ int handle_signal32(unsigned long sig, struct k_sigaction *ka,
1462 1465
1463 regs->link = tramp; 1466 regs->link = tramp;
1464 1467
1465 current->thread.fpscr.val = 0; /* turn off all fp exceptions */ 1468 current->thread.fp_state.fpscr = 0; /* turn off all fp exceptions */
1466 1469
1467 /* create a stack frame for the caller of the handler */ 1470 /* create a stack frame for the caller of the handler */
1468 newsp = ((unsigned long)frame) - __SIGNAL_FRAMESIZE; 1471 newsp = ((unsigned long)frame) - __SIGNAL_FRAMESIZE;
diff --git a/arch/powerpc/kernel/signal_64.c b/arch/powerpc/kernel/signal_64.c
index f93ec2835a13..b3c615764c9b 100644
--- a/arch/powerpc/kernel/signal_64.c
+++ b/arch/powerpc/kernel/signal_64.c
@@ -103,7 +103,8 @@ static long setup_sigcontext(struct sigcontext __user *sc, struct pt_regs *regs,
103 if (current->thread.used_vr) { 103 if (current->thread.used_vr) {
104 flush_altivec_to_thread(current); 104 flush_altivec_to_thread(current);
105 /* Copy 33 vec registers (vr0..31 and vscr) to the stack */ 105 /* Copy 33 vec registers (vr0..31 and vscr) to the stack */
106 err |= __copy_to_user(v_regs, current->thread.vr, 33 * sizeof(vector128)); 106 err |= __copy_to_user(v_regs, &current->thread.vr_state,
107 33 * sizeof(vector128));
107 /* set MSR_VEC in the MSR value in the frame to indicate that sc->v_reg) 108 /* set MSR_VEC in the MSR value in the frame to indicate that sc->v_reg)
108 * contains valid data. 109 * contains valid data.
109 */ 110 */
@@ -195,18 +196,18 @@ static long setup_tm_sigcontexts(struct sigcontext __user *sc,
195 if (current->thread.used_vr) { 196 if (current->thread.used_vr) {
196 flush_altivec_to_thread(current); 197 flush_altivec_to_thread(current);
197 /* Copy 33 vec registers (vr0..31 and vscr) to the stack */ 198 /* Copy 33 vec registers (vr0..31 and vscr) to the stack */
198 err |= __copy_to_user(v_regs, current->thread.vr, 199 err |= __copy_to_user(v_regs, &current->thread.vr_state,
199 33 * sizeof(vector128)); 200 33 * sizeof(vector128));
200 /* If VEC was enabled there are transactional VRs valid too, 201 /* If VEC was enabled there are transactional VRs valid too,
201 * else they're a copy of the checkpointed VRs. 202 * else they're a copy of the checkpointed VRs.
202 */ 203 */
203 if (msr & MSR_VEC) 204 if (msr & MSR_VEC)
204 err |= __copy_to_user(tm_v_regs, 205 err |= __copy_to_user(tm_v_regs,
205 current->thread.transact_vr, 206 &current->thread.transact_vr,
206 33 * sizeof(vector128)); 207 33 * sizeof(vector128));
207 else 208 else
208 err |= __copy_to_user(tm_v_regs, 209 err |= __copy_to_user(tm_v_regs,
209 current->thread.vr, 210 &current->thread.vr_state,
210 33 * sizeof(vector128)); 211 33 * sizeof(vector128));
211 212
212 /* set MSR_VEC in the MSR value in the frame to indicate 213 /* set MSR_VEC in the MSR value in the frame to indicate
@@ -349,10 +350,10 @@ static long restore_sigcontext(struct pt_regs *regs, sigset_t *set, int sig,
349 return -EFAULT; 350 return -EFAULT;
350 /* Copy 33 vec registers (vr0..31 and vscr) from the stack */ 351 /* Copy 33 vec registers (vr0..31 and vscr) from the stack */
351 if (v_regs != NULL && (msr & MSR_VEC) != 0) 352 if (v_regs != NULL && (msr & MSR_VEC) != 0)
352 err |= __copy_from_user(current->thread.vr, v_regs, 353 err |= __copy_from_user(&current->thread.vr_state, v_regs,
353 33 * sizeof(vector128)); 354 33 * sizeof(vector128));
354 else if (current->thread.used_vr) 355 else if (current->thread.used_vr)
355 memset(current->thread.vr, 0, 33 * sizeof(vector128)); 356 memset(&current->thread.vr_state, 0, 33 * sizeof(vector128));
356 /* Always get VRSAVE back */ 357 /* Always get VRSAVE back */
357 if (v_regs != NULL) 358 if (v_regs != NULL)
358 err |= __get_user(current->thread.vrsave, (u32 __user *)&v_regs[33]); 359 err |= __get_user(current->thread.vrsave, (u32 __user *)&v_regs[33]);
@@ -374,7 +375,7 @@ static long restore_sigcontext(struct pt_regs *regs, sigset_t *set, int sig,
374 err |= copy_vsx_from_user(current, v_regs); 375 err |= copy_vsx_from_user(current, v_regs);
375 else 376 else
376 for (i = 0; i < 32 ; i++) 377 for (i = 0; i < 32 ; i++)
377 current->thread.fpr[i][TS_VSRLOWOFFSET] = 0; 378 current->thread.fp_state.fpr[i][TS_VSRLOWOFFSET] = 0;
378#endif 379#endif
379 return err; 380 return err;
380} 381}
@@ -468,14 +469,14 @@ static long restore_tm_sigcontexts(struct pt_regs *regs,
468 return -EFAULT; 469 return -EFAULT;
469 /* Copy 33 vec registers (vr0..31 and vscr) from the stack */ 470 /* Copy 33 vec registers (vr0..31 and vscr) from the stack */
470 if (v_regs != NULL && tm_v_regs != NULL && (msr & MSR_VEC) != 0) { 471 if (v_regs != NULL && tm_v_regs != NULL && (msr & MSR_VEC) != 0) {
471 err |= __copy_from_user(current->thread.vr, v_regs, 472 err |= __copy_from_user(&current->thread.vr_state, v_regs,
472 33 * sizeof(vector128)); 473 33 * sizeof(vector128));
473 err |= __copy_from_user(current->thread.transact_vr, tm_v_regs, 474 err |= __copy_from_user(&current->thread.transact_vr, tm_v_regs,
474 33 * sizeof(vector128)); 475 33 * sizeof(vector128));
475 } 476 }
476 else if (current->thread.used_vr) { 477 else if (current->thread.used_vr) {
477 memset(current->thread.vr, 0, 33 * sizeof(vector128)); 478 memset(&current->thread.vr_state, 0, 33 * sizeof(vector128));
478 memset(current->thread.transact_vr, 0, 33 * sizeof(vector128)); 479 memset(&current->thread.transact_vr, 0, 33 * sizeof(vector128));
479 } 480 }
480 /* Always get VRSAVE back */ 481 /* Always get VRSAVE back */
481 if (v_regs != NULL && tm_v_regs != NULL) { 482 if (v_regs != NULL && tm_v_regs != NULL) {
@@ -507,8 +508,8 @@ static long restore_tm_sigcontexts(struct pt_regs *regs,
507 err |= copy_transact_vsx_from_user(current, tm_v_regs); 508 err |= copy_transact_vsx_from_user(current, tm_v_regs);
508 } else { 509 } else {
509 for (i = 0; i < 32 ; i++) { 510 for (i = 0; i < 32 ; i++) {
510 current->thread.fpr[i][TS_VSRLOWOFFSET] = 0; 511 current->thread.fp_state.fpr[i][TS_VSRLOWOFFSET] = 0;
511 current->thread.transact_fpr[i][TS_VSRLOWOFFSET] = 0; 512 current->thread.transact_fp.fpr[i][TS_VSRLOWOFFSET] = 0;
512 } 513 }
513 } 514 }
514#endif 515#endif
@@ -747,7 +748,7 @@ int handle_rt_signal64(int signr, struct k_sigaction *ka, siginfo_t *info,
747 goto badframe; 748 goto badframe;
748 749
749 /* Make sure signal handler doesn't get spurious FP exceptions */ 750 /* Make sure signal handler doesn't get spurious FP exceptions */
750 current->thread.fpscr.val = 0; 751 current->thread.fp_state.fpscr = 0;
751#ifdef CONFIG_PPC_TRANSACTIONAL_MEM 752#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
752 /* Remove TM bits from thread's MSR. The MSR in the sigcontext 753 /* Remove TM bits from thread's MSR. The MSR in the sigcontext
753 * just indicates to userland that we were doing a transaction, but we 754 * just indicates to userland that we were doing a transaction, but we
@@ -773,8 +774,9 @@ int handle_rt_signal64(int signr, struct k_sigaction *ka, siginfo_t *info,
773 774
774 /* Set up "regs" so we "return" to the signal handler. */ 775 /* Set up "regs" so we "return" to the signal handler. */
775 err |= get_user(regs->nip, &funct_desc_ptr->entry); 776 err |= get_user(regs->nip, &funct_desc_ptr->entry);
776 /* enter the signal handler in big-endian mode */ 777 /* enter the signal handler in native-endian mode */
777 regs->msr &= ~MSR_LE; 778 regs->msr &= ~MSR_LE;
779 regs->msr |= (MSR_KERNEL & MSR_LE);
778 regs->gpr[1] = newsp; 780 regs->gpr[1] = newsp;
779 err |= get_user(regs->gpr[2], &funct_desc_ptr->toc); 781 err |= get_user(regs->gpr[2], &funct_desc_ptr->toc);
780 regs->gpr[3] = signr; 782 regs->gpr[3] = signr;
diff --git a/arch/powerpc/kernel/swsusp_asm64.S b/arch/powerpc/kernel/swsusp_asm64.S
index 22045984835f..988f38dced0f 100644
--- a/arch/powerpc/kernel/swsusp_asm64.S
+++ b/arch/powerpc/kernel/swsusp_asm64.S
@@ -114,7 +114,9 @@ _GLOBAL(swsusp_arch_suspend)
114 SAVE_SPECIAL(MSR) 114 SAVE_SPECIAL(MSR)
115 SAVE_SPECIAL(XER) 115 SAVE_SPECIAL(XER)
116#ifdef CONFIG_PPC_BOOK3S_64 116#ifdef CONFIG_PPC_BOOK3S_64
117BEGIN_FW_FTR_SECTION
117 SAVE_SPECIAL(SDR1) 118 SAVE_SPECIAL(SDR1)
119END_FW_FTR_SECTION_IFCLR(FW_FEATURE_LPAR)
118#else 120#else
119 SAVE_SPR(TCR) 121 SAVE_SPR(TCR)
120 122
@@ -231,7 +233,9 @@ nothing_to_copy:
231 /* can't use RESTORE_SPECIAL(MSR) */ 233 /* can't use RESTORE_SPECIAL(MSR) */
232 ld r0, SL_MSR(r11) 234 ld r0, SL_MSR(r11)
233 mtmsrd r0, 0 235 mtmsrd r0, 0
236BEGIN_FW_FTR_SECTION
234 RESTORE_SPECIAL(SDR1) 237 RESTORE_SPECIAL(SDR1)
238END_FW_FTR_SECTION_IFCLR(FW_FEATURE_LPAR)
235#else 239#else
236 /* Restore SPRG1, be used to save paca */ 240 /* Restore SPRG1, be used to save paca */
237 ld r0, SL_SPRG1(r11) 241 ld r0, SL_SPRG1(r11)
diff --git a/arch/powerpc/kernel/tm.S b/arch/powerpc/kernel/tm.S
index cd809eaa8b5c..ef47bcbd4352 100644
--- a/arch/powerpc/kernel/tm.S
+++ b/arch/powerpc/kernel/tm.S
@@ -12,16 +12,15 @@
12#include <asm/reg.h> 12#include <asm/reg.h>
13 13
14#ifdef CONFIG_VSX 14#ifdef CONFIG_VSX
15/* See fpu.S, this is very similar but to save/restore checkpointed FPRs/VSRs */ 15/* See fpu.S, this is borrowed from there */
16#define __SAVE_32FPRS_VSRS_TRANSACT(n,c,base) \ 16#define __SAVE_32FPRS_VSRS(n,c,base) \
17BEGIN_FTR_SECTION \ 17BEGIN_FTR_SECTION \
18 b 2f; \ 18 b 2f; \
19END_FTR_SECTION_IFSET(CPU_FTR_VSX); \ 19END_FTR_SECTION_IFSET(CPU_FTR_VSX); \
20 SAVE_32FPRS_TRANSACT(n,base); \ 20 SAVE_32FPRS(n,base); \
21 b 3f; \ 21 b 3f; \
222: SAVE_32VSRS_TRANSACT(n,c,base); \ 222: SAVE_32VSRS(n,c,base); \
233: 233:
24/* ...and this is just plain borrowed from there. */
25#define __REST_32FPRS_VSRS(n,c,base) \ 24#define __REST_32FPRS_VSRS(n,c,base) \
26BEGIN_FTR_SECTION \ 25BEGIN_FTR_SECTION \
27 b 2f; \ 26 b 2f; \
@@ -31,11 +30,11 @@ END_FTR_SECTION_IFSET(CPU_FTR_VSX); \
312: REST_32VSRS(n,c,base); \ 302: REST_32VSRS(n,c,base); \
323: 313:
33#else 32#else
34#define __SAVE_32FPRS_VSRS_TRANSACT(n,c,base) SAVE_32FPRS_TRANSACT(n, base) 33#define __SAVE_32FPRS_VSRS(n,c,base) SAVE_32FPRS(n, base)
35#define __REST_32FPRS_VSRS(n,c,base) REST_32FPRS(n, base) 34#define __REST_32FPRS_VSRS(n,c,base) REST_32FPRS(n, base)
36#endif 35#endif
37#define SAVE_32FPRS_VSRS_TRANSACT(n,c,base) \ 36#define SAVE_32FPRS_VSRS(n,c,base) \
38 __SAVE_32FPRS_VSRS_TRANSACT(n,__REG_##c,__REG_##base) 37 __SAVE_32FPRS_VSRS(n,__REG_##c,__REG_##base)
39#define REST_32FPRS_VSRS(n,c,base) \ 38#define REST_32FPRS_VSRS(n,c,base) \
40 __REST_32FPRS_VSRS(n,__REG_##c,__REG_##base) 39 __REST_32FPRS_VSRS(n,__REG_##c,__REG_##base)
41 40
@@ -107,7 +106,7 @@ DSCR_DEFAULT:
107_GLOBAL(tm_reclaim) 106_GLOBAL(tm_reclaim)
108 mfcr r6 107 mfcr r6
109 mflr r0 108 mflr r0
110 std r6, 8(r1) 109 stw r6, 8(r1)
111 std r0, 16(r1) 110 std r0, 16(r1)
112 std r2, 40(r1) 111 std r2, 40(r1)
113 stdu r1, -TM_FRAME_SIZE(r1) 112 stdu r1, -TM_FRAME_SIZE(r1)
@@ -157,10 +156,11 @@ _GLOBAL(tm_reclaim)
157 andis. r0, r4, MSR_VEC@h 156 andis. r0, r4, MSR_VEC@h
158 beq dont_backup_vec 157 beq dont_backup_vec
159 158
160 SAVE_32VRS_TRANSACT(0, r6, r3) /* r6 scratch, r3 thread */ 159 addi r7, r3, THREAD_TRANSACT_VRSTATE
160 SAVE_32VRS(0, r6, r7) /* r6 scratch, r7 transact vr state */
161 mfvscr vr0 161 mfvscr vr0
162 li r6, THREAD_TRANSACT_VSCR 162 li r6, VRSTATE_VSCR
163 stvx vr0, r3, r6 163 stvx vr0, r7, r6
164dont_backup_vec: 164dont_backup_vec:
165 mfspr r0, SPRN_VRSAVE 165 mfspr r0, SPRN_VRSAVE
166 std r0, THREAD_TRANSACT_VRSAVE(r3) 166 std r0, THREAD_TRANSACT_VRSAVE(r3)
@@ -168,10 +168,11 @@ dont_backup_vec:
168 andi. r0, r4, MSR_FP 168 andi. r0, r4, MSR_FP
169 beq dont_backup_fp 169 beq dont_backup_fp
170 170
171 SAVE_32FPRS_VSRS_TRANSACT(0, R6, R3) /* r6 scratch, r3 thread */ 171 addi r7, r3, THREAD_TRANSACT_FPSTATE
172 SAVE_32FPRS_VSRS(0, R6, R7) /* r6 scratch, r7 transact fp state */
172 173
173 mffs fr0 174 mffs fr0
174 stfd fr0,THREAD_TRANSACT_FPSCR(r3) 175 stfd fr0,FPSTATE_FPSCR(r7)
175 176
176dont_backup_fp: 177dont_backup_fp:
177 /* The moment we treclaim, ALL of our GPRs will switch 178 /* The moment we treclaim, ALL of our GPRs will switch
@@ -284,7 +285,7 @@ dont_backup_fp:
284 REST_NVGPRS(r1) 285 REST_NVGPRS(r1)
285 286
286 addi r1, r1, TM_FRAME_SIZE 287 addi r1, r1, TM_FRAME_SIZE
287 ld r4, 8(r1) 288 lwz r4, 8(r1)
288 ld r0, 16(r1) 289 ld r0, 16(r1)
289 mtcr r4 290 mtcr r4
290 mtlr r0 291 mtlr r0
@@ -309,7 +310,7 @@ dont_backup_fp:
309_GLOBAL(tm_recheckpoint) 310_GLOBAL(tm_recheckpoint)
310 mfcr r5 311 mfcr r5
311 mflr r0 312 mflr r0
312 std r5, 8(r1) 313 stw r5, 8(r1)
313 std r0, 16(r1) 314 std r0, 16(r1)
314 std r2, 40(r1) 315 std r2, 40(r1)
315 stdu r1, -TM_FRAME_SIZE(r1) 316 stdu r1, -TM_FRAME_SIZE(r1)
@@ -358,10 +359,11 @@ _GLOBAL(tm_recheckpoint)
358 andis. r0, r4, MSR_VEC@h 359 andis. r0, r4, MSR_VEC@h
359 beq dont_restore_vec 360 beq dont_restore_vec
360 361
361 li r5, THREAD_VSCR 362 addi r8, r3, THREAD_VRSTATE
362 lvx vr0, r3, r5 363 li r5, VRSTATE_VSCR
364 lvx vr0, r8, r5
363 mtvscr vr0 365 mtvscr vr0
364 REST_32VRS(0, r5, r3) /* r5 scratch, r3 THREAD ptr */ 366 REST_32VRS(0, r5, r8) /* r5 scratch, r8 ptr */
365dont_restore_vec: 367dont_restore_vec:
366 ld r5, THREAD_VRSAVE(r3) 368 ld r5, THREAD_VRSAVE(r3)
367 mtspr SPRN_VRSAVE, r5 369 mtspr SPRN_VRSAVE, r5
@@ -370,9 +372,10 @@ dont_restore_vec:
370 andi. r0, r4, MSR_FP 372 andi. r0, r4, MSR_FP
371 beq dont_restore_fp 373 beq dont_restore_fp
372 374
373 lfd fr0, THREAD_FPSCR(r3) 375 addi r8, r3, THREAD_FPSTATE
376 lfd fr0, FPSTATE_FPSCR(r8)
374 MTFSF_L(fr0) 377 MTFSF_L(fr0)
375 REST_32FPRS_VSRS(0, R4, R3) 378 REST_32FPRS_VSRS(0, R4, R8)
376 379
377dont_restore_fp: 380dont_restore_fp:
378 mtmsr r6 /* FP/Vec off again! */ 381 mtmsr r6 /* FP/Vec off again! */
@@ -441,7 +444,7 @@ restore_gprs:
441 REST_NVGPRS(r1) 444 REST_NVGPRS(r1)
442 445
443 addi r1, r1, TM_FRAME_SIZE 446 addi r1, r1, TM_FRAME_SIZE
444 ld r4, 8(r1) 447 lwz r4, 8(r1)
445 ld r0, 16(r1) 448 ld r0, 16(r1)
446 mtcr r4 449 mtcr r4
447 mtlr r0 450 mtlr r0
diff --git a/arch/powerpc/kernel/traps.c b/arch/powerpc/kernel/traps.c
index f783c932faeb..62c3dd8c69f2 100644
--- a/arch/powerpc/kernel/traps.c
+++ b/arch/powerpc/kernel/traps.c
@@ -351,8 +351,8 @@ static inline int check_io_access(struct pt_regs *regs)
351#define REASON_TRAP ESR_PTR 351#define REASON_TRAP ESR_PTR
352 352
353/* single-step stuff */ 353/* single-step stuff */
354#define single_stepping(regs) (current->thread.dbcr0 & DBCR0_IC) 354#define single_stepping(regs) (current->thread.debug.dbcr0 & DBCR0_IC)
355#define clear_single_step(regs) (current->thread.dbcr0 &= ~DBCR0_IC) 355#define clear_single_step(regs) (current->thread.debug.dbcr0 &= ~DBCR0_IC)
356 356
357#else 357#else
358/* On non-4xx, the reason for the machine check or program 358/* On non-4xx, the reason for the machine check or program
@@ -816,7 +816,7 @@ static void parse_fpe(struct pt_regs *regs)
816 816
817 flush_fp_to_thread(current); 817 flush_fp_to_thread(current);
818 818
819 code = __parse_fpscr(current->thread.fpscr.val); 819 code = __parse_fpscr(current->thread.fp_state.fpscr);
820 820
821 _exception(SIGFPE, regs, code, regs->nip); 821 _exception(SIGFPE, regs, code, regs->nip);
822} 822}
@@ -1018,6 +1018,13 @@ static int emulate_instruction(struct pt_regs *regs)
1018 return emulate_isel(regs, instword); 1018 return emulate_isel(regs, instword);
1019 } 1019 }
1020 1020
1021 /* Emulate sync instruction variants */
1022 if ((instword & PPC_INST_SYNC_MASK) == PPC_INST_SYNC) {
1023 PPC_WARN_EMULATED(sync, regs);
1024 asm volatile("sync");
1025 return 0;
1026 }
1027
1021#ifdef CONFIG_PPC64 1028#ifdef CONFIG_PPC64
1022 /* Emulate the mfspr rD, DSCR. */ 1029 /* Emulate the mfspr rD, DSCR. */
1023 if ((((instword & PPC_INST_MFSPR_DSCR_USER_MASK) == 1030 if ((((instword & PPC_INST_MFSPR_DSCR_USER_MASK) ==
@@ -1069,7 +1076,7 @@ static int emulate_math(struct pt_regs *regs)
1069 return 0; 1076 return 0;
1070 case 1: { 1077 case 1: {
1071 int code = 0; 1078 int code = 0;
1072 code = __parse_fpscr(current->thread.fpscr.val); 1079 code = __parse_fpscr(current->thread.fp_state.fpscr);
1073 _exception(SIGFPE, regs, code, regs->nip); 1080 _exception(SIGFPE, regs, code, regs->nip);
1074 return 0; 1081 return 0;
1075 } 1082 }
@@ -1371,8 +1378,6 @@ void facility_unavailable_exception(struct pt_regs *regs)
1371 1378
1372#ifdef CONFIG_PPC_TRANSACTIONAL_MEM 1379#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1373 1380
1374extern void do_load_up_fpu(struct pt_regs *regs);
1375
1376void fp_unavailable_tm(struct pt_regs *regs) 1381void fp_unavailable_tm(struct pt_regs *regs)
1377{ 1382{
1378 /* Note: This does not handle any kind of FP laziness. */ 1383 /* Note: This does not handle any kind of FP laziness. */
@@ -1403,8 +1408,6 @@ void fp_unavailable_tm(struct pt_regs *regs)
1403} 1408}
1404 1409
1405#ifdef CONFIG_ALTIVEC 1410#ifdef CONFIG_ALTIVEC
1406extern void do_load_up_altivec(struct pt_regs *regs);
1407
1408void altivec_unavailable_tm(struct pt_regs *regs) 1411void altivec_unavailable_tm(struct pt_regs *regs)
1409{ 1412{
1410 /* See the comments in fp_unavailable_tm(). This function operates 1413 /* See the comments in fp_unavailable_tm(). This function operates
@@ -1465,7 +1468,8 @@ void SoftwareEmulation(struct pt_regs *regs)
1465 1468
1466 if (!user_mode(regs)) { 1469 if (!user_mode(regs)) {
1467 debugger(regs); 1470 debugger(regs);
1468 die("Kernel Mode Software FPU Emulation", regs, SIGFPE); 1471 die("Kernel Mode Unimplemented Instruction or SW FPU Emulation",
1472 regs, SIGFPE);
1469 } 1473 }
1470 1474
1471 if (!emulate_math(regs)) 1475 if (!emulate_math(regs))
@@ -1486,7 +1490,7 @@ static void handle_debug(struct pt_regs *regs, unsigned long debug_status)
1486 if (debug_status & (DBSR_DAC1R | DBSR_DAC1W)) { 1490 if (debug_status & (DBSR_DAC1R | DBSR_DAC1W)) {
1487 dbcr_dac(current) &= ~(DBCR_DAC1R | DBCR_DAC1W); 1491 dbcr_dac(current) &= ~(DBCR_DAC1R | DBCR_DAC1W);
1488#ifdef CONFIG_PPC_ADV_DEBUG_DAC_RANGE 1492#ifdef CONFIG_PPC_ADV_DEBUG_DAC_RANGE
1489 current->thread.dbcr2 &= ~DBCR2_DAC12MODE; 1493 current->thread.debug.dbcr2 &= ~DBCR2_DAC12MODE;
1490#endif 1494#endif
1491 do_send_trap(regs, mfspr(SPRN_DAC1), debug_status, TRAP_HWBKPT, 1495 do_send_trap(regs, mfspr(SPRN_DAC1), debug_status, TRAP_HWBKPT,
1492 5); 1496 5);
@@ -1497,24 +1501,24 @@ static void handle_debug(struct pt_regs *regs, unsigned long debug_status)
1497 6); 1501 6);
1498 changed |= 0x01; 1502 changed |= 0x01;
1499 } else if (debug_status & DBSR_IAC1) { 1503 } else if (debug_status & DBSR_IAC1) {
1500 current->thread.dbcr0 &= ~DBCR0_IAC1; 1504 current->thread.debug.dbcr0 &= ~DBCR0_IAC1;
1501 dbcr_iac_range(current) &= ~DBCR_IAC12MODE; 1505 dbcr_iac_range(current) &= ~DBCR_IAC12MODE;
1502 do_send_trap(regs, mfspr(SPRN_IAC1), debug_status, TRAP_HWBKPT, 1506 do_send_trap(regs, mfspr(SPRN_IAC1), debug_status, TRAP_HWBKPT,
1503 1); 1507 1);
1504 changed |= 0x01; 1508 changed |= 0x01;
1505 } else if (debug_status & DBSR_IAC2) { 1509 } else if (debug_status & DBSR_IAC2) {
1506 current->thread.dbcr0 &= ~DBCR0_IAC2; 1510 current->thread.debug.dbcr0 &= ~DBCR0_IAC2;
1507 do_send_trap(regs, mfspr(SPRN_IAC2), debug_status, TRAP_HWBKPT, 1511 do_send_trap(regs, mfspr(SPRN_IAC2), debug_status, TRAP_HWBKPT,
1508 2); 1512 2);
1509 changed |= 0x01; 1513 changed |= 0x01;
1510 } else if (debug_status & DBSR_IAC3) { 1514 } else if (debug_status & DBSR_IAC3) {
1511 current->thread.dbcr0 &= ~DBCR0_IAC3; 1515 current->thread.debug.dbcr0 &= ~DBCR0_IAC3;
1512 dbcr_iac_range(current) &= ~DBCR_IAC34MODE; 1516 dbcr_iac_range(current) &= ~DBCR_IAC34MODE;
1513 do_send_trap(regs, mfspr(SPRN_IAC3), debug_status, TRAP_HWBKPT, 1517 do_send_trap(regs, mfspr(SPRN_IAC3), debug_status, TRAP_HWBKPT,
1514 3); 1518 3);
1515 changed |= 0x01; 1519 changed |= 0x01;
1516 } else if (debug_status & DBSR_IAC4) { 1520 } else if (debug_status & DBSR_IAC4) {
1517 current->thread.dbcr0 &= ~DBCR0_IAC4; 1521 current->thread.debug.dbcr0 &= ~DBCR0_IAC4;
1518 do_send_trap(regs, mfspr(SPRN_IAC4), debug_status, TRAP_HWBKPT, 1522 do_send_trap(regs, mfspr(SPRN_IAC4), debug_status, TRAP_HWBKPT,
1519 4); 1523 4);
1520 changed |= 0x01; 1524 changed |= 0x01;
@@ -1524,19 +1528,20 @@ static void handle_debug(struct pt_regs *regs, unsigned long debug_status)
1524 * Check all other debug flags and see if that bit needs to be turned 1528 * Check all other debug flags and see if that bit needs to be turned
1525 * back on or not. 1529 * back on or not.
1526 */ 1530 */
1527 if (DBCR_ACTIVE_EVENTS(current->thread.dbcr0, current->thread.dbcr1)) 1531 if (DBCR_ACTIVE_EVENTS(current->thread.debug.dbcr0,
1532 current->thread.debug.dbcr1))
1528 regs->msr |= MSR_DE; 1533 regs->msr |= MSR_DE;
1529 else 1534 else
1530 /* Make sure the IDM flag is off */ 1535 /* Make sure the IDM flag is off */
1531 current->thread.dbcr0 &= ~DBCR0_IDM; 1536 current->thread.debug.dbcr0 &= ~DBCR0_IDM;
1532 1537
1533 if (changed & 0x01) 1538 if (changed & 0x01)
1534 mtspr(SPRN_DBCR0, current->thread.dbcr0); 1539 mtspr(SPRN_DBCR0, current->thread.debug.dbcr0);
1535} 1540}
1536 1541
1537void __kprobes DebugException(struct pt_regs *regs, unsigned long debug_status) 1542void __kprobes DebugException(struct pt_regs *regs, unsigned long debug_status)
1538{ 1543{
1539 current->thread.dbsr = debug_status; 1544 current->thread.debug.dbsr = debug_status;
1540 1545
1541 /* Hack alert: On BookE, Branch Taken stops on the branch itself, while 1546 /* Hack alert: On BookE, Branch Taken stops on the branch itself, while
1542 * on server, it stops on the target of the branch. In order to simulate 1547 * on server, it stops on the target of the branch. In order to simulate
@@ -1553,8 +1558,8 @@ void __kprobes DebugException(struct pt_regs *regs, unsigned long debug_status)
1553 1558
1554 /* Do the single step trick only when coming from userspace */ 1559 /* Do the single step trick only when coming from userspace */
1555 if (user_mode(regs)) { 1560 if (user_mode(regs)) {
1556 current->thread.dbcr0 &= ~DBCR0_BT; 1561 current->thread.debug.dbcr0 &= ~DBCR0_BT;
1557 current->thread.dbcr0 |= DBCR0_IDM | DBCR0_IC; 1562 current->thread.debug.dbcr0 |= DBCR0_IDM | DBCR0_IC;
1558 regs->msr |= MSR_DE; 1563 regs->msr |= MSR_DE;
1559 return; 1564 return;
1560 } 1565 }
@@ -1582,13 +1587,13 @@ void __kprobes DebugException(struct pt_regs *regs, unsigned long debug_status)
1582 return; 1587 return;
1583 1588
1584 if (user_mode(regs)) { 1589 if (user_mode(regs)) {
1585 current->thread.dbcr0 &= ~DBCR0_IC; 1590 current->thread.debug.dbcr0 &= ~DBCR0_IC;
1586 if (DBCR_ACTIVE_EVENTS(current->thread.dbcr0, 1591 if (DBCR_ACTIVE_EVENTS(current->thread.debug.dbcr0,
1587 current->thread.dbcr1)) 1592 current->thread.debug.dbcr1))
1588 regs->msr |= MSR_DE; 1593 regs->msr |= MSR_DE;
1589 else 1594 else
1590 /* Make sure the IDM bit is off */ 1595 /* Make sure the IDM bit is off */
1591 current->thread.dbcr0 &= ~DBCR0_IDM; 1596 current->thread.debug.dbcr0 &= ~DBCR0_IDM;
1592 } 1597 }
1593 1598
1594 _exception(SIGTRAP, regs, TRAP_TRACE, regs->nip); 1599 _exception(SIGTRAP, regs, TRAP_TRACE, regs->nip);
@@ -1634,7 +1639,7 @@ void altivec_assist_exception(struct pt_regs *regs)
1634 /* XXX quick hack for now: set the non-Java bit in the VSCR */ 1639 /* XXX quick hack for now: set the non-Java bit in the VSCR */
1635 printk_ratelimited(KERN_ERR "Unrecognized altivec instruction " 1640 printk_ratelimited(KERN_ERR "Unrecognized altivec instruction "
1636 "in %s at %lx\n", current->comm, regs->nip); 1641 "in %s at %lx\n", current->comm, regs->nip);
1637 current->thread.vscr.u[3] |= 0x10000; 1642 current->thread.vr_state.vscr.u[3] |= 0x10000;
1638 } 1643 }
1639} 1644}
1640#endif /* CONFIG_ALTIVEC */ 1645#endif /* CONFIG_ALTIVEC */
@@ -1815,6 +1820,7 @@ struct ppc_emulated ppc_emulated = {
1815 WARN_EMULATED_SETUP(popcntb), 1820 WARN_EMULATED_SETUP(popcntb),
1816 WARN_EMULATED_SETUP(spe), 1821 WARN_EMULATED_SETUP(spe),
1817 WARN_EMULATED_SETUP(string), 1822 WARN_EMULATED_SETUP(string),
1823 WARN_EMULATED_SETUP(sync),
1818 WARN_EMULATED_SETUP(unaligned), 1824 WARN_EMULATED_SETUP(unaligned),
1819#ifdef CONFIG_MATH_EMULATION 1825#ifdef CONFIG_MATH_EMULATION
1820 WARN_EMULATED_SETUP(math), 1826 WARN_EMULATED_SETUP(math),
diff --git a/arch/powerpc/kernel/vdso.c b/arch/powerpc/kernel/vdso.c
index 1d9c92621b36..094e45c16a17 100644
--- a/arch/powerpc/kernel/vdso.c
+++ b/arch/powerpc/kernel/vdso.c
@@ -34,8 +34,7 @@
34#include <asm/firmware.h> 34#include <asm/firmware.h>
35#include <asm/vdso.h> 35#include <asm/vdso.h>
36#include <asm/vdso_datapage.h> 36#include <asm/vdso_datapage.h>
37 37#include <asm/setup.h>
38#include "setup.h"
39 38
40#undef DEBUG 39#undef DEBUG
41 40
diff --git a/arch/powerpc/kernel/vdso32/vdso32.lds.S b/arch/powerpc/kernel/vdso32/vdso32.lds.S
index f223409629b9..e58ee10fa5c0 100644
--- a/arch/powerpc/kernel/vdso32/vdso32.lds.S
+++ b/arch/powerpc/kernel/vdso32/vdso32.lds.S
@@ -4,7 +4,11 @@
4 */ 4 */
5#include <asm/vdso.h> 5#include <asm/vdso.h>
6 6
7#ifdef __LITTLE_ENDIAN__
8OUTPUT_FORMAT("elf32-powerpcle", "elf32-powerpcle", "elf32-powerpcle")
9#else
7OUTPUT_FORMAT("elf32-powerpc", "elf32-powerpc", "elf32-powerpc") 10OUTPUT_FORMAT("elf32-powerpc", "elf32-powerpc", "elf32-powerpc")
11#endif
8OUTPUT_ARCH(powerpc:common) 12OUTPUT_ARCH(powerpc:common)
9ENTRY(_start) 13ENTRY(_start)
10 14
diff --git a/arch/powerpc/kernel/vdso64/vdso64.lds.S b/arch/powerpc/kernel/vdso64/vdso64.lds.S
index e4863819663b..64fb183a47c2 100644
--- a/arch/powerpc/kernel/vdso64/vdso64.lds.S
+++ b/arch/powerpc/kernel/vdso64/vdso64.lds.S
@@ -4,7 +4,11 @@
4 */ 4 */
5#include <asm/vdso.h> 5#include <asm/vdso.h>
6 6
7#ifdef __LITTLE_ENDIAN__
8OUTPUT_FORMAT("elf64-powerpcle", "elf64-powerpcle", "elf64-powerpcle")
9#else
7OUTPUT_FORMAT("elf64-powerpc", "elf64-powerpc", "elf64-powerpc") 10OUTPUT_FORMAT("elf64-powerpc", "elf64-powerpc", "elf64-powerpc")
11#endif
8OUTPUT_ARCH(powerpc:common64) 12OUTPUT_ARCH(powerpc:common64)
9ENTRY(_start) 13ENTRY(_start)
10 14
diff --git a/arch/powerpc/kernel/vecemu.c b/arch/powerpc/kernel/vecemu.c
index 604d0947cb20..c4bfadb2606b 100644
--- a/arch/powerpc/kernel/vecemu.c
+++ b/arch/powerpc/kernel/vecemu.c
@@ -271,7 +271,7 @@ int emulate_altivec(struct pt_regs *regs)
271 vb = (instr >> 11) & 0x1f; 271 vb = (instr >> 11) & 0x1f;
272 vc = (instr >> 6) & 0x1f; 272 vc = (instr >> 6) & 0x1f;
273 273
274 vrs = current->thread.vr; 274 vrs = current->thread.vr_state.vr;
275 switch (instr & 0x3f) { 275 switch (instr & 0x3f) {
276 case 10: 276 case 10:
277 switch (vc) { 277 switch (vc) {
@@ -320,12 +320,12 @@ int emulate_altivec(struct pt_regs *regs)
320 case 14: /* vctuxs */ 320 case 14: /* vctuxs */
321 for (i = 0; i < 4; ++i) 321 for (i = 0; i < 4; ++i)
322 vrs[vd].u[i] = ctuxs(vrs[vb].u[i], va, 322 vrs[vd].u[i] = ctuxs(vrs[vb].u[i], va,
323 &current->thread.vscr.u[3]); 323 &current->thread.vr_state.vscr.u[3]);
324 break; 324 break;
325 case 15: /* vctsxs */ 325 case 15: /* vctsxs */
326 for (i = 0; i < 4; ++i) 326 for (i = 0; i < 4; ++i)
327 vrs[vd].u[i] = ctsxs(vrs[vb].u[i], va, 327 vrs[vd].u[i] = ctsxs(vrs[vb].u[i], va,
328 &current->thread.vscr.u[3]); 328 &current->thread.vr_state.vscr.u[3]);
329 break; 329 break;
330 default: 330 default:
331 return -EINVAL; 331 return -EINVAL;
diff --git a/arch/powerpc/kernel/vector.S b/arch/powerpc/kernel/vector.S
index 9e20999aaef2..0458a9aaba9d 100644
--- a/arch/powerpc/kernel/vector.S
+++ b/arch/powerpc/kernel/vector.S
@@ -8,29 +8,6 @@
8#include <asm/ptrace.h> 8#include <asm/ptrace.h>
9 9
10#ifdef CONFIG_PPC_TRANSACTIONAL_MEM 10#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
11/*
12 * Wrapper to call load_up_altivec from C.
13 * void do_load_up_altivec(struct pt_regs *regs);
14 */
15_GLOBAL(do_load_up_altivec)
16 mflr r0
17 std r0, 16(r1)
18 stdu r1, -112(r1)
19
20 subi r6, r3, STACK_FRAME_OVERHEAD
21 /* load_up_altivec expects r12=MSR, r13=PACA, and returns
22 * with r12 = new MSR.
23 */
24 ld r12,_MSR(r6)
25 GET_PACA(r13)
26 bl load_up_altivec
27 std r12,_MSR(r6)
28
29 ld r0, 112+16(r1)
30 addi r1, r1, 112
31 mtlr r0
32 blr
33
34/* void do_load_up_transact_altivec(struct thread_struct *thread) 11/* void do_load_up_transact_altivec(struct thread_struct *thread)
35 * 12 *
36 * This is similar to load_up_altivec but for the transactional version of the 13 * This is similar to load_up_altivec but for the transactional version of the
@@ -46,10 +23,11 @@ _GLOBAL(do_load_up_transact_altivec)
46 li r4,1 23 li r4,1
47 stw r4,THREAD_USED_VR(r3) 24 stw r4,THREAD_USED_VR(r3)
48 25
49 li r10,THREAD_TRANSACT_VSCR 26 li r10,THREAD_TRANSACT_VRSTATE+VRSTATE_VSCR
50 lvx vr0,r10,r3 27 lvx vr0,r10,r3
51 mtvscr vr0 28 mtvscr vr0
52 REST_32VRS_TRANSACT(0,r4,r3) 29 addi r10,r3,THREAD_TRANSACT_VRSTATE
30 REST_32VRS(0,r4,r10)
53 31
54 /* Disable VEC again. */ 32 /* Disable VEC again. */
55 MTMSRD(r6) 33 MTMSRD(r6)
@@ -59,12 +37,36 @@ _GLOBAL(do_load_up_transact_altivec)
59#endif 37#endif
60 38
61/* 39/*
62 * load_up_altivec(unused, unused, tsk) 40 * Load state from memory into VMX registers including VSCR.
41 * Assumes the caller has enabled VMX in the MSR.
42 */
43_GLOBAL(load_vr_state)
44 li r4,VRSTATE_VSCR
45 lvx vr0,r4,r3
46 mtvscr vr0
47 REST_32VRS(0,r4,r3)
48 blr
49
50/*
51 * Store VMX state into memory, including VSCR.
52 * Assumes the caller has enabled VMX in the MSR.
53 */
54_GLOBAL(store_vr_state)
55 SAVE_32VRS(0, r4, r3)
56 mfvscr vr0
57 li r4, VRSTATE_VSCR
58 stvx vr0, r4, r3
59 blr
60
61/*
63 * Disable VMX for the task which had it previously, 62 * Disable VMX for the task which had it previously,
64 * and save its vector registers in its thread_struct. 63 * and save its vector registers in its thread_struct.
65 * Enables the VMX for use in the kernel on return. 64 * Enables the VMX for use in the kernel on return.
66 * On SMP we know the VMX is free, since we give it up every 65 * On SMP we know the VMX is free, since we give it up every
67 * switch (ie, no lazy save of the vector registers). 66 * switch (ie, no lazy save of the vector registers).
67 *
68 * Note that on 32-bit this can only use registers that will be
69 * restored by fast_exception_return, i.e. r3 - r6, r10 and r11.
68 */ 70 */
69_GLOBAL(load_up_altivec) 71_GLOBAL(load_up_altivec)
70 mfmsr r5 /* grab the current MSR */ 72 mfmsr r5 /* grab the current MSR */
@@ -90,10 +92,11 @@ _GLOBAL(load_up_altivec)
90 /* Save VMX state to last_task_used_altivec's THREAD struct */ 92 /* Save VMX state to last_task_used_altivec's THREAD struct */
91 toreal(r4) 93 toreal(r4)
92 addi r4,r4,THREAD 94 addi r4,r4,THREAD
93 SAVE_32VRS(0,r5,r4) 95 addi r6,r4,THREAD_VRSTATE
96 SAVE_32VRS(0,r5,r6)
94 mfvscr vr0 97 mfvscr vr0
95 li r10,THREAD_VSCR 98 li r10,VRSTATE_VSCR
96 stvx vr0,r10,r4 99 stvx vr0,r10,r6
97 /* Disable VMX for last_task_used_altivec */ 100 /* Disable VMX for last_task_used_altivec */
98 PPC_LL r5,PT_REGS(r4) 101 PPC_LL r5,PT_REGS(r4)
99 toreal(r5) 102 toreal(r5)
@@ -125,12 +128,13 @@ _GLOBAL(load_up_altivec)
125 oris r12,r12,MSR_VEC@h 128 oris r12,r12,MSR_VEC@h
126 std r12,_MSR(r1) 129 std r12,_MSR(r1)
127#endif 130#endif
131 addi r6,r5,THREAD_VRSTATE
128 li r4,1 132 li r4,1
129 li r10,THREAD_VSCR 133 li r10,VRSTATE_VSCR
130 stw r4,THREAD_USED_VR(r5) 134 stw r4,THREAD_USED_VR(r5)
131 lvx vr0,r10,r5 135 lvx vr0,r10,r6
132 mtvscr vr0 136 mtvscr vr0
133 REST_32VRS(0,r4,r5) 137 REST_32VRS(0,r4,r6)
134#ifndef CONFIG_SMP 138#ifndef CONFIG_SMP
135 /* Update last_task_used_altivec to 'current' */ 139 /* Update last_task_used_altivec to 'current' */
136 subi r4,r5,THREAD /* Back to 'current' */ 140 subi r4,r5,THREAD /* Back to 'current' */
@@ -165,12 +169,16 @@ _GLOBAL(giveup_altivec)
165 PPC_LCMPI 0,r3,0 169 PPC_LCMPI 0,r3,0
166 beqlr /* if no previous owner, done */ 170 beqlr /* if no previous owner, done */
167 addi r3,r3,THREAD /* want THREAD of task */ 171 addi r3,r3,THREAD /* want THREAD of task */
172 PPC_LL r7,THREAD_VRSAVEAREA(r3)
168 PPC_LL r5,PT_REGS(r3) 173 PPC_LL r5,PT_REGS(r3)
169 PPC_LCMPI 0,r5,0 174 PPC_LCMPI 0,r7,0
170 SAVE_32VRS(0,r4,r3) 175 bne 2f
176 addi r7,r3,THREAD_VRSTATE
1772: PPC_LCMPI 0,r5,0
178 SAVE_32VRS(0,r4,r7)
171 mfvscr vr0 179 mfvscr vr0
172 li r4,THREAD_VSCR 180 li r4,VRSTATE_VSCR
173 stvx vr0,r4,r3 181 stvx vr0,r4,r7
174 beq 1f 182 beq 1f
175 PPC_LL r4,_MSR-STACK_FRAME_OVERHEAD(r5) 183 PPC_LL r4,_MSR-STACK_FRAME_OVERHEAD(r5)
176#ifdef CONFIG_VSX 184#ifdef CONFIG_VSX
diff --git a/arch/powerpc/kernel/vio.c b/arch/powerpc/kernel/vio.c
index 408956fbf4f6..f99cefbd84e3 100644
--- a/arch/powerpc/kernel/vio.c
+++ b/arch/powerpc/kernel/vio.c
@@ -1537,12 +1537,12 @@ static ssize_t modalias_show(struct device *dev, struct device_attribute *attr,
1537 1537
1538 dn = dev->of_node; 1538 dn = dev->of_node;
1539 if (!dn) { 1539 if (!dn) {
1540 strcat(buf, "\n"); 1540 strcpy(buf, "\n");
1541 return strlen(buf); 1541 return strlen(buf);
1542 } 1542 }
1543 cp = of_get_property(dn, "compatible", NULL); 1543 cp = of_get_property(dn, "compatible", NULL);
1544 if (!cp) { 1544 if (!cp) {
1545 strcat(buf, "\n"); 1545 strcpy(buf, "\n");
1546 return strlen(buf); 1546 return strlen(buf);
1547 } 1547 }
1548 1548
diff --git a/arch/powerpc/kvm/Kconfig b/arch/powerpc/kvm/Kconfig
index ffaef2cb101a..e593ff257bd3 100644
--- a/arch/powerpc/kvm/Kconfig
+++ b/arch/powerpc/kvm/Kconfig
@@ -6,6 +6,7 @@ source "virt/kvm/Kconfig"
6 6
7menuconfig VIRTUALIZATION 7menuconfig VIRTUALIZATION
8 bool "Virtualization" 8 bool "Virtualization"
9 depends on !CPU_LITTLE_ENDIAN
9 ---help--- 10 ---help---
10 Say Y here to get to see options for using your Linux host to run 11 Say Y here to get to see options for using your Linux host to run
11 other operating systems inside virtual machines (guests). 12 other operating systems inside virtual machines (guests).
diff --git a/arch/powerpc/kvm/book3s_pr.c b/arch/powerpc/kvm/book3s_pr.c
index 27db1e665959..c0b48f96a91c 100644
--- a/arch/powerpc/kvm/book3s_pr.c
+++ b/arch/powerpc/kvm/book3s_pr.c
@@ -444,7 +444,7 @@ void kvmppc_giveup_ext(struct kvm_vcpu *vcpu, ulong msr)
444#ifdef CONFIG_VSX 444#ifdef CONFIG_VSX
445 u64 *vcpu_vsx = vcpu->arch.vsr; 445 u64 *vcpu_vsx = vcpu->arch.vsr;
446#endif 446#endif
447 u64 *thread_fpr = (u64*)t->fpr; 447 u64 *thread_fpr = &t->fp_state.fpr[0][0];
448 int i; 448 int i;
449 449
450 /* 450 /*
@@ -466,14 +466,14 @@ void kvmppc_giveup_ext(struct kvm_vcpu *vcpu, ulong msr)
466 /* 466 /*
467 * Note that on CPUs with VSX, giveup_fpu stores 467 * Note that on CPUs with VSX, giveup_fpu stores
468 * both the traditional FP registers and the added VSX 468 * both the traditional FP registers and the added VSX
469 * registers into thread.fpr[]. 469 * registers into thread.fp_state.fpr[].
470 */ 470 */
471 if (current->thread.regs->msr & MSR_FP) 471 if (current->thread.regs->msr & MSR_FP)
472 giveup_fpu(current); 472 giveup_fpu(current);
473 for (i = 0; i < ARRAY_SIZE(vcpu->arch.fpr); i++) 473 for (i = 0; i < ARRAY_SIZE(vcpu->arch.fpr); i++)
474 vcpu_fpr[i] = thread_fpr[get_fpr_index(i)]; 474 vcpu_fpr[i] = thread_fpr[get_fpr_index(i)];
475 475
476 vcpu->arch.fpscr = t->fpscr.val; 476 vcpu->arch.fpscr = t->fp_state.fpscr;
477 477
478#ifdef CONFIG_VSX 478#ifdef CONFIG_VSX
479 if (cpu_has_feature(CPU_FTR_VSX)) 479 if (cpu_has_feature(CPU_FTR_VSX))
@@ -486,8 +486,8 @@ void kvmppc_giveup_ext(struct kvm_vcpu *vcpu, ulong msr)
486 if (msr & MSR_VEC) { 486 if (msr & MSR_VEC) {
487 if (current->thread.regs->msr & MSR_VEC) 487 if (current->thread.regs->msr & MSR_VEC)
488 giveup_altivec(current); 488 giveup_altivec(current);
489 memcpy(vcpu->arch.vr, t->vr, sizeof(vcpu->arch.vr)); 489 memcpy(vcpu->arch.vr, t->vr_state.vr, sizeof(vcpu->arch.vr));
490 vcpu->arch.vscr = t->vscr; 490 vcpu->arch.vscr = t->vr_state.vscr;
491 } 491 }
492#endif 492#endif
493 493
@@ -539,7 +539,7 @@ static int kvmppc_handle_ext(struct kvm_vcpu *vcpu, unsigned int exit_nr,
539#ifdef CONFIG_VSX 539#ifdef CONFIG_VSX
540 u64 *vcpu_vsx = vcpu->arch.vsr; 540 u64 *vcpu_vsx = vcpu->arch.vsr;
541#endif 541#endif
542 u64 *thread_fpr = (u64*)t->fpr; 542 u64 *thread_fpr = &t->fp_state.fpr[0][0];
543 int i; 543 int i;
544 544
545 /* When we have paired singles, we emulate in software */ 545 /* When we have paired singles, we emulate in software */
@@ -584,15 +584,15 @@ static int kvmppc_handle_ext(struct kvm_vcpu *vcpu, unsigned int exit_nr,
584 for (i = 0; i < ARRAY_SIZE(vcpu->arch.vsr) / 2; i++) 584 for (i = 0; i < ARRAY_SIZE(vcpu->arch.vsr) / 2; i++)
585 thread_fpr[get_fpr_index(i) + 1] = vcpu_vsx[i]; 585 thread_fpr[get_fpr_index(i) + 1] = vcpu_vsx[i];
586#endif 586#endif
587 t->fpscr.val = vcpu->arch.fpscr; 587 t->fp_state.fpscr = vcpu->arch.fpscr;
588 t->fpexc_mode = 0; 588 t->fpexc_mode = 0;
589 kvmppc_load_up_fpu(); 589 kvmppc_load_up_fpu();
590 } 590 }
591 591
592 if (msr & MSR_VEC) { 592 if (msr & MSR_VEC) {
593#ifdef CONFIG_ALTIVEC 593#ifdef CONFIG_ALTIVEC
594 memcpy(t->vr, vcpu->arch.vr, sizeof(vcpu->arch.vr)); 594 memcpy(t->vr_state.vr, vcpu->arch.vr, sizeof(vcpu->arch.vr));
595 t->vscr = vcpu->arch.vscr; 595 t->vr_state.vscr = vcpu->arch.vscr;
596 t->vrsave = -1; 596 t->vrsave = -1;
597 kvmppc_load_up_altivec(); 597 kvmppc_load_up_altivec();
598#endif 598#endif
@@ -1116,12 +1116,10 @@ void kvmppc_core_vcpu_free(struct kvm_vcpu *vcpu)
1116int kvmppc_vcpu_run(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu) 1116int kvmppc_vcpu_run(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu)
1117{ 1117{
1118 int ret; 1118 int ret;
1119 double fpr[32][TS_FPRWIDTH]; 1119 struct thread_fp_state fp;
1120 unsigned int fpscr;
1121 int fpexc_mode; 1120 int fpexc_mode;
1122#ifdef CONFIG_ALTIVEC 1121#ifdef CONFIG_ALTIVEC
1123 vector128 vr[32]; 1122 struct thread_vr_state vr;
1124 vector128 vscr;
1125 unsigned long uninitialized_var(vrsave); 1123 unsigned long uninitialized_var(vrsave);
1126 int used_vr; 1124 int used_vr;
1127#endif 1125#endif
@@ -1153,8 +1151,7 @@ int kvmppc_vcpu_run(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu)
1153 /* Save FPU state in stack */ 1151 /* Save FPU state in stack */
1154 if (current->thread.regs->msr & MSR_FP) 1152 if (current->thread.regs->msr & MSR_FP)
1155 giveup_fpu(current); 1153 giveup_fpu(current);
1156 memcpy(fpr, current->thread.fpr, sizeof(current->thread.fpr)); 1154 fp = current->thread.fp_state;
1157 fpscr = current->thread.fpscr.val;
1158 fpexc_mode = current->thread.fpexc_mode; 1155 fpexc_mode = current->thread.fpexc_mode;
1159 1156
1160#ifdef CONFIG_ALTIVEC 1157#ifdef CONFIG_ALTIVEC
@@ -1163,8 +1160,7 @@ int kvmppc_vcpu_run(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu)
1163 if (used_vr) { 1160 if (used_vr) {
1164 if (current->thread.regs->msr & MSR_VEC) 1161 if (current->thread.regs->msr & MSR_VEC)
1165 giveup_altivec(current); 1162 giveup_altivec(current);
1166 memcpy(vr, current->thread.vr, sizeof(current->thread.vr)); 1163 vr = current->thread.vr_state;
1167 vscr = current->thread.vscr;
1168 vrsave = current->thread.vrsave; 1164 vrsave = current->thread.vrsave;
1169 } 1165 }
1170#endif 1166#endif
@@ -1196,15 +1192,13 @@ int kvmppc_vcpu_run(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu)
1196 current->thread.regs->msr = ext_msr; 1192 current->thread.regs->msr = ext_msr;
1197 1193
1198 /* Restore FPU/VSX state from stack */ 1194 /* Restore FPU/VSX state from stack */
1199 memcpy(current->thread.fpr, fpr, sizeof(current->thread.fpr)); 1195 current->thread.fp_state = fp;
1200 current->thread.fpscr.val = fpscr;
1201 current->thread.fpexc_mode = fpexc_mode; 1196 current->thread.fpexc_mode = fpexc_mode;
1202 1197
1203#ifdef CONFIG_ALTIVEC 1198#ifdef CONFIG_ALTIVEC
1204 /* Restore Altivec state from stack */ 1199 /* Restore Altivec state from stack */
1205 if (used_vr && current->thread.used_vr) { 1200 if (used_vr && current->thread.used_vr) {
1206 memcpy(current->thread.vr, vr, sizeof(current->thread.vr)); 1201 current->thread.vr_state = vr;
1207 current->thread.vscr = vscr;
1208 current->thread.vrsave = vrsave; 1202 current->thread.vrsave = vrsave;
1209 } 1203 }
1210 current->thread.used_vr = used_vr; 1204 current->thread.used_vr = used_vr;
diff --git a/arch/powerpc/kvm/booke.c b/arch/powerpc/kvm/booke.c
index 17722d82f1d1..5133199f6cb7 100644
--- a/arch/powerpc/kvm/booke.c
+++ b/arch/powerpc/kvm/booke.c
@@ -656,9 +656,8 @@ int kvmppc_vcpu_run(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu)
656{ 656{
657 int ret, s; 657 int ret, s;
658#ifdef CONFIG_PPC_FPU 658#ifdef CONFIG_PPC_FPU
659 unsigned int fpscr; 659 struct thread_fp_state fp;
660 int fpexc_mode; 660 int fpexc_mode;
661 u64 fpr[32];
662#endif 661#endif
663 662
664 if (!vcpu->arch.sane) { 663 if (!vcpu->arch.sane) {
@@ -677,13 +676,13 @@ int kvmppc_vcpu_run(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu)
677#ifdef CONFIG_PPC_FPU 676#ifdef CONFIG_PPC_FPU
678 /* Save userspace FPU state in stack */ 677 /* Save userspace FPU state in stack */
679 enable_kernel_fp(); 678 enable_kernel_fp();
680 memcpy(fpr, current->thread.fpr, sizeof(current->thread.fpr)); 679 fp = current->thread.fp_state;
681 fpscr = current->thread.fpscr.val;
682 fpexc_mode = current->thread.fpexc_mode; 680 fpexc_mode = current->thread.fpexc_mode;
683 681
684 /* Restore guest FPU state to thread */ 682 /* Restore guest FPU state to thread */
685 memcpy(current->thread.fpr, vcpu->arch.fpr, sizeof(vcpu->arch.fpr)); 683 memcpy(current->thread.fp_state.fpr, vcpu->arch.fpr,
686 current->thread.fpscr.val = vcpu->arch.fpscr; 684 sizeof(vcpu->arch.fpr));
685 current->thread.fp_state.fpscr = vcpu->arch.fpscr;
687 686
688 /* 687 /*
689 * Since we can't trap on MSR_FP in GS-mode, we consider the guest 688 * Since we can't trap on MSR_FP in GS-mode, we consider the guest
@@ -709,12 +708,12 @@ int kvmppc_vcpu_run(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu)
709 vcpu->fpu_active = 0; 708 vcpu->fpu_active = 0;
710 709
711 /* Save guest FPU state from thread */ 710 /* Save guest FPU state from thread */
712 memcpy(vcpu->arch.fpr, current->thread.fpr, sizeof(vcpu->arch.fpr)); 711 memcpy(vcpu->arch.fpr, current->thread.fp_state.fpr,
713 vcpu->arch.fpscr = current->thread.fpscr.val; 712 sizeof(vcpu->arch.fpr));
713 vcpu->arch.fpscr = current->thread.fp_state.fpscr;
714 714
715 /* Restore userspace FPU state from stack */ 715 /* Restore userspace FPU state from stack */
716 memcpy(current->thread.fpr, fpr, sizeof(current->thread.fpr)); 716 current->thread.fp_state = fp;
717 current->thread.fpscr.val = fpscr;
718 current->thread.fpexc_mode = fpexc_mode; 717 current->thread.fpexc_mode = fpexc_mode;
719#endif 718#endif
720 719
diff --git a/arch/powerpc/lib/Makefile b/arch/powerpc/lib/Makefile
index 450433276699..95a20e17dbff 100644
--- a/arch/powerpc/lib/Makefile
+++ b/arch/powerpc/lib/Makefile
@@ -10,15 +10,23 @@ CFLAGS_REMOVE_code-patching.o = -pg
10CFLAGS_REMOVE_feature-fixups.o = -pg 10CFLAGS_REMOVE_feature-fixups.o = -pg
11 11
12obj-y := string.o alloc.o \ 12obj-y := string.o alloc.o \
13 checksum_$(CONFIG_WORD_SIZE).o crtsavres.o 13 crtsavres.o
14obj-$(CONFIG_PPC32) += div64.o copy_32.o 14obj-$(CONFIG_PPC32) += div64.o copy_32.o
15obj-$(CONFIG_HAS_IOMEM) += devres.o 15obj-$(CONFIG_HAS_IOMEM) += devres.o
16 16
17obj-$(CONFIG_PPC64) += copypage_64.o copyuser_64.o \ 17obj-$(CONFIG_PPC64) += copypage_64.o copyuser_64.o \
18 memcpy_64.o usercopy_64.o mem_64.o string.o \ 18 usercopy_64.o mem_64.o string.o \
19 checksum_wrappers_64.o hweight_64.o \ 19 hweight_64.o \
20 copyuser_power7.o string_64.o copypage_power7.o \ 20 copyuser_power7.o string_64.o copypage_power7.o
21 memcpy_power7.o 21ifeq ($(CONFIG_GENERIC_CSUM),)
22obj-y += checksum_$(CONFIG_WORD_SIZE).o
23obj-$(CONFIG_PPC64) += checksum_wrappers_64.o
24endif
25
26ifeq ($(CONFIG_CPU_LITTLE_ENDIAN),)
27obj-$(CONFIG_PPC64) += memcpy_power7.o memcpy_64.o
28endif
29
22obj-$(CONFIG_PPC_EMULATE_SSTEP) += sstep.o ldstfp.o 30obj-$(CONFIG_PPC_EMULATE_SSTEP) += sstep.o ldstfp.o
23 31
24ifeq ($(CONFIG_PPC64),y) 32ifeq ($(CONFIG_PPC64),y)
@@ -31,3 +39,6 @@ obj-$(CONFIG_PPC_LIB_RHEAP) += rheap.o
31obj-y += code-patching.o 39obj-y += code-patching.o
32obj-y += feature-fixups.o 40obj-y += feature-fixups.o
33obj-$(CONFIG_FTR_FIXUP_SELFTEST) += feature-fixups-test.o 41obj-$(CONFIG_FTR_FIXUP_SELFTEST) += feature-fixups-test.o
42
43obj-$(CONFIG_ALTIVEC) += xor_vmx.o
44CFLAGS_xor_vmx.o += -maltivec -mabi=altivec
diff --git a/arch/powerpc/lib/copyuser_power7.S b/arch/powerpc/lib/copyuser_power7.S
index d1f11795a7ad..e8e9c36dc784 100644
--- a/arch/powerpc/lib/copyuser_power7.S
+++ b/arch/powerpc/lib/copyuser_power7.S
@@ -19,6 +19,14 @@
19 */ 19 */
20#include <asm/ppc_asm.h> 20#include <asm/ppc_asm.h>
21 21
22#ifdef __BIG_ENDIAN__
23#define LVS(VRT,RA,RB) lvsl VRT,RA,RB
24#define VPERM(VRT,VRA,VRB,VRC) vperm VRT,VRA,VRB,VRC
25#else
26#define LVS(VRT,RA,RB) lvsr VRT,RA,RB
27#define VPERM(VRT,VRA,VRB,VRC) vperm VRT,VRB,VRA,VRC
28#endif
29
22 .macro err1 30 .macro err1
23100: 31100:
24 .section __ex_table,"a" 32 .section __ex_table,"a"
@@ -552,13 +560,13 @@ err3; stw r7,4(r3)
552 li r10,32 560 li r10,32
553 li r11,48 561 li r11,48
554 562
555 lvsl vr16,0,r4 /* Setup permute control vector */ 563 LVS(vr16,0,r4) /* Setup permute control vector */
556err3; lvx vr0,0,r4 564err3; lvx vr0,0,r4
557 addi r4,r4,16 565 addi r4,r4,16
558 566
559 bf cr7*4+3,5f 567 bf cr7*4+3,5f
560err3; lvx vr1,r0,r4 568err3; lvx vr1,r0,r4
561 vperm vr8,vr0,vr1,vr16 569 VPERM(vr8,vr0,vr1,vr16)
562 addi r4,r4,16 570 addi r4,r4,16
563err3; stvx vr8,r0,r3 571err3; stvx vr8,r0,r3
564 addi r3,r3,16 572 addi r3,r3,16
@@ -566,9 +574,9 @@ err3; stvx vr8,r0,r3
566 574
5675: bf cr7*4+2,6f 5755: bf cr7*4+2,6f
568err3; lvx vr1,r0,r4 576err3; lvx vr1,r0,r4
569 vperm vr8,vr0,vr1,vr16 577 VPERM(vr8,vr0,vr1,vr16)
570err3; lvx vr0,r4,r9 578err3; lvx vr0,r4,r9
571 vperm vr9,vr1,vr0,vr16 579 VPERM(vr9,vr1,vr0,vr16)
572 addi r4,r4,32 580 addi r4,r4,32
573err3; stvx vr8,r0,r3 581err3; stvx vr8,r0,r3
574err3; stvx vr9,r3,r9 582err3; stvx vr9,r3,r9
@@ -576,13 +584,13 @@ err3; stvx vr9,r3,r9
576 584
5776: bf cr7*4+1,7f 5856: bf cr7*4+1,7f
578err3; lvx vr3,r0,r4 586err3; lvx vr3,r0,r4
579 vperm vr8,vr0,vr3,vr16 587 VPERM(vr8,vr0,vr3,vr16)
580err3; lvx vr2,r4,r9 588err3; lvx vr2,r4,r9
581 vperm vr9,vr3,vr2,vr16 589 VPERM(vr9,vr3,vr2,vr16)
582err3; lvx vr1,r4,r10 590err3; lvx vr1,r4,r10
583 vperm vr10,vr2,vr1,vr16 591 VPERM(vr10,vr2,vr1,vr16)
584err3; lvx vr0,r4,r11 592err3; lvx vr0,r4,r11
585 vperm vr11,vr1,vr0,vr16 593 VPERM(vr11,vr1,vr0,vr16)
586 addi r4,r4,64 594 addi r4,r4,64
587err3; stvx vr8,r0,r3 595err3; stvx vr8,r0,r3
588err3; stvx vr9,r3,r9 596err3; stvx vr9,r3,r9
@@ -611,21 +619,21 @@ err3; stvx vr11,r3,r11
611 .align 5 619 .align 5
6128: 6208:
613err4; lvx vr7,r0,r4 621err4; lvx vr7,r0,r4
614 vperm vr8,vr0,vr7,vr16 622 VPERM(vr8,vr0,vr7,vr16)
615err4; lvx vr6,r4,r9 623err4; lvx vr6,r4,r9
616 vperm vr9,vr7,vr6,vr16 624 VPERM(vr9,vr7,vr6,vr16)
617err4; lvx vr5,r4,r10 625err4; lvx vr5,r4,r10
618 vperm vr10,vr6,vr5,vr16 626 VPERM(vr10,vr6,vr5,vr16)
619err4; lvx vr4,r4,r11 627err4; lvx vr4,r4,r11
620 vperm vr11,vr5,vr4,vr16 628 VPERM(vr11,vr5,vr4,vr16)
621err4; lvx vr3,r4,r12 629err4; lvx vr3,r4,r12
622 vperm vr12,vr4,vr3,vr16 630 VPERM(vr12,vr4,vr3,vr16)
623err4; lvx vr2,r4,r14 631err4; lvx vr2,r4,r14
624 vperm vr13,vr3,vr2,vr16 632 VPERM(vr13,vr3,vr2,vr16)
625err4; lvx vr1,r4,r15 633err4; lvx vr1,r4,r15
626 vperm vr14,vr2,vr1,vr16 634 VPERM(vr14,vr2,vr1,vr16)
627err4; lvx vr0,r4,r16 635err4; lvx vr0,r4,r16
628 vperm vr15,vr1,vr0,vr16 636 VPERM(vr15,vr1,vr0,vr16)
629 addi r4,r4,128 637 addi r4,r4,128
630err4; stvx vr8,r0,r3 638err4; stvx vr8,r0,r3
631err4; stvx vr9,r3,r9 639err4; stvx vr9,r3,r9
@@ -649,13 +657,13 @@ err4; stvx vr15,r3,r16
649 657
650 bf cr7*4+1,9f 658 bf cr7*4+1,9f
651err3; lvx vr3,r0,r4 659err3; lvx vr3,r0,r4
652 vperm vr8,vr0,vr3,vr16 660 VPERM(vr8,vr0,vr3,vr16)
653err3; lvx vr2,r4,r9 661err3; lvx vr2,r4,r9
654 vperm vr9,vr3,vr2,vr16 662 VPERM(vr9,vr3,vr2,vr16)
655err3; lvx vr1,r4,r10 663err3; lvx vr1,r4,r10
656 vperm vr10,vr2,vr1,vr16 664 VPERM(vr10,vr2,vr1,vr16)
657err3; lvx vr0,r4,r11 665err3; lvx vr0,r4,r11
658 vperm vr11,vr1,vr0,vr16 666 VPERM(vr11,vr1,vr0,vr16)
659 addi r4,r4,64 667 addi r4,r4,64
660err3; stvx vr8,r0,r3 668err3; stvx vr8,r0,r3
661err3; stvx vr9,r3,r9 669err3; stvx vr9,r3,r9
@@ -665,9 +673,9 @@ err3; stvx vr11,r3,r11
665 673
6669: bf cr7*4+2,10f 6749: bf cr7*4+2,10f
667err3; lvx vr1,r0,r4 675err3; lvx vr1,r0,r4
668 vperm vr8,vr0,vr1,vr16 676 VPERM(vr8,vr0,vr1,vr16)
669err3; lvx vr0,r4,r9 677err3; lvx vr0,r4,r9
670 vperm vr9,vr1,vr0,vr16 678 VPERM(vr9,vr1,vr0,vr16)
671 addi r4,r4,32 679 addi r4,r4,32
672err3; stvx vr8,r0,r3 680err3; stvx vr8,r0,r3
673err3; stvx vr9,r3,r9 681err3; stvx vr9,r3,r9
@@ -675,7 +683,7 @@ err3; stvx vr9,r3,r9
675 683
67610: bf cr7*4+3,11f 68410: bf cr7*4+3,11f
677err3; lvx vr1,r0,r4 685err3; lvx vr1,r0,r4
678 vperm vr8,vr0,vr1,vr16 686 VPERM(vr8,vr0,vr1,vr16)
679 addi r4,r4,16 687 addi r4,r4,16
680err3; stvx vr8,r0,r3 688err3; stvx vr8,r0,r3
681 addi r3,r3,16 689 addi r3,r3,16
diff --git a/arch/powerpc/lib/memcpy_power7.S b/arch/powerpc/lib/memcpy_power7.S
index 0663630baf3b..e4177dbea6bd 100644
--- a/arch/powerpc/lib/memcpy_power7.S
+++ b/arch/powerpc/lib/memcpy_power7.S
@@ -20,6 +20,15 @@
20#include <asm/ppc_asm.h> 20#include <asm/ppc_asm.h>
21 21
22_GLOBAL(memcpy_power7) 22_GLOBAL(memcpy_power7)
23
24#ifdef __BIG_ENDIAN__
25#define LVS(VRT,RA,RB) lvsl VRT,RA,RB
26#define VPERM(VRT,VRA,VRB,VRC) vperm VRT,VRA,VRB,VRC
27#else
28#define LVS(VRT,RA,RB) lvsr VRT,RA,RB
29#define VPERM(VRT,VRA,VRB,VRC) vperm VRT,VRB,VRA,VRC
30#endif
31
23#ifdef CONFIG_ALTIVEC 32#ifdef CONFIG_ALTIVEC
24 cmpldi r5,16 33 cmpldi r5,16
25 cmpldi cr1,r5,4096 34 cmpldi cr1,r5,4096
@@ -485,13 +494,13 @@ _GLOBAL(memcpy_power7)
485 li r10,32 494 li r10,32
486 li r11,48 495 li r11,48
487 496
488 lvsl vr16,0,r4 /* Setup permute control vector */ 497 LVS(vr16,0,r4) /* Setup permute control vector */
489 lvx vr0,0,r4 498 lvx vr0,0,r4
490 addi r4,r4,16 499 addi r4,r4,16
491 500
492 bf cr7*4+3,5f 501 bf cr7*4+3,5f
493 lvx vr1,r0,r4 502 lvx vr1,r0,r4
494 vperm vr8,vr0,vr1,vr16 503 VPERM(vr8,vr0,vr1,vr16)
495 addi r4,r4,16 504 addi r4,r4,16
496 stvx vr8,r0,r3 505 stvx vr8,r0,r3
497 addi r3,r3,16 506 addi r3,r3,16
@@ -499,9 +508,9 @@ _GLOBAL(memcpy_power7)
499 508
5005: bf cr7*4+2,6f 5095: bf cr7*4+2,6f
501 lvx vr1,r0,r4 510 lvx vr1,r0,r4
502 vperm vr8,vr0,vr1,vr16 511 VPERM(vr8,vr0,vr1,vr16)
503 lvx vr0,r4,r9 512 lvx vr0,r4,r9
504 vperm vr9,vr1,vr0,vr16 513 VPERM(vr9,vr1,vr0,vr16)
505 addi r4,r4,32 514 addi r4,r4,32
506 stvx vr8,r0,r3 515 stvx vr8,r0,r3
507 stvx vr9,r3,r9 516 stvx vr9,r3,r9
@@ -509,13 +518,13 @@ _GLOBAL(memcpy_power7)
509 518
5106: bf cr7*4+1,7f 5196: bf cr7*4+1,7f
511 lvx vr3,r0,r4 520 lvx vr3,r0,r4
512 vperm vr8,vr0,vr3,vr16 521 VPERM(vr8,vr0,vr3,vr16)
513 lvx vr2,r4,r9 522 lvx vr2,r4,r9
514 vperm vr9,vr3,vr2,vr16 523 VPERM(vr9,vr3,vr2,vr16)
515 lvx vr1,r4,r10 524 lvx vr1,r4,r10
516 vperm vr10,vr2,vr1,vr16 525 VPERM(vr10,vr2,vr1,vr16)
517 lvx vr0,r4,r11 526 lvx vr0,r4,r11
518 vperm vr11,vr1,vr0,vr16 527 VPERM(vr11,vr1,vr0,vr16)
519 addi r4,r4,64 528 addi r4,r4,64
520 stvx vr8,r0,r3 529 stvx vr8,r0,r3
521 stvx vr9,r3,r9 530 stvx vr9,r3,r9
@@ -544,21 +553,21 @@ _GLOBAL(memcpy_power7)
544 .align 5 553 .align 5
5458: 5548:
546 lvx vr7,r0,r4 555 lvx vr7,r0,r4
547 vperm vr8,vr0,vr7,vr16 556 VPERM(vr8,vr0,vr7,vr16)
548 lvx vr6,r4,r9 557 lvx vr6,r4,r9
549 vperm vr9,vr7,vr6,vr16 558 VPERM(vr9,vr7,vr6,vr16)
550 lvx vr5,r4,r10 559 lvx vr5,r4,r10
551 vperm vr10,vr6,vr5,vr16 560 VPERM(vr10,vr6,vr5,vr16)
552 lvx vr4,r4,r11 561 lvx vr4,r4,r11
553 vperm vr11,vr5,vr4,vr16 562 VPERM(vr11,vr5,vr4,vr16)
554 lvx vr3,r4,r12 563 lvx vr3,r4,r12
555 vperm vr12,vr4,vr3,vr16 564 VPERM(vr12,vr4,vr3,vr16)
556 lvx vr2,r4,r14 565 lvx vr2,r4,r14
557 vperm vr13,vr3,vr2,vr16 566 VPERM(vr13,vr3,vr2,vr16)
558 lvx vr1,r4,r15 567 lvx vr1,r4,r15
559 vperm vr14,vr2,vr1,vr16 568 VPERM(vr14,vr2,vr1,vr16)
560 lvx vr0,r4,r16 569 lvx vr0,r4,r16
561 vperm vr15,vr1,vr0,vr16 570 VPERM(vr15,vr1,vr0,vr16)
562 addi r4,r4,128 571 addi r4,r4,128
563 stvx vr8,r0,r3 572 stvx vr8,r0,r3
564 stvx vr9,r3,r9 573 stvx vr9,r3,r9
@@ -582,13 +591,13 @@ _GLOBAL(memcpy_power7)
582 591
583 bf cr7*4+1,9f 592 bf cr7*4+1,9f
584 lvx vr3,r0,r4 593 lvx vr3,r0,r4
585 vperm vr8,vr0,vr3,vr16 594 VPERM(vr8,vr0,vr3,vr16)
586 lvx vr2,r4,r9 595 lvx vr2,r4,r9
587 vperm vr9,vr3,vr2,vr16 596 VPERM(vr9,vr3,vr2,vr16)
588 lvx vr1,r4,r10 597 lvx vr1,r4,r10
589 vperm vr10,vr2,vr1,vr16 598 VPERM(vr10,vr2,vr1,vr16)
590 lvx vr0,r4,r11 599 lvx vr0,r4,r11
591 vperm vr11,vr1,vr0,vr16 600 VPERM(vr11,vr1,vr0,vr16)
592 addi r4,r4,64 601 addi r4,r4,64
593 stvx vr8,r0,r3 602 stvx vr8,r0,r3
594 stvx vr9,r3,r9 603 stvx vr9,r3,r9
@@ -598,9 +607,9 @@ _GLOBAL(memcpy_power7)
598 607
5999: bf cr7*4+2,10f 6089: bf cr7*4+2,10f
600 lvx vr1,r0,r4 609 lvx vr1,r0,r4
601 vperm vr8,vr0,vr1,vr16 610 VPERM(vr8,vr0,vr1,vr16)
602 lvx vr0,r4,r9 611 lvx vr0,r4,r9
603 vperm vr9,vr1,vr0,vr16 612 VPERM(vr9,vr1,vr0,vr16)
604 addi r4,r4,32 613 addi r4,r4,32
605 stvx vr8,r0,r3 614 stvx vr8,r0,r3
606 stvx vr9,r3,r9 615 stvx vr9,r3,r9
@@ -608,7 +617,7 @@ _GLOBAL(memcpy_power7)
608 617
60910: bf cr7*4+3,11f 61810: bf cr7*4+3,11f
610 lvx vr1,r0,r4 619 lvx vr1,r0,r4
611 vperm vr8,vr0,vr1,vr16 620 VPERM(vr8,vr0,vr1,vr16)
612 addi r4,r4,16 621 addi r4,r4,16
613 stvx vr8,r0,r3 622 stvx vr8,r0,r3
614 addi r3,r3,16 623 addi r3,r3,16
diff --git a/arch/powerpc/lib/sstep.c b/arch/powerpc/lib/sstep.c
index b1faa1593c90..c0511c27a733 100644
--- a/arch/powerpc/lib/sstep.c
+++ b/arch/powerpc/lib/sstep.c
@@ -212,11 +212,19 @@ static int __kprobes read_mem_unaligned(unsigned long *dest, unsigned long ea,
212{ 212{
213 int err; 213 int err;
214 unsigned long x, b, c; 214 unsigned long x, b, c;
215#ifdef __LITTLE_ENDIAN__
216 int len = nb; /* save a copy of the length for byte reversal */
217#endif
215 218
216 /* unaligned, do this in pieces */ 219 /* unaligned, do this in pieces */
217 x = 0; 220 x = 0;
218 for (; nb > 0; nb -= c) { 221 for (; nb > 0; nb -= c) {
222#ifdef __LITTLE_ENDIAN__
223 c = 1;
224#endif
225#ifdef __BIG_ENDIAN__
219 c = max_align(ea); 226 c = max_align(ea);
227#endif
220 if (c > nb) 228 if (c > nb)
221 c = max_align(nb); 229 c = max_align(nb);
222 err = read_mem_aligned(&b, ea, c); 230 err = read_mem_aligned(&b, ea, c);
@@ -225,7 +233,24 @@ static int __kprobes read_mem_unaligned(unsigned long *dest, unsigned long ea,
225 x = (x << (8 * c)) + b; 233 x = (x << (8 * c)) + b;
226 ea += c; 234 ea += c;
227 } 235 }
236#ifdef __LITTLE_ENDIAN__
237 switch (len) {
238 case 2:
239 *dest = byterev_2(x);
240 break;
241 case 4:
242 *dest = byterev_4(x);
243 break;
244#ifdef __powerpc64__
245 case 8:
246 *dest = byterev_8(x);
247 break;
248#endif
249 }
250#endif
251#ifdef __BIG_ENDIAN__
228 *dest = x; 252 *dest = x;
253#endif
229 return 0; 254 return 0;
230} 255}
231 256
@@ -273,9 +298,29 @@ static int __kprobes write_mem_unaligned(unsigned long val, unsigned long ea,
273 int err; 298 int err;
274 unsigned long c; 299 unsigned long c;
275 300
301#ifdef __LITTLE_ENDIAN__
302 switch (nb) {
303 case 2:
304 val = byterev_2(val);
305 break;
306 case 4:
307 val = byterev_4(val);
308 break;
309#ifdef __powerpc64__
310 case 8:
311 val = byterev_8(val);
312 break;
313#endif
314 }
315#endif
276 /* unaligned or little-endian, do this in pieces */ 316 /* unaligned or little-endian, do this in pieces */
277 for (; nb > 0; nb -= c) { 317 for (; nb > 0; nb -= c) {
318#ifdef __LITTLE_ENDIAN__
319 c = 1;
320#endif
321#ifdef __BIG_ENDIAN__
278 c = max_align(ea); 322 c = max_align(ea);
323#endif
279 if (c > nb) 324 if (c > nb)
280 c = max_align(nb); 325 c = max_align(nb);
281 err = write_mem_aligned(val >> (nb - c) * 8, ea, c); 326 err = write_mem_aligned(val >> (nb - c) * 8, ea, c);
@@ -310,22 +355,36 @@ static int __kprobes do_fp_load(int rn, int (*func)(int, unsigned long),
310 struct pt_regs *regs) 355 struct pt_regs *regs)
311{ 356{
312 int err; 357 int err;
313 unsigned long val[sizeof(double) / sizeof(long)]; 358 union {
359 double dbl;
360 unsigned long ul[2];
361 struct {
362#ifdef __BIG_ENDIAN__
363 unsigned _pad_;
364 unsigned word;
365#endif
366#ifdef __LITTLE_ENDIAN__
367 unsigned word;
368 unsigned _pad_;
369#endif
370 } single;
371 } data;
314 unsigned long ptr; 372 unsigned long ptr;
315 373
316 if (!address_ok(regs, ea, nb)) 374 if (!address_ok(regs, ea, nb))
317 return -EFAULT; 375 return -EFAULT;
318 if ((ea & 3) == 0) 376 if ((ea & 3) == 0)
319 return (*func)(rn, ea); 377 return (*func)(rn, ea);
320 ptr = (unsigned long) &val[0]; 378 ptr = (unsigned long) &data.ul;
321 if (sizeof(unsigned long) == 8 || nb == 4) { 379 if (sizeof(unsigned long) == 8 || nb == 4) {
322 err = read_mem_unaligned(&val[0], ea, nb, regs); 380 err = read_mem_unaligned(&data.ul[0], ea, nb, regs);
323 ptr += sizeof(unsigned long) - nb; 381 if (nb == 4)
382 ptr = (unsigned long)&(data.single.word);
324 } else { 383 } else {
325 /* reading a double on 32-bit */ 384 /* reading a double on 32-bit */
326 err = read_mem_unaligned(&val[0], ea, 4, regs); 385 err = read_mem_unaligned(&data.ul[0], ea, 4, regs);
327 if (!err) 386 if (!err)
328 err = read_mem_unaligned(&val[1], ea + 4, 4, regs); 387 err = read_mem_unaligned(&data.ul[1], ea + 4, 4, regs);
329 } 388 }
330 if (err) 389 if (err)
331 return err; 390 return err;
@@ -337,28 +396,42 @@ static int __kprobes do_fp_store(int rn, int (*func)(int, unsigned long),
337 struct pt_regs *regs) 396 struct pt_regs *regs)
338{ 397{
339 int err; 398 int err;
340 unsigned long val[sizeof(double) / sizeof(long)]; 399 union {
400 double dbl;
401 unsigned long ul[2];
402 struct {
403#ifdef __BIG_ENDIAN__
404 unsigned _pad_;
405 unsigned word;
406#endif
407#ifdef __LITTLE_ENDIAN__
408 unsigned word;
409 unsigned _pad_;
410#endif
411 } single;
412 } data;
341 unsigned long ptr; 413 unsigned long ptr;
342 414
343 if (!address_ok(regs, ea, nb)) 415 if (!address_ok(regs, ea, nb))
344 return -EFAULT; 416 return -EFAULT;
345 if ((ea & 3) == 0) 417 if ((ea & 3) == 0)
346 return (*func)(rn, ea); 418 return (*func)(rn, ea);
347 ptr = (unsigned long) &val[0]; 419 ptr = (unsigned long) &data.ul[0];
348 if (sizeof(unsigned long) == 8 || nb == 4) { 420 if (sizeof(unsigned long) == 8 || nb == 4) {
349 ptr += sizeof(unsigned long) - nb; 421 if (nb == 4)
422 ptr = (unsigned long)&(data.single.word);
350 err = (*func)(rn, ptr); 423 err = (*func)(rn, ptr);
351 if (err) 424 if (err)
352 return err; 425 return err;
353 err = write_mem_unaligned(val[0], ea, nb, regs); 426 err = write_mem_unaligned(data.ul[0], ea, nb, regs);
354 } else { 427 } else {
355 /* writing a double on 32-bit */ 428 /* writing a double on 32-bit */
356 err = (*func)(rn, ptr); 429 err = (*func)(rn, ptr);
357 if (err) 430 if (err)
358 return err; 431 return err;
359 err = write_mem_unaligned(val[0], ea, 4, regs); 432 err = write_mem_unaligned(data.ul[0], ea, 4, regs);
360 if (!err) 433 if (!err)
361 err = write_mem_unaligned(val[1], ea + 4, 4, regs); 434 err = write_mem_unaligned(data.ul[1], ea + 4, 4, regs);
362 } 435 }
363 return err; 436 return err;
364} 437}
diff --git a/arch/powerpc/lib/xor_vmx.c b/arch/powerpc/lib/xor_vmx.c
new file mode 100644
index 000000000000..e905f7c2ea7b
--- /dev/null
+++ b/arch/powerpc/lib/xor_vmx.c
@@ -0,0 +1,177 @@
1/*
2 * This program is free software; you can redistribute it and/or modify
3 * it under the terms of the GNU General Public License as published by
4 * the Free Software Foundation; either version 2 of the License, or
5 * (at your option) any later version.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 *
12 * You should have received a copy of the GNU General Public License
13 * along with this program; if not, write to the Free Software
14 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
15 *
16 * Copyright (C) IBM Corporation, 2012
17 *
18 * Author: Anton Blanchard <anton@au.ibm.com>
19 */
20#include <altivec.h>
21
22#include <linux/preempt.h>
23#include <linux/export.h>
24#include <linux/sched.h>
25#include <asm/switch_to.h>
26
27typedef vector signed char unative_t;
28
29#define DEFINE(V) \
30 unative_t *V = (unative_t *)V##_in; \
31 unative_t V##_0, V##_1, V##_2, V##_3
32
33#define LOAD(V) \
34 do { \
35 V##_0 = V[0]; \
36 V##_1 = V[1]; \
37 V##_2 = V[2]; \
38 V##_3 = V[3]; \
39 } while (0)
40
41#define STORE(V) \
42 do { \
43 V[0] = V##_0; \
44 V[1] = V##_1; \
45 V[2] = V##_2; \
46 V[3] = V##_3; \
47 } while (0)
48
49#define XOR(V1, V2) \
50 do { \
51 V1##_0 = vec_xor(V1##_0, V2##_0); \
52 V1##_1 = vec_xor(V1##_1, V2##_1); \
53 V1##_2 = vec_xor(V1##_2, V2##_2); \
54 V1##_3 = vec_xor(V1##_3, V2##_3); \
55 } while (0)
56
57void xor_altivec_2(unsigned long bytes, unsigned long *v1_in,
58 unsigned long *v2_in)
59{
60 DEFINE(v1);
61 DEFINE(v2);
62 unsigned long lines = bytes / (sizeof(unative_t)) / 4;
63
64 preempt_disable();
65 enable_kernel_altivec();
66
67 do {
68 LOAD(v1);
69 LOAD(v2);
70 XOR(v1, v2);
71 STORE(v1);
72
73 v1 += 4;
74 v2 += 4;
75 } while (--lines > 0);
76
77 preempt_enable();
78}
79EXPORT_SYMBOL(xor_altivec_2);
80
81void xor_altivec_3(unsigned long bytes, unsigned long *v1_in,
82 unsigned long *v2_in, unsigned long *v3_in)
83{
84 DEFINE(v1);
85 DEFINE(v2);
86 DEFINE(v3);
87 unsigned long lines = bytes / (sizeof(unative_t)) / 4;
88
89 preempt_disable();
90 enable_kernel_altivec();
91
92 do {
93 LOAD(v1);
94 LOAD(v2);
95 LOAD(v3);
96 XOR(v1, v2);
97 XOR(v1, v3);
98 STORE(v1);
99
100 v1 += 4;
101 v2 += 4;
102 v3 += 4;
103 } while (--lines > 0);
104
105 preempt_enable();
106}
107EXPORT_SYMBOL(xor_altivec_3);
108
109void xor_altivec_4(unsigned long bytes, unsigned long *v1_in,
110 unsigned long *v2_in, unsigned long *v3_in,
111 unsigned long *v4_in)
112{
113 DEFINE(v1);
114 DEFINE(v2);
115 DEFINE(v3);
116 DEFINE(v4);
117 unsigned long lines = bytes / (sizeof(unative_t)) / 4;
118
119 preempt_disable();
120 enable_kernel_altivec();
121
122 do {
123 LOAD(v1);
124 LOAD(v2);
125 LOAD(v3);
126 LOAD(v4);
127 XOR(v1, v2);
128 XOR(v3, v4);
129 XOR(v1, v3);
130 STORE(v1);
131
132 v1 += 4;
133 v2 += 4;
134 v3 += 4;
135 v4 += 4;
136 } while (--lines > 0);
137
138 preempt_enable();
139}
140EXPORT_SYMBOL(xor_altivec_4);
141
142void xor_altivec_5(unsigned long bytes, unsigned long *v1_in,
143 unsigned long *v2_in, unsigned long *v3_in,
144 unsigned long *v4_in, unsigned long *v5_in)
145{
146 DEFINE(v1);
147 DEFINE(v2);
148 DEFINE(v3);
149 DEFINE(v4);
150 DEFINE(v5);
151 unsigned long lines = bytes / (sizeof(unative_t)) / 4;
152
153 preempt_disable();
154 enable_kernel_altivec();
155
156 do {
157 LOAD(v1);
158 LOAD(v2);
159 LOAD(v3);
160 LOAD(v4);
161 LOAD(v5);
162 XOR(v1, v2);
163 XOR(v3, v4);
164 XOR(v1, v5);
165 XOR(v1, v3);
166 STORE(v1);
167
168 v1 += 4;
169 v2 += 4;
170 v3 += 4;
171 v4 += 4;
172 v5 += 4;
173 } while (--lines > 0);
174
175 preempt_enable();
176}
177EXPORT_SYMBOL(xor_altivec_5);
diff --git a/arch/powerpc/mm/hash_native_64.c b/arch/powerpc/mm/hash_native_64.c
index c33d939120c9..3ea26c25590b 100644
--- a/arch/powerpc/mm/hash_native_64.c
+++ b/arch/powerpc/mm/hash_native_64.c
@@ -35,7 +35,11 @@
35#define DBG_LOW(fmt...) 35#define DBG_LOW(fmt...)
36#endif 36#endif
37 37
38#ifdef __BIG_ENDIAN__
38#define HPTE_LOCK_BIT 3 39#define HPTE_LOCK_BIT 3
40#else
41#define HPTE_LOCK_BIT (56+3)
42#endif
39 43
40DEFINE_RAW_SPINLOCK(native_tlbie_lock); 44DEFINE_RAW_SPINLOCK(native_tlbie_lock);
41 45
@@ -172,7 +176,7 @@ static inline void tlbie(unsigned long vpn, int psize, int apsize,
172 176
173static inline void native_lock_hpte(struct hash_pte *hptep) 177static inline void native_lock_hpte(struct hash_pte *hptep)
174{ 178{
175 unsigned long *word = &hptep->v; 179 unsigned long *word = (unsigned long *)&hptep->v;
176 180
177 while (1) { 181 while (1) {
178 if (!test_and_set_bit_lock(HPTE_LOCK_BIT, word)) 182 if (!test_and_set_bit_lock(HPTE_LOCK_BIT, word))
@@ -184,7 +188,7 @@ static inline void native_lock_hpte(struct hash_pte *hptep)
184 188
185static inline void native_unlock_hpte(struct hash_pte *hptep) 189static inline void native_unlock_hpte(struct hash_pte *hptep)
186{ 190{
187 unsigned long *word = &hptep->v; 191 unsigned long *word = (unsigned long *)&hptep->v;
188 192
189 clear_bit_unlock(HPTE_LOCK_BIT, word); 193 clear_bit_unlock(HPTE_LOCK_BIT, word);
190} 194}
@@ -204,10 +208,10 @@ static long native_hpte_insert(unsigned long hpte_group, unsigned long vpn,
204 } 208 }
205 209
206 for (i = 0; i < HPTES_PER_GROUP; i++) { 210 for (i = 0; i < HPTES_PER_GROUP; i++) {
207 if (! (hptep->v & HPTE_V_VALID)) { 211 if (! (be64_to_cpu(hptep->v) & HPTE_V_VALID)) {
208 /* retry with lock held */ 212 /* retry with lock held */
209 native_lock_hpte(hptep); 213 native_lock_hpte(hptep);
210 if (! (hptep->v & HPTE_V_VALID)) 214 if (! (be64_to_cpu(hptep->v) & HPTE_V_VALID))
211 break; 215 break;
212 native_unlock_hpte(hptep); 216 native_unlock_hpte(hptep);
213 } 217 }
@@ -226,14 +230,14 @@ static long native_hpte_insert(unsigned long hpte_group, unsigned long vpn,
226 i, hpte_v, hpte_r); 230 i, hpte_v, hpte_r);
227 } 231 }
228 232
229 hptep->r = hpte_r; 233 hptep->r = cpu_to_be64(hpte_r);
230 /* Guarantee the second dword is visible before the valid bit */ 234 /* Guarantee the second dword is visible before the valid bit */
231 eieio(); 235 eieio();
232 /* 236 /*
233 * Now set the first dword including the valid bit 237 * Now set the first dword including the valid bit
234 * NOTE: this also unlocks the hpte 238 * NOTE: this also unlocks the hpte
235 */ 239 */
236 hptep->v = hpte_v; 240 hptep->v = cpu_to_be64(hpte_v);
237 241
238 __asm__ __volatile__ ("ptesync" : : : "memory"); 242 __asm__ __volatile__ ("ptesync" : : : "memory");
239 243
@@ -254,12 +258,12 @@ static long native_hpte_remove(unsigned long hpte_group)
254 258
255 for (i = 0; i < HPTES_PER_GROUP; i++) { 259 for (i = 0; i < HPTES_PER_GROUP; i++) {
256 hptep = htab_address + hpte_group + slot_offset; 260 hptep = htab_address + hpte_group + slot_offset;
257 hpte_v = hptep->v; 261 hpte_v = be64_to_cpu(hptep->v);
258 262
259 if ((hpte_v & HPTE_V_VALID) && !(hpte_v & HPTE_V_BOLTED)) { 263 if ((hpte_v & HPTE_V_VALID) && !(hpte_v & HPTE_V_BOLTED)) {
260 /* retry with lock held */ 264 /* retry with lock held */
261 native_lock_hpte(hptep); 265 native_lock_hpte(hptep);
262 hpte_v = hptep->v; 266 hpte_v = be64_to_cpu(hptep->v);
263 if ((hpte_v & HPTE_V_VALID) 267 if ((hpte_v & HPTE_V_VALID)
264 && !(hpte_v & HPTE_V_BOLTED)) 268 && !(hpte_v & HPTE_V_BOLTED))
265 break; 269 break;
@@ -294,7 +298,7 @@ static long native_hpte_updatepp(unsigned long slot, unsigned long newpp,
294 298
295 native_lock_hpte(hptep); 299 native_lock_hpte(hptep);
296 300
297 hpte_v = hptep->v; 301 hpte_v = be64_to_cpu(hptep->v);
298 /* 302 /*
299 * We need to invalidate the TLB always because hpte_remove doesn't do 303 * We need to invalidate the TLB always because hpte_remove doesn't do
300 * a tlb invalidate. If a hash bucket gets full, we "evict" a more/less 304 * a tlb invalidate. If a hash bucket gets full, we "evict" a more/less
@@ -308,8 +312,8 @@ static long native_hpte_updatepp(unsigned long slot, unsigned long newpp,
308 } else { 312 } else {
309 DBG_LOW(" -> hit\n"); 313 DBG_LOW(" -> hit\n");
310 /* Update the HPTE */ 314 /* Update the HPTE */
311 hptep->r = (hptep->r & ~(HPTE_R_PP | HPTE_R_N)) | 315 hptep->r = cpu_to_be64((be64_to_cpu(hptep->r) & ~(HPTE_R_PP | HPTE_R_N)) |
312 (newpp & (HPTE_R_PP | HPTE_R_N | HPTE_R_C)); 316 (newpp & (HPTE_R_PP | HPTE_R_N | HPTE_R_C)));
313 } 317 }
314 native_unlock_hpte(hptep); 318 native_unlock_hpte(hptep);
315 319
@@ -334,7 +338,7 @@ static long native_hpte_find(unsigned long vpn, int psize, int ssize)
334 slot = (hash & htab_hash_mask) * HPTES_PER_GROUP; 338 slot = (hash & htab_hash_mask) * HPTES_PER_GROUP;
335 for (i = 0; i < HPTES_PER_GROUP; i++) { 339 for (i = 0; i < HPTES_PER_GROUP; i++) {
336 hptep = htab_address + slot; 340 hptep = htab_address + slot;
337 hpte_v = hptep->v; 341 hpte_v = be64_to_cpu(hptep->v);
338 342
339 if (HPTE_V_COMPARE(hpte_v, want_v) && (hpte_v & HPTE_V_VALID)) 343 if (HPTE_V_COMPARE(hpte_v, want_v) && (hpte_v & HPTE_V_VALID))
340 /* HPTE matches */ 344 /* HPTE matches */
@@ -369,8 +373,9 @@ static void native_hpte_updateboltedpp(unsigned long newpp, unsigned long ea,
369 hptep = htab_address + slot; 373 hptep = htab_address + slot;
370 374
371 /* Update the HPTE */ 375 /* Update the HPTE */
372 hptep->r = (hptep->r & ~(HPTE_R_PP | HPTE_R_N)) | 376 hptep->r = cpu_to_be64((be64_to_cpu(hptep->r) &
373 (newpp & (HPTE_R_PP | HPTE_R_N)); 377 ~(HPTE_R_PP | HPTE_R_N)) |
378 (newpp & (HPTE_R_PP | HPTE_R_N)));
374 /* 379 /*
375 * Ensure it is out of the tlb too. Bolted entries base and 380 * Ensure it is out of the tlb too. Bolted entries base and
376 * actual page size will be same. 381 * actual page size will be same.
@@ -392,7 +397,7 @@ static void native_hpte_invalidate(unsigned long slot, unsigned long vpn,
392 397
393 want_v = hpte_encode_avpn(vpn, bpsize, ssize); 398 want_v = hpte_encode_avpn(vpn, bpsize, ssize);
394 native_lock_hpte(hptep); 399 native_lock_hpte(hptep);
395 hpte_v = hptep->v; 400 hpte_v = be64_to_cpu(hptep->v);
396 401
397 /* 402 /*
398 * We need to invalidate the TLB always because hpte_remove doesn't do 403 * We need to invalidate the TLB always because hpte_remove doesn't do
@@ -458,7 +463,7 @@ static void native_hugepage_invalidate(struct mm_struct *mm,
458 hptep = htab_address + slot; 463 hptep = htab_address + slot;
459 want_v = hpte_encode_avpn(vpn, psize, ssize); 464 want_v = hpte_encode_avpn(vpn, psize, ssize);
460 native_lock_hpte(hptep); 465 native_lock_hpte(hptep);
461 hpte_v = hptep->v; 466 hpte_v = be64_to_cpu(hptep->v);
462 467
463 /* Even if we miss, we need to invalidate the TLB */ 468 /* Even if we miss, we need to invalidate the TLB */
464 if (!HPTE_V_COMPARE(hpte_v, want_v) || !(hpte_v & HPTE_V_VALID)) 469 if (!HPTE_V_COMPARE(hpte_v, want_v) || !(hpte_v & HPTE_V_VALID))
@@ -519,11 +524,12 @@ static void hpte_decode(struct hash_pte *hpte, unsigned long slot,
519 int *psize, int *apsize, int *ssize, unsigned long *vpn) 524 int *psize, int *apsize, int *ssize, unsigned long *vpn)
520{ 525{
521 unsigned long avpn, pteg, vpi; 526 unsigned long avpn, pteg, vpi;
522 unsigned long hpte_v = hpte->v; 527 unsigned long hpte_v = be64_to_cpu(hpte->v);
528 unsigned long hpte_r = be64_to_cpu(hpte->r);
523 unsigned long vsid, seg_off; 529 unsigned long vsid, seg_off;
524 int size, a_size, shift; 530 int size, a_size, shift;
525 /* Look at the 8 bit LP value */ 531 /* Look at the 8 bit LP value */
526 unsigned int lp = (hpte->r >> LP_SHIFT) & ((1 << LP_BITS) - 1); 532 unsigned int lp = (hpte_r >> LP_SHIFT) & ((1 << LP_BITS) - 1);
527 533
528 if (!(hpte_v & HPTE_V_LARGE)) { 534 if (!(hpte_v & HPTE_V_LARGE)) {
529 size = MMU_PAGE_4K; 535 size = MMU_PAGE_4K;
@@ -612,7 +618,7 @@ static void native_hpte_clear(void)
612 * running, right? and for crash dump, we probably 618 * running, right? and for crash dump, we probably
613 * don't want to wait for a maybe bad cpu. 619 * don't want to wait for a maybe bad cpu.
614 */ 620 */
615 hpte_v = hptep->v; 621 hpte_v = be64_to_cpu(hptep->v);
616 622
617 /* 623 /*
618 * Call __tlbie() here rather than tlbie() since we 624 * Call __tlbie() here rather than tlbie() since we
@@ -664,7 +670,7 @@ static void native_flush_hash_range(unsigned long number, int local)
664 hptep = htab_address + slot; 670 hptep = htab_address + slot;
665 want_v = hpte_encode_avpn(vpn, psize, ssize); 671 want_v = hpte_encode_avpn(vpn, psize, ssize);
666 native_lock_hpte(hptep); 672 native_lock_hpte(hptep);
667 hpte_v = hptep->v; 673 hpte_v = be64_to_cpu(hptep->v);
668 if (!HPTE_V_COMPARE(hpte_v, want_v) || 674 if (!HPTE_V_COMPARE(hpte_v, want_v) ||
669 !(hpte_v & HPTE_V_VALID)) 675 !(hpte_v & HPTE_V_VALID))
670 native_unlock_hpte(hptep); 676 native_unlock_hpte(hptep);
diff --git a/arch/powerpc/mm/hash_utils_64.c b/arch/powerpc/mm/hash_utils_64.c
index bde8b5589755..6176b3cdf579 100644
--- a/arch/powerpc/mm/hash_utils_64.c
+++ b/arch/powerpc/mm/hash_utils_64.c
@@ -251,19 +251,18 @@ static int __init htab_dt_scan_seg_sizes(unsigned long node,
251 void *data) 251 void *data)
252{ 252{
253 char *type = of_get_flat_dt_prop(node, "device_type", NULL); 253 char *type = of_get_flat_dt_prop(node, "device_type", NULL);
254 u32 *prop; 254 __be32 *prop;
255 unsigned long size = 0; 255 unsigned long size = 0;
256 256
257 /* We are scanning "cpu" nodes only */ 257 /* We are scanning "cpu" nodes only */
258 if (type == NULL || strcmp(type, "cpu") != 0) 258 if (type == NULL || strcmp(type, "cpu") != 0)
259 return 0; 259 return 0;
260 260
261 prop = (u32 *)of_get_flat_dt_prop(node, "ibm,processor-segment-sizes", 261 prop = of_get_flat_dt_prop(node, "ibm,processor-segment-sizes", &size);
262 &size);
263 if (prop == NULL) 262 if (prop == NULL)
264 return 0; 263 return 0;
265 for (; size >= 4; size -= 4, ++prop) { 264 for (; size >= 4; size -= 4, ++prop) {
266 if (prop[0] == 40) { 265 if (be32_to_cpu(prop[0]) == 40) {
267 DBG("1T segment support detected\n"); 266 DBG("1T segment support detected\n");
268 cur_cpu_spec->mmu_features |= MMU_FTR_1T_SEGMENT; 267 cur_cpu_spec->mmu_features |= MMU_FTR_1T_SEGMENT;
269 return 1; 268 return 1;
@@ -307,23 +306,22 @@ static int __init htab_dt_scan_page_sizes(unsigned long node,
307 void *data) 306 void *data)
308{ 307{
309 char *type = of_get_flat_dt_prop(node, "device_type", NULL); 308 char *type = of_get_flat_dt_prop(node, "device_type", NULL);
310 u32 *prop; 309 __be32 *prop;
311 unsigned long size = 0; 310 unsigned long size = 0;
312 311
313 /* We are scanning "cpu" nodes only */ 312 /* We are scanning "cpu" nodes only */
314 if (type == NULL || strcmp(type, "cpu") != 0) 313 if (type == NULL || strcmp(type, "cpu") != 0)
315 return 0; 314 return 0;
316 315
317 prop = (u32 *)of_get_flat_dt_prop(node, 316 prop = of_get_flat_dt_prop(node, "ibm,segment-page-sizes", &size);
318 "ibm,segment-page-sizes", &size);
319 if (prop != NULL) { 317 if (prop != NULL) {
320 pr_info("Page sizes from device-tree:\n"); 318 pr_info("Page sizes from device-tree:\n");
321 size /= 4; 319 size /= 4;
322 cur_cpu_spec->mmu_features &= ~(MMU_FTR_16M_PAGE); 320 cur_cpu_spec->mmu_features &= ~(MMU_FTR_16M_PAGE);
323 while(size > 0) { 321 while(size > 0) {
324 unsigned int base_shift = prop[0]; 322 unsigned int base_shift = be32_to_cpu(prop[0]);
325 unsigned int slbenc = prop[1]; 323 unsigned int slbenc = be32_to_cpu(prop[1]);
326 unsigned int lpnum = prop[2]; 324 unsigned int lpnum = be32_to_cpu(prop[2]);
327 struct mmu_psize_def *def; 325 struct mmu_psize_def *def;
328 int idx, base_idx; 326 int idx, base_idx;
329 327
@@ -356,8 +354,8 @@ static int __init htab_dt_scan_page_sizes(unsigned long node,
356 def->tlbiel = 0; 354 def->tlbiel = 0;
357 355
358 while (size > 0 && lpnum) { 356 while (size > 0 && lpnum) {
359 unsigned int shift = prop[0]; 357 unsigned int shift = be32_to_cpu(prop[0]);
360 int penc = prop[1]; 358 int penc = be32_to_cpu(prop[1]);
361 359
362 prop += 2; size -= 2; 360 prop += 2; size -= 2;
363 lpnum--; 361 lpnum--;
@@ -390,8 +388,8 @@ static int __init htab_dt_scan_hugepage_blocks(unsigned long node,
390 const char *uname, int depth, 388 const char *uname, int depth,
391 void *data) { 389 void *data) {
392 char *type = of_get_flat_dt_prop(node, "device_type", NULL); 390 char *type = of_get_flat_dt_prop(node, "device_type", NULL);
393 unsigned long *addr_prop; 391 __be64 *addr_prop;
394 u32 *page_count_prop; 392 __be32 *page_count_prop;
395 unsigned int expected_pages; 393 unsigned int expected_pages;
396 long unsigned int phys_addr; 394 long unsigned int phys_addr;
397 long unsigned int block_size; 395 long unsigned int block_size;
@@ -405,12 +403,12 @@ static int __init htab_dt_scan_hugepage_blocks(unsigned long node,
405 page_count_prop = of_get_flat_dt_prop(node, "ibm,expected#pages", NULL); 403 page_count_prop = of_get_flat_dt_prop(node, "ibm,expected#pages", NULL);
406 if (page_count_prop == NULL) 404 if (page_count_prop == NULL)
407 return 0; 405 return 0;
408 expected_pages = (1 << page_count_prop[0]); 406 expected_pages = (1 << be32_to_cpu(page_count_prop[0]));
409 addr_prop = of_get_flat_dt_prop(node, "reg", NULL); 407 addr_prop = of_get_flat_dt_prop(node, "reg", NULL);
410 if (addr_prop == NULL) 408 if (addr_prop == NULL)
411 return 0; 409 return 0;
412 phys_addr = addr_prop[0]; 410 phys_addr = be64_to_cpu(addr_prop[0]);
413 block_size = addr_prop[1]; 411 block_size = be64_to_cpu(addr_prop[1]);
414 if (block_size != (16 * GB)) 412 if (block_size != (16 * GB))
415 return 0; 413 return 0;
416 printk(KERN_INFO "Huge page(16GB) memory: " 414 printk(KERN_INFO "Huge page(16GB) memory: "
@@ -534,16 +532,16 @@ static int __init htab_dt_scan_pftsize(unsigned long node,
534 void *data) 532 void *data)
535{ 533{
536 char *type = of_get_flat_dt_prop(node, "device_type", NULL); 534 char *type = of_get_flat_dt_prop(node, "device_type", NULL);
537 u32 *prop; 535 __be32 *prop;
538 536
539 /* We are scanning "cpu" nodes only */ 537 /* We are scanning "cpu" nodes only */
540 if (type == NULL || strcmp(type, "cpu") != 0) 538 if (type == NULL || strcmp(type, "cpu") != 0)
541 return 0; 539 return 0;
542 540
543 prop = (u32 *)of_get_flat_dt_prop(node, "ibm,pft-size", NULL); 541 prop = of_get_flat_dt_prop(node, "ibm,pft-size", NULL);
544 if (prop != NULL) { 542 if (prop != NULL) {
545 /* pft_size[0] is the NUMA CEC cookie */ 543 /* pft_size[0] is the NUMA CEC cookie */
546 ppc64_pft_size = prop[1]; 544 ppc64_pft_size = be32_to_cpu(prop[1]);
547 return 1; 545 return 1;
548 } 546 }
549 return 0; 547 return 0;
diff --git a/arch/powerpc/mm/init_32.c b/arch/powerpc/mm/init_32.c
index d47d3dab4870..cff59f1bec23 100644
--- a/arch/powerpc/mm/init_32.c
+++ b/arch/powerpc/mm/init_32.c
@@ -213,7 +213,12 @@ void setup_initial_memory_limit(phys_addr_t first_memblock_base,
213 */ 213 */
214 BUG_ON(first_memblock_base != 0); 214 BUG_ON(first_memblock_base != 0);
215 215
216#ifdef CONFIG_PIN_TLB
217 /* 8xx can only access 24MB at the moment */
218 memblock_set_current_limit(min_t(u64, first_memblock_size, 0x01800000));
219#else
216 /* 8xx can only access 8MB at the moment */ 220 /* 8xx can only access 8MB at the moment */
217 memblock_set_current_limit(min_t(u64, first_memblock_size, 0x00800000)); 221 memblock_set_current_limit(min_t(u64, first_memblock_size, 0x00800000));
222#endif
218} 223}
219#endif /* CONFIG_8xx */ 224#endif /* CONFIG_8xx */
diff --git a/arch/powerpc/mm/init_64.c b/arch/powerpc/mm/init_64.c
index 8ed035d2edb5..e3734edffa69 100644
--- a/arch/powerpc/mm/init_64.c
+++ b/arch/powerpc/mm/init_64.c
@@ -304,5 +304,54 @@ void register_page_bootmem_memmap(unsigned long section_nr,
304 struct page *start_page, unsigned long size) 304 struct page *start_page, unsigned long size)
305{ 305{
306} 306}
307#endif /* CONFIG_SPARSEMEM_VMEMMAP */
308 307
308/*
309 * We do not have access to the sparsemem vmemmap, so we fallback to
310 * walking the list of sparsemem blocks which we already maintain for
311 * the sake of crashdump. In the long run, we might want to maintain
312 * a tree if performance of that linear walk becomes a problem.
313 *
314 * realmode_pfn_to_page functions can fail due to:
315 * 1) As real sparsemem blocks do not lay in RAM continously (they
316 * are in virtual address space which is not available in the real mode),
317 * the requested page struct can be split between blocks so get_page/put_page
318 * may fail.
319 * 2) When huge pages are used, the get_page/put_page API will fail
320 * in real mode as the linked addresses in the page struct are virtual
321 * too.
322 */
323struct page *realmode_pfn_to_page(unsigned long pfn)
324{
325 struct vmemmap_backing *vmem_back;
326 struct page *page;
327 unsigned long page_size = 1 << mmu_psize_defs[mmu_vmemmap_psize].shift;
328 unsigned long pg_va = (unsigned long) pfn_to_page(pfn);
329
330 for (vmem_back = vmemmap_list; vmem_back; vmem_back = vmem_back->list) {
331 if (pg_va < vmem_back->virt_addr)
332 continue;
333
334 /* Check that page struct is not split between real pages */
335 if ((pg_va + sizeof(struct page)) >
336 (vmem_back->virt_addr + page_size))
337 return NULL;
338
339 page = (struct page *) (vmem_back->phys + pg_va -
340 vmem_back->virt_addr);
341 return page;
342 }
343
344 return NULL;
345}
346EXPORT_SYMBOL_GPL(realmode_pfn_to_page);
347
348#elif defined(CONFIG_FLATMEM)
349
350struct page *realmode_pfn_to_page(unsigned long pfn)
351{
352 struct page *page = pfn_to_page(pfn);
353 return page;
354}
355EXPORT_SYMBOL_GPL(realmode_pfn_to_page);
356
357#endif /* CONFIG_SPARSEMEM_VMEMMAP/CONFIG_FLATMEM */
diff --git a/arch/powerpc/mm/numa.c b/arch/powerpc/mm/numa.c
index c916127f10c3..33d67844062c 100644
--- a/arch/powerpc/mm/numa.c
+++ b/arch/powerpc/mm/numa.c
@@ -195,7 +195,7 @@ static const __be32 *of_get_usable_memory(struct device_node *memory)
195 u32 len; 195 u32 len;
196 prop = of_get_property(memory, "linux,drconf-usable-memory", &len); 196 prop = of_get_property(memory, "linux,drconf-usable-memory", &len);
197 if (!prop || len < sizeof(unsigned int)) 197 if (!prop || len < sizeof(unsigned int))
198 return 0; 198 return NULL;
199 return prop; 199 return prop;
200} 200}
201 201
@@ -1154,7 +1154,7 @@ static int hot_add_drconf_scn_to_nid(struct device_node *memory,
1154 * represented in the device tree as a node (i.e. memory@XXXX) for 1154 * represented in the device tree as a node (i.e. memory@XXXX) for
1155 * each memblock. 1155 * each memblock.
1156 */ 1156 */
1157int hot_add_node_scn_to_nid(unsigned long scn_addr) 1157static int hot_add_node_scn_to_nid(unsigned long scn_addr)
1158{ 1158{
1159 struct device_node *memory; 1159 struct device_node *memory;
1160 int nid = -1; 1160 int nid = -1;
@@ -1235,7 +1235,7 @@ static u64 hot_add_drconf_memory_max(void)
1235 struct device_node *memory = NULL; 1235 struct device_node *memory = NULL;
1236 unsigned int drconf_cell_cnt = 0; 1236 unsigned int drconf_cell_cnt = 0;
1237 u64 lmb_size = 0; 1237 u64 lmb_size = 0;
1238 const __be32 *dm = 0; 1238 const __be32 *dm = NULL;
1239 1239
1240 memory = of_find_node_by_path("/ibm,dynamic-reconfiguration-memory"); 1240 memory = of_find_node_by_path("/ibm,dynamic-reconfiguration-memory");
1241 if (memory) { 1241 if (memory) {
@@ -1535,7 +1535,7 @@ static void topology_work_fn(struct work_struct *work)
1535} 1535}
1536static DECLARE_WORK(topology_work, topology_work_fn); 1536static DECLARE_WORK(topology_work, topology_work_fn);
1537 1537
1538void topology_schedule_update(void) 1538static void topology_schedule_update(void)
1539{ 1539{
1540 schedule_work(&topology_work); 1540 schedule_work(&topology_work);
1541} 1541}
diff --git a/arch/powerpc/mm/pgtable.c b/arch/powerpc/mm/pgtable.c
index edda589795c3..841e0d00863c 100644
--- a/arch/powerpc/mm/pgtable.c
+++ b/arch/powerpc/mm/pgtable.c
@@ -32,8 +32,6 @@
32#include <asm/tlbflush.h> 32#include <asm/tlbflush.h>
33#include <asm/tlb.h> 33#include <asm/tlb.h>
34 34
35#include "mmu_decl.h"
36
37static inline int is_exec_fault(void) 35static inline int is_exec_fault(void)
38{ 36{
39 return current->thread.regs && TRAP(current->thread.regs) == 0x400; 37 return current->thread.regs && TRAP(current->thread.regs) == 0x400;
@@ -72,7 +70,7 @@ struct page * maybe_pte_to_page(pte_t pte)
72 * support falls into the same category. 70 * support falls into the same category.
73 */ 71 */
74 72
75static pte_t set_pte_filter(pte_t pte, unsigned long addr) 73static pte_t set_pte_filter(pte_t pte)
76{ 74{
77 pte = __pte(pte_val(pte) & ~_PAGE_HPTEFLAGS); 75 pte = __pte(pte_val(pte) & ~_PAGE_HPTEFLAGS);
78 if (pte_looks_normal(pte) && !(cpu_has_feature(CPU_FTR_COHERENT_ICACHE) || 76 if (pte_looks_normal(pte) && !(cpu_has_feature(CPU_FTR_COHERENT_ICACHE) ||
@@ -81,17 +79,6 @@ static pte_t set_pte_filter(pte_t pte, unsigned long addr)
81 if (!pg) 79 if (!pg)
82 return pte; 80 return pte;
83 if (!test_bit(PG_arch_1, &pg->flags)) { 81 if (!test_bit(PG_arch_1, &pg->flags)) {
84#ifdef CONFIG_8xx
85 /* On 8xx, cache control instructions (particularly
86 * "dcbst" from flush_dcache_icache) fault as write
87 * operation if there is an unpopulated TLB entry
88 * for the address in question. To workaround that,
89 * we invalidate the TLB here, thus avoiding dcbst
90 * misbehaviour.
91 */
92 /* 8xx doesn't care about PID, size or ind args */
93 _tlbil_va(addr, 0, 0, 0);
94#endif /* CONFIG_8xx */
95 flush_dcache_icache_page(pg); 82 flush_dcache_icache_page(pg);
96 set_bit(PG_arch_1, &pg->flags); 83 set_bit(PG_arch_1, &pg->flags);
97 } 84 }
@@ -111,7 +98,7 @@ static pte_t set_access_flags_filter(pte_t pte, struct vm_area_struct *vma,
111 * as we don't have two bits to spare for _PAGE_EXEC and _PAGE_HWEXEC so 98 * as we don't have two bits to spare for _PAGE_EXEC and _PAGE_HWEXEC so
112 * instead we "filter out" the exec permission for non clean pages. 99 * instead we "filter out" the exec permission for non clean pages.
113 */ 100 */
114static pte_t set_pte_filter(pte_t pte, unsigned long addr) 101static pte_t set_pte_filter(pte_t pte)
115{ 102{
116 struct page *pg; 103 struct page *pg;
117 104
@@ -193,7 +180,7 @@ void set_pte_at(struct mm_struct *mm, unsigned long addr, pte_t *ptep,
193 * this context might not have been activated yet when this 180 * this context might not have been activated yet when this
194 * is called. 181 * is called.
195 */ 182 */
196 pte = set_pte_filter(pte, addr); 183 pte = set_pte_filter(pte);
197 184
198 /* Perform the setting of the PTE */ 185 /* Perform the setting of the PTE */
199 __set_pte_at(mm, addr, ptep, pte, 0); 186 __set_pte_at(mm, addr, ptep, pte, 0);
diff --git a/arch/powerpc/net/bpf_jit.h b/arch/powerpc/net/bpf_jit.h
index 8a5dfaf5c6b7..9aee27c582dc 100644
--- a/arch/powerpc/net/bpf_jit.h
+++ b/arch/powerpc/net/bpf_jit.h
@@ -39,6 +39,7 @@
39#define r_X 5 39#define r_X 5
40#define r_addr 6 40#define r_addr 6
41#define r_scratch1 7 41#define r_scratch1 7
42#define r_scratch2 8
42#define r_D 14 43#define r_D 14
43#define r_HL 15 44#define r_HL 15
44#define r_M 16 45#define r_M 16
@@ -92,6 +93,8 @@ DECLARE_LOAD_FUNC(sk_load_byte_msh);
92 ___PPC_RA(base) | IMM_L(i)) 93 ___PPC_RA(base) | IMM_L(i))
93#define PPC_LHZ(r, base, i) EMIT(PPC_INST_LHZ | ___PPC_RT(r) | \ 94#define PPC_LHZ(r, base, i) EMIT(PPC_INST_LHZ | ___PPC_RT(r) | \
94 ___PPC_RA(base) | IMM_L(i)) 95 ___PPC_RA(base) | IMM_L(i))
96#define PPC_LHBRX(r, base, b) EMIT(PPC_INST_LHBRX | ___PPC_RT(r) | \
97 ___PPC_RA(base) | ___PPC_RB(b))
95/* Convenience helpers for the above with 'far' offsets: */ 98/* Convenience helpers for the above with 'far' offsets: */
96#define PPC_LD_OFFS(r, base, i) do { if ((i) < 32768) PPC_LD(r, base, i); \ 99#define PPC_LD_OFFS(r, base, i) do { if ((i) < 32768) PPC_LD(r, base, i); \
97 else { PPC_ADDIS(r, base, IMM_HA(i)); \ 100 else { PPC_ADDIS(r, base, IMM_HA(i)); \
@@ -186,6 +189,14 @@ DECLARE_LOAD_FUNC(sk_load_byte_msh);
186 PPC_ORI(d, d, (uintptr_t)(i) & 0xffff); \ 189 PPC_ORI(d, d, (uintptr_t)(i) & 0xffff); \
187 } } while (0); 190 } } while (0);
188 191
192#define PPC_LHBRX_OFFS(r, base, i) \
193 do { PPC_LI32(r, i); PPC_LHBRX(r, r, base); } while(0)
194#ifdef __LITTLE_ENDIAN__
195#define PPC_NTOHS_OFFS(r, base, i) PPC_LHBRX_OFFS(r, base, i)
196#else
197#define PPC_NTOHS_OFFS(r, base, i) PPC_LHZ_OFFS(r, base, i)
198#endif
199
189static inline bool is_nearbranch(int offset) 200static inline bool is_nearbranch(int offset)
190{ 201{
191 return (offset < 32768) && (offset >= -32768); 202 return (offset < 32768) && (offset >= -32768);
diff --git a/arch/powerpc/net/bpf_jit_64.S b/arch/powerpc/net/bpf_jit_64.S
index 7d3a3b5619a2..e76eba74d9da 100644
--- a/arch/powerpc/net/bpf_jit_64.S
+++ b/arch/powerpc/net/bpf_jit_64.S
@@ -43,8 +43,11 @@ sk_load_word_positive_offset:
43 cmpd r_scratch1, r_addr 43 cmpd r_scratch1, r_addr
44 blt bpf_slow_path_word 44 blt bpf_slow_path_word
45 /* Nope, just hitting the header. cr0 here is eq or gt! */ 45 /* Nope, just hitting the header. cr0 here is eq or gt! */
46#ifdef __LITTLE_ENDIAN__
47 lwbrx r_A, r_D, r_addr
48#else
46 lwzx r_A, r_D, r_addr 49 lwzx r_A, r_D, r_addr
47 /* When big endian we don't need to byteswap. */ 50#endif
48 blr /* Return success, cr0 != LT */ 51 blr /* Return success, cr0 != LT */
49 52
50 .globl sk_load_half 53 .globl sk_load_half
@@ -56,7 +59,11 @@ sk_load_half_positive_offset:
56 subi r_scratch1, r_HL, 2 59 subi r_scratch1, r_HL, 2
57 cmpd r_scratch1, r_addr 60 cmpd r_scratch1, r_addr
58 blt bpf_slow_path_half 61 blt bpf_slow_path_half
62#ifdef __LITTLE_ENDIAN__
63 lhbrx r_A, r_D, r_addr
64#else
59 lhzx r_A, r_D, r_addr 65 lhzx r_A, r_D, r_addr
66#endif
60 blr 67 blr
61 68
62 .globl sk_load_byte 69 .globl sk_load_byte
diff --git a/arch/powerpc/net/bpf_jit_comp.c b/arch/powerpc/net/bpf_jit_comp.c
index 2345bdb4d917..ac3c2a10dafd 100644
--- a/arch/powerpc/net/bpf_jit_comp.c
+++ b/arch/powerpc/net/bpf_jit_comp.c
@@ -17,14 +17,8 @@
17 17
18#include "bpf_jit.h" 18#include "bpf_jit.h"
19 19
20#ifndef __BIG_ENDIAN
21/* There are endianness assumptions herein. */
22#error "Little-endian PPC not supported in BPF compiler"
23#endif
24
25int bpf_jit_enable __read_mostly; 20int bpf_jit_enable __read_mostly;
26 21
27
28static inline void bpf_flush_icache(void *start, void *end) 22static inline void bpf_flush_icache(void *start, void *end)
29{ 23{
30 smp_wmb(); 24 smp_wmb();
@@ -193,6 +187,26 @@ static int bpf_jit_build_body(struct sk_filter *fp, u32 *image,
193 PPC_MUL(r_A, r_A, r_scratch1); 187 PPC_MUL(r_A, r_A, r_scratch1);
194 } 188 }
195 break; 189 break;
190 case BPF_S_ALU_MOD_X: /* A %= X; */
191 ctx->seen |= SEEN_XREG;
192 PPC_CMPWI(r_X, 0);
193 if (ctx->pc_ret0 != -1) {
194 PPC_BCC(COND_EQ, addrs[ctx->pc_ret0]);
195 } else {
196 PPC_BCC_SHORT(COND_NE, (ctx->idx*4)+12);
197 PPC_LI(r_ret, 0);
198 PPC_JMP(exit_addr);
199 }
200 PPC_DIVWU(r_scratch1, r_A, r_X);
201 PPC_MUL(r_scratch1, r_X, r_scratch1);
202 PPC_SUB(r_A, r_A, r_scratch1);
203 break;
204 case BPF_S_ALU_MOD_K: /* A %= K; */
205 PPC_LI32(r_scratch2, K);
206 PPC_DIVWU(r_scratch1, r_A, r_scratch2);
207 PPC_MUL(r_scratch1, r_scratch2, r_scratch1);
208 PPC_SUB(r_A, r_A, r_scratch1);
209 break;
196 case BPF_S_ALU_DIV_X: /* A /= X; */ 210 case BPF_S_ALU_DIV_X: /* A /= X; */
197 ctx->seen |= SEEN_XREG; 211 ctx->seen |= SEEN_XREG;
198 PPC_CMPWI(r_X, 0); 212 PPC_CMPWI(r_X, 0);
@@ -346,18 +360,11 @@ static int bpf_jit_build_body(struct sk_filter *fp, u32 *image,
346 break; 360 break;
347 361
348 /*** Ancillary info loads ***/ 362 /*** Ancillary info loads ***/
349
350 /* None of the BPF_S_ANC* codes appear to be passed by
351 * sk_chk_filter(). The interpreter and the x86 BPF
352 * compiler implement them so we do too -- they may be
353 * planted in future.
354 */
355 case BPF_S_ANC_PROTOCOL: /* A = ntohs(skb->protocol); */ 363 case BPF_S_ANC_PROTOCOL: /* A = ntohs(skb->protocol); */
356 BUILD_BUG_ON(FIELD_SIZEOF(struct sk_buff, 364 BUILD_BUG_ON(FIELD_SIZEOF(struct sk_buff,
357 protocol) != 2); 365 protocol) != 2);
358 PPC_LHZ_OFFS(r_A, r_skb, offsetof(struct sk_buff, 366 PPC_NTOHS_OFFS(r_A, r_skb, offsetof(struct sk_buff,
359 protocol)); 367 protocol));
360 /* ntohs is a NOP with BE loads. */
361 break; 368 break;
362 case BPF_S_ANC_IFINDEX: 369 case BPF_S_ANC_IFINDEX:
363 PPC_LD_OFFS(r_scratch1, r_skb, offsetof(struct sk_buff, 370 PPC_LD_OFFS(r_scratch1, r_skb, offsetof(struct sk_buff,
diff --git a/arch/powerpc/platforms/512x/clock.c b/arch/powerpc/platforms/512x/clock.c
index e504166e089a..fd8a37653417 100644
--- a/arch/powerpc/platforms/512x/clock.c
+++ b/arch/powerpc/platforms/512x/clock.c
@@ -24,6 +24,7 @@
24#include <linux/mutex.h> 24#include <linux/mutex.h>
25#include <linux/io.h> 25#include <linux/io.h>
26 26
27#include <linux/of_address.h>
27#include <linux/of_platform.h> 28#include <linux/of_platform.h>
28#include <asm/mpc5xxx.h> 29#include <asm/mpc5xxx.h>
29#include <asm/mpc5121.h> 30#include <asm/mpc5121.h>
diff --git a/arch/powerpc/platforms/512x/mpc512x_shared.c b/arch/powerpc/platforms/512x/mpc512x_shared.c
index a82a41b4fd91..36b5652aada2 100644
--- a/arch/powerpc/platforms/512x/mpc512x_shared.c
+++ b/arch/powerpc/platforms/512x/mpc512x_shared.c
@@ -60,8 +60,6 @@ void mpc512x_restart(char *cmd)
60 ; 60 ;
61} 61}
62 62
63#if IS_ENABLED(CONFIG_FB_FSL_DIU)
64
65struct fsl_diu_shared_fb { 63struct fsl_diu_shared_fb {
66 u8 gamma[0x300]; /* 32-bit aligned! */ 64 u8 gamma[0x300]; /* 32-bit aligned! */
67 struct diu_ad ad0; /* 32-bit aligned! */ 65 struct diu_ad ad0; /* 32-bit aligned! */
@@ -71,7 +69,7 @@ struct fsl_diu_shared_fb {
71}; 69};
72 70
73#define DIU_DIV_MASK 0x000000ff 71#define DIU_DIV_MASK 0x000000ff
74void mpc512x_set_pixel_clock(unsigned int pixclock) 72static void mpc512x_set_pixel_clock(unsigned int pixclock)
75{ 73{
76 unsigned long bestval, bestfreq, speed, busfreq; 74 unsigned long bestval, bestfreq, speed, busfreq;
77 unsigned long minpixclock, maxpixclock, pixval; 75 unsigned long minpixclock, maxpixclock, pixval;
@@ -164,7 +162,7 @@ void mpc512x_set_pixel_clock(unsigned int pixclock)
164 iounmap(ccm); 162 iounmap(ccm);
165} 163}
166 164
167enum fsl_diu_monitor_port 165static enum fsl_diu_monitor_port
168mpc512x_valid_monitor_port(enum fsl_diu_monitor_port port) 166mpc512x_valid_monitor_port(enum fsl_diu_monitor_port port)
169{ 167{
170 return FSL_DIU_PORT_DVI; 168 return FSL_DIU_PORT_DVI;
@@ -179,7 +177,7 @@ static inline void mpc512x_free_bootmem(struct page *page)
179 free_reserved_page(page); 177 free_reserved_page(page);
180} 178}
181 179
182void mpc512x_release_bootmem(void) 180static void mpc512x_release_bootmem(void)
183{ 181{
184 unsigned long addr = diu_shared_fb.fb_phys & PAGE_MASK; 182 unsigned long addr = diu_shared_fb.fb_phys & PAGE_MASK;
185 unsigned long size = diu_shared_fb.fb_len; 183 unsigned long size = diu_shared_fb.fb_len;
@@ -205,7 +203,7 @@ void mpc512x_release_bootmem(void)
205 * address range will be reserved in setup_arch() after bootmem 203 * address range will be reserved in setup_arch() after bootmem
206 * allocator is up. 204 * allocator is up.
207 */ 205 */
208void __init mpc512x_init_diu(void) 206static void __init mpc512x_init_diu(void)
209{ 207{
210 struct device_node *np; 208 struct device_node *np;
211 struct diu __iomem *diu_reg; 209 struct diu __iomem *diu_reg;
@@ -274,7 +272,7 @@ out:
274 iounmap(diu_reg); 272 iounmap(diu_reg);
275} 273}
276 274
277void __init mpc512x_setup_diu(void) 275static void __init mpc512x_setup_diu(void)
278{ 276{
279 int ret; 277 int ret;
280 278
@@ -303,8 +301,6 @@ void __init mpc512x_setup_diu(void)
303 diu_ops.release_bootmem = mpc512x_release_bootmem; 301 diu_ops.release_bootmem = mpc512x_release_bootmem;
304} 302}
305 303
306#endif
307
308void __init mpc512x_init_IRQ(void) 304void __init mpc512x_init_IRQ(void)
309{ 305{
310 struct device_node *np; 306 struct device_node *np;
@@ -337,7 +333,7 @@ static struct of_device_id __initdata of_bus_ids[] = {
337 {}, 333 {},
338}; 334};
339 335
340void __init mpc512x_declare_of_platform_devices(void) 336static void __init mpc512x_declare_of_platform_devices(void)
341{ 337{
342 if (of_platform_bus_probe(NULL, of_bus_ids, NULL)) 338 if (of_platform_bus_probe(NULL, of_bus_ids, NULL))
343 printk(KERN_ERR __FILE__ ": " 339 printk(KERN_ERR __FILE__ ": "
@@ -387,7 +383,7 @@ static unsigned int __init get_fifo_size(struct device_node *np,
387 ((u32)(_base) + sizeof(struct mpc52xx_psc))) 383 ((u32)(_base) + sizeof(struct mpc52xx_psc)))
388 384
389/* Init PSC FIFO space for TX and RX slices */ 385/* Init PSC FIFO space for TX and RX slices */
390void __init mpc512x_psc_fifo_init(void) 386static void __init mpc512x_psc_fifo_init(void)
391{ 387{
392 struct device_node *np; 388 struct device_node *np;
393 void __iomem *psc; 389 void __iomem *psc;
diff --git a/arch/powerpc/platforms/512x/pdm360ng.c b/arch/powerpc/platforms/512x/pdm360ng.c
index 24b314d7bd5f..116f2325b20b 100644
--- a/arch/powerpc/platforms/512x/pdm360ng.c
+++ b/arch/powerpc/platforms/512x/pdm360ng.c
@@ -14,6 +14,8 @@
14 14
15#include <linux/kernel.h> 15#include <linux/kernel.h>
16#include <linux/io.h> 16#include <linux/io.h>
17#include <linux/of_address.h>
18#include <linux/of_fdt.h>
17#include <linux/of_platform.h> 19#include <linux/of_platform.h>
18 20
19#include <asm/machdep.h> 21#include <asm/machdep.h>
diff --git a/arch/powerpc/platforms/52xx/Kconfig b/arch/powerpc/platforms/52xx/Kconfig
index 90f4496017e4..af54174801f7 100644
--- a/arch/powerpc/platforms/52xx/Kconfig
+++ b/arch/powerpc/platforms/52xx/Kconfig
@@ -57,5 +57,5 @@ config PPC_MPC5200_BUGFIX
57 57
58config PPC_MPC5200_LPBFIFO 58config PPC_MPC5200_LPBFIFO
59 tristate "MPC5200 LocalPlus bus FIFO driver" 59 tristate "MPC5200 LocalPlus bus FIFO driver"
60 depends on PPC_MPC52xx 60 depends on PPC_MPC52xx && PPC_BESTCOMM
61 select PPC_BESTCOMM_GEN_BD 61 select PPC_BESTCOMM_GEN_BD
diff --git a/arch/powerpc/platforms/52xx/mpc52xx_pic.c b/arch/powerpc/platforms/52xx/mpc52xx_pic.c
index b69221ba07fd..2898b737deb7 100644
--- a/arch/powerpc/platforms/52xx/mpc52xx_pic.c
+++ b/arch/powerpc/platforms/52xx/mpc52xx_pic.c
@@ -340,7 +340,7 @@ static int mpc52xx_irqhost_map(struct irq_domain *h, unsigned int virq,
340{ 340{
341 int l1irq; 341 int l1irq;
342 int l2irq; 342 int l2irq;
343 struct irq_chip *irqchip; 343 struct irq_chip *uninitialized_var(irqchip);
344 void *hndlr; 344 void *hndlr;
345 int type; 345 int type;
346 u32 reg; 346 u32 reg;
@@ -373,9 +373,8 @@ static int mpc52xx_irqhost_map(struct irq_domain *h, unsigned int virq,
373 case MPC52xx_IRQ_L1_PERP: irqchip = &mpc52xx_periph_irqchip; break; 373 case MPC52xx_IRQ_L1_PERP: irqchip = &mpc52xx_periph_irqchip; break;
374 case MPC52xx_IRQ_L1_SDMA: irqchip = &mpc52xx_sdma_irqchip; break; 374 case MPC52xx_IRQ_L1_SDMA: irqchip = &mpc52xx_sdma_irqchip; break;
375 case MPC52xx_IRQ_L1_CRIT: 375 case MPC52xx_IRQ_L1_CRIT:
376 default:
377 pr_warn("%s: Critical IRQ #%d is unsupported! Nopping it.\n", 376 pr_warn("%s: Critical IRQ #%d is unsupported! Nopping it.\n",
378 __func__, l1irq); 377 __func__, l2irq);
379 irq_set_chip(virq, &no_irq_chip); 378 irq_set_chip(virq, &no_irq_chip);
380 return 0; 379 return 0;
381 } 380 }
diff --git a/arch/powerpc/platforms/82xx/mpc8272_ads.c b/arch/powerpc/platforms/82xx/mpc8272_ads.c
index 30394b409b3f..6a14cf50f4a2 100644
--- a/arch/powerpc/platforms/82xx/mpc8272_ads.c
+++ b/arch/powerpc/platforms/82xx/mpc8272_ads.c
@@ -16,6 +16,8 @@
16#include <linux/init.h> 16#include <linux/init.h>
17#include <linux/interrupt.h> 17#include <linux/interrupt.h>
18#include <linux/fsl_devices.h> 18#include <linux/fsl_devices.h>
19#include <linux/of_address.h>
20#include <linux/of_fdt.h>
19#include <linux/of_platform.h> 21#include <linux/of_platform.h>
20#include <linux/io.h> 22#include <linux/io.h>
21 23
diff --git a/arch/powerpc/platforms/82xx/pq2fads.c b/arch/powerpc/platforms/82xx/pq2fads.c
index e1dceeec4994..e5f82ec8df17 100644
--- a/arch/powerpc/platforms/82xx/pq2fads.c
+++ b/arch/powerpc/platforms/82xx/pq2fads.c
@@ -15,6 +15,8 @@
15#include <linux/init.h> 15#include <linux/init.h>
16#include <linux/interrupt.h> 16#include <linux/interrupt.h>
17#include <linux/fsl_devices.h> 17#include <linux/fsl_devices.h>
18#include <linux/of_address.h>
19#include <linux/of_fdt.h>
18#include <linux/of_platform.h> 20#include <linux/of_platform.h>
19 21
20#include <asm/io.h> 22#include <asm/io.h>
diff --git a/arch/powerpc/platforms/83xx/mcu_mpc8349emitx.c b/arch/powerpc/platforms/83xx/mcu_mpc8349emitx.c
index 7bc315822935..fd71cfdf2380 100644
--- a/arch/powerpc/platforms/83xx/mcu_mpc8349emitx.c
+++ b/arch/powerpc/platforms/83xx/mcu_mpc8349emitx.c
@@ -204,7 +204,6 @@ static int mcu_remove(struct i2c_client *client)
204 ret = mcu_gpiochip_remove(mcu); 204 ret = mcu_gpiochip_remove(mcu);
205 if (ret) 205 if (ret)
206 return ret; 206 return ret;
207 i2c_set_clientdata(client, NULL);
208 kfree(mcu); 207 kfree(mcu);
209 return 0; 208 return 0;
210} 209}
diff --git a/arch/powerpc/platforms/83xx/suspend.c b/arch/powerpc/platforms/83xx/suspend.c
index 1d769a29249f..3d9716ccd327 100644
--- a/arch/powerpc/platforms/83xx/suspend.c
+++ b/arch/powerpc/platforms/83xx/suspend.c
@@ -20,6 +20,8 @@
20#include <linux/freezer.h> 20#include <linux/freezer.h>
21#include <linux/suspend.h> 21#include <linux/suspend.h>
22#include <linux/fsl_devices.h> 22#include <linux/fsl_devices.h>
23#include <linux/of_address.h>
24#include <linux/of_irq.h>
23#include <linux/of_platform.h> 25#include <linux/of_platform.h>
24#include <linux/export.h> 26#include <linux/export.h>
25 27
diff --git a/arch/powerpc/platforms/85xx/Kconfig b/arch/powerpc/platforms/85xx/Kconfig
index de2eb9320993..4d4634958cfb 100644
--- a/arch/powerpc/platforms/85xx/Kconfig
+++ b/arch/powerpc/platforms/85xx/Kconfig
@@ -218,83 +218,16 @@ config GE_IMP3A
218 This board is a 3U CompactPCI Single Board Computer with a Freescale 218 This board is a 3U CompactPCI Single Board Computer with a Freescale
219 P2020 processor. 219 P2020 processor.
220 220
221config P2041_RDB
222 bool "Freescale P2041 RDB"
223 select DEFAULT_UIMAGE
224 select PPC_E500MC
225 select PHYS_64BIT
226 select SWIOTLB
227 select ARCH_REQUIRE_GPIOLIB
228 select GPIO_MPC8XXX
229 select HAS_RAPIDIO
230 select PPC_EPAPR_HV_PIC
231 help
232 This option enables support for the P2041 RDB board
233
234config P3041_DS
235 bool "Freescale P3041 DS"
236 select DEFAULT_UIMAGE
237 select PPC_E500MC
238 select PHYS_64BIT
239 select SWIOTLB
240 select ARCH_REQUIRE_GPIOLIB
241 select GPIO_MPC8XXX
242 select HAS_RAPIDIO
243 select PPC_EPAPR_HV_PIC
244 help
245 This option enables support for the P3041 DS board
246
247config P4080_DS
248 bool "Freescale P4080 DS"
249 select DEFAULT_UIMAGE
250 select PPC_E500MC
251 select PHYS_64BIT
252 select SWIOTLB
253 select ARCH_REQUIRE_GPIOLIB
254 select GPIO_MPC8XXX
255 select HAS_RAPIDIO
256 select PPC_EPAPR_HV_PIC
257 help
258 This option enables support for the P4080 DS board
259
260config SGY_CTS1000 221config SGY_CTS1000
261 tristate "Servergy CTS-1000 support" 222 tristate "Servergy CTS-1000 support"
262 select GPIOLIB 223 select GPIOLIB
263 select OF_GPIO 224 select OF_GPIO
264 depends on P4080_DS 225 depends on CORENET_GENERIC
265 help 226 help
266 Enable this to support functionality in Servergy's CTS-1000 systems. 227 Enable this to support functionality in Servergy's CTS-1000 systems.
267 228
268endif # PPC32 229endif # PPC32
269 230
270config P5020_DS
271 bool "Freescale P5020 DS"
272 select DEFAULT_UIMAGE
273 select E500
274 select PPC_E500MC
275 select PHYS_64BIT
276 select SWIOTLB
277 select ARCH_REQUIRE_GPIOLIB
278 select GPIO_MPC8XXX
279 select HAS_RAPIDIO
280 select PPC_EPAPR_HV_PIC
281 help
282 This option enables support for the P5020 DS board
283
284config P5040_DS
285 bool "Freescale P5040 DS"
286 select DEFAULT_UIMAGE
287 select E500
288 select PPC_E500MC
289 select PHYS_64BIT
290 select SWIOTLB
291 select ARCH_REQUIRE_GPIOLIB
292 select GPIO_MPC8XXX
293 select HAS_RAPIDIO
294 select PPC_EPAPR_HV_PIC
295 help
296 This option enables support for the P5040 DS board
297
298config PPC_QEMU_E500 231config PPC_QEMU_E500
299 bool "QEMU generic e500 platform" 232 bool "QEMU generic e500 platform"
300 select DEFAULT_UIMAGE 233 select DEFAULT_UIMAGE
@@ -310,10 +243,8 @@ config PPC_QEMU_E500
310 unset based on the emulated CPU (or actual host CPU in the case 243 unset based on the emulated CPU (or actual host CPU in the case
311 of KVM). 244 of KVM).
312 245
313if PPC64 246config CORENET_GENERIC
314 247 bool "Freescale CoreNet Generic"
315config T4240_QDS
316 bool "Freescale T4240 QDS"
317 select DEFAULT_UIMAGE 248 select DEFAULT_UIMAGE
318 select E500 249 select E500
319 select PPC_E500MC 250 select PPC_E500MC
@@ -324,26 +255,14 @@ config T4240_QDS
324 select HAS_RAPIDIO 255 select HAS_RAPIDIO
325 select PPC_EPAPR_HV_PIC 256 select PPC_EPAPR_HV_PIC
326 help 257 help
327 This option enables support for the T4240 QDS board 258 This option enables support for the FSL CoreNet based boards.
328 259 For 32bit kernel, the following boards are supported:
329config B4_QDS 260 P2041 RDB, P3041 DS and P4080 DS
330 bool "Freescale B4 QDS" 261 For 64bit kernel, the following boards are supported:
331 select DEFAULT_UIMAGE 262 T4240 QDS and B4 QDS
332 select E500 263 The following boards are supported for both 32bit and 64bit kernel:
333 select PPC_E500MC 264 P5020 DS and P5040 DS
334 select PHYS_64BIT
335 select SWIOTLB
336 select GPIOLIB
337 select ARCH_REQUIRE_GPIOLIB
338 select HAS_RAPIDIO
339 select PPC_EPAPR_HV_PIC
340 help
341 This option enables support for the B4 QDS board
342 The B4 application development system B4 QDS is a complete
343 debugging environment intended for engineers developing
344 applications for the B4.
345 265
346endif
347endif # FSL_SOC_BOOKE 266endif # FSL_SOC_BOOKE
348 267
349config TQM85xx 268config TQM85xx
diff --git a/arch/powerpc/platforms/85xx/Makefile b/arch/powerpc/platforms/85xx/Makefile
index 53c9f75a6907..dd4c0b59577b 100644
--- a/arch/powerpc/platforms/85xx/Makefile
+++ b/arch/powerpc/platforms/85xx/Makefile
@@ -18,13 +18,7 @@ obj-$(CONFIG_P1010_RDB) += p1010rdb.o
18obj-$(CONFIG_P1022_DS) += p1022_ds.o 18obj-$(CONFIG_P1022_DS) += p1022_ds.o
19obj-$(CONFIG_P1022_RDK) += p1022_rdk.o 19obj-$(CONFIG_P1022_RDK) += p1022_rdk.o
20obj-$(CONFIG_P1023_RDS) += p1023_rds.o 20obj-$(CONFIG_P1023_RDS) += p1023_rds.o
21obj-$(CONFIG_P2041_RDB) += p2041_rdb.o corenet_ds.o 21obj-$(CONFIG_CORENET_GENERIC) += corenet_generic.o
22obj-$(CONFIG_P3041_DS) += p3041_ds.o corenet_ds.o
23obj-$(CONFIG_P4080_DS) += p4080_ds.o corenet_ds.o
24obj-$(CONFIG_P5020_DS) += p5020_ds.o corenet_ds.o
25obj-$(CONFIG_P5040_DS) += p5040_ds.o corenet_ds.o
26obj-$(CONFIG_T4240_QDS) += t4240_qds.o corenet_ds.o
27obj-$(CONFIG_B4_QDS) += b4_qds.o corenet_ds.o
28obj-$(CONFIG_STX_GP3) += stx_gp3.o 22obj-$(CONFIG_STX_GP3) += stx_gp3.o
29obj-$(CONFIG_TQM85xx) += tqm85xx.o 23obj-$(CONFIG_TQM85xx) += tqm85xx.o
30obj-$(CONFIG_SBC8548) += sbc8548.o 24obj-$(CONFIG_SBC8548) += sbc8548.o
diff --git a/arch/powerpc/platforms/85xx/b4_qds.c b/arch/powerpc/platforms/85xx/b4_qds.c
deleted file mode 100644
index 0c6702f8b88e..000000000000
--- a/arch/powerpc/platforms/85xx/b4_qds.c
+++ /dev/null
@@ -1,102 +0,0 @@
1/*
2 * B4 QDS Setup
3 * Should apply for QDS platform of B4860 and it's personalities.
4 * viz B4860/B4420/B4220QDS
5 *
6 * Copyright 2012 Freescale Semiconductor Inc.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 */
13
14#include <linux/kernel.h>
15#include <linux/pci.h>
16#include <linux/kdev_t.h>
17#include <linux/delay.h>
18#include <linux/interrupt.h>
19#include <linux/phy.h>
20
21#include <asm/time.h>
22#include <asm/machdep.h>
23#include <asm/pci-bridge.h>
24#include <mm/mmu_decl.h>
25#include <asm/prom.h>
26#include <asm/udbg.h>
27#include <asm/mpic.h>
28
29#include <linux/of_platform.h>
30#include <sysdev/fsl_soc.h>
31#include <sysdev/fsl_pci.h>
32#include <asm/ehv_pic.h>
33
34#include "corenet_ds.h"
35
36/*
37 * Called very early, device-tree isn't unflattened
38 */
39static int __init b4_qds_probe(void)
40{
41 unsigned long root = of_get_flat_dt_root();
42#ifdef CONFIG_SMP
43 extern struct smp_ops_t smp_85xx_ops;
44#endif
45
46 if ((of_flat_dt_is_compatible(root, "fsl,B4860QDS")) ||
47 (of_flat_dt_is_compatible(root, "fsl,B4420QDS")) ||
48 (of_flat_dt_is_compatible(root, "fsl,B4220QDS")))
49 return 1;
50
51 /* Check if we're running under the Freescale hypervisor */
52 if ((of_flat_dt_is_compatible(root, "fsl,B4860QDS-hv")) ||
53 (of_flat_dt_is_compatible(root, "fsl,B4420QDS-hv")) ||
54 (of_flat_dt_is_compatible(root, "fsl,B4220QDS-hv"))) {
55 ppc_md.init_IRQ = ehv_pic_init;
56 ppc_md.get_irq = ehv_pic_get_irq;
57 ppc_md.restart = fsl_hv_restart;
58 ppc_md.power_off = fsl_hv_halt;
59 ppc_md.halt = fsl_hv_halt;
60#ifdef CONFIG_SMP
61 /*
62 * Disable the timebase sync operations because we can't write
63 * to the timebase registers under the hypervisor.
64 */
65 smp_85xx_ops.give_timebase = NULL;
66 smp_85xx_ops.take_timebase = NULL;
67#endif
68 return 1;
69 }
70
71 return 0;
72}
73
74define_machine(b4_qds) {
75 .name = "B4 QDS",
76 .probe = b4_qds_probe,
77 .setup_arch = corenet_ds_setup_arch,
78 .init_IRQ = corenet_ds_pic_init,
79#ifdef CONFIG_PCI
80 .pcibios_fixup_bus = fsl_pcibios_fixup_bus,
81#endif
82/* coreint doesn't play nice with lazy EE, use legacy mpic for now */
83#ifdef CONFIG_PPC64
84 .get_irq = mpic_get_irq,
85#else
86 .get_irq = mpic_get_coreint_irq,
87#endif
88 .restart = fsl_rstcr_restart,
89 .calibrate_decr = generic_calibrate_decr,
90 .progress = udbg_progress,
91#ifdef CONFIG_PPC64
92 .power_save = book3e_idle,
93#else
94 .power_save = e500_idle,
95#endif
96};
97
98machine_arch_initcall(b4_qds, corenet_ds_publish_devices);
99
100#ifdef CONFIG_SWIOTLB
101machine_arch_initcall(b4_qds, swiotlb_setup_bus_notifier);
102#endif
diff --git a/arch/powerpc/platforms/85xx/c293pcie.c b/arch/powerpc/platforms/85xx/c293pcie.c
index 6208e49142bf..213d5b815827 100644
--- a/arch/powerpc/platforms/85xx/c293pcie.c
+++ b/arch/powerpc/platforms/85xx/c293pcie.c
@@ -11,6 +11,7 @@
11 11
12#include <linux/stddef.h> 12#include <linux/stddef.h>
13#include <linux/kernel.h> 13#include <linux/kernel.h>
14#include <linux/of_fdt.h>
14#include <linux/of_platform.h> 15#include <linux/of_platform.h>
15 16
16#include <asm/machdep.h> 17#include <asm/machdep.h>
diff --git a/arch/powerpc/platforms/85xx/common.c b/arch/powerpc/platforms/85xx/common.c
index d0861a0d8360..eba78c85303f 100644
--- a/arch/powerpc/platforms/85xx/common.c
+++ b/arch/powerpc/platforms/85xx/common.c
@@ -5,6 +5,8 @@
5 * it under the terms of the GNU General Public License version 2 as 5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation. 6 * published by the Free Software Foundation.
7 */ 7 */
8
9#include <linux/of_irq.h>
8#include <linux/of_platform.h> 10#include <linux/of_platform.h>
9 11
10#include <sysdev/cpm2_pic.h> 12#include <sysdev/cpm2_pic.h>
diff --git a/arch/powerpc/platforms/85xx/corenet_ds.c b/arch/powerpc/platforms/85xx/corenet_ds.c
deleted file mode 100644
index aa3690bae415..000000000000
--- a/arch/powerpc/platforms/85xx/corenet_ds.c
+++ /dev/null
@@ -1,96 +0,0 @@
1/*
2 * Corenet based SoC DS Setup
3 *
4 * Maintained by Kumar Gala (see MAINTAINERS for contact information)
5 *
6 * Copyright 2009-2011 Freescale Semiconductor Inc.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 */
13
14#include <linux/kernel.h>
15#include <linux/pci.h>
16#include <linux/kdev_t.h>
17#include <linux/delay.h>
18#include <linux/interrupt.h>
19
20#include <asm/time.h>
21#include <asm/machdep.h>
22#include <asm/pci-bridge.h>
23#include <asm/ppc-pci.h>
24#include <mm/mmu_decl.h>
25#include <asm/prom.h>
26#include <asm/udbg.h>
27#include <asm/mpic.h>
28
29#include <linux/of_platform.h>
30#include <sysdev/fsl_soc.h>
31#include <sysdev/fsl_pci.h>
32#include "smp.h"
33
34void __init corenet_ds_pic_init(void)
35{
36 struct mpic *mpic;
37 unsigned int flags = MPIC_BIG_ENDIAN | MPIC_SINGLE_DEST_CPU |
38 MPIC_NO_RESET;
39
40 if (ppc_md.get_irq == mpic_get_coreint_irq)
41 flags |= MPIC_ENABLE_COREINT;
42
43 mpic = mpic_alloc(NULL, 0, flags, 0, 512, " OpenPIC ");
44 BUG_ON(mpic == NULL);
45
46 mpic_init(mpic);
47}
48
49/*
50 * Setup the architecture
51 */
52void __init corenet_ds_setup_arch(void)
53{
54 mpc85xx_smp_init();
55
56 swiotlb_detect_4g();
57
58 pr_info("%s board from Freescale Semiconductor\n", ppc_md.name);
59}
60
61static const struct of_device_id of_device_ids[] = {
62 {
63 .compatible = "simple-bus"
64 },
65 {
66 .compatible = "fsl,srio",
67 },
68 {
69 .compatible = "fsl,p4080-pcie",
70 },
71 {
72 .compatible = "fsl,qoriq-pcie-v2.2",
73 },
74 {
75 .compatible = "fsl,qoriq-pcie-v2.3",
76 },
77 {
78 .compatible = "fsl,qoriq-pcie-v2.4",
79 },
80 {
81 .compatible = "fsl,qoriq-pcie-v3.0",
82 },
83 /* The following two are for the Freescale hypervisor */
84 {
85 .name = "hypervisor",
86 },
87 {
88 .name = "handles",
89 },
90 {}
91};
92
93int __init corenet_ds_publish_devices(void)
94{
95 return of_platform_bus_probe(NULL, of_device_ids, NULL);
96}
diff --git a/arch/powerpc/platforms/85xx/corenet_ds.h b/arch/powerpc/platforms/85xx/corenet_ds.h
deleted file mode 100644
index ddd700b23031..000000000000
--- a/arch/powerpc/platforms/85xx/corenet_ds.h
+++ /dev/null
@@ -1,19 +0,0 @@
1/*
2 * Corenet based SoC DS Setup
3 *
4 * Copyright 2009 Freescale Semiconductor Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 */
11
12#ifndef CORENET_DS_H
13#define CORENET_DS_H
14
15extern void __init corenet_ds_pic_init(void);
16extern void __init corenet_ds_setup_arch(void);
17extern int __init corenet_ds_publish_devices(void);
18
19#endif
diff --git a/arch/powerpc/platforms/85xx/corenet_generic.c b/arch/powerpc/platforms/85xx/corenet_generic.c
new file mode 100644
index 000000000000..fbd871e69754
--- /dev/null
+++ b/arch/powerpc/platforms/85xx/corenet_generic.c
@@ -0,0 +1,182 @@
1/*
2 * Corenet based SoC DS Setup
3 *
4 * Maintained by Kumar Gala (see MAINTAINERS for contact information)
5 *
6 * Copyright 2009-2011 Freescale Semiconductor Inc.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 */
13
14#include <linux/kernel.h>
15#include <linux/pci.h>
16#include <linux/kdev_t.h>
17#include <linux/delay.h>
18#include <linux/interrupt.h>
19
20#include <asm/time.h>
21#include <asm/machdep.h>
22#include <asm/pci-bridge.h>
23#include <asm/ppc-pci.h>
24#include <mm/mmu_decl.h>
25#include <asm/prom.h>
26#include <asm/udbg.h>
27#include <asm/mpic.h>
28#include <asm/ehv_pic.h>
29
30#include <linux/of_platform.h>
31#include <sysdev/fsl_soc.h>
32#include <sysdev/fsl_pci.h>
33#include "smp.h"
34
35void __init corenet_gen_pic_init(void)
36{
37 struct mpic *mpic;
38 unsigned int flags = MPIC_BIG_ENDIAN | MPIC_SINGLE_DEST_CPU |
39 MPIC_NO_RESET;
40
41 if (ppc_md.get_irq == mpic_get_coreint_irq)
42 flags |= MPIC_ENABLE_COREINT;
43
44 mpic = mpic_alloc(NULL, 0, flags, 0, 512, " OpenPIC ");
45 BUG_ON(mpic == NULL);
46
47 mpic_init(mpic);
48}
49
50/*
51 * Setup the architecture
52 */
53void __init corenet_gen_setup_arch(void)
54{
55 mpc85xx_smp_init();
56
57 swiotlb_detect_4g();
58
59 pr_info("%s board from Freescale Semiconductor\n", ppc_md.name);
60}
61
62static const struct of_device_id of_device_ids[] = {
63 {
64 .compatible = "simple-bus"
65 },
66 {
67 .compatible = "fsl,srio",
68 },
69 {
70 .compatible = "fsl,p4080-pcie",
71 },
72 {
73 .compatible = "fsl,qoriq-pcie-v2.2",
74 },
75 {
76 .compatible = "fsl,qoriq-pcie-v2.3",
77 },
78 {
79 .compatible = "fsl,qoriq-pcie-v2.4",
80 },
81 {
82 .compatible = "fsl,qoriq-pcie-v3.0",
83 },
84 /* The following two are for the Freescale hypervisor */
85 {
86 .name = "hypervisor",
87 },
88 {
89 .name = "handles",
90 },
91 {}
92};
93
94int __init corenet_gen_publish_devices(void)
95{
96 return of_platform_bus_probe(NULL, of_device_ids, NULL);
97}
98
99static const char * const boards[] __initconst = {
100 "fsl,P2041RDB",
101 "fsl,P3041DS",
102 "fsl,P4080DS",
103 "fsl,P5020DS",
104 "fsl,P5040DS",
105 "fsl,T4240QDS",
106 "fsl,B4860QDS",
107 "fsl,B4420QDS",
108 "fsl,B4220QDS",
109 NULL
110};
111
112static const char * const hv_boards[] __initconst = {
113 "fsl,P2041RDB-hv",
114 "fsl,P3041DS-hv",
115 "fsl,P4080DS-hv",
116 "fsl,P5020DS-hv",
117 "fsl,P5040DS-hv",
118 "fsl,T4240QDS-hv",
119 "fsl,B4860QDS-hv",
120 "fsl,B4420QDS-hv",
121 "fsl,B4220QDS-hv",
122 NULL
123};
124
125/*
126 * Called very early, device-tree isn't unflattened
127 */
128static int __init corenet_generic_probe(void)
129{
130 unsigned long root = of_get_flat_dt_root();
131#ifdef CONFIG_SMP
132 extern struct smp_ops_t smp_85xx_ops;
133#endif
134
135 if (of_flat_dt_match(root, boards))
136 return 1;
137
138 /* Check if we're running under the Freescale hypervisor */
139 if (of_flat_dt_match(root, hv_boards)) {
140 ppc_md.init_IRQ = ehv_pic_init;
141 ppc_md.get_irq = ehv_pic_get_irq;
142 ppc_md.restart = fsl_hv_restart;
143 ppc_md.power_off = fsl_hv_halt;
144 ppc_md.halt = fsl_hv_halt;
145#ifdef CONFIG_SMP
146 /*
147 * Disable the timebase sync operations because we can't write
148 * to the timebase registers under the hypervisor.
149 */
150 smp_85xx_ops.give_timebase = NULL;
151 smp_85xx_ops.take_timebase = NULL;
152#endif
153 return 1;
154 }
155
156 return 0;
157}
158
159define_machine(corenet_generic) {
160 .name = "CoreNet Generic",
161 .probe = corenet_generic_probe,
162 .setup_arch = corenet_gen_setup_arch,
163 .init_IRQ = corenet_gen_pic_init,
164#ifdef CONFIG_PCI
165 .pcibios_fixup_bus = fsl_pcibios_fixup_bus,
166#endif
167 .get_irq = mpic_get_coreint_irq,
168 .restart = fsl_rstcr_restart,
169 .calibrate_decr = generic_calibrate_decr,
170 .progress = udbg_progress,
171#ifdef CONFIG_PPC64
172 .power_save = book3e_idle,
173#else
174 .power_save = e500_idle,
175#endif
176};
177
178machine_arch_initcall(corenet_generic, corenet_gen_publish_devices);
179
180#ifdef CONFIG_SWIOTLB
181machine_arch_initcall(corenet_generic, swiotlb_setup_bus_notifier);
182#endif
diff --git a/arch/powerpc/platforms/85xx/p1010rdb.c b/arch/powerpc/platforms/85xx/p1010rdb.c
index 0252961392d5..d6a3dd311494 100644
--- a/arch/powerpc/platforms/85xx/p1010rdb.c
+++ b/arch/powerpc/platforms/85xx/p1010rdb.c
@@ -66,6 +66,8 @@ static int __init p1010_rdb_probe(void)
66 66
67 if (of_flat_dt_is_compatible(root, "fsl,P1010RDB")) 67 if (of_flat_dt_is_compatible(root, "fsl,P1010RDB"))
68 return 1; 68 return 1;
69 if (of_flat_dt_is_compatible(root, "fsl,P1010RDB-PB"))
70 return 1;
69 return 0; 71 return 0;
70} 72}
71 73
diff --git a/arch/powerpc/platforms/85xx/p2041_rdb.c b/arch/powerpc/platforms/85xx/p2041_rdb.c
deleted file mode 100644
index 000c0892fc40..000000000000
--- a/arch/powerpc/platforms/85xx/p2041_rdb.c
+++ /dev/null
@@ -1,87 +0,0 @@
1/*
2 * P2041 RDB Setup
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
10 */
11
12#include <linux/kernel.h>
13#include <linux/pci.h>
14#include <linux/kdev_t.h>
15#include <linux/delay.h>
16#include <linux/interrupt.h>
17#include <linux/phy.h>
18
19#include <asm/time.h>
20#include <asm/machdep.h>
21#include <asm/pci-bridge.h>
22#include <mm/mmu_decl.h>
23#include <asm/prom.h>
24#include <asm/udbg.h>
25#include <asm/mpic.h>
26
27#include <linux/of_platform.h>
28#include <sysdev/fsl_soc.h>
29#include <sysdev/fsl_pci.h>
30#include <asm/ehv_pic.h>
31
32#include "corenet_ds.h"
33
34/*
35 * Called very early, device-tree isn't unflattened
36 */
37static int __init p2041_rdb_probe(void)
38{
39 unsigned long root = of_get_flat_dt_root();
40#ifdef CONFIG_SMP
41 extern struct smp_ops_t smp_85xx_ops;
42#endif
43
44 if (of_flat_dt_is_compatible(root, "fsl,P2041RDB"))
45 return 1;
46
47 /* Check if we're running under the Freescale hypervisor */
48 if (of_flat_dt_is_compatible(root, "fsl,P2041RDB-hv")) {
49 ppc_md.init_IRQ = ehv_pic_init;
50 ppc_md.get_irq = ehv_pic_get_irq;
51 ppc_md.restart = fsl_hv_restart;
52 ppc_md.power_off = fsl_hv_halt;
53 ppc_md.halt = fsl_hv_halt;
54#ifdef CONFIG_SMP
55 /*
56 * Disable the timebase sync operations because we can't write
57 * to the timebase registers under the hypervisor.
58 */
59 smp_85xx_ops.give_timebase = NULL;
60 smp_85xx_ops.take_timebase = NULL;
61#endif
62 return 1;
63 }
64
65 return 0;
66}
67
68define_machine(p2041_rdb) {
69 .name = "P2041 RDB",
70 .probe = p2041_rdb_probe,
71 .setup_arch = corenet_ds_setup_arch,
72 .init_IRQ = corenet_ds_pic_init,
73#ifdef CONFIG_PCI
74 .pcibios_fixup_bus = fsl_pcibios_fixup_bus,
75#endif
76 .get_irq = mpic_get_coreint_irq,
77 .restart = fsl_rstcr_restart,
78 .calibrate_decr = generic_calibrate_decr,
79 .progress = udbg_progress,
80 .power_save = e500_idle,
81};
82
83machine_arch_initcall(p2041_rdb, corenet_ds_publish_devices);
84
85#ifdef CONFIG_SWIOTLB
86machine_arch_initcall(p2041_rdb, swiotlb_setup_bus_notifier);
87#endif
diff --git a/arch/powerpc/platforms/85xx/p3041_ds.c b/arch/powerpc/platforms/85xx/p3041_ds.c
deleted file mode 100644
index b3edc205daa9..000000000000
--- a/arch/powerpc/platforms/85xx/p3041_ds.c
+++ /dev/null
@@ -1,89 +0,0 @@
1/*
2 * P3041 DS Setup
3 *
4 * Maintained by Kumar Gala (see MAINTAINERS for contact information)
5 *
6 * Copyright 2009-2010 Freescale Semiconductor Inc.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 */
13
14#include <linux/kernel.h>
15#include <linux/pci.h>
16#include <linux/kdev_t.h>
17#include <linux/delay.h>
18#include <linux/interrupt.h>
19#include <linux/phy.h>
20
21#include <asm/time.h>
22#include <asm/machdep.h>
23#include <asm/pci-bridge.h>
24#include <mm/mmu_decl.h>
25#include <asm/prom.h>
26#include <asm/udbg.h>
27#include <asm/mpic.h>
28
29#include <linux/of_platform.h>
30#include <sysdev/fsl_soc.h>
31#include <sysdev/fsl_pci.h>
32#include <asm/ehv_pic.h>
33
34#include "corenet_ds.h"
35
36/*
37 * Called very early, device-tree isn't unflattened
38 */
39static int __init p3041_ds_probe(void)
40{
41 unsigned long root = of_get_flat_dt_root();
42#ifdef CONFIG_SMP
43 extern struct smp_ops_t smp_85xx_ops;
44#endif
45
46 if (of_flat_dt_is_compatible(root, "fsl,P3041DS"))
47 return 1;
48
49 /* Check if we're running under the Freescale hypervisor */
50 if (of_flat_dt_is_compatible(root, "fsl,P3041DS-hv")) {
51 ppc_md.init_IRQ = ehv_pic_init;
52 ppc_md.get_irq = ehv_pic_get_irq;
53 ppc_md.restart = fsl_hv_restart;
54 ppc_md.power_off = fsl_hv_halt;
55 ppc_md.halt = fsl_hv_halt;
56#ifdef CONFIG_SMP
57 /*
58 * Disable the timebase sync operations because we can't write
59 * to the timebase registers under the hypervisor.
60 */
61 smp_85xx_ops.give_timebase = NULL;
62 smp_85xx_ops.take_timebase = NULL;
63#endif
64 return 1;
65 }
66
67 return 0;
68}
69
70define_machine(p3041_ds) {
71 .name = "P3041 DS",
72 .probe = p3041_ds_probe,
73 .setup_arch = corenet_ds_setup_arch,
74 .init_IRQ = corenet_ds_pic_init,
75#ifdef CONFIG_PCI
76 .pcibios_fixup_bus = fsl_pcibios_fixup_bus,
77#endif
78 .get_irq = mpic_get_coreint_irq,
79 .restart = fsl_rstcr_restart,
80 .calibrate_decr = generic_calibrate_decr,
81 .progress = udbg_progress,
82 .power_save = e500_idle,
83};
84
85machine_arch_initcall(p3041_ds, corenet_ds_publish_devices);
86
87#ifdef CONFIG_SWIOTLB
88machine_arch_initcall(p3041_ds, swiotlb_setup_bus_notifier);
89#endif
diff --git a/arch/powerpc/platforms/85xx/p4080_ds.c b/arch/powerpc/platforms/85xx/p4080_ds.c
deleted file mode 100644
index 54df10632aea..000000000000
--- a/arch/powerpc/platforms/85xx/p4080_ds.c
+++ /dev/null
@@ -1,87 +0,0 @@
1/*
2 * P4080 DS Setup
3 *
4 * Maintained by Kumar Gala (see MAINTAINERS for contact information)
5 *
6 * Copyright 2009 Freescale Semiconductor Inc.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 */
13
14#include <linux/kernel.h>
15#include <linux/pci.h>
16#include <linux/kdev_t.h>
17#include <linux/delay.h>
18#include <linux/interrupt.h>
19
20#include <asm/time.h>
21#include <asm/machdep.h>
22#include <asm/pci-bridge.h>
23#include <mm/mmu_decl.h>
24#include <asm/prom.h>
25#include <asm/udbg.h>
26#include <asm/mpic.h>
27
28#include <linux/of_platform.h>
29#include <sysdev/fsl_soc.h>
30#include <sysdev/fsl_pci.h>
31#include <asm/ehv_pic.h>
32
33#include "corenet_ds.h"
34
35/*
36 * Called very early, device-tree isn't unflattened
37 */
38static int __init p4080_ds_probe(void)
39{
40 unsigned long root = of_get_flat_dt_root();
41#ifdef CONFIG_SMP
42 extern struct smp_ops_t smp_85xx_ops;
43#endif
44
45 if (of_flat_dt_is_compatible(root, "fsl,P4080DS"))
46 return 1;
47
48 /* Check if we're running under the Freescale hypervisor */
49 if (of_flat_dt_is_compatible(root, "fsl,P4080DS-hv")) {
50 ppc_md.init_IRQ = ehv_pic_init;
51 ppc_md.get_irq = ehv_pic_get_irq;
52 ppc_md.restart = fsl_hv_restart;
53 ppc_md.power_off = fsl_hv_halt;
54 ppc_md.halt = fsl_hv_halt;
55#ifdef CONFIG_SMP
56 /*
57 * Disable the timebase sync operations because we can't write
58 * to the timebase registers under the hypervisor.
59 */
60 smp_85xx_ops.give_timebase = NULL;
61 smp_85xx_ops.take_timebase = NULL;
62#endif
63 return 1;
64 }
65
66 return 0;
67}
68
69define_machine(p4080_ds) {
70 .name = "P4080 DS",
71 .probe = p4080_ds_probe,
72 .setup_arch = corenet_ds_setup_arch,
73 .init_IRQ = corenet_ds_pic_init,
74#ifdef CONFIG_PCI
75 .pcibios_fixup_bus = fsl_pcibios_fixup_bus,
76#endif
77 .get_irq = mpic_get_coreint_irq,
78 .restart = fsl_rstcr_restart,
79 .calibrate_decr = generic_calibrate_decr,
80 .progress = udbg_progress,
81 .power_save = e500_idle,
82};
83
84machine_arch_initcall(p4080_ds, corenet_ds_publish_devices);
85#ifdef CONFIG_SWIOTLB
86machine_arch_initcall(p4080_ds, swiotlb_setup_bus_notifier);
87#endif
diff --git a/arch/powerpc/platforms/85xx/p5020_ds.c b/arch/powerpc/platforms/85xx/p5020_ds.c
deleted file mode 100644
index 39cfa4044e6c..000000000000
--- a/arch/powerpc/platforms/85xx/p5020_ds.c
+++ /dev/null
@@ -1,93 +0,0 @@
1/*
2 * P5020 DS Setup
3 *
4 * Maintained by Kumar Gala (see MAINTAINERS for contact information)
5 *
6 * Copyright 2009-2010 Freescale Semiconductor Inc.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 */
13
14#include <linux/kernel.h>
15#include <linux/pci.h>
16#include <linux/kdev_t.h>
17#include <linux/delay.h>
18#include <linux/interrupt.h>
19#include <linux/phy.h>
20
21#include <asm/time.h>
22#include <asm/machdep.h>
23#include <asm/pci-bridge.h>
24#include <mm/mmu_decl.h>
25#include <asm/prom.h>
26#include <asm/udbg.h>
27#include <asm/mpic.h>
28
29#include <linux/of_platform.h>
30#include <sysdev/fsl_soc.h>
31#include <sysdev/fsl_pci.h>
32#include <asm/ehv_pic.h>
33
34#include "corenet_ds.h"
35
36/*
37 * Called very early, device-tree isn't unflattened
38 */
39static int __init p5020_ds_probe(void)
40{
41 unsigned long root = of_get_flat_dt_root();
42#ifdef CONFIG_SMP
43 extern struct smp_ops_t smp_85xx_ops;
44#endif
45
46 if (of_flat_dt_is_compatible(root, "fsl,P5020DS"))
47 return 1;
48
49 /* Check if we're running under the Freescale hypervisor */
50 if (of_flat_dt_is_compatible(root, "fsl,P5020DS-hv")) {
51 ppc_md.init_IRQ = ehv_pic_init;
52 ppc_md.get_irq = ehv_pic_get_irq;
53 ppc_md.restart = fsl_hv_restart;
54 ppc_md.power_off = fsl_hv_halt;
55 ppc_md.halt = fsl_hv_halt;
56#ifdef CONFIG_SMP
57 /*
58 * Disable the timebase sync operations because we can't write
59 * to the timebase registers under the hypervisor.
60 */
61 smp_85xx_ops.give_timebase = NULL;
62 smp_85xx_ops.take_timebase = NULL;
63#endif
64 return 1;
65 }
66
67 return 0;
68}
69
70define_machine(p5020_ds) {
71 .name = "P5020 DS",
72 .probe = p5020_ds_probe,
73 .setup_arch = corenet_ds_setup_arch,
74 .init_IRQ = corenet_ds_pic_init,
75#ifdef CONFIG_PCI
76 .pcibios_fixup_bus = fsl_pcibios_fixup_bus,
77#endif
78 .get_irq = mpic_get_coreint_irq,
79 .restart = fsl_rstcr_restart,
80 .calibrate_decr = generic_calibrate_decr,
81 .progress = udbg_progress,
82#ifdef CONFIG_PPC64
83 .power_save = book3e_idle,
84#else
85 .power_save = e500_idle,
86#endif
87};
88
89machine_arch_initcall(p5020_ds, corenet_ds_publish_devices);
90
91#ifdef CONFIG_SWIOTLB
92machine_arch_initcall(p5020_ds, swiotlb_setup_bus_notifier);
93#endif
diff --git a/arch/powerpc/platforms/85xx/p5040_ds.c b/arch/powerpc/platforms/85xx/p5040_ds.c
deleted file mode 100644
index f70e74cddf97..000000000000
--- a/arch/powerpc/platforms/85xx/p5040_ds.c
+++ /dev/null
@@ -1,84 +0,0 @@
1/*
2 * P5040 DS Setup
3 *
4 * Copyright 2009-2010 Freescale Semiconductor Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
10 */
11
12#include <linux/kernel.h>
13#include <linux/pci.h>
14
15#include <asm/machdep.h>
16#include <asm/udbg.h>
17#include <asm/mpic.h>
18
19#include <linux/of_fdt.h>
20
21#include <sysdev/fsl_soc.h>
22#include <sysdev/fsl_pci.h>
23#include <asm/ehv_pic.h>
24
25#include "corenet_ds.h"
26
27/*
28 * Called very early, device-tree isn't unflattened
29 */
30static int __init p5040_ds_probe(void)
31{
32 unsigned long root = of_get_flat_dt_root();
33#ifdef CONFIG_SMP
34 extern struct smp_ops_t smp_85xx_ops;
35#endif
36
37 if (of_flat_dt_is_compatible(root, "fsl,P5040DS"))
38 return 1;
39
40 /* Check if we're running under the Freescale hypervisor */
41 if (of_flat_dt_is_compatible(root, "fsl,P5040DS-hv")) {
42 ppc_md.init_IRQ = ehv_pic_init;
43 ppc_md.get_irq = ehv_pic_get_irq;
44 ppc_md.restart = fsl_hv_restart;
45 ppc_md.power_off = fsl_hv_halt;
46 ppc_md.halt = fsl_hv_halt;
47#ifdef CONFIG_SMP
48 /*
49 * Disable the timebase sync operations because we can't write
50 * to the timebase registers under the hypervisor.
51 */
52 smp_85xx_ops.give_timebase = NULL;
53 smp_85xx_ops.take_timebase = NULL;
54#endif
55 return 1;
56 }
57
58 return 0;
59}
60
61define_machine(p5040_ds) {
62 .name = "P5040 DS",
63 .probe = p5040_ds_probe,
64 .setup_arch = corenet_ds_setup_arch,
65 .init_IRQ = corenet_ds_pic_init,
66#ifdef CONFIG_PCI
67 .pcibios_fixup_bus = fsl_pcibios_fixup_bus,
68#endif
69 .get_irq = mpic_get_coreint_irq,
70 .restart = fsl_rstcr_restart,
71 .calibrate_decr = generic_calibrate_decr,
72 .progress = udbg_progress,
73#ifdef CONFIG_PPC64
74 .power_save = book3e_idle,
75#else
76 .power_save = e500_idle,
77#endif
78};
79
80machine_arch_initcall(p5040_ds, corenet_ds_publish_devices);
81
82#ifdef CONFIG_SWIOTLB
83machine_arch_initcall(p5040_ds, swiotlb_setup_bus_notifier);
84#endif
diff --git a/arch/powerpc/platforms/85xx/ppa8548.c b/arch/powerpc/platforms/85xx/ppa8548.c
index 6a7704b92c3b..3daff7c63569 100644
--- a/arch/powerpc/platforms/85xx/ppa8548.c
+++ b/arch/powerpc/platforms/85xx/ppa8548.c
@@ -19,6 +19,7 @@
19#include <linux/init.h> 19#include <linux/init.h>
20#include <linux/reboot.h> 20#include <linux/reboot.h>
21#include <linux/seq_file.h> 21#include <linux/seq_file.h>
22#include <linux/of_fdt.h>
22#include <linux/of_platform.h> 23#include <linux/of_platform.h>
23 24
24#include <asm/machdep.h> 25#include <asm/machdep.h>
diff --git a/arch/powerpc/platforms/85xx/sgy_cts1000.c b/arch/powerpc/platforms/85xx/sgy_cts1000.c
index 7179726ba5c5..b9197cea1854 100644
--- a/arch/powerpc/platforms/85xx/sgy_cts1000.c
+++ b/arch/powerpc/platforms/85xx/sgy_cts1000.c
@@ -16,6 +16,7 @@
16#include <linux/module.h> 16#include <linux/module.h>
17#include <linux/init.h> 17#include <linux/init.h>
18#include <linux/of_gpio.h> 18#include <linux/of_gpio.h>
19#include <linux/of_irq.h>
19#include <linux/workqueue.h> 20#include <linux/workqueue.h>
20#include <linux/reboot.h> 21#include <linux/reboot.h>
21#include <linux/interrupt.h> 22#include <linux/interrupt.h>
diff --git a/arch/powerpc/platforms/85xx/smp.c b/arch/powerpc/platforms/85xx/smp.c
index 281b7f01df63..393f975ab397 100644
--- a/arch/powerpc/platforms/85xx/smp.c
+++ b/arch/powerpc/platforms/85xx/smp.c
@@ -15,6 +15,7 @@
15#include <linux/init.h> 15#include <linux/init.h>
16#include <linux/delay.h> 16#include <linux/delay.h>
17#include <linux/of.h> 17#include <linux/of.h>
18#include <linux/of_address.h>
18#include <linux/kexec.h> 19#include <linux/kexec.h>
19#include <linux/highmem.h> 20#include <linux/highmem.h>
20#include <linux/cpu.h> 21#include <linux/cpu.h>
diff --git a/arch/powerpc/platforms/85xx/socrates_fpga_pic.c b/arch/powerpc/platforms/85xx/socrates_fpga_pic.c
index 3bbbf7489487..55a9682b9529 100644
--- a/arch/powerpc/platforms/85xx/socrates_fpga_pic.c
+++ b/arch/powerpc/platforms/85xx/socrates_fpga_pic.c
@@ -9,6 +9,8 @@
9 */ 9 */
10 10
11#include <linux/irq.h> 11#include <linux/irq.h>
12#include <linux/of_address.h>
13#include <linux/of_irq.h>
12#include <linux/of_platform.h> 14#include <linux/of_platform.h>
13#include <linux/io.h> 15#include <linux/io.h>
14 16
diff --git a/arch/powerpc/platforms/85xx/t4240_qds.c b/arch/powerpc/platforms/85xx/t4240_qds.c
deleted file mode 100644
index 91ead6b1b8af..000000000000
--- a/arch/powerpc/platforms/85xx/t4240_qds.c
+++ /dev/null
@@ -1,93 +0,0 @@
1/*
2 * T4240 QDS Setup
3 *
4 * Maintained by Kumar Gala (see MAINTAINERS for contact information)
5 *
6 * Copyright 2012 Freescale Semiconductor Inc.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 */
13
14#include <linux/kernel.h>
15#include <linux/pci.h>
16#include <linux/kdev_t.h>
17#include <linux/delay.h>
18#include <linux/interrupt.h>
19#include <linux/phy.h>
20
21#include <asm/time.h>
22#include <asm/machdep.h>
23#include <asm/pci-bridge.h>
24#include <mm/mmu_decl.h>
25#include <asm/prom.h>
26#include <asm/udbg.h>
27#include <asm/mpic.h>
28
29#include <linux/of_platform.h>
30#include <sysdev/fsl_soc.h>
31#include <sysdev/fsl_pci.h>
32#include <asm/ehv_pic.h>
33
34#include "corenet_ds.h"
35
36/*
37 * Called very early, device-tree isn't unflattened
38 */
39static int __init t4240_qds_probe(void)
40{
41 unsigned long root = of_get_flat_dt_root();
42#ifdef CONFIG_SMP
43 extern struct smp_ops_t smp_85xx_ops;
44#endif
45
46 if (of_flat_dt_is_compatible(root, "fsl,T4240QDS"))
47 return 1;
48
49 /* Check if we're running under the Freescale hypervisor */
50 if (of_flat_dt_is_compatible(root, "fsl,T4240QDS-hv")) {
51 ppc_md.init_IRQ = ehv_pic_init;
52 ppc_md.get_irq = ehv_pic_get_irq;
53 ppc_md.restart = fsl_hv_restart;
54 ppc_md.power_off = fsl_hv_halt;
55 ppc_md.halt = fsl_hv_halt;
56#ifdef CONFIG_SMP
57 /*
58 * Disable the timebase sync operations because we can't write
59 * to the timebase registers under the hypervisor.
60 */
61 smp_85xx_ops.give_timebase = NULL;
62 smp_85xx_ops.take_timebase = NULL;
63#endif
64 return 1;
65 }
66
67 return 0;
68}
69
70define_machine(t4240_qds) {
71 .name = "T4240 QDS",
72 .probe = t4240_qds_probe,
73 .setup_arch = corenet_ds_setup_arch,
74 .init_IRQ = corenet_ds_pic_init,
75#ifdef CONFIG_PCI
76 .pcibios_fixup_bus = fsl_pcibios_fixup_bus,
77#endif
78 .get_irq = mpic_get_coreint_irq,
79 .restart = fsl_rstcr_restart,
80 .calibrate_decr = generic_calibrate_decr,
81 .progress = udbg_progress,
82#ifdef CONFIG_PPC64
83 .power_save = book3e_idle,
84#else
85 .power_save = e500_idle,
86#endif
87};
88
89machine_arch_initcall(t4240_qds, corenet_ds_publish_devices);
90
91#ifdef CONFIG_SWIOTLB
92machine_arch_initcall(t4240_qds, swiotlb_setup_bus_notifier);
93#endif
diff --git a/arch/powerpc/platforms/86xx/pic.c b/arch/powerpc/platforms/86xx/pic.c
index 9982f57c98b9..d5b98c0f958a 100644
--- a/arch/powerpc/platforms/86xx/pic.c
+++ b/arch/powerpc/platforms/86xx/pic.c
@@ -10,6 +10,7 @@
10#include <linux/stddef.h> 10#include <linux/stddef.h>
11#include <linux/kernel.h> 11#include <linux/kernel.h>
12#include <linux/interrupt.h> 12#include <linux/interrupt.h>
13#include <linux/of_irq.h>
13#include <linux/of_platform.h> 14#include <linux/of_platform.h>
14 15
15#include <asm/mpic.h> 16#include <asm/mpic.h>
diff --git a/arch/powerpc/platforms/8xx/ep88xc.c b/arch/powerpc/platforms/8xx/ep88xc.c
index 7d9ac6040d63..e62166681d08 100644
--- a/arch/powerpc/platforms/8xx/ep88xc.c
+++ b/arch/powerpc/platforms/8xx/ep88xc.c
@@ -10,6 +10,8 @@
10 */ 10 */
11 11
12#include <linux/init.h> 12#include <linux/init.h>
13#include <linux/of_address.h>
14#include <linux/of_fdt.h>
13#include <linux/of_platform.h> 15#include <linux/of_platform.h>
14 16
15#include <asm/machdep.h> 17#include <asm/machdep.h>
diff --git a/arch/powerpc/platforms/8xx/mpc86xads_setup.c b/arch/powerpc/platforms/8xx/mpc86xads_setup.c
index 866feff83c91..63084640c5c5 100644
--- a/arch/powerpc/platforms/8xx/mpc86xads_setup.c
+++ b/arch/powerpc/platforms/8xx/mpc86xads_setup.c
@@ -15,6 +15,8 @@
15 */ 15 */
16 16
17#include <linux/init.h> 17#include <linux/init.h>
18#include <linux/of_address.h>
19#include <linux/of_fdt.h>
18#include <linux/of_platform.h> 20#include <linux/of_platform.h>
19 21
20#include <asm/io.h> 22#include <asm/io.h>
diff --git a/arch/powerpc/platforms/8xx/mpc885ads_setup.c b/arch/powerpc/platforms/8xx/mpc885ads_setup.c
index 5d98398c2f5e..c1262581b63c 100644
--- a/arch/powerpc/platforms/8xx/mpc885ads_setup.c
+++ b/arch/powerpc/platforms/8xx/mpc885ads_setup.c
@@ -25,6 +25,8 @@
25#include <linux/fs_uart_pd.h> 25#include <linux/fs_uart_pd.h>
26#include <linux/fsl_devices.h> 26#include <linux/fsl_devices.h>
27#include <linux/mii.h> 27#include <linux/mii.h>
28#include <linux/of_address.h>
29#include <linux/of_fdt.h>
28#include <linux/of_platform.h> 30#include <linux/of_platform.h>
29 31
30#include <asm/delay.h> 32#include <asm/delay.h>
diff --git a/arch/powerpc/platforms/8xx/tqm8xx_setup.c b/arch/powerpc/platforms/8xx/tqm8xx_setup.c
index 8d21ab70e06c..251aba8759e4 100644
--- a/arch/powerpc/platforms/8xx/tqm8xx_setup.c
+++ b/arch/powerpc/platforms/8xx/tqm8xx_setup.c
@@ -28,6 +28,7 @@
28#include <linux/fs_uart_pd.h> 28#include <linux/fs_uart_pd.h>
29#include <linux/fsl_devices.h> 29#include <linux/fsl_devices.h>
30#include <linux/mii.h> 30#include <linux/mii.h>
31#include <linux/of_fdt.h>
31#include <linux/of_platform.h> 32#include <linux/of_platform.h>
32 33
33#include <asm/delay.h> 34#include <asm/delay.h>
@@ -48,7 +49,7 @@ struct cpm_pin {
48 int port, pin, flags; 49 int port, pin, flags;
49}; 50};
50 51
51static struct __initdata cpm_pin tqm8xx_pins[] = { 52static struct cpm_pin tqm8xx_pins[] __initdata = {
52 /* SMC1 */ 53 /* SMC1 */
53 {CPM_PORTB, 24, CPM_PIN_INPUT}, /* RX */ 54 {CPM_PORTB, 24, CPM_PIN_INPUT}, /* RX */
54 {CPM_PORTB, 25, CPM_PIN_INPUT | CPM_PIN_SECONDARY}, /* TX */ 55 {CPM_PORTB, 25, CPM_PIN_INPUT | CPM_PIN_SECONDARY}, /* TX */
@@ -63,7 +64,7 @@ static struct __initdata cpm_pin tqm8xx_pins[] = {
63 {CPM_PORTC, 11, CPM_PIN_INPUT | CPM_PIN_SECONDARY | CPM_PIN_GPIO}, 64 {CPM_PORTC, 11, CPM_PIN_INPUT | CPM_PIN_SECONDARY | CPM_PIN_GPIO},
64}; 65};
65 66
66static struct __initdata cpm_pin tqm8xx_fec_pins[] = { 67static struct cpm_pin tqm8xx_fec_pins[] __initdata = {
67 /* MII */ 68 /* MII */
68 {CPM_PORTD, 3, CPM_PIN_OUTPUT}, 69 {CPM_PORTD, 3, CPM_PIN_OUTPUT},
69 {CPM_PORTD, 4, CPM_PIN_OUTPUT}, 70 {CPM_PORTD, 4, CPM_PIN_OUTPUT},
diff --git a/arch/powerpc/platforms/Kconfig.cputype b/arch/powerpc/platforms/Kconfig.cputype
index 6704e2e20e6b..c2a566fb8bb8 100644
--- a/arch/powerpc/platforms/Kconfig.cputype
+++ b/arch/powerpc/platforms/Kconfig.cputype
@@ -93,22 +93,23 @@ choice
93 93
94config GENERIC_CPU 94config GENERIC_CPU
95 bool "Generic" 95 bool "Generic"
96 depends on !CPU_LITTLE_ENDIAN
96 97
97config CELL_CPU 98config CELL_CPU
98 bool "Cell Broadband Engine" 99 bool "Cell Broadband Engine"
99 depends on PPC_BOOK3S_64 100 depends on PPC_BOOK3S_64 && !CPU_LITTLE_ENDIAN
100 101
101config POWER4_CPU 102config POWER4_CPU
102 bool "POWER4" 103 bool "POWER4"
103 depends on PPC_BOOK3S_64 104 depends on PPC_BOOK3S_64 && !CPU_LITTLE_ENDIAN
104 105
105config POWER5_CPU 106config POWER5_CPU
106 bool "POWER5" 107 bool "POWER5"
107 depends on PPC_BOOK3S_64 108 depends on PPC_BOOK3S_64 && !CPU_LITTLE_ENDIAN
108 109
109config POWER6_CPU 110config POWER6_CPU
110 bool "POWER6" 111 bool "POWER6"
111 depends on PPC_BOOK3S_64 112 depends on PPC_BOOK3S_64 && !CPU_LITTLE_ENDIAN
112 113
113config POWER7_CPU 114config POWER7_CPU
114 bool "POWER7" 115 bool "POWER7"
diff --git a/arch/powerpc/platforms/cell/celleb_scc_pciex.c b/arch/powerpc/platforms/cell/celleb_scc_pciex.c
index 14be2bd358b8..4278acfa2ede 100644
--- a/arch/powerpc/platforms/cell/celleb_scc_pciex.c
+++ b/arch/powerpc/platforms/cell/celleb_scc_pciex.c
@@ -486,7 +486,6 @@ static __init int celleb_setup_pciex(struct device_node *node,
486 struct pci_controller *phb) 486 struct pci_controller *phb)
487{ 487{
488 struct resource r; 488 struct resource r;
489 struct of_irq oirq;
490 int virq; 489 int virq;
491 490
492 /* SMMIO registers; used inside this file */ 491 /* SMMIO registers; used inside this file */
@@ -507,12 +506,11 @@ static __init int celleb_setup_pciex(struct device_node *node,
507 phb->ops = &scc_pciex_pci_ops; 506 phb->ops = &scc_pciex_pci_ops;
508 507
509 /* internal interrupt handler */ 508 /* internal interrupt handler */
510 if (of_irq_map_one(node, 1, &oirq)) { 509 virq = irq_of_parse_and_map(node, 1);
510 if (!virq) {
511 pr_err("PCIEXC:Failed to map irq\n"); 511 pr_err("PCIEXC:Failed to map irq\n");
512 goto error; 512 goto error;
513 } 513 }
514 virq = irq_create_of_mapping(oirq.controller, oirq.specifier,
515 oirq.size);
516 if (request_irq(virq, pciex_handle_internal_irq, 514 if (request_irq(virq, pciex_handle_internal_irq,
517 0, "pciex", (void *)phb)) { 515 0, "pciex", (void *)phb)) {
518 pr_err("PCIEXC:Failed to request irq\n"); 516 pr_err("PCIEXC:Failed to request irq\n");
diff --git a/arch/powerpc/platforms/cell/celleb_scc_sio.c b/arch/powerpc/platforms/cell/celleb_scc_sio.c
index 9c339ec646f5..c8eb57193826 100644
--- a/arch/powerpc/platforms/cell/celleb_scc_sio.c
+++ b/arch/powerpc/platforms/cell/celleb_scc_sio.c
@@ -45,7 +45,7 @@ static int __init txx9_serial_init(void)
45 struct device_node *node; 45 struct device_node *node;
46 int i; 46 int i;
47 struct uart_port req; 47 struct uart_port req;
48 struct of_irq irq; 48 struct of_phandle_args irq;
49 struct resource res; 49 struct resource res;
50 50
51 for_each_compatible_node(node, "serial", "toshiba,sio-scc") { 51 for_each_compatible_node(node, "serial", "toshiba,sio-scc") {
@@ -53,7 +53,7 @@ static int __init txx9_serial_init(void)
53 if (!(txx9_serial_bitmap & (1<<i))) 53 if (!(txx9_serial_bitmap & (1<<i)))
54 continue; 54 continue;
55 55
56 if (of_irq_map_one(node, i, &irq)) 56 if (of_irq_parse_one(node, i, &irq))
57 continue; 57 continue;
58 if (of_address_to_resource(node, 58 if (of_address_to_resource(node,
59 txx9_scc_tab[i].index, &res)) 59 txx9_scc_tab[i].index, &res))
@@ -66,8 +66,7 @@ static int __init txx9_serial_init(void)
66#ifdef CONFIG_SERIAL_TXX9_CONSOLE 66#ifdef CONFIG_SERIAL_TXX9_CONSOLE
67 req.membase = ioremap(req.mapbase, 0x24); 67 req.membase = ioremap(req.mapbase, 0x24);
68#endif 68#endif
69 req.irq = irq_create_of_mapping(irq.controller, 69 req.irq = irq_create_of_mapping(&irq);
70 irq.specifier, irq.size);
71 req.flags |= UPF_IOREMAP | UPF_BUGGY_UART 70 req.flags |= UPF_IOREMAP | UPF_BUGGY_UART
72 /*HAVE_CTS_LINE*/; 71 /*HAVE_CTS_LINE*/;
73 req.uartclk = 83300000; 72 req.uartclk = 83300000;
diff --git a/arch/powerpc/platforms/cell/spider-pic.c b/arch/powerpc/platforms/cell/spider-pic.c
index 8e299447127e..1f72f4ab6353 100644
--- a/arch/powerpc/platforms/cell/spider-pic.c
+++ b/arch/powerpc/platforms/cell/spider-pic.c
@@ -235,12 +235,9 @@ static unsigned int __init spider_find_cascade_and_node(struct spider_pic *pic)
235 /* First, we check whether we have a real "interrupts" in the device 235 /* First, we check whether we have a real "interrupts" in the device
236 * tree in case the device-tree is ever fixed 236 * tree in case the device-tree is ever fixed
237 */ 237 */
238 struct of_irq oirq; 238 virq = irq_of_parse_and_map(pic->host->of_node, 0);
239 if (of_irq_map_one(pic->host->of_node, 0, &oirq) == 0) { 239 if (virq)
240 virq = irq_create_of_mapping(oirq.controller, oirq.specifier,
241 oirq.size);
242 return virq; 240 return virq;
243 }
244 241
245 /* Now do the horrible hacks */ 242 /* Now do the horrible hacks */
246 tmp = of_get_property(pic->host->of_node, "#interrupt-cells", NULL); 243 tmp = of_get_property(pic->host->of_node, "#interrupt-cells", NULL);
diff --git a/arch/powerpc/platforms/cell/spu_manage.c b/arch/powerpc/platforms/cell/spu_manage.c
index 2bb6977c0a5a..c3327f3d8cf7 100644
--- a/arch/powerpc/platforms/cell/spu_manage.c
+++ b/arch/powerpc/platforms/cell/spu_manage.c
@@ -177,21 +177,20 @@ out:
177 177
178static int __init spu_map_interrupts(struct spu *spu, struct device_node *np) 178static int __init spu_map_interrupts(struct spu *spu, struct device_node *np)
179{ 179{
180 struct of_irq oirq; 180 struct of_phandle_args oirq;
181 int ret; 181 int ret;
182 int i; 182 int i;
183 183
184 for (i=0; i < 3; i++) { 184 for (i=0; i < 3; i++) {
185 ret = of_irq_map_one(np, i, &oirq); 185 ret = of_irq_parse_one(np, i, &oirq);
186 if (ret) { 186 if (ret) {
187 pr_debug("spu_new: failed to get irq %d\n", i); 187 pr_debug("spu_new: failed to get irq %d\n", i);
188 goto err; 188 goto err;
189 } 189 }
190 ret = -EINVAL; 190 ret = -EINVAL;
191 pr_debug(" irq %d no 0x%x on %s\n", i, oirq.specifier[0], 191 pr_debug(" irq %d no 0x%x on %s\n", i, oirq.args[0],
192 oirq.controller->full_name); 192 oirq.np->full_name);
193 spu->irqs[i] = irq_create_of_mapping(oirq.controller, 193 spu->irqs[i] = irq_create_of_mapping(&oirq);
194 oirq.specifier, oirq.size);
195 if (spu->irqs[i] == NO_IRQ) { 194 if (spu->irqs[i] == NO_IRQ) {
196 pr_debug("spu_new: failed to map it !\n"); 195 pr_debug("spu_new: failed to map it !\n");
197 goto err; 196 goto err;
@@ -200,7 +199,7 @@ static int __init spu_map_interrupts(struct spu *spu, struct device_node *np)
200 return 0; 199 return 0;
201 200
202err: 201err:
203 pr_debug("failed to map irq %x for spu %s\n", *oirq.specifier, 202 pr_debug("failed to map irq %x for spu %s\n", *oirq.args,
204 spu->name); 203 spu->name);
205 for (; i >= 0; i--) { 204 for (; i >= 0; i--) {
206 if (spu->irqs[i] != NO_IRQ) 205 if (spu->irqs[i] != NO_IRQ)
diff --git a/arch/powerpc/platforms/chrp/nvram.c b/arch/powerpc/platforms/chrp/nvram.c
index d3ceff04ffc7..9ef8cc3378d0 100644
--- a/arch/powerpc/platforms/chrp/nvram.c
+++ b/arch/powerpc/platforms/chrp/nvram.c
@@ -66,7 +66,7 @@ static void chrp_nvram_write(int addr, unsigned char val)
66void __init chrp_nvram_init(void) 66void __init chrp_nvram_init(void)
67{ 67{
68 struct device_node *nvram; 68 struct device_node *nvram;
69 const unsigned int *nbytes_p; 69 const __be32 *nbytes_p;
70 unsigned int proplen; 70 unsigned int proplen;
71 71
72 nvram = of_find_node_by_type(NULL, "nvram"); 72 nvram = of_find_node_by_type(NULL, "nvram");
@@ -79,7 +79,7 @@ void __init chrp_nvram_init(void)
79 return; 79 return;
80 } 80 }
81 81
82 nvram_size = *nbytes_p; 82 nvram_size = be32_to_cpup(nbytes_p);
83 83
84 printk(KERN_INFO "CHRP nvram contains %u bytes\n", nvram_size); 84 printk(KERN_INFO "CHRP nvram contains %u bytes\n", nvram_size);
85 of_node_put(nvram); 85 of_node_put(nvram);
diff --git a/arch/powerpc/platforms/embedded6xx/flipper-pic.c b/arch/powerpc/platforms/embedded6xx/flipper-pic.c
index 53d6eee01963..4cde8e7da4b8 100644
--- a/arch/powerpc/platforms/embedded6xx/flipper-pic.c
+++ b/arch/powerpc/platforms/embedded6xx/flipper-pic.c
@@ -18,6 +18,7 @@
18#include <linux/init.h> 18#include <linux/init.h>
19#include <linux/irq.h> 19#include <linux/irq.h>
20#include <linux/of.h> 20#include <linux/of.h>
21#include <linux/of_address.h>
21#include <asm/io.h> 22#include <asm/io.h>
22 23
23#include "flipper-pic.h" 24#include "flipper-pic.h"
diff --git a/arch/powerpc/platforms/embedded6xx/hlwd-pic.c b/arch/powerpc/platforms/embedded6xx/hlwd-pic.c
index 3006b5117ec6..6c03034dbbd3 100644
--- a/arch/powerpc/platforms/embedded6xx/hlwd-pic.c
+++ b/arch/powerpc/platforms/embedded6xx/hlwd-pic.c
@@ -18,6 +18,8 @@
18#include <linux/init.h> 18#include <linux/init.h>
19#include <linux/irq.h> 19#include <linux/irq.h>
20#include <linux/of.h> 20#include <linux/of.h>
21#include <linux/of_address.h>
22#include <linux/of_irq.h>
21#include <asm/io.h> 23#include <asm/io.h>
22 24
23#include "hlwd-pic.h" 25#include "hlwd-pic.h"
@@ -181,6 +183,7 @@ struct irq_domain *hlwd_pic_init(struct device_node *np)
181 &hlwd_irq_domain_ops, io_base); 183 &hlwd_irq_domain_ops, io_base);
182 if (!irq_domain) { 184 if (!irq_domain) {
183 pr_err("failed to allocate irq_domain\n"); 185 pr_err("failed to allocate irq_domain\n");
186 iounmap(io_base);
184 return NULL; 187 return NULL;
185 } 188 }
186 189
diff --git a/arch/powerpc/platforms/fsl_uli1575.c b/arch/powerpc/platforms/fsl_uli1575.c
index 92ac9b52b32d..b97f6f3d3c5b 100644
--- a/arch/powerpc/platforms/fsl_uli1575.c
+++ b/arch/powerpc/platforms/fsl_uli1575.c
@@ -321,8 +321,7 @@ static void hpcd_final_uli5288(struct pci_dev *dev)
321{ 321{
322 struct pci_controller *hose = pci_bus_to_host(dev->bus); 322 struct pci_controller *hose = pci_bus_to_host(dev->bus);
323 struct device_node *hosenode = hose ? hose->dn : NULL; 323 struct device_node *hosenode = hose ? hose->dn : NULL;
324 struct of_irq oirq; 324 struct of_phandle_args oirq;
325 int virq, pin = 2;
326 u32 laddr[3]; 325 u32 laddr[3];
327 326
328 if (!machine_is(mpc86xx_hpcd)) 327 if (!machine_is(mpc86xx_hpcd))
@@ -331,12 +330,13 @@ static void hpcd_final_uli5288(struct pci_dev *dev)
331 if (!hosenode) 330 if (!hosenode)
332 return; 331 return;
333 332
333 oirq.np = hosenode;
334 oirq.args[0] = 2;
335 oirq.args_count = 1;
334 laddr[0] = (hose->first_busno << 16) | (PCI_DEVFN(31, 0) << 8); 336 laddr[0] = (hose->first_busno << 16) | (PCI_DEVFN(31, 0) << 8);
335 laddr[1] = laddr[2] = 0; 337 laddr[1] = laddr[2] = 0;
336 of_irq_map_raw(hosenode, &pin, 1, laddr, &oirq); 338 of_irq_parse_raw(laddr, &oirq);
337 virq = irq_create_of_mapping(oirq.controller, oirq.specifier, 339 dev->irq = irq_create_of_mapping(&oirq);
338 oirq.size);
339 dev->irq = virq;
340} 340}
341 341
342DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AL, 0x1575, hpcd_quirk_uli1575); 342DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AL, 0x1575, hpcd_quirk_uli1575);
diff --git a/arch/powerpc/platforms/pasemi/gpio_mdio.c b/arch/powerpc/platforms/pasemi/gpio_mdio.c
index 0237ab782fb8..15adee544638 100644
--- a/arch/powerpc/platforms/pasemi/gpio_mdio.c
+++ b/arch/powerpc/platforms/pasemi/gpio_mdio.c
@@ -30,6 +30,7 @@
30#include <linux/ioport.h> 30#include <linux/ioport.h>
31#include <linux/interrupt.h> 31#include <linux/interrupt.h>
32#include <linux/phy.h> 32#include <linux/phy.h>
33#include <linux/of_address.h>
33#include <linux/of_mdio.h> 34#include <linux/of_mdio.h>
34#include <linux/of_platform.h> 35#include <linux/of_platform.h>
35 36
diff --git a/arch/powerpc/platforms/powermac/pfunc_base.c b/arch/powerpc/platforms/powermac/pfunc_base.c
index f5e3cda6660e..e49d07f3d542 100644
--- a/arch/powerpc/platforms/powermac/pfunc_base.c
+++ b/arch/powerpc/platforms/powermac/pfunc_base.c
@@ -4,6 +4,7 @@
4#include <linux/kernel.h> 4#include <linux/kernel.h>
5#include <linux/interrupt.h> 5#include <linux/interrupt.h>
6#include <linux/spinlock.h> 6#include <linux/spinlock.h>
7#include <linux/of_irq.h>
7 8
8#include <asm/pmac_feature.h> 9#include <asm/pmac_feature.h>
9#include <asm/pmac_pfunc.h> 10#include <asm/pmac_pfunc.h>
diff --git a/arch/powerpc/platforms/powermac/pic.c b/arch/powerpc/platforms/powermac/pic.c
index 31036b56670e..4c24bf60d39d 100644
--- a/arch/powerpc/platforms/powermac/pic.c
+++ b/arch/powerpc/platforms/powermac/pic.c
@@ -393,8 +393,8 @@ static void __init pmac_pic_probe_oldstyle(void)
393#endif 393#endif
394} 394}
395 395
396int of_irq_map_oldworld(struct device_node *device, int index, 396int of_irq_parse_oldworld(struct device_node *device, int index,
397 struct of_irq *out_irq) 397 struct of_phandle_args *out_irq)
398{ 398{
399 const u32 *ints = NULL; 399 const u32 *ints = NULL;
400 int intlen; 400 int intlen;
@@ -422,9 +422,9 @@ int of_irq_map_oldworld(struct device_node *device, int index,
422 if (index >= intlen) 422 if (index >= intlen)
423 return -EINVAL; 423 return -EINVAL;
424 424
425 out_irq->controller = NULL; 425 out_irq->np = NULL;
426 out_irq->specifier[0] = ints[index]; 426 out_irq->args[0] = ints[index];
427 out_irq->size = 1; 427 out_irq->args_count = 1;
428 428
429 return 0; 429 return 0;
430} 430}
diff --git a/arch/powerpc/platforms/powernv/Kconfig b/arch/powerpc/platforms/powernv/Kconfig
index 6fae5eb99ea6..9fced3f6d2dc 100644
--- a/arch/powerpc/platforms/powernv/Kconfig
+++ b/arch/powerpc/platforms/powernv/Kconfig
@@ -9,6 +9,8 @@ config PPC_POWERNV
9 select EPAPR_BOOT 9 select EPAPR_BOOT
10 select PPC_INDIRECT_PIO 10 select PPC_INDIRECT_PIO
11 select PPC_UDBG_16550 11 select PPC_UDBG_16550
12 select PPC_SCOM
13 select ARCH_RANDOM
12 default y 14 default y
13 15
14config POWERNV_MSI 16config POWERNV_MSI
diff --git a/arch/powerpc/platforms/powernv/Makefile b/arch/powerpc/platforms/powernv/Makefile
index 300c437d713c..873fa1370dc4 100644
--- a/arch/powerpc/platforms/powernv/Makefile
+++ b/arch/powerpc/platforms/powernv/Makefile
@@ -1,6 +1,8 @@
1obj-y += setup.o opal-takeover.o opal-wrappers.o opal.o 1obj-y += setup.o opal-takeover.o opal-wrappers.o opal.o
2obj-y += opal-rtc.o opal-nvram.o opal-lpc.o 2obj-y += opal-rtc.o opal-nvram.o opal-lpc.o opal-flash.o
3obj-y += rng.o
3 4
4obj-$(CONFIG_SMP) += smp.o 5obj-$(CONFIG_SMP) += smp.o
5obj-$(CONFIG_PCI) += pci.o pci-p5ioc2.o pci-ioda.o 6obj-$(CONFIG_PCI) += pci.o pci-p5ioc2.o pci-ioda.o
6obj-$(CONFIG_EEH) += eeh-ioda.o eeh-powernv.o 7obj-$(CONFIG_EEH) += eeh-ioda.o eeh-powernv.o
8obj-$(CONFIG_PPC_SCOM) += opal-xscom.o
diff --git a/arch/powerpc/platforms/powernv/eeh-ioda.c b/arch/powerpc/platforms/powernv/eeh-ioda.c
index cf42e74514fa..02245cee7818 100644
--- a/arch/powerpc/platforms/powernv/eeh-ioda.c
+++ b/arch/powerpc/platforms/powernv/eeh-ioda.c
@@ -59,26 +59,60 @@ static struct notifier_block ioda_eeh_nb = {
59}; 59};
60 60
61#ifdef CONFIG_DEBUG_FS 61#ifdef CONFIG_DEBUG_FS
62static int ioda_eeh_dbgfs_set(void *data, u64 val) 62static int ioda_eeh_dbgfs_set(void *data, int offset, u64 val)
63{ 63{
64 struct pci_controller *hose = data; 64 struct pci_controller *hose = data;
65 struct pnv_phb *phb = hose->private_data; 65 struct pnv_phb *phb = hose->private_data;
66 66
67 out_be64(phb->regs + 0xD10, val); 67 out_be64(phb->regs + offset, val);
68 return 0; 68 return 0;
69} 69}
70 70
71static int ioda_eeh_dbgfs_get(void *data, u64 *val) 71static int ioda_eeh_dbgfs_get(void *data, int offset, u64 *val)
72{ 72{
73 struct pci_controller *hose = data; 73 struct pci_controller *hose = data;
74 struct pnv_phb *phb = hose->private_data; 74 struct pnv_phb *phb = hose->private_data;
75 75
76 *val = in_be64(phb->regs + 0xD10); 76 *val = in_be64(phb->regs + offset);
77 return 0; 77 return 0;
78} 78}
79 79
80DEFINE_SIMPLE_ATTRIBUTE(ioda_eeh_dbgfs_ops, ioda_eeh_dbgfs_get, 80static int ioda_eeh_outb_dbgfs_set(void *data, u64 val)
81 ioda_eeh_dbgfs_set, "0x%llx\n"); 81{
82 return ioda_eeh_dbgfs_set(data, 0xD10, val);
83}
84
85static int ioda_eeh_outb_dbgfs_get(void *data, u64 *val)
86{
87 return ioda_eeh_dbgfs_get(data, 0xD10, val);
88}
89
90static int ioda_eeh_inbA_dbgfs_set(void *data, u64 val)
91{
92 return ioda_eeh_dbgfs_set(data, 0xD90, val);
93}
94
95static int ioda_eeh_inbA_dbgfs_get(void *data, u64 *val)
96{
97 return ioda_eeh_dbgfs_get(data, 0xD90, val);
98}
99
100static int ioda_eeh_inbB_dbgfs_set(void *data, u64 val)
101{
102 return ioda_eeh_dbgfs_set(data, 0xE10, val);
103}
104
105static int ioda_eeh_inbB_dbgfs_get(void *data, u64 *val)
106{
107 return ioda_eeh_dbgfs_get(data, 0xE10, val);
108}
109
110DEFINE_SIMPLE_ATTRIBUTE(ioda_eeh_outb_dbgfs_ops, ioda_eeh_outb_dbgfs_get,
111 ioda_eeh_outb_dbgfs_set, "0x%llx\n");
112DEFINE_SIMPLE_ATTRIBUTE(ioda_eeh_inbA_dbgfs_ops, ioda_eeh_inbA_dbgfs_get,
113 ioda_eeh_inbA_dbgfs_set, "0x%llx\n");
114DEFINE_SIMPLE_ATTRIBUTE(ioda_eeh_inbB_dbgfs_ops, ioda_eeh_inbB_dbgfs_get,
115 ioda_eeh_inbB_dbgfs_set, "0x%llx\n");
82#endif /* CONFIG_DEBUG_FS */ 116#endif /* CONFIG_DEBUG_FS */
83 117
84/** 118/**
@@ -106,27 +140,30 @@ static int ioda_eeh_post_init(struct pci_controller *hose)
106 ioda_eeh_nb_init = 1; 140 ioda_eeh_nb_init = 1;
107 } 141 }
108 142
109 /* FIXME: Enable it for PHB3 later */ 143 /* We needn't HUB diag-data on PHB3 */
110 if (phb->type == PNV_PHB_IODA1) { 144 if (phb->type == PNV_PHB_IODA1 && !hub_diag) {
145 hub_diag = (char *)__get_free_page(GFP_KERNEL | __GFP_ZERO);
111 if (!hub_diag) { 146 if (!hub_diag) {
112 hub_diag = (char *)__get_free_page(GFP_KERNEL | 147 pr_err("%s: Out of memory !\n", __func__);
113 __GFP_ZERO); 148 return -ENOMEM;
114 if (!hub_diag) {
115 pr_err("%s: Out of memory !\n",
116 __func__);
117 return -ENOMEM;
118 }
119 } 149 }
150 }
120 151
121#ifdef CONFIG_DEBUG_FS 152#ifdef CONFIG_DEBUG_FS
122 if (phb->dbgfs) 153 if (phb->dbgfs) {
123 debugfs_create_file("err_injct", 0600, 154 debugfs_create_file("err_injct_outbound", 0600,
124 phb->dbgfs, hose, 155 phb->dbgfs, hose,
125 &ioda_eeh_dbgfs_ops); 156 &ioda_eeh_outb_dbgfs_ops);
157 debugfs_create_file("err_injct_inboundA", 0600,
158 phb->dbgfs, hose,
159 &ioda_eeh_inbA_dbgfs_ops);
160 debugfs_create_file("err_injct_inboundB", 0600,
161 phb->dbgfs, hose,
162 &ioda_eeh_inbB_dbgfs_ops);
163 }
126#endif 164#endif
127 165
128 phb->eeh_state |= PNV_EEH_STATE_ENABLED; 166 phb->eeh_state |= PNV_EEH_STATE_ENABLED;
129 }
130 167
131 return 0; 168 return 0;
132} 169}
@@ -546,8 +583,8 @@ static int ioda_eeh_get_log(struct eeh_pe *pe, int severity,
546 phb->diag.blob, PNV_PCI_DIAG_BUF_SIZE); 583 phb->diag.blob, PNV_PCI_DIAG_BUF_SIZE);
547 if (ret) { 584 if (ret) {
548 spin_unlock_irqrestore(&phb->lock, flags); 585 spin_unlock_irqrestore(&phb->lock, flags);
549 pr_warning("%s: Failed to get log for PHB#%x-PE#%x\n", 586 pr_warning("%s: Can't get log for PHB#%x-PE#%x (%lld)\n",
550 __func__, hose->global_number, pe->addr); 587 __func__, hose->global_number, pe->addr, ret);
551 return -EIO; 588 return -EIO;
552 } 589 }
553 590
@@ -710,6 +747,73 @@ static void ioda_eeh_p7ioc_phb_diag(struct pci_controller *hose,
710 } 747 }
711} 748}
712 749
750static void ioda_eeh_phb3_phb_diag(struct pci_controller *hose,
751 struct OpalIoPhbErrorCommon *common)
752{
753 struct OpalIoPhb3ErrorData *data;
754 int i;
755
756 data = (struct OpalIoPhb3ErrorData*)common;
757 pr_info("PHB3 PHB#%x Diag-data (Version: %d)\n\n",
758 hose->global_number, common->version);
759
760 pr_info(" brdgCtl: %08x\n", data->brdgCtl);
761
762 pr_info(" portStatusReg: %08x\n", data->portStatusReg);
763 pr_info(" rootCmplxStatus: %08x\n", data->rootCmplxStatus);
764 pr_info(" busAgentStatus: %08x\n", data->busAgentStatus);
765
766 pr_info(" deviceStatus: %08x\n", data->deviceStatus);
767 pr_info(" slotStatus: %08x\n", data->slotStatus);
768 pr_info(" linkStatus: %08x\n", data->linkStatus);
769 pr_info(" devCmdStatus: %08x\n", data->devCmdStatus);
770 pr_info(" devSecStatus: %08x\n", data->devSecStatus);
771
772 pr_info(" rootErrorStatus: %08x\n", data->rootErrorStatus);
773 pr_info(" uncorrErrorStatus: %08x\n", data->uncorrErrorStatus);
774 pr_info(" corrErrorStatus: %08x\n", data->corrErrorStatus);
775 pr_info(" tlpHdr1: %08x\n", data->tlpHdr1);
776 pr_info(" tlpHdr2: %08x\n", data->tlpHdr2);
777 pr_info(" tlpHdr3: %08x\n", data->tlpHdr3);
778 pr_info(" tlpHdr4: %08x\n", data->tlpHdr4);
779 pr_info(" sourceId: %08x\n", data->sourceId);
780 pr_info(" errorClass: %016llx\n", data->errorClass);
781 pr_info(" correlator: %016llx\n", data->correlator);
782 pr_info(" nFir: %016llx\n", data->nFir);
783 pr_info(" nFirMask: %016llx\n", data->nFirMask);
784 pr_info(" nFirWOF: %016llx\n", data->nFirWOF);
785 pr_info(" PhbPlssr: %016llx\n", data->phbPlssr);
786 pr_info(" PhbCsr: %016llx\n", data->phbCsr);
787 pr_info(" lemFir: %016llx\n", data->lemFir);
788 pr_info(" lemErrorMask: %016llx\n", data->lemErrorMask);
789 pr_info(" lemWOF: %016llx\n", data->lemWOF);
790 pr_info(" phbErrorStatus: %016llx\n", data->phbErrorStatus);
791 pr_info(" phbFirstErrorStatus: %016llx\n", data->phbFirstErrorStatus);
792 pr_info(" phbErrorLog0: %016llx\n", data->phbErrorLog0);
793 pr_info(" phbErrorLog1: %016llx\n", data->phbErrorLog1);
794 pr_info(" mmioErrorStatus: %016llx\n", data->mmioErrorStatus);
795 pr_info(" mmioFirstErrorStatus: %016llx\n", data->mmioFirstErrorStatus);
796 pr_info(" mmioErrorLog0: %016llx\n", data->mmioErrorLog0);
797 pr_info(" mmioErrorLog1: %016llx\n", data->mmioErrorLog1);
798 pr_info(" dma0ErrorStatus: %016llx\n", data->dma0ErrorStatus);
799 pr_info(" dma0FirstErrorStatus: %016llx\n", data->dma0FirstErrorStatus);
800 pr_info(" dma0ErrorLog0: %016llx\n", data->dma0ErrorLog0);
801 pr_info(" dma0ErrorLog1: %016llx\n", data->dma0ErrorLog1);
802 pr_info(" dma1ErrorStatus: %016llx\n", data->dma1ErrorStatus);
803 pr_info(" dma1FirstErrorStatus: %016llx\n", data->dma1FirstErrorStatus);
804 pr_info(" dma1ErrorLog0: %016llx\n", data->dma1ErrorLog0);
805 pr_info(" dma1ErrorLog1: %016llx\n", data->dma1ErrorLog1);
806
807 for (i = 0; i < OPAL_PHB3_NUM_PEST_REGS; i++) {
808 if ((data->pestA[i] >> 63) == 0 &&
809 (data->pestB[i] >> 63) == 0)
810 continue;
811
812 pr_info(" PE[%3d] PESTA: %016llx\n", i, data->pestA[i]);
813 pr_info(" PESTB: %016llx\n", data->pestB[i]);
814 }
815}
816
713static void ioda_eeh_phb_diag(struct pci_controller *hose) 817static void ioda_eeh_phb_diag(struct pci_controller *hose)
714{ 818{
715 struct pnv_phb *phb = hose->private_data; 819 struct pnv_phb *phb = hose->private_data;
@@ -728,6 +832,9 @@ static void ioda_eeh_phb_diag(struct pci_controller *hose)
728 case OPAL_PHB_ERROR_DATA_TYPE_P7IOC: 832 case OPAL_PHB_ERROR_DATA_TYPE_P7IOC:
729 ioda_eeh_p7ioc_phb_diag(hose, common); 833 ioda_eeh_p7ioc_phb_diag(hose, common);
730 break; 834 break;
835 case OPAL_PHB_ERROR_DATA_TYPE_PHB3:
836 ioda_eeh_phb3_phb_diag(hose, common);
837 break;
731 default: 838 default:
732 pr_warning("%s: Unrecognized I/O chip %d\n", 839 pr_warning("%s: Unrecognized I/O chip %d\n",
733 __func__, common->ioType); 840 __func__, common->ioType);
diff --git a/arch/powerpc/platforms/powernv/eeh-powernv.c b/arch/powerpc/platforms/powernv/eeh-powernv.c
index 79663d26e6ea..73b981438cc5 100644
--- a/arch/powerpc/platforms/powernv/eeh-powernv.c
+++ b/arch/powerpc/platforms/powernv/eeh-powernv.c
@@ -144,11 +144,8 @@ static int powernv_eeh_dev_probe(struct pci_dev *dev, void *flag)
144 /* 144 /*
145 * Enable EEH explicitly so that we will do EEH check 145 * Enable EEH explicitly so that we will do EEH check
146 * while accessing I/O stuff 146 * while accessing I/O stuff
147 *
148 * FIXME: Enable that for PHB3 later
149 */ 147 */
150 if (phb->type == PNV_PHB_IODA1) 148 eeh_subsystem_enabled = 1;
151 eeh_subsystem_enabled = 1;
152 149
153 /* Save memory bars */ 150 /* Save memory bars */
154 eeh_save_bars(edev); 151 eeh_save_bars(edev);
diff --git a/arch/powerpc/platforms/powernv/opal-flash.c b/arch/powerpc/platforms/powernv/opal-flash.c
new file mode 100644
index 000000000000..6ffa6b1ec5b7
--- /dev/null
+++ b/arch/powerpc/platforms/powernv/opal-flash.c
@@ -0,0 +1,667 @@
1/*
2 * PowerNV OPAL Firmware Update Interface
3 *
4 * Copyright 2013 IBM Corp.
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#define DEBUG
13
14#include <linux/kernel.h>
15#include <linux/reboot.h>
16#include <linux/init.h>
17#include <linux/kobject.h>
18#include <linux/sysfs.h>
19#include <linux/slab.h>
20#include <linux/mm.h>
21#include <linux/vmalloc.h>
22#include <linux/pagemap.h>
23
24#include <asm/opal.h>
25
26/* FLASH status codes */
27#define FLASH_NO_OP -1099 /* No operation initiated by user */
28#define FLASH_NO_AUTH -9002 /* Not a service authority partition */
29
30/* Validate image status values */
31#define VALIDATE_IMG_READY -1001 /* Image ready for validation */
32#define VALIDATE_IMG_INCOMPLETE -1002 /* User copied < VALIDATE_BUF_SIZE */
33
34/* Manage image status values */
35#define MANAGE_ACTIVE_ERR -9001 /* Cannot overwrite active img */
36
37/* Flash image status values */
38#define FLASH_IMG_READY 0 /* Img ready for flash on reboot */
39#define FLASH_INVALID_IMG -1003 /* Flash image shorter than expected */
40#define FLASH_IMG_NULL_DATA -1004 /* Bad data in sg list entry */
41#define FLASH_IMG_BAD_LEN -1005 /* Bad length in sg list entry */
42
43/* Manage operation tokens */
44#define FLASH_REJECT_TMP_SIDE 0 /* Reject temporary fw image */
45#define FLASH_COMMIT_TMP_SIDE 1 /* Commit temporary fw image */
46
47/* Update tokens */
48#define FLASH_UPDATE_CANCEL 0 /* Cancel update request */
49#define FLASH_UPDATE_INIT 1 /* Initiate update */
50
51/* Validate image update result tokens */
52#define VALIDATE_TMP_UPDATE 0 /* T side will be updated */
53#define VALIDATE_FLASH_AUTH 1 /* Partition does not have authority */
54#define VALIDATE_INVALID_IMG 2 /* Candidate image is not valid */
55#define VALIDATE_CUR_UNKNOWN 3 /* Current fixpack level is unknown */
56/*
57 * Current T side will be committed to P side before being replace with new
58 * image, and the new image is downlevel from current image
59 */
60#define VALIDATE_TMP_COMMIT_DL 4
61/*
62 * Current T side will be committed to P side before being replaced with new
63 * image
64 */
65#define VALIDATE_TMP_COMMIT 5
66/*
67 * T side will be updated with a downlevel image
68 */
69#define VALIDATE_TMP_UPDATE_DL 6
70/*
71 * The candidate image's release date is later than the system's firmware
72 * service entitlement date - service warranty period has expired
73 */
74#define VALIDATE_OUT_OF_WRNTY 7
75
76/* Validate buffer size */
77#define VALIDATE_BUF_SIZE 4096
78
79/* XXX: Assume candidate image size is <= 256MB */
80#define MAX_IMAGE_SIZE 0x10000000
81
82/* Flash sg list version */
83#define SG_LIST_VERSION (1UL)
84
85/* Image status */
86enum {
87 IMAGE_INVALID,
88 IMAGE_LOADING,
89 IMAGE_READY,
90};
91
92/* Candidate image data */
93struct image_data_t {
94 int status;
95 void *data;
96 uint32_t size;
97};
98
99/* Candidate image header */
100struct image_header_t {
101 uint16_t magic;
102 uint16_t version;
103 uint32_t size;
104};
105
106/* Scatter/gather entry */
107struct opal_sg_entry {
108 void *data;
109 long length;
110};
111
112/* We calculate number of entries based on PAGE_SIZE */
113#define SG_ENTRIES_PER_NODE ((PAGE_SIZE - 16) / sizeof(struct opal_sg_entry))
114
115/*
116 * This struct is very similar but not identical to that
117 * needed by the opal flash update. All we need to do for
118 * opal is rewrite num_entries into a version/length and
119 * translate the pointers to absolute.
120 */
121struct opal_sg_list {
122 unsigned long num_entries;
123 struct opal_sg_list *next;
124 struct opal_sg_entry entry[SG_ENTRIES_PER_NODE];
125};
126
127struct validate_flash_t {
128 int status; /* Return status */
129 void *buf; /* Candiate image buffer */
130 uint32_t buf_size; /* Image size */
131 uint32_t result; /* Update results token */
132};
133
134struct manage_flash_t {
135 int status; /* Return status */
136};
137
138struct update_flash_t {
139 int status; /* Return status */
140};
141
142static struct image_header_t image_header;
143static struct image_data_t image_data;
144static struct validate_flash_t validate_flash_data;
145static struct manage_flash_t manage_flash_data;
146static struct update_flash_t update_flash_data;
147
148static DEFINE_MUTEX(image_data_mutex);
149
150/*
151 * Validate candidate image
152 */
153static inline void opal_flash_validate(void)
154{
155 struct validate_flash_t *args_buf = &validate_flash_data;
156
157 args_buf->status = opal_validate_flash(__pa(args_buf->buf),
158 &(args_buf->buf_size),
159 &(args_buf->result));
160}
161
162/*
163 * Validate output format:
164 * validate result token
165 * current image version details
166 * new image version details
167 */
168static ssize_t validate_show(struct kobject *kobj,
169 struct kobj_attribute *attr, char *buf)
170{
171 struct validate_flash_t *args_buf = &validate_flash_data;
172 int len;
173
174 /* Candidate image is not validated */
175 if (args_buf->status < VALIDATE_TMP_UPDATE) {
176 len = sprintf(buf, "%d\n", args_buf->status);
177 goto out;
178 }
179
180 /* Result token */
181 len = sprintf(buf, "%d\n", args_buf->result);
182
183 /* Current and candidate image version details */
184 if ((args_buf->result != VALIDATE_TMP_UPDATE) &&
185 (args_buf->result < VALIDATE_CUR_UNKNOWN))
186 goto out;
187
188 if (args_buf->buf_size > (VALIDATE_BUF_SIZE - len)) {
189 memcpy(buf + len, args_buf->buf, VALIDATE_BUF_SIZE - len);
190 len = VALIDATE_BUF_SIZE;
191 } else {
192 memcpy(buf + len, args_buf->buf, args_buf->buf_size);
193 len += args_buf->buf_size;
194 }
195out:
196 /* Set status to default */
197 args_buf->status = FLASH_NO_OP;
198 return len;
199}
200
201/*
202 * Validate candidate firmware image
203 *
204 * Note:
205 * We are only interested in first 4K bytes of the
206 * candidate image.
207 */
208static ssize_t validate_store(struct kobject *kobj,
209 struct kobj_attribute *attr,
210 const char *buf, size_t count)
211{
212 struct validate_flash_t *args_buf = &validate_flash_data;
213
214 if (buf[0] != '1')
215 return -EINVAL;
216
217 mutex_lock(&image_data_mutex);
218
219 if (image_data.status != IMAGE_READY ||
220 image_data.size < VALIDATE_BUF_SIZE) {
221 args_buf->result = VALIDATE_INVALID_IMG;
222 args_buf->status = VALIDATE_IMG_INCOMPLETE;
223 goto out;
224 }
225
226 /* Copy first 4k bytes of candidate image */
227 memcpy(args_buf->buf, image_data.data, VALIDATE_BUF_SIZE);
228
229 args_buf->status = VALIDATE_IMG_READY;
230 args_buf->buf_size = VALIDATE_BUF_SIZE;
231
232 /* Validate candidate image */
233 opal_flash_validate();
234
235out:
236 mutex_unlock(&image_data_mutex);
237 return count;
238}
239
240/*
241 * Manage flash routine
242 */
243static inline void opal_flash_manage(uint8_t op)
244{
245 struct manage_flash_t *const args_buf = &manage_flash_data;
246
247 args_buf->status = opal_manage_flash(op);
248}
249
250/*
251 * Show manage flash status
252 */
253static ssize_t manage_show(struct kobject *kobj,
254 struct kobj_attribute *attr, char *buf)
255{
256 struct manage_flash_t *const args_buf = &manage_flash_data;
257 int rc;
258
259 rc = sprintf(buf, "%d\n", args_buf->status);
260 /* Set status to default*/
261 args_buf->status = FLASH_NO_OP;
262 return rc;
263}
264
265/*
266 * Manage operations:
267 * 0 - Reject
268 * 1 - Commit
269 */
270static ssize_t manage_store(struct kobject *kobj,
271 struct kobj_attribute *attr,
272 const char *buf, size_t count)
273{
274 uint8_t op;
275 switch (buf[0]) {
276 case '0':
277 op = FLASH_REJECT_TMP_SIDE;
278 break;
279 case '1':
280 op = FLASH_COMMIT_TMP_SIDE;
281 break;
282 default:
283 return -EINVAL;
284 }
285
286 /* commit/reject temporary image */
287 opal_flash_manage(op);
288 return count;
289}
290
291/*
292 * Free sg list
293 */
294static void free_sg_list(struct opal_sg_list *list)
295{
296 struct opal_sg_list *sg1;
297 while (list) {
298 sg1 = list->next;
299 kfree(list);
300 list = sg1;
301 }
302 list = NULL;
303}
304
305/*
306 * Build candidate image scatter gather list
307 *
308 * list format:
309 * -----------------------------------
310 * | VER (8) | Entry length in bytes |
311 * -----------------------------------
312 * | Pointer to next entry |
313 * -----------------------------------
314 * | Address of memory area 1 |
315 * -----------------------------------
316 * | Length of memory area 1 |
317 * -----------------------------------
318 * | ......... |
319 * -----------------------------------
320 * | ......... |
321 * -----------------------------------
322 * | Address of memory area N |
323 * -----------------------------------
324 * | Length of memory area N |
325 * -----------------------------------
326 */
327static struct opal_sg_list *image_data_to_sglist(void)
328{
329 struct opal_sg_list *sg1, *list = NULL;
330 void *addr;
331 int size;
332
333 addr = image_data.data;
334 size = image_data.size;
335
336 sg1 = kzalloc((sizeof(struct opal_sg_list)), GFP_KERNEL);
337 if (!sg1)
338 return NULL;
339
340 list = sg1;
341 sg1->num_entries = 0;
342 while (size > 0) {
343 /* Translate virtual address to physical address */
344 sg1->entry[sg1->num_entries].data =
345 (void *)(vmalloc_to_pfn(addr) << PAGE_SHIFT);
346
347 if (size > PAGE_SIZE)
348 sg1->entry[sg1->num_entries].length = PAGE_SIZE;
349 else
350 sg1->entry[sg1->num_entries].length = size;
351
352 sg1->num_entries++;
353 if (sg1->num_entries >= SG_ENTRIES_PER_NODE) {
354 sg1->next = kzalloc((sizeof(struct opal_sg_list)),
355 GFP_KERNEL);
356 if (!sg1->next) {
357 pr_err("%s : Failed to allocate memory\n",
358 __func__);
359 goto nomem;
360 }
361
362 sg1 = sg1->next;
363 sg1->num_entries = 0;
364 }
365 addr += PAGE_SIZE;
366 size -= PAGE_SIZE;
367 }
368 return list;
369nomem:
370 free_sg_list(list);
371 return NULL;
372}
373
374/*
375 * OPAL update flash
376 */
377static int opal_flash_update(int op)
378{
379 struct opal_sg_list *sg, *list, *next;
380 unsigned long addr;
381 int64_t rc = OPAL_PARAMETER;
382
383 if (op == FLASH_UPDATE_CANCEL) {
384 pr_alert("FLASH: Image update cancelled\n");
385 addr = '\0';
386 goto flash;
387 }
388
389 list = image_data_to_sglist();
390 if (!list)
391 goto invalid_img;
392
393 /* First entry address */
394 addr = __pa(list);
395
396 /* Translate sg list address to absolute */
397 for (sg = list; sg; sg = next) {
398 next = sg->next;
399 /* Don't translate NULL pointer for last entry */
400 if (sg->next)
401 sg->next = (struct opal_sg_list *)__pa(sg->next);
402 else
403 sg->next = NULL;
404
405 /* Make num_entries into the version/length field */
406 sg->num_entries = (SG_LIST_VERSION << 56) |
407 (sg->num_entries * sizeof(struct opal_sg_entry) + 16);
408 }
409
410 pr_alert("FLASH: Image is %u bytes\n", image_data.size);
411 pr_alert("FLASH: Image update requested\n");
412 pr_alert("FLASH: Image will be updated during system reboot\n");
413 pr_alert("FLASH: This will take several minutes. Do not power off!\n");
414
415flash:
416 rc = opal_update_flash(addr);
417
418invalid_img:
419 return rc;
420}
421
422/*
423 * Show candidate image status
424 */
425static ssize_t update_show(struct kobject *kobj,
426 struct kobj_attribute *attr, char *buf)
427{
428 struct update_flash_t *const args_buf = &update_flash_data;
429 return sprintf(buf, "%d\n", args_buf->status);
430}
431
432/*
433 * Set update image flag
434 * 1 - Flash new image
435 * 0 - Cancel flash request
436 */
437static ssize_t update_store(struct kobject *kobj,
438 struct kobj_attribute *attr,
439 const char *buf, size_t count)
440{
441 struct update_flash_t *const args_buf = &update_flash_data;
442 int rc = count;
443
444 mutex_lock(&image_data_mutex);
445
446 switch (buf[0]) {
447 case '0':
448 if (args_buf->status == FLASH_IMG_READY)
449 opal_flash_update(FLASH_UPDATE_CANCEL);
450 args_buf->status = FLASH_NO_OP;
451 break;
452 case '1':
453 /* Image is loaded? */
454 if (image_data.status == IMAGE_READY)
455 args_buf->status =
456 opal_flash_update(FLASH_UPDATE_INIT);
457 else
458 args_buf->status = FLASH_INVALID_IMG;
459 break;
460 default:
461 rc = -EINVAL;
462 }
463
464 mutex_unlock(&image_data_mutex);
465 return rc;
466}
467
468/*
469 * Free image buffer
470 */
471static void free_image_buf(void)
472{
473 void *addr;
474 int size;
475
476 addr = image_data.data;
477 size = PAGE_ALIGN(image_data.size);
478 while (size > 0) {
479 ClearPageReserved(vmalloc_to_page(addr));
480 addr += PAGE_SIZE;
481 size -= PAGE_SIZE;
482 }
483 vfree(image_data.data);
484 image_data.data = NULL;
485 image_data.status = IMAGE_INVALID;
486}
487
488/*
489 * Allocate image buffer.
490 */
491static int alloc_image_buf(char *buffer, size_t count)
492{
493 void *addr;
494 int size;
495
496 if (count < sizeof(struct image_header_t)) {
497 pr_warn("FLASH: Invalid candidate image\n");
498 return -EINVAL;
499 }
500
501 memcpy(&image_header, (void *)buffer, sizeof(struct image_header_t));
502 image_data.size = be32_to_cpu(image_header.size);
503 pr_debug("FLASH: Candiate image size = %u\n", image_data.size);
504
505 if (image_data.size > MAX_IMAGE_SIZE) {
506 pr_warn("FLASH: Too large image\n");
507 return -EINVAL;
508 }
509 if (image_data.size < VALIDATE_BUF_SIZE) {
510 pr_warn("FLASH: Image is shorter than expected\n");
511 return -EINVAL;
512 }
513
514 image_data.data = vzalloc(PAGE_ALIGN(image_data.size));
515 if (!image_data.data) {
516 pr_err("%s : Failed to allocate memory\n", __func__);
517 return -ENOMEM;
518 }
519
520 /* Pin memory */
521 addr = image_data.data;
522 size = PAGE_ALIGN(image_data.size);
523 while (size > 0) {
524 SetPageReserved(vmalloc_to_page(addr));
525 addr += PAGE_SIZE;
526 size -= PAGE_SIZE;
527 }
528
529 image_data.status = IMAGE_LOADING;
530 return 0;
531}
532
533/*
534 * Copy candidate image
535 *
536 * Parse candidate image header to get total image size
537 * and pre-allocate required memory.
538 */
539static ssize_t image_data_write(struct file *filp, struct kobject *kobj,
540 struct bin_attribute *bin_attr,
541 char *buffer, loff_t pos, size_t count)
542{
543 int rc;
544
545 mutex_lock(&image_data_mutex);
546
547 /* New image ? */
548 if (pos == 0) {
549 /* Free memory, if already allocated */
550 if (image_data.data)
551 free_image_buf();
552
553 /* Cancel outstanding image update request */
554 if (update_flash_data.status == FLASH_IMG_READY)
555 opal_flash_update(FLASH_UPDATE_CANCEL);
556
557 /* Allocate memory */
558 rc = alloc_image_buf(buffer, count);
559 if (rc)
560 goto out;
561 }
562
563 if (image_data.status != IMAGE_LOADING) {
564 rc = -ENOMEM;
565 goto out;
566 }
567
568 if ((pos + count) > image_data.size) {
569 rc = -EINVAL;
570 goto out;
571 }
572
573 memcpy(image_data.data + pos, (void *)buffer, count);
574 rc = count;
575
576 /* Set image status */
577 if ((pos + count) == image_data.size) {
578 pr_debug("FLASH: Candidate image loaded....\n");
579 image_data.status = IMAGE_READY;
580 }
581
582out:
583 mutex_unlock(&image_data_mutex);
584 return rc;
585}
586
587/*
588 * sysfs interface :
589 * OPAL uses below sysfs files for code update.
590 * We create these files under /sys/firmware/opal.
591 *
592 * image : Interface to load candidate firmware image
593 * validate_flash : Validate firmware image
594 * manage_flash : Commit/Reject firmware image
595 * update_flash : Flash new firmware image
596 *
597 */
598static struct bin_attribute image_data_attr = {
599 .attr = {.name = "image", .mode = 0200},
600 .size = MAX_IMAGE_SIZE, /* Limit image size */
601 .write = image_data_write,
602};
603
604static struct kobj_attribute validate_attribute =
605 __ATTR(validate_flash, 0600, validate_show, validate_store);
606
607static struct kobj_attribute manage_attribute =
608 __ATTR(manage_flash, 0600, manage_show, manage_store);
609
610static struct kobj_attribute update_attribute =
611 __ATTR(update_flash, 0600, update_show, update_store);
612
613static struct attribute *image_op_attrs[] = {
614 &validate_attribute.attr,
615 &manage_attribute.attr,
616 &update_attribute.attr,
617 NULL /* need to NULL terminate the list of attributes */
618};
619
620static struct attribute_group image_op_attr_group = {
621 .attrs = image_op_attrs,
622};
623
624void __init opal_flash_init(void)
625{
626 int ret;
627
628 /* Allocate validate image buffer */
629 validate_flash_data.buf = kzalloc(VALIDATE_BUF_SIZE, GFP_KERNEL);
630 if (!validate_flash_data.buf) {
631 pr_err("%s : Failed to allocate memory\n", __func__);
632 return;
633 }
634
635 /* Make sure /sys/firmware/opal directory is created */
636 if (!opal_kobj) {
637 pr_warn("FLASH: opal kobject is not available\n");
638 goto nokobj;
639 }
640
641 /* Create the sysfs files */
642 ret = sysfs_create_group(opal_kobj, &image_op_attr_group);
643 if (ret) {
644 pr_warn("FLASH: Failed to create sysfs files\n");
645 goto nokobj;
646 }
647
648 ret = sysfs_create_bin_file(opal_kobj, &image_data_attr);
649 if (ret) {
650 pr_warn("FLASH: Failed to create sysfs files\n");
651 goto nosysfs_file;
652 }
653
654 /* Set default status */
655 validate_flash_data.status = FLASH_NO_OP;
656 manage_flash_data.status = FLASH_NO_OP;
657 update_flash_data.status = FLASH_NO_OP;
658 image_data.status = IMAGE_INVALID;
659 return;
660
661nosysfs_file:
662 sysfs_remove_group(opal_kobj, &image_op_attr_group);
663
664nokobj:
665 kfree(validate_flash_data.buf);
666 return;
667}
diff --git a/arch/powerpc/platforms/powernv/opal-lpc.c b/arch/powerpc/platforms/powernv/opal-lpc.c
index a7614bb14e17..e7e59e4f9892 100644
--- a/arch/powerpc/platforms/powernv/opal-lpc.c
+++ b/arch/powerpc/platforms/powernv/opal-lpc.c
@@ -17,6 +17,7 @@
17#include <asm/firmware.h> 17#include <asm/firmware.h>
18#include <asm/xics.h> 18#include <asm/xics.h>
19#include <asm/opal.h> 19#include <asm/opal.h>
20#include <asm/prom.h>
20 21
21static int opal_lpc_chip_id = -1; 22static int opal_lpc_chip_id = -1;
22 23
diff --git a/arch/powerpc/platforms/powernv/opal-nvram.c b/arch/powerpc/platforms/powernv/opal-nvram.c
index 3f83e1ae26ac..acd9f7e96678 100644
--- a/arch/powerpc/platforms/powernv/opal-nvram.c
+++ b/arch/powerpc/platforms/powernv/opal-nvram.c
@@ -65,7 +65,7 @@ static ssize_t opal_nvram_write(char *buf, size_t count, loff_t *index)
65void __init opal_nvram_init(void) 65void __init opal_nvram_init(void)
66{ 66{
67 struct device_node *np; 67 struct device_node *np;
68 const u32 *nbytes_p; 68 const __be32 *nbytes_p;
69 69
70 np = of_find_compatible_node(NULL, NULL, "ibm,opal-nvram"); 70 np = of_find_compatible_node(NULL, NULL, "ibm,opal-nvram");
71 if (np == NULL) 71 if (np == NULL)
@@ -76,7 +76,7 @@ void __init opal_nvram_init(void)
76 of_node_put(np); 76 of_node_put(np);
77 return; 77 return;
78 } 78 }
79 nvram_size = *nbytes_p; 79 nvram_size = be32_to_cpup(nbytes_p);
80 80
81 printk(KERN_INFO "OPAL nvram setup, %u bytes\n", nvram_size); 81 printk(KERN_INFO "OPAL nvram setup, %u bytes\n", nvram_size);
82 of_node_put(np); 82 of_node_put(np);
diff --git a/arch/powerpc/platforms/powernv/opal-rtc.c b/arch/powerpc/platforms/powernv/opal-rtc.c
index 2aa7641aac9b..7d07c7e80ec0 100644
--- a/arch/powerpc/platforms/powernv/opal-rtc.c
+++ b/arch/powerpc/platforms/powernv/opal-rtc.c
@@ -37,10 +37,12 @@ unsigned long __init opal_get_boot_time(void)
37 struct rtc_time tm; 37 struct rtc_time tm;
38 u32 y_m_d; 38 u32 y_m_d;
39 u64 h_m_s_ms; 39 u64 h_m_s_ms;
40 __be32 __y_m_d;
41 __be64 __h_m_s_ms;
40 long rc = OPAL_BUSY; 42 long rc = OPAL_BUSY;
41 43
42 while (rc == OPAL_BUSY || rc == OPAL_BUSY_EVENT) { 44 while (rc == OPAL_BUSY || rc == OPAL_BUSY_EVENT) {
43 rc = opal_rtc_read(&y_m_d, &h_m_s_ms); 45 rc = opal_rtc_read(&__y_m_d, &__h_m_s_ms);
44 if (rc == OPAL_BUSY_EVENT) 46 if (rc == OPAL_BUSY_EVENT)
45 opal_poll_events(NULL); 47 opal_poll_events(NULL);
46 else 48 else
@@ -48,6 +50,8 @@ unsigned long __init opal_get_boot_time(void)
48 } 50 }
49 if (rc != OPAL_SUCCESS) 51 if (rc != OPAL_SUCCESS)
50 return 0; 52 return 0;
53 y_m_d = be32_to_cpu(__y_m_d);
54 h_m_s_ms = be64_to_cpu(__h_m_s_ms);
51 opal_to_tm(y_m_d, h_m_s_ms, &tm); 55 opal_to_tm(y_m_d, h_m_s_ms, &tm);
52 return mktime(tm.tm_year + 1900, tm.tm_mon + 1, tm.tm_mday, 56 return mktime(tm.tm_year + 1900, tm.tm_mon + 1, tm.tm_mday,
53 tm.tm_hour, tm.tm_min, tm.tm_sec); 57 tm.tm_hour, tm.tm_min, tm.tm_sec);
@@ -58,9 +62,11 @@ void opal_get_rtc_time(struct rtc_time *tm)
58 long rc = OPAL_BUSY; 62 long rc = OPAL_BUSY;
59 u32 y_m_d; 63 u32 y_m_d;
60 u64 h_m_s_ms; 64 u64 h_m_s_ms;
65 __be32 __y_m_d;
66 __be64 __h_m_s_ms;
61 67
62 while (rc == OPAL_BUSY || rc == OPAL_BUSY_EVENT) { 68 while (rc == OPAL_BUSY || rc == OPAL_BUSY_EVENT) {
63 rc = opal_rtc_read(&y_m_d, &h_m_s_ms); 69 rc = opal_rtc_read(&__y_m_d, &__h_m_s_ms);
64 if (rc == OPAL_BUSY_EVENT) 70 if (rc == OPAL_BUSY_EVENT)
65 opal_poll_events(NULL); 71 opal_poll_events(NULL);
66 else 72 else
@@ -68,6 +74,8 @@ void opal_get_rtc_time(struct rtc_time *tm)
68 } 74 }
69 if (rc != OPAL_SUCCESS) 75 if (rc != OPAL_SUCCESS)
70 return; 76 return;
77 y_m_d = be32_to_cpu(__y_m_d);
78 h_m_s_ms = be64_to_cpu(__h_m_s_ms);
71 opal_to_tm(y_m_d, h_m_s_ms, tm); 79 opal_to_tm(y_m_d, h_m_s_ms, tm);
72} 80}
73 81
diff --git a/arch/powerpc/platforms/powernv/opal-wrappers.S b/arch/powerpc/platforms/powernv/opal-wrappers.S
index 8f3844535fbb..e7806504e976 100644
--- a/arch/powerpc/platforms/powernv/opal-wrappers.S
+++ b/arch/powerpc/platforms/powernv/opal-wrappers.S
@@ -24,7 +24,7 @@
24 mflr r0; \ 24 mflr r0; \
25 mfcr r12; \ 25 mfcr r12; \
26 std r0,16(r1); \ 26 std r0,16(r1); \
27 std r12,8(r1); \ 27 stw r12,8(r1); \
28 std r1,PACAR1(r13); \ 28 std r1,PACAR1(r13); \
29 li r0,0; \ 29 li r0,0; \
30 mfmsr r12; \ 30 mfmsr r12; \
@@ -34,7 +34,7 @@
34 mtmsrd r12,1; \ 34 mtmsrd r12,1; \
35 LOAD_REG_ADDR(r0,.opal_return); \ 35 LOAD_REG_ADDR(r0,.opal_return); \
36 mtlr r0; \ 36 mtlr r0; \
37 li r0,MSR_DR|MSR_IR; \ 37 li r0,MSR_DR|MSR_IR|MSR_LE;\
38 andc r12,r12,r0; \ 38 andc r12,r12,r0; \
39 li r0,token; \ 39 li r0,token; \
40 mtspr SPRN_HSRR1,r12; \ 40 mtspr SPRN_HSRR1,r12; \
@@ -45,8 +45,15 @@
45 hrfid 45 hrfid
46 46
47_STATIC(opal_return) 47_STATIC(opal_return)
48 /*
49 * Fixup endian on OPAL return... we should be able to simplify
50 * this by instead converting the below trampoline to a set of
51 * bytes (always BE) since MSR:LE will end up fixed up as a side
52 * effect of the rfid.
53 */
54 FIXUP_ENDIAN
48 ld r2,PACATOC(r13); 55 ld r2,PACATOC(r13);
49 ld r4,8(r1); 56 lwz r4,8(r1);
50 ld r5,16(r1); 57 ld r5,16(r1);
51 ld r6,PACASAVEDMSR(r13); 58 ld r6,PACASAVEDMSR(r13);
52 mtspr SPRN_SRR0,r5; 59 mtspr SPRN_SRR0,r5;
@@ -116,3 +123,6 @@ OPAL_CALL(opal_xscom_write, OPAL_XSCOM_WRITE);
116OPAL_CALL(opal_lpc_read, OPAL_LPC_READ); 123OPAL_CALL(opal_lpc_read, OPAL_LPC_READ);
117OPAL_CALL(opal_lpc_write, OPAL_LPC_WRITE); 124OPAL_CALL(opal_lpc_write, OPAL_LPC_WRITE);
118OPAL_CALL(opal_return_cpu, OPAL_RETURN_CPU); 125OPAL_CALL(opal_return_cpu, OPAL_RETURN_CPU);
126OPAL_CALL(opal_validate_flash, OPAL_FLASH_VALIDATE);
127OPAL_CALL(opal_manage_flash, OPAL_FLASH_MANAGE);
128OPAL_CALL(opal_update_flash, OPAL_FLASH_UPDATE);
diff --git a/arch/powerpc/platforms/powernv/opal-xscom.c b/arch/powerpc/platforms/powernv/opal-xscom.c
new file mode 100644
index 000000000000..4d99a8fd55ac
--- /dev/null
+++ b/arch/powerpc/platforms/powernv/opal-xscom.c
@@ -0,0 +1,128 @@
1/*
2 * PowerNV LPC bus handling.
3 *
4 * Copyright 2013 IBM Corp.
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#include <linux/kernel.h>
13#include <linux/of.h>
14#include <linux/bug.h>
15#include <linux/gfp.h>
16#include <linux/slab.h>
17
18#include <asm/machdep.h>
19#include <asm/firmware.h>
20#include <asm/opal.h>
21#include <asm/scom.h>
22
23/*
24 * We could probably fit that inside the scom_map_t
25 * which is a void* after all but it's really too ugly
26 * so let's kmalloc it for now
27 */
28struct opal_scom_map {
29 uint32_t chip;
30 uint64_t addr;
31};
32
33static scom_map_t opal_scom_map(struct device_node *dev, u64 reg, u64 count)
34{
35 struct opal_scom_map *m;
36 const __be32 *gcid;
37
38 if (!of_get_property(dev, "scom-controller", NULL)) {
39 pr_err("%s: device %s is not a SCOM controller\n",
40 __func__, dev->full_name);
41 return SCOM_MAP_INVALID;
42 }
43 gcid = of_get_property(dev, "ibm,chip-id", NULL);
44 if (!gcid) {
45 pr_err("%s: device %s has no ibm,chip-id\n",
46 __func__, dev->full_name);
47 return SCOM_MAP_INVALID;
48 }
49 m = kmalloc(sizeof(struct opal_scom_map), GFP_KERNEL);
50 if (!m)
51 return NULL;
52 m->chip = be32_to_cpup(gcid);
53 m->addr = reg;
54
55 return (scom_map_t)m;
56}
57
58static void opal_scom_unmap(scom_map_t map)
59{
60 kfree(map);
61}
62
63static int opal_xscom_err_xlate(int64_t rc)
64{
65 switch(rc) {
66 case 0:
67 return 0;
68 /* Add more translations if necessary */
69 default:
70 return -EIO;
71 }
72}
73
74static u64 opal_scom_unmangle(u64 reg)
75{
76 /*
77 * XSCOM indirect addresses have the top bit set. Additionally
78 * the reset of the top 3 nibbles is always 0.
79 *
80 * Because the debugfs interface uses signed offsets and shifts
81 * the address left by 3, we basically cannot use the top 4 bits
82 * of the 64-bit address, and thus cannot use the indirect bit.
83 *
84 * To deal with that, we support the indirect bit being in bit
85 * 4 (IBM notation) instead of bit 0 in this API, we do the
86 * conversion here. To leave room for further xscom address
87 * expansion, we only clear out the top byte
88 *
89 */
90 if (reg & (1ull << 59))
91 reg = (reg & ~(0xffull << 56)) | (1ull << 63);
92 return reg;
93}
94
95static int opal_scom_read(scom_map_t map, u64 reg, u64 *value)
96{
97 struct opal_scom_map *m = map;
98 int64_t rc;
99
100 reg = opal_scom_unmangle(reg);
101 rc = opal_xscom_read(m->chip, m->addr + reg, (uint64_t *)__pa(value));
102 return opal_xscom_err_xlate(rc);
103}
104
105static int opal_scom_write(scom_map_t map, u64 reg, u64 value)
106{
107 struct opal_scom_map *m = map;
108 int64_t rc;
109
110 reg = opal_scom_unmangle(reg);
111 rc = opal_xscom_write(m->chip, m->addr + reg, value);
112 return opal_xscom_err_xlate(rc);
113}
114
115static const struct scom_controller opal_scom_controller = {
116 .map = opal_scom_map,
117 .unmap = opal_scom_unmap,
118 .read = opal_scom_read,
119 .write = opal_scom_write
120};
121
122static int opal_xscom_init(void)
123{
124 if (firmware_has_feature(FW_FEATURE_OPALv3))
125 scom_init(&opal_scom_controller);
126 return 0;
127}
128arch_initcall(opal_xscom_init);
diff --git a/arch/powerpc/platforms/powernv/opal.c b/arch/powerpc/platforms/powernv/opal.c
index 2911abe550f1..1c798cd55372 100644
--- a/arch/powerpc/platforms/powernv/opal.c
+++ b/arch/powerpc/platforms/powernv/opal.c
@@ -13,15 +13,20 @@
13 13
14#include <linux/types.h> 14#include <linux/types.h>
15#include <linux/of.h> 15#include <linux/of.h>
16#include <linux/of_fdt.h>
16#include <linux/of_platform.h> 17#include <linux/of_platform.h>
17#include <linux/interrupt.h> 18#include <linux/interrupt.h>
18#include <linux/notifier.h> 19#include <linux/notifier.h>
19#include <linux/slab.h> 20#include <linux/slab.h>
21#include <linux/kobject.h>
20#include <asm/opal.h> 22#include <asm/opal.h>
21#include <asm/firmware.h> 23#include <asm/firmware.h>
22 24
23#include "powernv.h" 25#include "powernv.h"
24 26
27/* /sys/firmware/opal */
28struct kobject *opal_kobj;
29
25struct opal { 30struct opal {
26 u64 base; 31 u64 base;
27 u64 entry; 32 u64 entry;
@@ -77,6 +82,7 @@ int __init early_init_dt_scan_opal(unsigned long node,
77 82
78static int __init opal_register_exception_handlers(void) 83static int __init opal_register_exception_handlers(void)
79{ 84{
85#ifdef __BIG_ENDIAN__
80 u64 glue; 86 u64 glue;
81 87
82 if (!(powerpc_firmware_features & FW_FEATURE_OPAL)) 88 if (!(powerpc_firmware_features & FW_FEATURE_OPAL))
@@ -94,6 +100,7 @@ static int __init opal_register_exception_handlers(void)
94 0, glue); 100 0, glue);
95 glue += 128; 101 glue += 128;
96 opal_register_exception_handler(OPAL_SOFTPATCH_HANDLER, 0, glue); 102 opal_register_exception_handler(OPAL_SOFTPATCH_HANDLER, 0, glue);
103#endif
97 104
98 return 0; 105 return 0;
99} 106}
@@ -164,27 +171,28 @@ void opal_notifier_disable(void)
164 171
165int opal_get_chars(uint32_t vtermno, char *buf, int count) 172int opal_get_chars(uint32_t vtermno, char *buf, int count)
166{ 173{
167 s64 len, rc; 174 s64 rc;
168 u64 evt; 175 __be64 evt, len;
169 176
170 if (!opal.entry) 177 if (!opal.entry)
171 return -ENODEV; 178 return -ENODEV;
172 opal_poll_events(&evt); 179 opal_poll_events(&evt);
173 if ((evt & OPAL_EVENT_CONSOLE_INPUT) == 0) 180 if ((be64_to_cpu(evt) & OPAL_EVENT_CONSOLE_INPUT) == 0)
174 return 0; 181 return 0;
175 len = count; 182 len = cpu_to_be64(count);
176 rc = opal_console_read(vtermno, &len, buf); 183 rc = opal_console_read(vtermno, &len, buf);
177 if (rc == OPAL_SUCCESS) 184 if (rc == OPAL_SUCCESS)
178 return len; 185 return be64_to_cpu(len);
179 return 0; 186 return 0;
180} 187}
181 188
182int opal_put_chars(uint32_t vtermno, const char *data, int total_len) 189int opal_put_chars(uint32_t vtermno, const char *data, int total_len)
183{ 190{
184 int written = 0; 191 int written = 0;
192 __be64 olen;
185 s64 len, rc; 193 s64 len, rc;
186 unsigned long flags; 194 unsigned long flags;
187 u64 evt; 195 __be64 evt;
188 196
189 if (!opal.entry) 197 if (!opal.entry)
190 return -ENODEV; 198 return -ENODEV;
@@ -199,13 +207,14 @@ int opal_put_chars(uint32_t vtermno, const char *data, int total_len)
199 */ 207 */
200 spin_lock_irqsave(&opal_write_lock, flags); 208 spin_lock_irqsave(&opal_write_lock, flags);
201 if (firmware_has_feature(FW_FEATURE_OPALv2)) { 209 if (firmware_has_feature(FW_FEATURE_OPALv2)) {
202 rc = opal_console_write_buffer_space(vtermno, &len); 210 rc = opal_console_write_buffer_space(vtermno, &olen);
211 len = be64_to_cpu(olen);
203 if (rc || len < total_len) { 212 if (rc || len < total_len) {
204 spin_unlock_irqrestore(&opal_write_lock, flags); 213 spin_unlock_irqrestore(&opal_write_lock, flags);
205 /* Closed -> drop characters */ 214 /* Closed -> drop characters */
206 if (rc) 215 if (rc)
207 return total_len; 216 return total_len;
208 opal_poll_events(&evt); 217 opal_poll_events(NULL);
209 return -EAGAIN; 218 return -EAGAIN;
210 } 219 }
211 } 220 }
@@ -216,8 +225,9 @@ int opal_put_chars(uint32_t vtermno, const char *data, int total_len)
216 rc = OPAL_BUSY; 225 rc = OPAL_BUSY;
217 while(total_len > 0 && (rc == OPAL_BUSY || 226 while(total_len > 0 && (rc == OPAL_BUSY ||
218 rc == OPAL_BUSY_EVENT || rc == OPAL_SUCCESS)) { 227 rc == OPAL_BUSY_EVENT || rc == OPAL_SUCCESS)) {
219 len = total_len; 228 olen = cpu_to_be64(total_len);
220 rc = opal_console_write(vtermno, &len, data); 229 rc = opal_console_write(vtermno, &olen, data);
230 len = be64_to_cpu(olen);
221 231
222 /* Closed or other error drop */ 232 /* Closed or other error drop */
223 if (rc != OPAL_SUCCESS && rc != OPAL_BUSY && 233 if (rc != OPAL_SUCCESS && rc != OPAL_BUSY &&
@@ -237,7 +247,8 @@ int opal_put_chars(uint32_t vtermno, const char *data, int total_len)
237 */ 247 */
238 do 248 do
239 opal_poll_events(&evt); 249 opal_poll_events(&evt);
240 while(rc == OPAL_SUCCESS && (evt & OPAL_EVENT_CONSOLE_OUTPUT)); 250 while(rc == OPAL_SUCCESS &&
251 (be64_to_cpu(evt) & OPAL_EVENT_CONSOLE_OUTPUT));
241 } 252 }
242 spin_unlock_irqrestore(&opal_write_lock, flags); 253 spin_unlock_irqrestore(&opal_write_lock, flags);
243 return written; 254 return written;
@@ -360,7 +371,7 @@ int opal_machine_check(struct pt_regs *regs)
360 371
361static irqreturn_t opal_interrupt(int irq, void *data) 372static irqreturn_t opal_interrupt(int irq, void *data)
362{ 373{
363 uint64_t events; 374 __be64 events;
364 375
365 opal_handle_interrupt(virq_to_hw(irq), &events); 376 opal_handle_interrupt(virq_to_hw(irq), &events);
366 377
@@ -369,10 +380,21 @@ static irqreturn_t opal_interrupt(int irq, void *data)
369 return IRQ_HANDLED; 380 return IRQ_HANDLED;
370} 381}
371 382
383static int opal_sysfs_init(void)
384{
385 opal_kobj = kobject_create_and_add("opal", firmware_kobj);
386 if (!opal_kobj) {
387 pr_warn("kobject_create_and_add opal failed\n");
388 return -ENOMEM;
389 }
390
391 return 0;
392}
393
372static int __init opal_init(void) 394static int __init opal_init(void)
373{ 395{
374 struct device_node *np, *consoles; 396 struct device_node *np, *consoles;
375 const u32 *irqs; 397 const __be32 *irqs;
376 int rc, i, irqlen; 398 int rc, i, irqlen;
377 399
378 opal_node = of_find_node_by_path("/ibm,opal"); 400 opal_node = of_find_node_by_path("/ibm,opal");
@@ -414,6 +436,14 @@ static int __init opal_init(void)
414 " (0x%x)\n", rc, irq, hwirq); 436 " (0x%x)\n", rc, irq, hwirq);
415 opal_irqs[i] = irq; 437 opal_irqs[i] = irq;
416 } 438 }
439
440 /* Create "opal" kobject under /sys/firmware */
441 rc = opal_sysfs_init();
442 if (rc == 0) {
443 /* Setup code update interface */
444 opal_flash_init();
445 }
446
417 return 0; 447 return 0;
418} 448}
419subsys_initcall(opal_init); 449subsys_initcall(opal_init);
diff --git a/arch/powerpc/platforms/powernv/pci-ioda.c b/arch/powerpc/platforms/powernv/pci-ioda.c
index 74a5a5773b1f..084cdfa40682 100644
--- a/arch/powerpc/platforms/powernv/pci-ioda.c
+++ b/arch/powerpc/platforms/powernv/pci-ioda.c
@@ -70,6 +70,16 @@ define_pe_printk_level(pe_err, KERN_ERR);
70define_pe_printk_level(pe_warn, KERN_WARNING); 70define_pe_printk_level(pe_warn, KERN_WARNING);
71define_pe_printk_level(pe_info, KERN_INFO); 71define_pe_printk_level(pe_info, KERN_INFO);
72 72
73/*
74 * stdcix is only supposed to be used in hypervisor real mode as per
75 * the architecture spec
76 */
77static inline void __raw_rm_writeq(u64 val, volatile void __iomem *paddr)
78{
79 __asm__ __volatile__("stdcix %0,0,%1"
80 : : "r" (val), "r" (paddr) : "memory");
81}
82
73static int pnv_ioda_alloc_pe(struct pnv_phb *phb) 83static int pnv_ioda_alloc_pe(struct pnv_phb *phb)
74{ 84{
75 unsigned long pe; 85 unsigned long pe;
@@ -153,13 +163,23 @@ static int pnv_ioda_configure_pe(struct pnv_phb *phb, struct pnv_ioda_pe *pe)
153 rid_end = pe->rid + 1; 163 rid_end = pe->rid + 1;
154 } 164 }
155 165
156 /* Associate PE in PELT */ 166 /*
167 * Associate PE in PELT. We need add the PE into the
168 * corresponding PELT-V as well. Otherwise, the error
169 * originated from the PE might contribute to other
170 * PEs.
171 */
157 rc = opal_pci_set_pe(phb->opal_id, pe->pe_number, pe->rid, 172 rc = opal_pci_set_pe(phb->opal_id, pe->pe_number, pe->rid,
158 bcomp, dcomp, fcomp, OPAL_MAP_PE); 173 bcomp, dcomp, fcomp, OPAL_MAP_PE);
159 if (rc) { 174 if (rc) {
160 pe_err(pe, "OPAL error %ld trying to setup PELT table\n", rc); 175 pe_err(pe, "OPAL error %ld trying to setup PELT table\n", rc);
161 return -ENXIO; 176 return -ENXIO;
162 } 177 }
178
179 rc = opal_pci_set_peltv(phb->opal_id, pe->pe_number,
180 pe->pe_number, OPAL_ADD_PE_TO_DOMAIN);
181 if (rc)
182 pe_warn(pe, "OPAL error %d adding self to PELTV\n", rc);
163 opal_pci_eeh_freeze_clear(phb->opal_id, pe->pe_number, 183 opal_pci_eeh_freeze_clear(phb->opal_id, pe->pe_number,
164 OPAL_EEH_ACTION_CLEAR_FREEZE_ALL); 184 OPAL_EEH_ACTION_CLEAR_FREEZE_ALL);
165 185
@@ -454,10 +474,13 @@ static void pnv_ioda_setup_bus_dma(struct pnv_ioda_pe *pe, struct pci_bus *bus)
454 } 474 }
455} 475}
456 476
457static void pnv_pci_ioda1_tce_invalidate(struct iommu_table *tbl, 477static void pnv_pci_ioda1_tce_invalidate(struct pnv_ioda_pe *pe,
458 u64 *startp, u64 *endp) 478 struct iommu_table *tbl,
479 __be64 *startp, __be64 *endp, bool rm)
459{ 480{
460 u64 __iomem *invalidate = (u64 __iomem *)tbl->it_index; 481 __be64 __iomem *invalidate = rm ?
482 (__be64 __iomem *)pe->tce_inval_reg_phys :
483 (__be64 __iomem *)tbl->it_index;
461 unsigned long start, end, inc; 484 unsigned long start, end, inc;
462 485
463 start = __pa(startp); 486 start = __pa(startp);
@@ -484,7 +507,10 @@ static void pnv_pci_ioda1_tce_invalidate(struct iommu_table *tbl,
484 507
485 mb(); /* Ensure above stores are visible */ 508 mb(); /* Ensure above stores are visible */
486 while (start <= end) { 509 while (start <= end) {
487 __raw_writeq(start, invalidate); 510 if (rm)
511 __raw_rm_writeq(cpu_to_be64(start), invalidate);
512 else
513 __raw_writeq(cpu_to_be64(start), invalidate);
488 start += inc; 514 start += inc;
489 } 515 }
490 516
@@ -496,10 +522,12 @@ static void pnv_pci_ioda1_tce_invalidate(struct iommu_table *tbl,
496 522
497static void pnv_pci_ioda2_tce_invalidate(struct pnv_ioda_pe *pe, 523static void pnv_pci_ioda2_tce_invalidate(struct pnv_ioda_pe *pe,
498 struct iommu_table *tbl, 524 struct iommu_table *tbl,
499 u64 *startp, u64 *endp) 525 __be64 *startp, __be64 *endp, bool rm)
500{ 526{
501 unsigned long start, end, inc; 527 unsigned long start, end, inc;
502 u64 __iomem *invalidate = (u64 __iomem *)tbl->it_index; 528 __be64 __iomem *invalidate = rm ?
529 (__be64 __iomem *)pe->tce_inval_reg_phys :
530 (__be64 __iomem *)tbl->it_index;
503 531
504 /* We'll invalidate DMA address in PE scope */ 532 /* We'll invalidate DMA address in PE scope */
505 start = 0x2ul << 60; 533 start = 0x2ul << 60;
@@ -515,22 +543,25 @@ static void pnv_pci_ioda2_tce_invalidate(struct pnv_ioda_pe *pe,
515 mb(); 543 mb();
516 544
517 while (start <= end) { 545 while (start <= end) {
518 __raw_writeq(start, invalidate); 546 if (rm)
547 __raw_rm_writeq(cpu_to_be64(start), invalidate);
548 else
549 __raw_writeq(cpu_to_be64(start), invalidate);
519 start += inc; 550 start += inc;
520 } 551 }
521} 552}
522 553
523void pnv_pci_ioda_tce_invalidate(struct iommu_table *tbl, 554void pnv_pci_ioda_tce_invalidate(struct iommu_table *tbl,
524 u64 *startp, u64 *endp) 555 __be64 *startp, __be64 *endp, bool rm)
525{ 556{
526 struct pnv_ioda_pe *pe = container_of(tbl, struct pnv_ioda_pe, 557 struct pnv_ioda_pe *pe = container_of(tbl, struct pnv_ioda_pe,
527 tce32_table); 558 tce32_table);
528 struct pnv_phb *phb = pe->phb; 559 struct pnv_phb *phb = pe->phb;
529 560
530 if (phb->type == PNV_PHB_IODA1) 561 if (phb->type == PNV_PHB_IODA1)
531 pnv_pci_ioda1_tce_invalidate(tbl, startp, endp); 562 pnv_pci_ioda1_tce_invalidate(pe, tbl, startp, endp, rm);
532 else 563 else
533 pnv_pci_ioda2_tce_invalidate(pe, tbl, startp, endp); 564 pnv_pci_ioda2_tce_invalidate(pe, tbl, startp, endp, rm);
534} 565}
535 566
536static void pnv_pci_ioda_setup_dma_pe(struct pnv_phb *phb, 567static void pnv_pci_ioda_setup_dma_pe(struct pnv_phb *phb,
@@ -603,7 +634,9 @@ static void pnv_pci_ioda_setup_dma_pe(struct pnv_phb *phb,
603 * bus number, print that out instead. 634 * bus number, print that out instead.
604 */ 635 */
605 tbl->it_busno = 0; 636 tbl->it_busno = 0;
606 tbl->it_index = (unsigned long)ioremap(be64_to_cpup(swinvp), 8); 637 pe->tce_inval_reg_phys = be64_to_cpup(swinvp);
638 tbl->it_index = (unsigned long)ioremap(pe->tce_inval_reg_phys,
639 8);
607 tbl->it_type = TCE_PCI_SWINV_CREATE | TCE_PCI_SWINV_FREE | 640 tbl->it_type = TCE_PCI_SWINV_CREATE | TCE_PCI_SWINV_FREE |
608 TCE_PCI_SWINV_PAIR; 641 TCE_PCI_SWINV_PAIR;
609 } 642 }
@@ -681,7 +714,9 @@ static void pnv_pci_ioda2_setup_dma_pe(struct pnv_phb *phb,
681 * bus number, print that out instead. 714 * bus number, print that out instead.
682 */ 715 */
683 tbl->it_busno = 0; 716 tbl->it_busno = 0;
684 tbl->it_index = (unsigned long)ioremap(be64_to_cpup(swinvp), 8); 717 pe->tce_inval_reg_phys = be64_to_cpup(swinvp);
718 tbl->it_index = (unsigned long)ioremap(pe->tce_inval_reg_phys,
719 8);
685 tbl->it_type = TCE_PCI_SWINV_CREATE | TCE_PCI_SWINV_FREE; 720 tbl->it_type = TCE_PCI_SWINV_CREATE | TCE_PCI_SWINV_FREE;
686 } 721 }
687 iommu_init_table(tbl, phb->hose->node); 722 iommu_init_table(tbl, phb->hose->node);
@@ -786,8 +821,7 @@ static int pnv_pci_ioda_msi_setup(struct pnv_phb *phb, struct pci_dev *dev,
786 struct irq_data *idata; 821 struct irq_data *idata;
787 struct irq_chip *ichip; 822 struct irq_chip *ichip;
788 unsigned int xive_num = hwirq - phb->msi_base; 823 unsigned int xive_num = hwirq - phb->msi_base;
789 uint64_t addr64; 824 __be32 data;
790 uint32_t addr32, data;
791 int rc; 825 int rc;
792 826
793 /* No PE assigned ? bail out ... no MSI for you ! */ 827 /* No PE assigned ? bail out ... no MSI for you ! */
@@ -811,6 +845,8 @@ static int pnv_pci_ioda_msi_setup(struct pnv_phb *phb, struct pci_dev *dev,
811 } 845 }
812 846
813 if (is_64) { 847 if (is_64) {
848 __be64 addr64;
849
814 rc = opal_get_msi_64(phb->opal_id, pe->mve_number, xive_num, 1, 850 rc = opal_get_msi_64(phb->opal_id, pe->mve_number, xive_num, 1,
815 &addr64, &data); 851 &addr64, &data);
816 if (rc) { 852 if (rc) {
@@ -818,9 +854,11 @@ static int pnv_pci_ioda_msi_setup(struct pnv_phb *phb, struct pci_dev *dev,
818 pci_name(dev), rc); 854 pci_name(dev), rc);
819 return -EIO; 855 return -EIO;
820 } 856 }
821 msg->address_hi = addr64 >> 32; 857 msg->address_hi = be64_to_cpu(addr64) >> 32;
822 msg->address_lo = addr64 & 0xfffffffful; 858 msg->address_lo = be64_to_cpu(addr64) & 0xfffffffful;
823 } else { 859 } else {
860 __be32 addr32;
861
824 rc = opal_get_msi_32(phb->opal_id, pe->mve_number, xive_num, 1, 862 rc = opal_get_msi_32(phb->opal_id, pe->mve_number, xive_num, 1,
825 &addr32, &data); 863 &addr32, &data);
826 if (rc) { 864 if (rc) {
@@ -829,9 +867,9 @@ static int pnv_pci_ioda_msi_setup(struct pnv_phb *phb, struct pci_dev *dev,
829 return -EIO; 867 return -EIO;
830 } 868 }
831 msg->address_hi = 0; 869 msg->address_hi = 0;
832 msg->address_lo = addr32; 870 msg->address_lo = be32_to_cpu(addr32);
833 } 871 }
834 msg->data = data; 872 msg->data = be32_to_cpu(data);
835 873
836 /* 874 /*
837 * Change the IRQ chip for the MSI interrupts on PHB3. 875 * Change the IRQ chip for the MSI interrupts on PHB3.
@@ -1106,8 +1144,8 @@ void __init pnv_pci_init_ioda_phb(struct device_node *np,
1106 struct pci_controller *hose; 1144 struct pci_controller *hose;
1107 struct pnv_phb *phb; 1145 struct pnv_phb *phb;
1108 unsigned long size, m32map_off, iomap_off, pemap_off; 1146 unsigned long size, m32map_off, iomap_off, pemap_off;
1109 const u64 *prop64; 1147 const __be64 *prop64;
1110 const u32 *prop32; 1148 const __be32 *prop32;
1111 int len; 1149 int len;
1112 u64 phb_id; 1150 u64 phb_id;
1113 void *aux; 1151 void *aux;
@@ -1142,8 +1180,8 @@ void __init pnv_pci_init_ioda_phb(struct device_node *np,
1142 spin_lock_init(&phb->lock); 1180 spin_lock_init(&phb->lock);
1143 prop32 = of_get_property(np, "bus-range", &len); 1181 prop32 = of_get_property(np, "bus-range", &len);
1144 if (prop32 && len == 8) { 1182 if (prop32 && len == 8) {
1145 hose->first_busno = prop32[0]; 1183 hose->first_busno = be32_to_cpu(prop32[0]);
1146 hose->last_busno = prop32[1]; 1184 hose->last_busno = be32_to_cpu(prop32[1]);
1147 } else { 1185 } else {
1148 pr_warn(" Broken <bus-range> on %s\n", np->full_name); 1186 pr_warn(" Broken <bus-range> on %s\n", np->full_name);
1149 hose->first_busno = 0; 1187 hose->first_busno = 0;
@@ -1171,12 +1209,13 @@ void __init pnv_pci_init_ioda_phb(struct device_node *np,
1171 pr_err(" Failed to map registers !\n"); 1209 pr_err(" Failed to map registers !\n");
1172 1210
1173 /* Initialize more IODA stuff */ 1211 /* Initialize more IODA stuff */
1212 phb->ioda.total_pe = 1;
1174 prop32 = of_get_property(np, "ibm,opal-num-pes", NULL); 1213 prop32 = of_get_property(np, "ibm,opal-num-pes", NULL);
1175 if (!prop32) 1214 if (prop32)
1176 phb->ioda.total_pe = 1; 1215 phb->ioda.total_pe = be32_to_cpup(prop32);
1177 else 1216 prop32 = of_get_property(np, "ibm,opal-reserved-pe", NULL);
1178 phb->ioda.total_pe = *prop32; 1217 if (prop32)
1179 1218 phb->ioda.reserved_pe = be32_to_cpup(prop32);
1180 phb->ioda.m32_size = resource_size(&hose->mem_resources[0]); 1219 phb->ioda.m32_size = resource_size(&hose->mem_resources[0]);
1181 /* FW Has already off top 64k of M32 space (MSI space) */ 1220 /* FW Has already off top 64k of M32 space (MSI space) */
1182 phb->ioda.m32_size += 0x10000; 1221 phb->ioda.m32_size += 0x10000;
@@ -1205,7 +1244,7 @@ void __init pnv_pci_init_ioda_phb(struct device_node *np,
1205 if (phb->type == PNV_PHB_IODA1) 1244 if (phb->type == PNV_PHB_IODA1)
1206 phb->ioda.io_segmap = aux + iomap_off; 1245 phb->ioda.io_segmap = aux + iomap_off;
1207 phb->ioda.pe_array = aux + pemap_off; 1246 phb->ioda.pe_array = aux + pemap_off;
1208 set_bit(0, phb->ioda.pe_alloc); 1247 set_bit(phb->ioda.reserved_pe, phb->ioda.pe_alloc);
1209 1248
1210 INIT_LIST_HEAD(&phb->ioda.pe_dma_list); 1249 INIT_LIST_HEAD(&phb->ioda.pe_dma_list);
1211 INIT_LIST_HEAD(&phb->ioda.pe_list); 1250 INIT_LIST_HEAD(&phb->ioda.pe_list);
@@ -1230,8 +1269,10 @@ void __init pnv_pci_init_ioda_phb(struct device_node *np,
1230 segment_size); 1269 segment_size);
1231#endif 1270#endif
1232 1271
1233 pr_info(" %d PE's M32: 0x%x [segment=0x%x] IO: 0x%x [segment=0x%x]\n", 1272 pr_info(" %d (%d) PE's M32: 0x%x [segment=0x%x]"
1273 " IO: 0x%x [segment=0x%x]\n",
1234 phb->ioda.total_pe, 1274 phb->ioda.total_pe,
1275 phb->ioda.reserved_pe,
1235 phb->ioda.m32_size, phb->ioda.m32_segsize, 1276 phb->ioda.m32_size, phb->ioda.m32_segsize,
1236 phb->ioda.io_size, phb->ioda.io_segsize); 1277 phb->ioda.io_size, phb->ioda.io_segsize);
1237 1278
@@ -1268,13 +1309,6 @@ void __init pnv_pci_init_ioda_phb(struct device_node *np,
1268 rc = opal_pci_reset(phb_id, OPAL_PCI_IODA_TABLE_RESET, OPAL_ASSERT_RESET); 1309 rc = opal_pci_reset(phb_id, OPAL_PCI_IODA_TABLE_RESET, OPAL_ASSERT_RESET);
1269 if (rc) 1310 if (rc)
1270 pr_warning(" OPAL Error %ld performing IODA table reset !\n", rc); 1311 pr_warning(" OPAL Error %ld performing IODA table reset !\n", rc);
1271
1272 /*
1273 * On IODA1 map everything to PE#0, on IODA2 we assume the IODA reset
1274 * has cleared the RTT which has the same effect
1275 */
1276 if (ioda_type == PNV_PHB_IODA1)
1277 opal_pci_set_pe(phb_id, 0, 0, 7, 1, 1 , OPAL_MAP_PE);
1278} 1312}
1279 1313
1280void __init pnv_pci_init_ioda2_phb(struct device_node *np) 1314void __init pnv_pci_init_ioda2_phb(struct device_node *np)
@@ -1285,7 +1319,7 @@ void __init pnv_pci_init_ioda2_phb(struct device_node *np)
1285void __init pnv_pci_init_ioda_hub(struct device_node *np) 1319void __init pnv_pci_init_ioda_hub(struct device_node *np)
1286{ 1320{
1287 struct device_node *phbn; 1321 struct device_node *phbn;
1288 const u64 *prop64; 1322 const __be64 *prop64;
1289 u64 hub_id; 1323 u64 hub_id;
1290 1324
1291 pr_info("Probing IODA IO-Hub %s\n", np->full_name); 1325 pr_info("Probing IODA IO-Hub %s\n", np->full_name);
diff --git a/arch/powerpc/platforms/powernv/pci-p5ioc2.c b/arch/powerpc/platforms/powernv/pci-p5ioc2.c
index b68db6325c1b..f8b4bd8afb2e 100644
--- a/arch/powerpc/platforms/powernv/pci-p5ioc2.c
+++ b/arch/powerpc/platforms/powernv/pci-p5ioc2.c
@@ -99,7 +99,7 @@ static void __init pnv_pci_init_p5ioc2_phb(struct device_node *np, u64 hub_id,
99 void *tce_mem, u64 tce_size) 99 void *tce_mem, u64 tce_size)
100{ 100{
101 struct pnv_phb *phb; 101 struct pnv_phb *phb;
102 const u64 *prop64; 102 const __be64 *prop64;
103 u64 phb_id; 103 u64 phb_id;
104 int64_t rc; 104 int64_t rc;
105 static int primary = 1; 105 static int primary = 1;
@@ -178,7 +178,7 @@ static void __init pnv_pci_init_p5ioc2_phb(struct device_node *np, u64 hub_id,
178void __init pnv_pci_init_p5ioc2_hub(struct device_node *np) 178void __init pnv_pci_init_p5ioc2_hub(struct device_node *np)
179{ 179{
180 struct device_node *phbn; 180 struct device_node *phbn;
181 const u64 *prop64; 181 const __be64 *prop64;
182 u64 hub_id; 182 u64 hub_id;
183 void *tce_mem; 183 void *tce_mem;
184 uint64_t tce_per_phb; 184 uint64_t tce_per_phb;
diff --git a/arch/powerpc/platforms/powernv/pci.c b/arch/powerpc/platforms/powernv/pci.c
index a28d3b5e6393..4eb33a9ed532 100644
--- a/arch/powerpc/platforms/powernv/pci.c
+++ b/arch/powerpc/platforms/powernv/pci.c
@@ -236,17 +236,21 @@ static void pnv_pci_config_check_eeh(struct pnv_phb *phb,
236{ 236{
237 s64 rc; 237 s64 rc;
238 u8 fstate; 238 u8 fstate;
239 u16 pcierr; 239 __be16 pcierr;
240 u32 pe_no; 240 u32 pe_no;
241 241
242 /* 242 /*
243 * Get the PE#. During the PCI probe stage, we might not 243 * Get the PE#. During the PCI probe stage, we might not
244 * setup that yet. So all ER errors should be mapped to 244 * setup that yet. So all ER errors should be mapped to
245 * PE#0 245 * reserved PE.
246 */ 246 */
247 pe_no = PCI_DN(dn)->pe_number; 247 pe_no = PCI_DN(dn)->pe_number;
248 if (pe_no == IODA_INVALID_PE) 248 if (pe_no == IODA_INVALID_PE) {
249 pe_no = 0; 249 if (phb->type == PNV_PHB_P5IOC2)
250 pe_no = 0;
251 else
252 pe_no = phb->ioda.reserved_pe;
253 }
250 254
251 /* Read freeze status */ 255 /* Read freeze status */
252 rc = opal_pci_eeh_freeze_status(phb->opal_id, pe_no, &fstate, &pcierr, 256 rc = opal_pci_eeh_freeze_status(phb->opal_id, pe_no, &fstate, &pcierr,
@@ -283,16 +287,16 @@ int pnv_pci_cfg_read(struct device_node *dn,
283 break; 287 break;
284 } 288 }
285 case 2: { 289 case 2: {
286 u16 v16; 290 __be16 v16;
287 rc = opal_pci_config_read_half_word(phb->opal_id, bdfn, where, 291 rc = opal_pci_config_read_half_word(phb->opal_id, bdfn, where,
288 &v16); 292 &v16);
289 *val = (rc == OPAL_SUCCESS) ? v16 : 0xffff; 293 *val = (rc == OPAL_SUCCESS) ? be16_to_cpu(v16) : 0xffff;
290 break; 294 break;
291 } 295 }
292 case 4: { 296 case 4: {
293 u32 v32; 297 __be32 v32;
294 rc = opal_pci_config_read_word(phb->opal_id, bdfn, where, &v32); 298 rc = opal_pci_config_read_word(phb->opal_id, bdfn, where, &v32);
295 *val = (rc == OPAL_SUCCESS) ? v32 : 0xffffffff; 299 *val = (rc == OPAL_SUCCESS) ? be32_to_cpu(v32) : 0xffffffff;
296 break; 300 break;
297 } 301 }
298 default: 302 default:
@@ -401,10 +405,10 @@ struct pci_ops pnv_pci_ops = {
401 405
402static int pnv_tce_build(struct iommu_table *tbl, long index, long npages, 406static int pnv_tce_build(struct iommu_table *tbl, long index, long npages,
403 unsigned long uaddr, enum dma_data_direction direction, 407 unsigned long uaddr, enum dma_data_direction direction,
404 struct dma_attrs *attrs) 408 struct dma_attrs *attrs, bool rm)
405{ 409{
406 u64 proto_tce; 410 u64 proto_tce;
407 u64 *tcep, *tces; 411 __be64 *tcep, *tces;
408 u64 rpn; 412 u64 rpn;
409 413
410 proto_tce = TCE_PCI_READ; // Read allowed 414 proto_tce = TCE_PCI_READ; // Read allowed
@@ -412,33 +416,48 @@ static int pnv_tce_build(struct iommu_table *tbl, long index, long npages,
412 if (direction != DMA_TO_DEVICE) 416 if (direction != DMA_TO_DEVICE)
413 proto_tce |= TCE_PCI_WRITE; 417 proto_tce |= TCE_PCI_WRITE;
414 418
415 tces = tcep = ((u64 *)tbl->it_base) + index - tbl->it_offset; 419 tces = tcep = ((__be64 *)tbl->it_base) + index - tbl->it_offset;
416 rpn = __pa(uaddr) >> TCE_SHIFT; 420 rpn = __pa(uaddr) >> TCE_SHIFT;
417 421
418 while (npages--) 422 while (npages--)
419 *(tcep++) = proto_tce | (rpn++ << TCE_RPN_SHIFT); 423 *(tcep++) = cpu_to_be64(proto_tce | (rpn++ << TCE_RPN_SHIFT));
420 424
421 /* Some implementations won't cache invalid TCEs and thus may not 425 /* Some implementations won't cache invalid TCEs and thus may not
422 * need that flush. We'll probably turn it_type into a bit mask 426 * need that flush. We'll probably turn it_type into a bit mask
423 * of flags if that becomes the case 427 * of flags if that becomes the case
424 */ 428 */
425 if (tbl->it_type & TCE_PCI_SWINV_CREATE) 429 if (tbl->it_type & TCE_PCI_SWINV_CREATE)
426 pnv_pci_ioda_tce_invalidate(tbl, tces, tcep - 1); 430 pnv_pci_ioda_tce_invalidate(tbl, tces, tcep - 1, rm);
427 431
428 return 0; 432 return 0;
429} 433}
430 434
431static void pnv_tce_free(struct iommu_table *tbl, long index, long npages) 435static int pnv_tce_build_vm(struct iommu_table *tbl, long index, long npages,
436 unsigned long uaddr,
437 enum dma_data_direction direction,
438 struct dma_attrs *attrs)
432{ 439{
433 u64 *tcep, *tces; 440 return pnv_tce_build(tbl, index, npages, uaddr, direction, attrs,
441 false);
442}
434 443
435 tces = tcep = ((u64 *)tbl->it_base) + index - tbl->it_offset; 444static void pnv_tce_free(struct iommu_table *tbl, long index, long npages,
445 bool rm)
446{
447 __be64 *tcep, *tces;
448
449 tces = tcep = ((__be64 *)tbl->it_base) + index - tbl->it_offset;
436 450
437 while (npages--) 451 while (npages--)
438 *(tcep++) = 0; 452 *(tcep++) = cpu_to_be64(0);
439 453
440 if (tbl->it_type & TCE_PCI_SWINV_FREE) 454 if (tbl->it_type & TCE_PCI_SWINV_FREE)
441 pnv_pci_ioda_tce_invalidate(tbl, tces, tcep - 1); 455 pnv_pci_ioda_tce_invalidate(tbl, tces, tcep - 1, rm);
456}
457
458static void pnv_tce_free_vm(struct iommu_table *tbl, long index, long npages)
459{
460 pnv_tce_free(tbl, index, npages, false);
442} 461}
443 462
444static unsigned long pnv_tce_get(struct iommu_table *tbl, long index) 463static unsigned long pnv_tce_get(struct iommu_table *tbl, long index)
@@ -446,6 +465,19 @@ static unsigned long pnv_tce_get(struct iommu_table *tbl, long index)
446 return ((u64 *)tbl->it_base)[index - tbl->it_offset]; 465 return ((u64 *)tbl->it_base)[index - tbl->it_offset];
447} 466}
448 467
468static int pnv_tce_build_rm(struct iommu_table *tbl, long index, long npages,
469 unsigned long uaddr,
470 enum dma_data_direction direction,
471 struct dma_attrs *attrs)
472{
473 return pnv_tce_build(tbl, index, npages, uaddr, direction, attrs, true);
474}
475
476static void pnv_tce_free_rm(struct iommu_table *tbl, long index, long npages)
477{
478 pnv_tce_free(tbl, index, npages, true);
479}
480
449void pnv_pci_setup_iommu_table(struct iommu_table *tbl, 481void pnv_pci_setup_iommu_table(struct iommu_table *tbl,
450 void *tce_mem, u64 tce_size, 482 void *tce_mem, u64 tce_size,
451 u64 dma_offset) 483 u64 dma_offset)
@@ -484,8 +516,8 @@ static struct iommu_table *pnv_pci_setup_bml_iommu(struct pci_controller *hose)
484 swinvp = of_get_property(hose->dn, "linux,tce-sw-invalidate-info", 516 swinvp = of_get_property(hose->dn, "linux,tce-sw-invalidate-info",
485 NULL); 517 NULL);
486 if (swinvp) { 518 if (swinvp) {
487 tbl->it_busno = swinvp[1]; 519 tbl->it_busno = be64_to_cpu(swinvp[1]);
488 tbl->it_index = (unsigned long)ioremap(swinvp[0], 8); 520 tbl->it_index = (unsigned long)ioremap(be64_to_cpup(swinvp), 8);
489 tbl->it_type = TCE_PCI_SWINV_CREATE | TCE_PCI_SWINV_FREE; 521 tbl->it_type = TCE_PCI_SWINV_CREATE | TCE_PCI_SWINV_FREE;
490 } 522 }
491 return tbl; 523 return tbl;
@@ -610,8 +642,10 @@ void __init pnv_pci_init(void)
610 642
611 /* Configure IOMMU DMA hooks */ 643 /* Configure IOMMU DMA hooks */
612 ppc_md.pci_dma_dev_setup = pnv_pci_dma_dev_setup; 644 ppc_md.pci_dma_dev_setup = pnv_pci_dma_dev_setup;
613 ppc_md.tce_build = pnv_tce_build; 645 ppc_md.tce_build = pnv_tce_build_vm;
614 ppc_md.tce_free = pnv_tce_free; 646 ppc_md.tce_free = pnv_tce_free_vm;
647 ppc_md.tce_build_rm = pnv_tce_build_rm;
648 ppc_md.tce_free_rm = pnv_tce_free_rm;
615 ppc_md.tce_get = pnv_tce_get; 649 ppc_md.tce_get = pnv_tce_get;
616 ppc_md.pci_probe_mode = pnv_pci_probe_mode; 650 ppc_md.pci_probe_mode = pnv_pci_probe_mode;
617 set_pci_dma_ops(&dma_iommu_ops); 651 set_pci_dma_ops(&dma_iommu_ops);
diff --git a/arch/powerpc/platforms/powernv/pci.h b/arch/powerpc/platforms/powernv/pci.h
index d633c64e05a1..911c24ef033e 100644
--- a/arch/powerpc/platforms/powernv/pci.h
+++ b/arch/powerpc/platforms/powernv/pci.h
@@ -17,7 +17,7 @@ enum pnv_phb_model {
17 PNV_PHB_MODEL_PHB3, 17 PNV_PHB_MODEL_PHB3,
18}; 18};
19 19
20#define PNV_PCI_DIAG_BUF_SIZE 4096 20#define PNV_PCI_DIAG_BUF_SIZE 8192
21#define PNV_IODA_PE_DEV (1 << 0) /* PE has single PCI device */ 21#define PNV_IODA_PE_DEV (1 << 0) /* PE has single PCI device */
22#define PNV_IODA_PE_BUS (1 << 1) /* PE has primary PCI bus */ 22#define PNV_IODA_PE_BUS (1 << 1) /* PE has primary PCI bus */
23#define PNV_IODA_PE_BUS_ALL (1 << 2) /* PE has subordinate buses */ 23#define PNV_IODA_PE_BUS_ALL (1 << 2) /* PE has subordinate buses */
@@ -52,6 +52,7 @@ struct pnv_ioda_pe {
52 int tce32_seg; 52 int tce32_seg;
53 int tce32_segcount; 53 int tce32_segcount;
54 struct iommu_table tce32_table; 54 struct iommu_table tce32_table;
55 phys_addr_t tce_inval_reg_phys;
55 56
56 /* XXX TODO: Add support for additional 64-bit iommus */ 57 /* XXX TODO: Add support for additional 64-bit iommus */
57 58
@@ -124,6 +125,7 @@ struct pnv_phb {
124 struct { 125 struct {
125 /* Global bridge info */ 126 /* Global bridge info */
126 unsigned int total_pe; 127 unsigned int total_pe;
128 unsigned int reserved_pe;
127 unsigned int m32_size; 129 unsigned int m32_size;
128 unsigned int m32_segsize; 130 unsigned int m32_segsize;
129 unsigned int m32_pci_base; 131 unsigned int m32_pci_base;
@@ -193,6 +195,6 @@ extern void pnv_pci_init_p5ioc2_hub(struct device_node *np);
193extern void pnv_pci_init_ioda_hub(struct device_node *np); 195extern void pnv_pci_init_ioda_hub(struct device_node *np);
194extern void pnv_pci_init_ioda2_phb(struct device_node *np); 196extern void pnv_pci_init_ioda2_phb(struct device_node *np);
195extern void pnv_pci_ioda_tce_invalidate(struct iommu_table *tbl, 197extern void pnv_pci_ioda_tce_invalidate(struct iommu_table *tbl,
196 u64 *startp, u64 *endp); 198 __be64 *startp, __be64 *endp, bool rm);
197 199
198#endif /* __POWERNV_PCI_H */ 200#endif /* __POWERNV_PCI_H */
diff --git a/arch/powerpc/platforms/powernv/rng.c b/arch/powerpc/platforms/powernv/rng.c
new file mode 100644
index 000000000000..8844628915dc
--- /dev/null
+++ b/arch/powerpc/platforms/powernv/rng.c
@@ -0,0 +1,125 @@
1/*
2 * Copyright 2013, Michael Ellerman, IBM Corporation.
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation; either version
7 * 2 of the License, or (at your option) any later version.
8 */
9
10#define pr_fmt(fmt) "powernv-rng: " fmt
11
12#include <linux/kernel.h>
13#include <linux/of.h>
14#include <linux/of_address.h>
15#include <linux/of_platform.h>
16#include <linux/slab.h>
17#include <linux/smp.h>
18#include <asm/archrandom.h>
19#include <asm/io.h>
20#include <asm/prom.h>
21#include <asm/machdep.h>
22
23
24struct powernv_rng {
25 void __iomem *regs;
26 unsigned long mask;
27};
28
29static DEFINE_PER_CPU(struct powernv_rng *, powernv_rng);
30
31
32static unsigned long rng_whiten(struct powernv_rng *rng, unsigned long val)
33{
34 unsigned long parity;
35
36 /* Calculate the parity of the value */
37 asm ("popcntd %0,%1" : "=r" (parity) : "r" (val));
38
39 /* xor our value with the previous mask */
40 val ^= rng->mask;
41
42 /* update the mask based on the parity of this value */
43 rng->mask = (rng->mask << 1) | (parity & 1);
44
45 return val;
46}
47
48int powernv_get_random_long(unsigned long *v)
49{
50 struct powernv_rng *rng;
51
52 rng = get_cpu_var(powernv_rng);
53
54 *v = rng_whiten(rng, in_be64(rng->regs));
55
56 put_cpu_var(rng);
57
58 return 1;
59}
60EXPORT_SYMBOL_GPL(powernv_get_random_long);
61
62static __init void rng_init_per_cpu(struct powernv_rng *rng,
63 struct device_node *dn)
64{
65 int chip_id, cpu;
66
67 chip_id = of_get_ibm_chip_id(dn);
68 if (chip_id == -1)
69 pr_warn("No ibm,chip-id found for %s.\n", dn->full_name);
70
71 for_each_possible_cpu(cpu) {
72 if (per_cpu(powernv_rng, cpu) == NULL ||
73 cpu_to_chip_id(cpu) == chip_id) {
74 per_cpu(powernv_rng, cpu) = rng;
75 }
76 }
77}
78
79static __init int rng_create(struct device_node *dn)
80{
81 struct powernv_rng *rng;
82 unsigned long val;
83
84 rng = kzalloc(sizeof(*rng), GFP_KERNEL);
85 if (!rng)
86 return -ENOMEM;
87
88 rng->regs = of_iomap(dn, 0);
89 if (!rng->regs) {
90 kfree(rng);
91 return -ENXIO;
92 }
93
94 val = in_be64(rng->regs);
95 rng->mask = val;
96
97 rng_init_per_cpu(rng, dn);
98
99 pr_info_once("Registering arch random hook.\n");
100
101 ppc_md.get_random_long = powernv_get_random_long;
102
103 return 0;
104}
105
106static __init int rng_init(void)
107{
108 struct device_node *dn;
109 int rc;
110
111 for_each_compatible_node(dn, NULL, "ibm,power-rng") {
112 rc = rng_create(dn);
113 if (rc) {
114 pr_err("Failed creating rng for %s (%d).\n",
115 dn->full_name, rc);
116 continue;
117 }
118
119 /* Create devices for hwrng driver */
120 of_platform_device_create(dn, NULL, NULL);
121 }
122
123 return 0;
124}
125subsys_initcall(rng_init);
diff --git a/arch/powerpc/platforms/powernv/setup.c b/arch/powerpc/platforms/powernv/setup.c
index e239dcfa224c..19884b2a51b4 100644
--- a/arch/powerpc/platforms/powernv/setup.c
+++ b/arch/powerpc/platforms/powernv/setup.c
@@ -23,6 +23,7 @@
23#include <linux/irq.h> 23#include <linux/irq.h>
24#include <linux/seq_file.h> 24#include <linux/seq_file.h>
25#include <linux/of.h> 25#include <linux/of.h>
26#include <linux/of_fdt.h>
26#include <linux/interrupt.h> 27#include <linux/interrupt.h>
27#include <linux/bug.h> 28#include <linux/bug.h>
28 29
diff --git a/arch/powerpc/platforms/pseries/Makefile b/arch/powerpc/platforms/pseries/Makefile
index 6c61ec5ee914..fbccac9cd2dc 100644
--- a/arch/powerpc/platforms/pseries/Makefile
+++ b/arch/powerpc/platforms/pseries/Makefile
@@ -3,7 +3,7 @@ ccflags-$(CONFIG_PPC_PSERIES_DEBUG) += -DDEBUG
3 3
4obj-y := lpar.o hvCall.o nvram.o reconfig.o \ 4obj-y := lpar.o hvCall.o nvram.o reconfig.o \
5 setup.o iommu.o event_sources.o ras.o \ 5 setup.o iommu.o event_sources.o ras.o \
6 firmware.o power.o dlpar.o mobility.o 6 firmware.o power.o dlpar.o mobility.o rng.o
7obj-$(CONFIG_SMP) += smp.o 7obj-$(CONFIG_SMP) += smp.o
8obj-$(CONFIG_SCANLOG) += scanlog.o 8obj-$(CONFIG_SCANLOG) += scanlog.o
9obj-$(CONFIG_EEH) += eeh_pseries.o 9obj-$(CONFIG_EEH) += eeh_pseries.o
diff --git a/arch/powerpc/platforms/pseries/event_sources.c b/arch/powerpc/platforms/pseries/event_sources.c
index 2605c310166a..18380e8f6dfe 100644
--- a/arch/powerpc/platforms/pseries/event_sources.c
+++ b/arch/powerpc/platforms/pseries/event_sources.c
@@ -25,7 +25,7 @@ void request_event_sources_irqs(struct device_node *np,
25 const char *name) 25 const char *name)
26{ 26{
27 int i, index, count = 0; 27 int i, index, count = 0;
28 struct of_irq oirq; 28 struct of_phandle_args oirq;
29 const u32 *opicprop; 29 const u32 *opicprop;
30 unsigned int opicplen; 30 unsigned int opicplen;
31 unsigned int virqs[16]; 31 unsigned int virqs[16];
@@ -55,13 +55,11 @@ void request_event_sources_irqs(struct device_node *np,
55 /* Else use normal interrupt tree parsing */ 55 /* Else use normal interrupt tree parsing */
56 else { 56 else {
57 /* First try to do a proper OF tree parsing */ 57 /* First try to do a proper OF tree parsing */
58 for (index = 0; of_irq_map_one(np, index, &oirq) == 0; 58 for (index = 0; of_irq_parse_one(np, index, &oirq) == 0;
59 index++) { 59 index++) {
60 if (count > 15) 60 if (count > 15)
61 break; 61 break;
62 virqs[count] = irq_create_of_mapping(oirq.controller, 62 virqs[count] = irq_create_of_mapping(&oirq);
63 oirq.specifier,
64 oirq.size);
65 if (virqs[count] == NO_IRQ) { 63 if (virqs[count] == NO_IRQ) {
66 pr_err("event-sources: Unable to allocate " 64 pr_err("event-sources: Unable to allocate "
67 "interrupt number for %s\n", 65 "interrupt number for %s\n",
diff --git a/arch/powerpc/platforms/pseries/hotplug-memory.c b/arch/powerpc/platforms/pseries/hotplug-memory.c
index 9a432de363b8..9590dbb756f2 100644
--- a/arch/powerpc/platforms/pseries/hotplug-memory.c
+++ b/arch/powerpc/platforms/pseries/hotplug-memory.c
@@ -10,12 +10,14 @@
10 */ 10 */
11 11
12#include <linux/of.h> 12#include <linux/of.h>
13#include <linux/of_address.h>
13#include <linux/memblock.h> 14#include <linux/memblock.h>
14#include <linux/vmalloc.h> 15#include <linux/vmalloc.h>
15#include <linux/memory.h> 16#include <linux/memory.h>
16 17
17#include <asm/firmware.h> 18#include <asm/firmware.h>
18#include <asm/machdep.h> 19#include <asm/machdep.h>
20#include <asm/prom.h>
19#include <asm/sparsemem.h> 21#include <asm/sparsemem.h>
20 22
21static unsigned long get_memblock_size(void) 23static unsigned long get_memblock_size(void)
diff --git a/arch/powerpc/platforms/pseries/iommu.c b/arch/powerpc/platforms/pseries/iommu.c
index 0307901e4132..f253361552ae 100644
--- a/arch/powerpc/platforms/pseries/iommu.c
+++ b/arch/powerpc/platforms/pseries/iommu.c
@@ -52,7 +52,7 @@
52 52
53 53
54static void tce_invalidate_pSeries_sw(struct iommu_table *tbl, 54static void tce_invalidate_pSeries_sw(struct iommu_table *tbl,
55 u64 *startp, u64 *endp) 55 __be64 *startp, __be64 *endp)
56{ 56{
57 u64 __iomem *invalidate = (u64 __iomem *)tbl->it_index; 57 u64 __iomem *invalidate = (u64 __iomem *)tbl->it_index;
58 unsigned long start, end, inc; 58 unsigned long start, end, inc;
@@ -86,7 +86,7 @@ static int tce_build_pSeries(struct iommu_table *tbl, long index,
86 struct dma_attrs *attrs) 86 struct dma_attrs *attrs)
87{ 87{
88 u64 proto_tce; 88 u64 proto_tce;
89 u64 *tcep, *tces; 89 __be64 *tcep, *tces;
90 u64 rpn; 90 u64 rpn;
91 91
92 proto_tce = TCE_PCI_READ; // Read allowed 92 proto_tce = TCE_PCI_READ; // Read allowed
@@ -94,12 +94,12 @@ static int tce_build_pSeries(struct iommu_table *tbl, long index,
94 if (direction != DMA_TO_DEVICE) 94 if (direction != DMA_TO_DEVICE)
95 proto_tce |= TCE_PCI_WRITE; 95 proto_tce |= TCE_PCI_WRITE;
96 96
97 tces = tcep = ((u64 *)tbl->it_base) + index; 97 tces = tcep = ((__be64 *)tbl->it_base) + index;
98 98
99 while (npages--) { 99 while (npages--) {
100 /* can't move this out since we might cross MEMBLOCK boundary */ 100 /* can't move this out since we might cross MEMBLOCK boundary */
101 rpn = __pa(uaddr) >> TCE_SHIFT; 101 rpn = __pa(uaddr) >> TCE_SHIFT;
102 *tcep = proto_tce | (rpn & TCE_RPN_MASK) << TCE_RPN_SHIFT; 102 *tcep = cpu_to_be64(proto_tce | (rpn & TCE_RPN_MASK) << TCE_RPN_SHIFT);
103 103
104 uaddr += TCE_PAGE_SIZE; 104 uaddr += TCE_PAGE_SIZE;
105 tcep++; 105 tcep++;
@@ -113,9 +113,9 @@ static int tce_build_pSeries(struct iommu_table *tbl, long index,
113 113
114static void tce_free_pSeries(struct iommu_table *tbl, long index, long npages) 114static void tce_free_pSeries(struct iommu_table *tbl, long index, long npages)
115{ 115{
116 u64 *tcep, *tces; 116 __be64 *tcep, *tces;
117 117
118 tces = tcep = ((u64 *)tbl->it_base) + index; 118 tces = tcep = ((__be64 *)tbl->it_base) + index;
119 119
120 while (npages--) 120 while (npages--)
121 *(tcep++) = 0; 121 *(tcep++) = 0;
@@ -126,11 +126,11 @@ static void tce_free_pSeries(struct iommu_table *tbl, long index, long npages)
126 126
127static unsigned long tce_get_pseries(struct iommu_table *tbl, long index) 127static unsigned long tce_get_pseries(struct iommu_table *tbl, long index)
128{ 128{
129 u64 *tcep; 129 __be64 *tcep;
130 130
131 tcep = ((u64 *)tbl->it_base) + index; 131 tcep = ((__be64 *)tbl->it_base) + index;
132 132
133 return *tcep; 133 return be64_to_cpu(*tcep);
134} 134}
135 135
136static void tce_free_pSeriesLP(struct iommu_table*, long, long); 136static void tce_free_pSeriesLP(struct iommu_table*, long, long);
@@ -177,7 +177,7 @@ static int tce_build_pSeriesLP(struct iommu_table *tbl, long tcenum,
177 return ret; 177 return ret;
178} 178}
179 179
180static DEFINE_PER_CPU(u64 *, tce_page); 180static DEFINE_PER_CPU(__be64 *, tce_page);
181 181
182static int tce_buildmulti_pSeriesLP(struct iommu_table *tbl, long tcenum, 182static int tce_buildmulti_pSeriesLP(struct iommu_table *tbl, long tcenum,
183 long npages, unsigned long uaddr, 183 long npages, unsigned long uaddr,
@@ -186,7 +186,7 @@ static int tce_buildmulti_pSeriesLP(struct iommu_table *tbl, long tcenum,
186{ 186{
187 u64 rc = 0; 187 u64 rc = 0;
188 u64 proto_tce; 188 u64 proto_tce;
189 u64 *tcep; 189 __be64 *tcep;
190 u64 rpn; 190 u64 rpn;
191 long l, limit; 191 long l, limit;
192 long tcenum_start = tcenum, npages_start = npages; 192 long tcenum_start = tcenum, npages_start = npages;
@@ -206,7 +206,7 @@ static int tce_buildmulti_pSeriesLP(struct iommu_table *tbl, long tcenum,
206 * from iommu_alloc{,_sg}() 206 * from iommu_alloc{,_sg}()
207 */ 207 */
208 if (!tcep) { 208 if (!tcep) {
209 tcep = (u64 *)__get_free_page(GFP_ATOMIC); 209 tcep = (__be64 *)__get_free_page(GFP_ATOMIC);
210 /* If allocation fails, fall back to the loop implementation */ 210 /* If allocation fails, fall back to the loop implementation */
211 if (!tcep) { 211 if (!tcep) {
212 local_irq_restore(flags); 212 local_irq_restore(flags);
@@ -230,7 +230,7 @@ static int tce_buildmulti_pSeriesLP(struct iommu_table *tbl, long tcenum,
230 limit = min_t(long, npages, 4096/TCE_ENTRY_SIZE); 230 limit = min_t(long, npages, 4096/TCE_ENTRY_SIZE);
231 231
232 for (l = 0; l < limit; l++) { 232 for (l = 0; l < limit; l++) {
233 tcep[l] = proto_tce | (rpn & TCE_RPN_MASK) << TCE_RPN_SHIFT; 233 tcep[l] = cpu_to_be64(proto_tce | (rpn & TCE_RPN_MASK) << TCE_RPN_SHIFT);
234 rpn++; 234 rpn++;
235 } 235 }
236 236
@@ -329,16 +329,16 @@ struct direct_window {
329 329
330/* Dynamic DMA Window support */ 330/* Dynamic DMA Window support */
331struct ddw_query_response { 331struct ddw_query_response {
332 u32 windows_available; 332 __be32 windows_available;
333 u32 largest_available_block; 333 __be32 largest_available_block;
334 u32 page_size; 334 __be32 page_size;
335 u32 migration_capable; 335 __be32 migration_capable;
336}; 336};
337 337
338struct ddw_create_response { 338struct ddw_create_response {
339 u32 liobn; 339 __be32 liobn;
340 u32 addr_hi; 340 __be32 addr_hi;
341 u32 addr_lo; 341 __be32 addr_lo;
342}; 342};
343 343
344static LIST_HEAD(direct_window_list); 344static LIST_HEAD(direct_window_list);
@@ -392,7 +392,8 @@ static int tce_setrange_multi_pSeriesLP(unsigned long start_pfn,
392 unsigned long num_pfn, const void *arg) 392 unsigned long num_pfn, const void *arg)
393{ 393{
394 const struct dynamic_dma_window_prop *maprange = arg; 394 const struct dynamic_dma_window_prop *maprange = arg;
395 u64 *tcep, tce_size, num_tce, dma_offset, next, proto_tce, liobn; 395 u64 tce_size, num_tce, dma_offset, next, proto_tce, liobn;
396 __be64 *tcep;
396 u32 tce_shift; 397 u32 tce_shift;
397 u64 rc = 0; 398 u64 rc = 0;
398 long l, limit; 399 long l, limit;
@@ -401,7 +402,7 @@ static int tce_setrange_multi_pSeriesLP(unsigned long start_pfn,
401 tcep = __get_cpu_var(tce_page); 402 tcep = __get_cpu_var(tce_page);
402 403
403 if (!tcep) { 404 if (!tcep) {
404 tcep = (u64 *)__get_free_page(GFP_ATOMIC); 405 tcep = (__be64 *)__get_free_page(GFP_ATOMIC);
405 if (!tcep) { 406 if (!tcep) {
406 local_irq_enable(); 407 local_irq_enable();
407 return -ENOMEM; 408 return -ENOMEM;
@@ -435,7 +436,7 @@ static int tce_setrange_multi_pSeriesLP(unsigned long start_pfn,
435 dma_offset = next + be64_to_cpu(maprange->dma_base); 436 dma_offset = next + be64_to_cpu(maprange->dma_base);
436 437
437 for (l = 0; l < limit; l++) { 438 for (l = 0; l < limit; l++) {
438 tcep[l] = proto_tce | next; 439 tcep[l] = cpu_to_be64(proto_tce | next);
439 next += tce_size; 440 next += tce_size;
440 } 441 }
441 442
@@ -780,7 +781,7 @@ static u64 find_existing_ddw(struct device_node *pdn)
780 list_for_each_entry(window, &direct_window_list, list) { 781 list_for_each_entry(window, &direct_window_list, list) {
781 if (window->device == pdn) { 782 if (window->device == pdn) {
782 direct64 = window->prop; 783 direct64 = window->prop;
783 dma_addr = direct64->dma_base; 784 dma_addr = be64_to_cpu(direct64->dma_base);
784 break; 785 break;
785 } 786 }
786 } 787 }
@@ -1045,11 +1046,11 @@ static u64 enable_ddw(struct pci_dev *dev, struct device_node *pdn)
1045 dev_dbg(&dev->dev, "no free dynamic windows"); 1046 dev_dbg(&dev->dev, "no free dynamic windows");
1046 goto out_restore_window; 1047 goto out_restore_window;
1047 } 1048 }
1048 if (query.page_size & 4) { 1049 if (be32_to_cpu(query.page_size) & 4) {
1049 page_shift = 24; /* 16MB */ 1050 page_shift = 24; /* 16MB */
1050 } else if (query.page_size & 2) { 1051 } else if (be32_to_cpu(query.page_size) & 2) {
1051 page_shift = 16; /* 64kB */ 1052 page_shift = 16; /* 64kB */
1052 } else if (query.page_size & 1) { 1053 } else if (be32_to_cpu(query.page_size) & 1) {
1053 page_shift = 12; /* 4kB */ 1054 page_shift = 12; /* 4kB */
1054 } else { 1055 } else {
1055 dev_dbg(&dev->dev, "no supported direct page size in mask %x", 1056 dev_dbg(&dev->dev, "no supported direct page size in mask %x",
@@ -1059,7 +1060,7 @@ static u64 enable_ddw(struct pci_dev *dev, struct device_node *pdn)
1059 /* verify the window * number of ptes will map the partition */ 1060 /* verify the window * number of ptes will map the partition */
1060 /* check largest block * page size > max memory hotplug addr */ 1061 /* check largest block * page size > max memory hotplug addr */
1061 max_addr = memory_hotplug_max(); 1062 max_addr = memory_hotplug_max();
1062 if (query.largest_available_block < (max_addr >> page_shift)) { 1063 if (be32_to_cpu(query.largest_available_block) < (max_addr >> page_shift)) {
1063 dev_dbg(&dev->dev, "can't map partiton max 0x%llx with %u " 1064 dev_dbg(&dev->dev, "can't map partiton max 0x%llx with %u "
1064 "%llu-sized pages\n", max_addr, query.largest_available_block, 1065 "%llu-sized pages\n", max_addr, query.largest_available_block,
1065 1ULL << page_shift); 1066 1ULL << page_shift);
@@ -1085,7 +1086,7 @@ static u64 enable_ddw(struct pci_dev *dev, struct device_node *pdn)
1085 if (ret != 0) 1086 if (ret != 0)
1086 goto out_free_prop; 1087 goto out_free_prop;
1087 1088
1088 ddwprop->liobn = cpu_to_be32(create.liobn); 1089 ddwprop->liobn = create.liobn;
1089 ddwprop->dma_base = cpu_to_be64(of_read_number(&create.addr_hi, 2)); 1090 ddwprop->dma_base = cpu_to_be64(of_read_number(&create.addr_hi, 2));
1090 ddwprop->tce_shift = cpu_to_be32(page_shift); 1091 ddwprop->tce_shift = cpu_to_be32(page_shift);
1091 ddwprop->window_shift = cpu_to_be32(len); 1092 ddwprop->window_shift = cpu_to_be32(len);
diff --git a/arch/powerpc/platforms/pseries/nvram.c b/arch/powerpc/platforms/pseries/nvram.c
index d276cd3edd8f..057fc894be51 100644
--- a/arch/powerpc/platforms/pseries/nvram.c
+++ b/arch/powerpc/platforms/pseries/nvram.c
@@ -429,9 +429,6 @@ static int __init pseries_nvram_init_os_partition(struct nvram_os_partition
429 loff_t p; 429 loff_t p;
430 int size; 430 int size;
431 431
432 /* Scan nvram for partitions */
433 nvram_scan_partitions();
434
435 /* Look for ours */ 432 /* Look for ours */
436 p = nvram_find_partition(part->name, NVRAM_SIG_OS, &size); 433 p = nvram_find_partition(part->name, NVRAM_SIG_OS, &size);
437 434
@@ -795,6 +792,9 @@ static int __init pseries_nvram_init_log_partitions(void)
795{ 792{
796 int rc; 793 int rc;
797 794
795 /* Scan nvram for partitions */
796 nvram_scan_partitions();
797
798 rc = pseries_nvram_init_os_partition(&rtas_log_partition); 798 rc = pseries_nvram_init_os_partition(&rtas_log_partition);
799 nvram_init_oops_partition(rc == 0); 799 nvram_init_oops_partition(rc == 0);
800 return 0; 800 return 0;
@@ -804,7 +804,7 @@ machine_arch_initcall(pseries, pseries_nvram_init_log_partitions);
804int __init pSeries_nvram_init(void) 804int __init pSeries_nvram_init(void)
805{ 805{
806 struct device_node *nvram; 806 struct device_node *nvram;
807 const unsigned int *nbytes_p; 807 const __be32 *nbytes_p;
808 unsigned int proplen; 808 unsigned int proplen;
809 809
810 nvram = of_find_node_by_type(NULL, "nvram"); 810 nvram = of_find_node_by_type(NULL, "nvram");
@@ -817,7 +817,7 @@ int __init pSeries_nvram_init(void)
817 return -EIO; 817 return -EIO;
818 } 818 }
819 819
820 nvram_size = *nbytes_p; 820 nvram_size = be32_to_cpup(nbytes_p);
821 821
822 nvram_fetch = rtas_token("nvram-fetch"); 822 nvram_fetch = rtas_token("nvram-fetch");
823 nvram_store = rtas_token("nvram-store"); 823 nvram_store = rtas_token("nvram-store");
diff --git a/arch/powerpc/platforms/pseries/rng.c b/arch/powerpc/platforms/pseries/rng.c
new file mode 100644
index 000000000000..a702f1c08242
--- /dev/null
+++ b/arch/powerpc/platforms/pseries/rng.c
@@ -0,0 +1,44 @@
1/*
2 * Copyright 2013, Michael Ellerman, IBM Corporation.
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation; either version
7 * 2 of the License, or (at your option) any later version.
8 */
9
10#define pr_fmt(fmt) "pseries-rng: " fmt
11
12#include <linux/kernel.h>
13#include <linux/of.h>
14#include <asm/archrandom.h>
15#include <asm/machdep.h>
16
17
18static int pseries_get_random_long(unsigned long *v)
19{
20 unsigned long retbuf[PLPAR_HCALL_BUFSIZE];
21
22 if (plpar_hcall(H_RANDOM, retbuf) == H_SUCCESS) {
23 *v = retbuf[0];
24 return 1;
25 }
26
27 return 0;
28}
29
30static __init int rng_init(void)
31{
32 struct device_node *dn;
33
34 dn = of_find_compatible_node(NULL, NULL, "ibm,random");
35 if (!dn)
36 return -ENODEV;
37
38 pr_info("Registering arch random hook.\n");
39
40 ppc_md.get_random_long = pseries_get_random_long;
41
42 return 0;
43}
44subsys_initcall(rng_init);
diff --git a/arch/powerpc/platforms/wsp/scom_smp.c b/arch/powerpc/platforms/wsp/scom_smp.c
index b56b70aeb497..268bc899c1f7 100644
--- a/arch/powerpc/platforms/wsp/scom_smp.c
+++ b/arch/powerpc/platforms/wsp/scom_smp.c
@@ -116,7 +116,14 @@ static int a2_scom_ram(scom_map_t scom, int thread, u32 insn, int extmask)
116 116
117 scom_write(scom, SCOM_RAMIC, cmd); 117 scom_write(scom, SCOM_RAMIC, cmd);
118 118
119 while (!((val = scom_read(scom, SCOM_RAMC)) & mask)) { 119 for (;;) {
120 if (scom_read(scom, SCOM_RAMC, &val) != 0) {
121 pr_err("SCOM error on instruction 0x%08x, thread %d\n",
122 insn, thread);
123 return -1;
124 }
125 if (val & mask)
126 break;
120 pr_devel("Waiting on RAMC = 0x%llx\n", val); 127 pr_devel("Waiting on RAMC = 0x%llx\n", val);
121 if (++n == 3) { 128 if (++n == 3) {
122 pr_err("RAMC timeout on instruction 0x%08x, thread %d\n", 129 pr_err("RAMC timeout on instruction 0x%08x, thread %d\n",
@@ -151,9 +158,7 @@ static int a2_scom_getgpr(scom_map_t scom, int thread, int gpr, int alt,
151 if (rc) 158 if (rc)
152 return rc; 159 return rc;
153 160
154 *out_gpr = scom_read(scom, SCOM_RAMD); 161 return scom_read(scom, SCOM_RAMD, out_gpr);
155
156 return 0;
157} 162}
158 163
159static int a2_scom_getspr(scom_map_t scom, int thread, int spr, u64 *out_spr) 164static int a2_scom_getspr(scom_map_t scom, int thread, int spr, u64 *out_spr)
@@ -353,7 +358,10 @@ int a2_scom_startup_cpu(unsigned int lcpu, int thr_idx, struct device_node *np)
353 358
354 pr_devel("Bringing up CPU%d using SCOM...\n", lcpu); 359 pr_devel("Bringing up CPU%d using SCOM...\n", lcpu);
355 360
356 pccr0 = scom_read(scom, SCOM_PCCR0); 361 if (scom_read(scom, SCOM_PCCR0, &pccr0) != 0) {
362 printk(KERN_ERR "XSCOM failure readng PCCR0 on CPU%d\n", lcpu);
363 return -1;
364 }
357 scom_write(scom, SCOM_PCCR0, pccr0 | SCOM_PCCR0_ENABLE_DEBUG | 365 scom_write(scom, SCOM_PCCR0, pccr0 | SCOM_PCCR0_ENABLE_DEBUG |
358 SCOM_PCCR0_ENABLE_RAM); 366 SCOM_PCCR0_ENABLE_RAM);
359 367
diff --git a/arch/powerpc/platforms/wsp/scom_wsp.c b/arch/powerpc/platforms/wsp/scom_wsp.c
index 4052e2259f30..8928507affea 100644
--- a/arch/powerpc/platforms/wsp/scom_wsp.c
+++ b/arch/powerpc/platforms/wsp/scom_wsp.c
@@ -50,18 +50,22 @@ static void wsp_scom_unmap(scom_map_t map)
50 iounmap((void *)map); 50 iounmap((void *)map);
51} 51}
52 52
53static u64 wsp_scom_read(scom_map_t map, u32 reg) 53static int wsp_scom_read(scom_map_t map, u64 reg, u64 *value)
54{ 54{
55 u64 __iomem *addr = (u64 __iomem *)map; 55 u64 __iomem *addr = (u64 __iomem *)map;
56 56
57 return in_be64(addr + reg); 57 *value = in_be64(addr + reg);
58
59 return 0;
58} 60}
59 61
60static void wsp_scom_write(scom_map_t map, u32 reg, u64 value) 62static int wsp_scom_write(scom_map_t map, u64 reg, u64 value)
61{ 63{
62 u64 __iomem *addr = (u64 __iomem *)map; 64 u64 __iomem *addr = (u64 __iomem *)map;
63 65
64 return out_be64(addr + reg, value); 66 out_be64(addr + reg, value);
67
68 return 0;
65} 69}
66 70
67static const struct scom_controller wsp_scom_controller = { 71static const struct scom_controller wsp_scom_controller = {
diff --git a/arch/powerpc/platforms/wsp/wsp.c b/arch/powerpc/platforms/wsp/wsp.c
index d25cc96c21b8..ddb6efe88914 100644
--- a/arch/powerpc/platforms/wsp/wsp.c
+++ b/arch/powerpc/platforms/wsp/wsp.c
@@ -89,6 +89,7 @@ void wsp_halt(void)
89 struct device_node *dn; 89 struct device_node *dn;
90 struct device_node *mine; 90 struct device_node *mine;
91 struct device_node *me; 91 struct device_node *me;
92 int rc;
92 93
93 me = of_get_cpu_node(smp_processor_id(), NULL); 94 me = of_get_cpu_node(smp_processor_id(), NULL);
94 mine = scom_find_parent(me); 95 mine = scom_find_parent(me);
@@ -101,15 +102,15 @@ void wsp_halt(void)
101 102
102 /* read-modify-write it so the HW probe does not get 103 /* read-modify-write it so the HW probe does not get
103 * confused */ 104 * confused */
104 val = scom_read(m, 0); 105 rc = scom_read(m, 0, &val);
105 val |= 1; 106 if (rc == 0)
106 scom_write(m, 0, val); 107 scom_write(m, 0, val | 1);
107 scom_unmap(m); 108 scom_unmap(m);
108 } 109 }
109 m = scom_map(mine, 0, 1); 110 m = scom_map(mine, 0, 1);
110 val = scom_read(m, 0); 111 rc = scom_read(m, 0, &val);
111 val |= 1; 112 if (rc == 0)
112 scom_write(m, 0, val); 113 scom_write(m, 0, val | 1);
113 /* should never return */ 114 /* should never return */
114 scom_unmap(m); 115 scom_unmap(m);
115} 116}
diff --git a/arch/powerpc/sysdev/Kconfig b/arch/powerpc/sysdev/Kconfig
index ab4cb5476472..13ec968be4c7 100644
--- a/arch/powerpc/sysdev/Kconfig
+++ b/arch/powerpc/sysdev/Kconfig
@@ -28,7 +28,7 @@ config PPC_SCOM
28 28
29config SCOM_DEBUGFS 29config SCOM_DEBUGFS
30 bool "Expose SCOM controllers via debugfs" 30 bool "Expose SCOM controllers via debugfs"
31 depends on PPC_SCOM 31 depends on PPC_SCOM && DEBUG_FS
32 default n 32 default n
33 33
34config GE_FPGA 34config GE_FPGA
diff --git a/arch/powerpc/sysdev/cpm_common.c b/arch/powerpc/sysdev/cpm_common.c
index 4dd534194ae8..4f7869571290 100644
--- a/arch/powerpc/sysdev/cpm_common.c
+++ b/arch/powerpc/sysdev/cpm_common.c
@@ -22,6 +22,7 @@
22#include <linux/spinlock.h> 22#include <linux/spinlock.h>
23#include <linux/export.h> 23#include <linux/export.h>
24#include <linux/of.h> 24#include <linux/of.h>
25#include <linux/of_address.h>
25#include <linux/slab.h> 26#include <linux/slab.h>
26 27
27#include <asm/udbg.h> 28#include <asm/udbg.h>
diff --git a/arch/powerpc/sysdev/ehv_pic.c b/arch/powerpc/sysdev/ehv_pic.c
index 9cd0e60716fe..b74085cea1af 100644
--- a/arch/powerpc/sysdev/ehv_pic.c
+++ b/arch/powerpc/sysdev/ehv_pic.c
@@ -19,6 +19,7 @@
19#include <linux/slab.h> 19#include <linux/slab.h>
20#include <linux/spinlock.h> 20#include <linux/spinlock.h>
21#include <linux/of.h> 21#include <linux/of.h>
22#include <linux/of_address.h>
22 23
23#include <asm/io.h> 24#include <asm/io.h>
24#include <asm/irq.h> 25#include <asm/irq.h>
diff --git a/arch/powerpc/sysdev/fsl_gtm.c b/arch/powerpc/sysdev/fsl_gtm.c
index 0eb871cc3437..06ac3c61b3d0 100644
--- a/arch/powerpc/sysdev/fsl_gtm.c
+++ b/arch/powerpc/sysdev/fsl_gtm.c
@@ -19,6 +19,8 @@
19#include <linux/list.h> 19#include <linux/list.h>
20#include <linux/io.h> 20#include <linux/io.h>
21#include <linux/of.h> 21#include <linux/of.h>
22#include <linux/of_address.h>
23#include <linux/of_irq.h>
22#include <linux/spinlock.h> 24#include <linux/spinlock.h>
23#include <linux/bitops.h> 25#include <linux/bitops.h>
24#include <linux/slab.h> 26#include <linux/slab.h>
@@ -401,16 +403,15 @@ static int __init fsl_gtm_init(void)
401 gtm->clock = *clock; 403 gtm->clock = *clock;
402 404
403 for (i = 0; i < ARRAY_SIZE(gtm->timers); i++) { 405 for (i = 0; i < ARRAY_SIZE(gtm->timers); i++) {
404 int ret; 406 unsigned int irq;
405 struct resource irq;
406 407
407 ret = of_irq_to_resource(np, i, &irq); 408 irq = irq_of_parse_and_map(np, i);
408 if (ret == NO_IRQ) { 409 if (irq == NO_IRQ) {
409 pr_err("%s: not enough interrupts specified\n", 410 pr_err("%s: not enough interrupts specified\n",
410 np->full_name); 411 np->full_name);
411 goto err; 412 goto err;
412 } 413 }
413 gtm->timers[i].irq = irq.start; 414 gtm->timers[i].irq = irq;
414 gtm->timers[i].gtm = gtm; 415 gtm->timers[i].gtm = gtm;
415 } 416 }
416 417
diff --git a/arch/powerpc/sysdev/fsl_pci.c b/arch/powerpc/sysdev/fsl_pci.c
index ccfb50ddfe38..21039634d1d0 100644
--- a/arch/powerpc/sysdev/fsl_pci.c
+++ b/arch/powerpc/sysdev/fsl_pci.c
@@ -40,7 +40,7 @@
40 40
41static int fsl_pcie_bus_fixup, is_mpc83xx_pci; 41static int fsl_pcie_bus_fixup, is_mpc83xx_pci;
42 42
43static void quirk_fsl_pcie_header(struct pci_dev *dev) 43static void quirk_fsl_pcie_early(struct pci_dev *dev)
44{ 44{
45 u8 hdr_type; 45 u8 hdr_type;
46 46
@@ -562,7 +562,8 @@ no_bridge:
562} 562}
563#endif /* CONFIG_FSL_SOC_BOOKE || CONFIG_PPC_86xx */ 563#endif /* CONFIG_FSL_SOC_BOOKE || CONFIG_PPC_86xx */
564 564
565DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_FREESCALE, PCI_ANY_ID, quirk_fsl_pcie_header); 565DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_FREESCALE, PCI_ANY_ID,
566 quirk_fsl_pcie_early);
566 567
567#if defined(CONFIG_PPC_83xx) || defined(CONFIG_PPC_MPC512x) 568#if defined(CONFIG_PPC_83xx) || defined(CONFIG_PPC_MPC512x)
568struct mpc83xx_pcie_priv { 569struct mpc83xx_pcie_priv {
diff --git a/arch/powerpc/sysdev/fsl_pmc.c b/arch/powerpc/sysdev/fsl_pmc.c
index 592a0f8d527a..8cf4aa0e3a25 100644
--- a/arch/powerpc/sysdev/fsl_pmc.c
+++ b/arch/powerpc/sysdev/fsl_pmc.c
@@ -18,6 +18,7 @@
18#include <linux/suspend.h> 18#include <linux/suspend.h>
19#include <linux/delay.h> 19#include <linux/delay.h>
20#include <linux/device.h> 20#include <linux/device.h>
21#include <linux/of_address.h>
21#include <linux/of_platform.h> 22#include <linux/of_platform.h>
22 23
23struct pmc_regs { 24struct pmc_regs {
diff --git a/arch/powerpc/sysdev/fsl_rio.c b/arch/powerpc/sysdev/fsl_rio.c
index e2fb3171f41b..95dd892e9904 100644
--- a/arch/powerpc/sysdev/fsl_rio.c
+++ b/arch/powerpc/sysdev/fsl_rio.c
@@ -28,6 +28,8 @@
28#include <linux/dma-mapping.h> 28#include <linux/dma-mapping.h>
29#include <linux/interrupt.h> 29#include <linux/interrupt.h>
30#include <linux/device.h> 30#include <linux/device.h>
31#include <linux/of_address.h>
32#include <linux/of_irq.h>
31#include <linux/of_platform.h> 33#include <linux/of_platform.h>
32#include <linux/delay.h> 34#include <linux/delay.h>
33#include <linux/slab.h> 35#include <linux/slab.h>
diff --git a/arch/powerpc/sysdev/fsl_rmu.c b/arch/powerpc/sysdev/fsl_rmu.c
index 14bd5221f28a..00e224a1048c 100644
--- a/arch/powerpc/sysdev/fsl_rmu.c
+++ b/arch/powerpc/sysdev/fsl_rmu.c
@@ -27,6 +27,7 @@
27#include <linux/types.h> 27#include <linux/types.h>
28#include <linux/dma-mapping.h> 28#include <linux/dma-mapping.h>
29#include <linux/interrupt.h> 29#include <linux/interrupt.h>
30#include <linux/of_irq.h>
30#include <linux/of_platform.h> 31#include <linux/of_platform.h>
31#include <linux/slab.h> 32#include <linux/slab.h>
32 33
diff --git a/arch/powerpc/sysdev/fsl_soc.h b/arch/powerpc/sysdev/fsl_soc.h
index c6d00736f07f..4c5a19ef4f0b 100644
--- a/arch/powerpc/sysdev/fsl_soc.h
+++ b/arch/powerpc/sysdev/fsl_soc.h
@@ -21,8 +21,6 @@ struct device_node;
21 21
22extern void fsl_rstcr_restart(char *cmd); 22extern void fsl_rstcr_restart(char *cmd);
23 23
24#if defined(CONFIG_FB_FSL_DIU) || defined(CONFIG_FB_FSL_DIU_MODULE)
25
26/* The different ports that the DIU can be connected to */ 24/* The different ports that the DIU can be connected to */
27enum fsl_diu_monitor_port { 25enum fsl_diu_monitor_port {
28 FSL_DIU_PORT_DVI, /* DVI */ 26 FSL_DIU_PORT_DVI, /* DVI */
@@ -43,7 +41,6 @@ struct platform_diu_data_ops {
43}; 41};
44 42
45extern struct platform_diu_data_ops diu_ops; 43extern struct platform_diu_data_ops diu_ops;
46#endif
47 44
48void fsl_hv_restart(char *cmd); 45void fsl_hv_restart(char *cmd);
49void fsl_hv_halt(void); 46void fsl_hv_halt(void);
diff --git a/arch/powerpc/sysdev/mpic.c b/arch/powerpc/sysdev/mpic.c
index 1be54faf60dd..0e166ed4cd16 100644
--- a/arch/powerpc/sysdev/mpic.c
+++ b/arch/powerpc/sysdev/mpic.c
@@ -535,7 +535,7 @@ static void __init mpic_scan_ht_pic(struct mpic *mpic, u8 __iomem *devbase,
535 mpic->fixups[irq].data = readl(base + 4) | 0x80000000; 535 mpic->fixups[irq].data = readl(base + 4) | 0x80000000;
536 } 536 }
537} 537}
538 538
539 539
540static void __init mpic_scan_ht_pics(struct mpic *mpic) 540static void __init mpic_scan_ht_pics(struct mpic *mpic)
541{ 541{
@@ -1088,8 +1088,14 @@ static int mpic_host_map(struct irq_domain *h, unsigned int virq,
1088 * is done here. 1088 * is done here.
1089 */ 1089 */
1090 if (!mpic_is_ipi(mpic, hw) && (mpic->flags & MPIC_NO_RESET)) { 1090 if (!mpic_is_ipi(mpic, hw) && (mpic->flags & MPIC_NO_RESET)) {
1091 int cpu;
1092
1093 preempt_disable();
1094 cpu = mpic_processor_id(mpic);
1095 preempt_enable();
1096
1091 mpic_set_vector(virq, hw); 1097 mpic_set_vector(virq, hw);
1092 mpic_set_destination(virq, mpic_processor_id(mpic)); 1098 mpic_set_destination(virq, cpu);
1093 mpic_irq_set_priority(virq, 8); 1099 mpic_irq_set_priority(virq, 8);
1094 } 1100 }
1095 1101
@@ -1475,7 +1481,7 @@ struct mpic * __init mpic_alloc(struct device_node *node,
1475 * as a default instead of the value read from the HW. 1481 * as a default instead of the value read from the HW.
1476 */ 1482 */
1477 last_irq = (greg_feature & MPIC_GREG_FEATURE_LAST_SRC_MASK) 1483 last_irq = (greg_feature & MPIC_GREG_FEATURE_LAST_SRC_MASK)
1478 >> MPIC_GREG_FEATURE_LAST_SRC_SHIFT; 1484 >> MPIC_GREG_FEATURE_LAST_SRC_SHIFT;
1479 if (isu_size) 1485 if (isu_size)
1480 last_irq = isu_size * MPIC_MAX_ISU - 1; 1486 last_irq = isu_size * MPIC_MAX_ISU - 1;
1481 of_property_read_u32(mpic->node, "last-interrupt-source", &last_irq); 1487 of_property_read_u32(mpic->node, "last-interrupt-source", &last_irq);
@@ -1625,7 +1631,7 @@ void __init mpic_init(struct mpic *mpic)
1625 /* start with vector = source number, and masked */ 1631 /* start with vector = source number, and masked */
1626 u32 vecpri = MPIC_VECPRI_MASK | i | 1632 u32 vecpri = MPIC_VECPRI_MASK | i |
1627 (8 << MPIC_VECPRI_PRIORITY_SHIFT); 1633 (8 << MPIC_VECPRI_PRIORITY_SHIFT);
1628 1634
1629 /* check if protected */ 1635 /* check if protected */
1630 if (mpic->protected && test_bit(i, mpic->protected)) 1636 if (mpic->protected && test_bit(i, mpic->protected))
1631 continue; 1637 continue;
@@ -1634,7 +1640,7 @@ void __init mpic_init(struct mpic *mpic)
1634 mpic_irq_write(i, MPIC_INFO(IRQ_DESTINATION), 1 << cpu); 1640 mpic_irq_write(i, MPIC_INFO(IRQ_DESTINATION), 1 << cpu);
1635 } 1641 }
1636 } 1642 }
1637 1643
1638 /* Init spurious vector */ 1644 /* Init spurious vector */
1639 mpic_write(mpic->gregs, MPIC_INFO(GREG_SPURIOUS), mpic->spurious_vec); 1645 mpic_write(mpic->gregs, MPIC_INFO(GREG_SPURIOUS), mpic->spurious_vec);
1640 1646
diff --git a/arch/powerpc/sysdev/mpic_msgr.c b/arch/powerpc/sysdev/mpic_msgr.c
index c75325865a85..2c9b52aa266c 100644
--- a/arch/powerpc/sysdev/mpic_msgr.c
+++ b/arch/powerpc/sysdev/mpic_msgr.c
@@ -237,15 +237,13 @@ static int mpic_msgr_probe(struct platform_device *dev)
237 raw_spin_lock_init(&msgr->lock); 237 raw_spin_lock_init(&msgr->lock);
238 238
239 if (receive_mask & (1 << i)) { 239 if (receive_mask & (1 << i)) {
240 struct resource irq; 240 msgr->irq = irq_of_parse_and_map(np, irq_index);
241 241 if (msgr->irq == NO_IRQ) {
242 if (of_irq_to_resource(np, irq_index, &irq) == NO_IRQ) {
243 dev_err(&dev->dev, 242 dev_err(&dev->dev,
244 "Missing interrupt specifier"); 243 "Missing interrupt specifier");
245 kfree(msgr); 244 kfree(msgr);
246 return -EFAULT; 245 return -EFAULT;
247 } 246 }
248 msgr->irq = irq.start;
249 irq_index += 1; 247 irq_index += 1;
250 } else { 248 } else {
251 msgr->irq = NO_IRQ; 249 msgr->irq = NO_IRQ;
diff --git a/arch/powerpc/sysdev/mpic_msi.c b/arch/powerpc/sysdev/mpic_msi.c
index bbf342c88314..7dc39f35a4cc 100644
--- a/arch/powerpc/sysdev/mpic_msi.c
+++ b/arch/powerpc/sysdev/mpic_msi.c
@@ -35,7 +35,7 @@ static int mpic_msi_reserve_u3_hwirqs(struct mpic *mpic)
35 const struct irq_domain_ops *ops = mpic->irqhost->ops; 35 const struct irq_domain_ops *ops = mpic->irqhost->ops;
36 struct device_node *np; 36 struct device_node *np;
37 int flags, index, i; 37 int flags, index, i;
38 struct of_irq oirq; 38 struct of_phandle_args oirq;
39 39
40 pr_debug("mpic: found U3, guessing msi allocator setup\n"); 40 pr_debug("mpic: found U3, guessing msi allocator setup\n");
41 41
@@ -63,9 +63,9 @@ static int mpic_msi_reserve_u3_hwirqs(struct mpic *mpic)
63 pr_debug("mpic: mapping hwirqs for %s\n", np->full_name); 63 pr_debug("mpic: mapping hwirqs for %s\n", np->full_name);
64 64
65 index = 0; 65 index = 0;
66 while (of_irq_map_one(np, index++, &oirq) == 0) { 66 while (of_irq_parse_one(np, index++, &oirq) == 0) {
67 ops->xlate(mpic->irqhost, NULL, oirq.specifier, 67 ops->xlate(mpic->irqhost, NULL, oirq.args,
68 oirq.size, &hwirq, &flags); 68 oirq.args_count, &hwirq, &flags);
69 msi_bitmap_reserve_hwirq(&mpic->msi_bitmap, hwirq); 69 msi_bitmap_reserve_hwirq(&mpic->msi_bitmap, hwirq);
70 } 70 }
71 } 71 }
diff --git a/arch/powerpc/sysdev/mpic_timer.c b/arch/powerpc/sysdev/mpic_timer.c
index c06db92a4fb1..22d7d57eead9 100644
--- a/arch/powerpc/sysdev/mpic_timer.c
+++ b/arch/powerpc/sysdev/mpic_timer.c
@@ -19,7 +19,9 @@
19#include <linux/interrupt.h> 19#include <linux/interrupt.h>
20#include <linux/slab.h> 20#include <linux/slab.h>
21#include <linux/of.h> 21#include <linux/of.h>
22#include <linux/of_address.h>
22#include <linux/of_device.h> 23#include <linux/of_device.h>
24#include <linux/of_irq.h>
23#include <linux/syscore_ops.h> 25#include <linux/syscore_ops.h>
24#include <sysdev/fsl_soc.h> 26#include <sysdev/fsl_soc.h>
25#include <asm/io.h> 27#include <asm/io.h>
diff --git a/arch/powerpc/sysdev/mv64x60_dev.c b/arch/powerpc/sysdev/mv64x60_dev.c
index 4a25c26f0bf4..a3a8fad8537d 100644
--- a/arch/powerpc/sysdev/mv64x60_dev.c
+++ b/arch/powerpc/sysdev/mv64x60_dev.c
@@ -228,7 +228,7 @@ static struct platform_device * __init mv64x60_eth_register_shared_pdev(
228 228
229 if (id == 0) { 229 if (id == 0) {
230 pdev = platform_device_register_simple("orion-mdio", -1, &r[1], 1); 230 pdev = platform_device_register_simple("orion-mdio", -1, &r[1], 1);
231 if (!pdev) 231 if (IS_ERR(pdev))
232 return pdev; 232 return pdev;
233 } 233 }
234 234
diff --git a/arch/powerpc/sysdev/of_rtc.c b/arch/powerpc/sysdev/of_rtc.c
index c9e803f3e267..6f54b54b1328 100644
--- a/arch/powerpc/sysdev/of_rtc.c
+++ b/arch/powerpc/sysdev/of_rtc.c
@@ -11,6 +11,7 @@
11#include <linux/kernel.h> 11#include <linux/kernel.h>
12#include <linux/of.h> 12#include <linux/of.h>
13#include <linux/init.h> 13#include <linux/init.h>
14#include <linux/of_address.h>
14#include <linux/of_platform.h> 15#include <linux/of_platform.h>
15#include <linux/slab.h> 16#include <linux/slab.h>
16 17
diff --git a/arch/powerpc/sysdev/ppc4xx_ocm.c b/arch/powerpc/sysdev/ppc4xx_ocm.c
index 1b15f93479c3..b7c43453236d 100644
--- a/arch/powerpc/sysdev/ppc4xx_ocm.c
+++ b/arch/powerpc/sysdev/ppc4xx_ocm.c
@@ -26,6 +26,7 @@
26#include <linux/kernel.h> 26#include <linux/kernel.h>
27#include <linux/dma-mapping.h> 27#include <linux/dma-mapping.h>
28#include <linux/of.h> 28#include <linux/of.h>
29#include <linux/of_address.h>
29#include <asm/rheap.h> 30#include <asm/rheap.h>
30#include <asm/ppc4xx_ocm.h> 31#include <asm/ppc4xx_ocm.h>
31#include <linux/slab.h> 32#include <linux/slab.h>
diff --git a/arch/powerpc/sysdev/ppc4xx_soc.c b/arch/powerpc/sysdev/ppc4xx_soc.c
index 0debcc31ad70..5c77c9ba33aa 100644
--- a/arch/powerpc/sysdev/ppc4xx_soc.c
+++ b/arch/powerpc/sysdev/ppc4xx_soc.c
@@ -19,6 +19,7 @@
19#include <linux/errno.h> 19#include <linux/errno.h>
20#include <linux/interrupt.h> 20#include <linux/interrupt.h>
21#include <linux/irq.h> 21#include <linux/irq.h>
22#include <linux/of_irq.h>
22#include <linux/of_platform.h> 23#include <linux/of_platform.h>
23 24
24#include <asm/dcr.h> 25#include <asm/dcr.h>
diff --git a/arch/powerpc/sysdev/scom.c b/arch/powerpc/sysdev/scom.c
index 9193e12df695..6f5a8d177c42 100644
--- a/arch/powerpc/sysdev/scom.c
+++ b/arch/powerpc/sysdev/scom.c
@@ -25,6 +25,7 @@
25#include <asm/debug.h> 25#include <asm/debug.h>
26#include <asm/prom.h> 26#include <asm/prom.h>
27#include <asm/scom.h> 27#include <asm/scom.h>
28#include <asm/uaccess.h>
28 29
29const struct scom_controller *scom_controller; 30const struct scom_controller *scom_controller;
30EXPORT_SYMBOL_GPL(scom_controller); 31EXPORT_SYMBOL_GPL(scom_controller);
@@ -53,7 +54,7 @@ scom_map_t scom_map_device(struct device_node *dev, int index)
53{ 54{
54 struct device_node *parent; 55 struct device_node *parent;
55 unsigned int cells, size; 56 unsigned int cells, size;
56 const u32 *prop; 57 const __be32 *prop, *sprop;
57 u64 reg, cnt; 58 u64 reg, cnt;
58 scom_map_t ret; 59 scom_map_t ret;
59 60
@@ -62,12 +63,24 @@ scom_map_t scom_map_device(struct device_node *dev, int index)
62 if (parent == NULL) 63 if (parent == NULL)
63 return 0; 64 return 0;
64 65
65 prop = of_get_property(parent, "#scom-cells", NULL); 66 /*
66 cells = prop ? *prop : 1; 67 * We support "scom-reg" properties for adding scom registers
67 68 * to a random device-tree node with an explicit scom-parent
69 *
70 * We also support the simple "reg" property if the device is
71 * a direct child of a scom controller.
72 *
73 * In case both exist, "scom-reg" takes precedence.
74 */
68 prop = of_get_property(dev, "scom-reg", &size); 75 prop = of_get_property(dev, "scom-reg", &size);
76 sprop = of_get_property(parent, "#scom-cells", NULL);
77 if (!prop && parent == dev->parent) {
78 prop = of_get_property(dev, "reg", &size);
79 sprop = of_get_property(parent, "#address-cells", NULL);
80 }
69 if (!prop) 81 if (!prop)
70 return 0; 82 return NULL;
83 cells = sprop ? be32_to_cpup(sprop) : 1;
71 size >>= 2; 84 size >>= 2;
72 85
73 if (index >= (size / (2*cells))) 86 if (index >= (size / (2*cells)))
@@ -86,62 +99,89 @@ EXPORT_SYMBOL_GPL(scom_map_device);
86#ifdef CONFIG_SCOM_DEBUGFS 99#ifdef CONFIG_SCOM_DEBUGFS
87struct scom_debug_entry { 100struct scom_debug_entry {
88 struct device_node *dn; 101 struct device_node *dn;
89 unsigned long addr; 102 struct debugfs_blob_wrapper path;
90 scom_map_t map; 103 char name[16];
91 spinlock_t lock;
92 char name[8];
93 struct debugfs_blob_wrapper blob;
94}; 104};
95 105
96static int scom_addr_set(void *data, u64 val) 106static ssize_t scom_debug_read(struct file *filp, char __user *ubuf,
107 size_t count, loff_t *ppos)
97{ 108{
98 struct scom_debug_entry *ent = data; 109 struct scom_debug_entry *ent = filp->private_data;
99 110 u64 __user *ubuf64 = (u64 __user *)ubuf;
100 ent->addr = 0; 111 loff_t off = *ppos;
101 scom_unmap(ent->map); 112 ssize_t done = 0;
102 113 u64 reg, reg_cnt, val;
103 ent->map = scom_map(ent->dn, val, 1); 114 scom_map_t map;
104 if (scom_map_ok(ent->map)) 115 int rc;
105 ent->addr = val; 116
106 else 117 if (off < 0 || (off & 7) || (count & 7))
107 return -EFAULT; 118 return -EINVAL;
108 119 reg = off >> 3;
109 return 0; 120 reg_cnt = count >> 3;
110} 121
111 122 map = scom_map(ent->dn, reg, reg_cnt);
112static int scom_addr_get(void *data, u64 *val) 123 if (!scom_map_ok(map))
113{ 124 return -ENXIO;
114 struct scom_debug_entry *ent = data; 125
115 *val = ent->addr; 126 for (reg = 0; reg < reg_cnt; reg++) {
116 return 0; 127 rc = scom_read(map, reg, &val);
128 if (!rc)
129 rc = put_user(val, ubuf64);
130 if (rc) {
131 if (!done)
132 done = rc;
133 break;
134 }
135 ubuf64++;
136 *ppos += 8;
137 done += 8;
138 }
139 scom_unmap(map);
140 return done;
117} 141}
118DEFINE_SIMPLE_ATTRIBUTE(scom_addr_fops, scom_addr_get, scom_addr_set,
119 "0x%llx\n");
120 142
121static int scom_val_set(void *data, u64 val) 143static ssize_t scom_debug_write(struct file* filp, const char __user *ubuf,
144 size_t count, loff_t *ppos)
122{ 145{
123 struct scom_debug_entry *ent = data; 146 struct scom_debug_entry *ent = filp->private_data;
124 147 u64 __user *ubuf64 = (u64 __user *)ubuf;
125 if (!scom_map_ok(ent->map)) 148 loff_t off = *ppos;
126 return -EFAULT; 149 ssize_t done = 0;
127 150 u64 reg, reg_cnt, val;
128 scom_write(ent->map, 0, val); 151 scom_map_t map;
129 152 int rc;
130 return 0; 153
154 if (off < 0 || (off & 7) || (count & 7))
155 return -EINVAL;
156 reg = off >> 3;
157 reg_cnt = count >> 3;
158
159 map = scom_map(ent->dn, reg, reg_cnt);
160 if (!scom_map_ok(map))
161 return -ENXIO;
162
163 for (reg = 0; reg < reg_cnt; reg++) {
164 rc = get_user(val, ubuf64);
165 if (!rc)
166 rc = scom_write(map, reg, val);
167 if (rc) {
168 if (!done)
169 done = rc;
170 break;
171 }
172 ubuf64++;
173 done += 8;
174 }
175 scom_unmap(map);
176 return done;
131} 177}
132 178
133static int scom_val_get(void *data, u64 *val) 179static const struct file_operations scom_debug_fops = {
134{ 180 .read = scom_debug_read,
135 struct scom_debug_entry *ent = data; 181 .write = scom_debug_write,
136 182 .open = simple_open,
137 if (!scom_map_ok(ent->map)) 183 .llseek = default_llseek,
138 return -EFAULT; 184};
139
140 *val = scom_read(ent->map, 0);
141 return 0;
142}
143DEFINE_SIMPLE_ATTRIBUTE(scom_val_fops, scom_val_get, scom_val_set,
144 "0x%llx\n");
145 185
146static int scom_debug_init_one(struct dentry *root, struct device_node *dn, 186static int scom_debug_init_one(struct dentry *root, struct device_node *dn,
147 int i) 187 int i)
@@ -154,11 +194,9 @@ static int scom_debug_init_one(struct dentry *root, struct device_node *dn,
154 return -ENOMEM; 194 return -ENOMEM;
155 195
156 ent->dn = of_node_get(dn); 196 ent->dn = of_node_get(dn);
157 ent->map = SCOM_MAP_INVALID; 197 snprintf(ent->name, 16, "%08x", i);
158 spin_lock_init(&ent->lock); 198 ent->path.data = (void*) dn->full_name;
159 snprintf(ent->name, 8, "scom%d", i); 199 ent->path.size = strlen(dn->full_name);
160 ent->blob.data = (void*) dn->full_name;
161 ent->blob.size = strlen(dn->full_name);
162 200
163 dir = debugfs_create_dir(ent->name, root); 201 dir = debugfs_create_dir(ent->name, root);
164 if (!dir) { 202 if (!dir) {
@@ -167,9 +205,8 @@ static int scom_debug_init_one(struct dentry *root, struct device_node *dn,
167 return -1; 205 return -1;
168 } 206 }
169 207
170 debugfs_create_file("addr", 0600, dir, ent, &scom_addr_fops); 208 debugfs_create_blob("devspec", 0400, dir, &ent->path);
171 debugfs_create_file("value", 0600, dir, ent, &scom_val_fops); 209 debugfs_create_file("access", 0600, dir, ent, &scom_debug_fops);
172 debugfs_create_blob("path", 0400, dir, &ent->blob);
173 210
174 return 0; 211 return 0;
175} 212}
@@ -185,8 +222,13 @@ static int scom_debug_init(void)
185 return -1; 222 return -1;
186 223
187 i = rc = 0; 224 i = rc = 0;
188 for_each_node_with_property(dn, "scom-controller") 225 for_each_node_with_property(dn, "scom-controller") {
189 rc |= scom_debug_init_one(root, dn, i++); 226 int id = of_get_ibm_chip_id(dn);
227 if (id == -1)
228 id = i;
229 rc |= scom_debug_init_one(root, dn, id);
230 i++;
231 }
190 232
191 return rc; 233 return rc;
192} 234}
diff --git a/arch/powerpc/sysdev/xics/ics-opal.c b/arch/powerpc/sysdev/xics/ics-opal.c
index 39d72212655e..3c6ee1b64e5d 100644
--- a/arch/powerpc/sysdev/xics/ics-opal.c
+++ b/arch/powerpc/sysdev/xics/ics-opal.c
@@ -112,6 +112,7 @@ static int ics_opal_set_affinity(struct irq_data *d,
112 bool force) 112 bool force)
113{ 113{
114 unsigned int hw_irq = (unsigned int)irqd_to_hwirq(d); 114 unsigned int hw_irq = (unsigned int)irqd_to_hwirq(d);
115 __be16 oserver;
115 int16_t server; 116 int16_t server;
116 int8_t priority; 117 int8_t priority;
117 int64_t rc; 118 int64_t rc;
@@ -120,13 +121,13 @@ static int ics_opal_set_affinity(struct irq_data *d,
120 if (hw_irq == XICS_IPI || hw_irq == XICS_IRQ_SPURIOUS) 121 if (hw_irq == XICS_IPI || hw_irq == XICS_IRQ_SPURIOUS)
121 return -1; 122 return -1;
122 123
123 rc = opal_get_xive(hw_irq, &server, &priority); 124 rc = opal_get_xive(hw_irq, &oserver, &priority);
124 if (rc != OPAL_SUCCESS) { 125 if (rc != OPAL_SUCCESS) {
125 pr_err("%s: opal_set_xive(irq=%d [hw 0x%x] server=%x)" 126 pr_err("%s: opal_get_xive(irq=%d [hw 0x%x]) error %lld\n",
126 " error %lld\n", 127 __func__, d->irq, hw_irq, rc);
127 __func__, d->irq, hw_irq, server, rc);
128 return -1; 128 return -1;
129 } 129 }
130 server = be16_to_cpu(oserver);
130 131
131 wanted_server = xics_get_irq_server(d->irq, cpumask, 1); 132 wanted_server = xics_get_irq_server(d->irq, cpumask, 1);
132 if (wanted_server < 0) { 133 if (wanted_server < 0) {
@@ -181,7 +182,7 @@ static int ics_opal_map(struct ics *ics, unsigned int virq)
181{ 182{
182 unsigned int hw_irq = (unsigned int)virq_to_hw(virq); 183 unsigned int hw_irq = (unsigned int)virq_to_hw(virq);
183 int64_t rc; 184 int64_t rc;
184 int16_t server; 185 __be16 server;
185 int8_t priority; 186 int8_t priority;
186 187
187 if (WARN_ON(hw_irq == XICS_IPI || hw_irq == XICS_IRQ_SPURIOUS)) 188 if (WARN_ON(hw_irq == XICS_IPI || hw_irq == XICS_IRQ_SPURIOUS))
@@ -201,7 +202,7 @@ static int ics_opal_map(struct ics *ics, unsigned int virq)
201static void ics_opal_mask_unknown(struct ics *ics, unsigned long vec) 202static void ics_opal_mask_unknown(struct ics *ics, unsigned long vec)
202{ 203{
203 int64_t rc; 204 int64_t rc;
204 int16_t server; 205 __be16 server;
205 int8_t priority; 206 int8_t priority;
206 207
207 /* Check if HAL knows about this interrupt */ 208 /* Check if HAL knows about this interrupt */
@@ -215,14 +216,14 @@ static void ics_opal_mask_unknown(struct ics *ics, unsigned long vec)
215static long ics_opal_get_server(struct ics *ics, unsigned long vec) 216static long ics_opal_get_server(struct ics *ics, unsigned long vec)
216{ 217{
217 int64_t rc; 218 int64_t rc;
218 int16_t server; 219 __be16 server;
219 int8_t priority; 220 int8_t priority;
220 221
221 /* Check if HAL knows about this interrupt */ 222 /* Check if HAL knows about this interrupt */
222 rc = opal_get_xive(vec, &server, &priority); 223 rc = opal_get_xive(vec, &server, &priority);
223 if (rc != OPAL_SUCCESS) 224 if (rc != OPAL_SUCCESS)
224 return -1; 225 return -1;
225 return ics_opal_unmangle_server(server); 226 return ics_opal_unmangle_server(be16_to_cpu(server));
226} 227}
227 228
228int __init ics_opal_init(void) 229int __init ics_opal_init(void)
diff --git a/arch/powerpc/sysdev/xilinx_intc.c b/arch/powerpc/sysdev/xilinx_intc.c
index 8d73c3c0bee6..83f943a8e0db 100644
--- a/arch/powerpc/sysdev/xilinx_intc.c
+++ b/arch/powerpc/sysdev/xilinx_intc.c
@@ -23,6 +23,8 @@
23#include <linux/kernel.h> 23#include <linux/kernel.h>
24#include <linux/irq.h> 24#include <linux/irq.h>
25#include <linux/of.h> 25#include <linux/of.h>
26#include <linux/of_address.h>
27#include <linux/of_irq.h>
26#include <asm/io.h> 28#include <asm/io.h>
27#include <asm/processor.h> 29#include <asm/processor.h>
28#include <asm/i8259.h> 30#include <asm/i8259.h>
diff --git a/arch/s390/include/asm/Kbuild b/arch/s390/include/asm/Kbuild
index f313f9cbcf44..7a5288f3479a 100644
--- a/arch/s390/include/asm/Kbuild
+++ b/arch/s390/include/asm/Kbuild
@@ -2,3 +2,4 @@
2 2
3generic-y += clkdev.h 3generic-y += clkdev.h
4generic-y += trace_clock.h 4generic-y += trace_clock.h
5generic-y += preempt.h
diff --git a/arch/s390/kernel/irq.c b/arch/s390/kernel/irq.c
index 8ac2097f13d4..bb27a262c44a 100644
--- a/arch/s390/kernel/irq.c
+++ b/arch/s390/kernel/irq.c
@@ -157,39 +157,29 @@ int arch_show_interrupts(struct seq_file *p, int prec)
157/* 157/*
158 * Switch to the asynchronous interrupt stack for softirq execution. 158 * Switch to the asynchronous interrupt stack for softirq execution.
159 */ 159 */
160asmlinkage void do_softirq(void) 160void do_softirq_own_stack(void)
161{ 161{
162 unsigned long flags, old, new; 162 unsigned long old, new;
163 163
164 if (in_interrupt()) 164 /* Get current stack pointer. */
165 return; 165 asm volatile("la %0,0(15)" : "=a" (old));
166 166 /* Check against async. stack address range. */
167 local_irq_save(flags); 167 new = S390_lowcore.async_stack;
168 168 if (((new - old) >> (PAGE_SHIFT + THREAD_ORDER)) != 0) {
169 if (local_softirq_pending()) { 169 /* Need to switch to the async. stack. */
170 /* Get current stack pointer. */ 170 new -= STACK_FRAME_OVERHEAD;
171 asm volatile("la %0,0(15)" : "=a" (old)); 171 ((struct stack_frame *) new)->back_chain = old;
172 /* Check against async. stack address range. */ 172 asm volatile(" la 15,0(%0)\n"
173 new = S390_lowcore.async_stack; 173 " basr 14,%2\n"
174 if (((new - old) >> (PAGE_SHIFT + THREAD_ORDER)) != 0) { 174 " la 15,0(%1)\n"
175 /* Need to switch to the async. stack. */ 175 : : "a" (new), "a" (old),
176 new -= STACK_FRAME_OVERHEAD; 176 "a" (__do_softirq)
177 ((struct stack_frame *) new)->back_chain = old; 177 : "0", "1", "2", "3", "4", "5", "14",
178 178 "cc", "memory" );
179 asm volatile(" la 15,0(%0)\n" 179 } else {
180 " basr 14,%2\n" 180 /* We are already on the async stack. */
181 " la 15,0(%1)\n" 181 __do_softirq();
182 : : "a" (new), "a" (old),
183 "a" (__do_softirq)
184 : "0", "1", "2", "3", "4", "5", "14",
185 "cc", "memory" );
186 } else {
187 /* We are already on the async stack. */
188 __do_softirq();
189 }
190 } 182 }
191
192 local_irq_restore(flags);
193} 183}
194 184
195/* 185/*
diff --git a/arch/score/include/asm/Kbuild b/arch/score/include/asm/Kbuild
index e1c7bb999b06..f3414ade77a3 100644
--- a/arch/score/include/asm/Kbuild
+++ b/arch/score/include/asm/Kbuild
@@ -4,3 +4,4 @@ header-y +=
4generic-y += clkdev.h 4generic-y += clkdev.h
5generic-y += trace_clock.h 5generic-y += trace_clock.h
6generic-y += xor.h 6generic-y += xor.h
7generic-y += preempt.h
diff --git a/arch/sh/include/asm/Kbuild b/arch/sh/include/asm/Kbuild
index 280bea9e5e2b..231efbb68108 100644
--- a/arch/sh/include/asm/Kbuild
+++ b/arch/sh/include/asm/Kbuild
@@ -34,3 +34,4 @@ generic-y += termios.h
34generic-y += trace_clock.h 34generic-y += trace_clock.h
35generic-y += ucontext.h 35generic-y += ucontext.h
36generic-y += xor.h 36generic-y += xor.h
37generic-y += preempt.h
diff --git a/arch/sh/kernel/irq.c b/arch/sh/kernel/irq.c
index 063af10ff3c1..0833736afa32 100644
--- a/arch/sh/kernel/irq.c
+++ b/arch/sh/kernel/irq.c
@@ -149,47 +149,32 @@ void irq_ctx_exit(int cpu)
149 hardirq_ctx[cpu] = NULL; 149 hardirq_ctx[cpu] = NULL;
150} 150}
151 151
152asmlinkage void do_softirq(void) 152void do_softirq_own_stack(void)
153{ 153{
154 unsigned long flags;
155 struct thread_info *curctx; 154 struct thread_info *curctx;
156 union irq_ctx *irqctx; 155 union irq_ctx *irqctx;
157 u32 *isp; 156 u32 *isp;
158 157
159 if (in_interrupt()) 158 curctx = current_thread_info();
160 return; 159 irqctx = softirq_ctx[smp_processor_id()];
161 160 irqctx->tinfo.task = curctx->task;
162 local_irq_save(flags); 161 irqctx->tinfo.previous_sp = current_stack_pointer;
163 162
164 if (local_softirq_pending()) { 163 /* build the stack frame on the softirq stack */
165 curctx = current_thread_info(); 164 isp = (u32 *)((char *)irqctx + sizeof(*irqctx));
166 irqctx = softirq_ctx[smp_processor_id()]; 165
167 irqctx->tinfo.task = curctx->task; 166 __asm__ __volatile__ (
168 irqctx->tinfo.previous_sp = current_stack_pointer; 167 "mov r15, r9 \n"
169 168 "jsr @%0 \n"
170 /* build the stack frame on the softirq stack */ 169 /* switch to the softirq stack */
171 isp = (u32 *)((char *)irqctx + sizeof(*irqctx)); 170 " mov %1, r15 \n"
172 171 /* restore the thread stack */
173 __asm__ __volatile__ ( 172 "mov r9, r15 \n"
174 "mov r15, r9 \n" 173 : /* no outputs */
175 "jsr @%0 \n" 174 : "r" (__do_softirq), "r" (isp)
176 /* switch to the softirq stack */ 175 : "memory", "r0", "r1", "r2", "r3", "r4",
177 " mov %1, r15 \n" 176 "r5", "r6", "r7", "r8", "r9", "r15", "t", "pr"
178 /* restore the thread stack */ 177 );
179 "mov r9, r15 \n"
180 : /* no outputs */
181 : "r" (__do_softirq), "r" (isp)
182 : "memory", "r0", "r1", "r2", "r3", "r4",
183 "r5", "r6", "r7", "r8", "r9", "r15", "t", "pr"
184 );
185
186 /*
187 * Shouldn't happen, we returned above if in_interrupt():
188 */
189 WARN_ON_ONCE(softirq_count());
190 }
191
192 local_irq_restore(flags);
193} 178}
194#else 179#else
195static inline void handle_one_irq(unsigned int irq) 180static inline void handle_one_irq(unsigned int irq)
diff --git a/arch/sparc/include/asm/Kbuild b/arch/sparc/include/asm/Kbuild
index 7e4a97fbded4..bf390667657a 100644
--- a/arch/sparc/include/asm/Kbuild
+++ b/arch/sparc/include/asm/Kbuild
@@ -16,3 +16,4 @@ generic-y += serial.h
16generic-y += trace_clock.h 16generic-y += trace_clock.h
17generic-y += types.h 17generic-y += types.h
18generic-y += word-at-a-time.h 18generic-y += word-at-a-time.h
19generic-y += preempt.h
diff --git a/arch/sparc/include/asm/prom.h b/arch/sparc/include/asm/prom.h
index 67c62578d170..11ebd659e7b6 100644
--- a/arch/sparc/include/asm/prom.h
+++ b/arch/sparc/include/asm/prom.h
@@ -43,10 +43,6 @@ extern int of_getintprop_default(struct device_node *np,
43 const char *name, 43 const char *name,
44 int def); 44 int def);
45extern int of_find_in_proplist(const char *list, const char *match, int len); 45extern int of_find_in_proplist(const char *list, const char *match, int len);
46#ifdef CONFIG_NUMA
47extern int of_node_to_nid(struct device_node *dp);
48#define of_node_to_nid of_node_to_nid
49#endif
50 46
51extern void prom_build_devicetree(void); 47extern void prom_build_devicetree(void);
52extern void of_populate_present_mask(void); 48extern void of_populate_present_mask(void);
@@ -63,13 +59,5 @@ extern char *of_console_options;
63extern void irq_trans_init(struct device_node *dp); 59extern void irq_trans_init(struct device_node *dp);
64extern char *build_path_component(struct device_node *dp); 60extern char *build_path_component(struct device_node *dp);
65 61
66/* SPARC has local implementations */
67extern int of_address_to_resource(struct device_node *dev, int index,
68 struct resource *r);
69#define of_address_to_resource of_address_to_resource
70
71void __iomem *of_iomap(struct device_node *node, int index);
72#define of_iomap of_iomap
73
74#endif /* __KERNEL__ */ 62#endif /* __KERNEL__ */
75#endif /* _SPARC_PROM_H */ 63#endif /* _SPARC_PROM_H */
diff --git a/arch/sparc/kernel/irq_64.c b/arch/sparc/kernel/irq_64.c
index d4840cec2c55..666193f4e8bb 100644
--- a/arch/sparc/kernel/irq_64.c
+++ b/arch/sparc/kernel/irq_64.c
@@ -698,30 +698,19 @@ void __irq_entry handler_irq(int pil, struct pt_regs *regs)
698 set_irq_regs(old_regs); 698 set_irq_regs(old_regs);
699} 699}
700 700
701void do_softirq(void) 701void do_softirq_own_stack(void)
702{ 702{
703 unsigned long flags; 703 void *orig_sp, *sp = softirq_stack[smp_processor_id()];
704
705 if (in_interrupt())
706 return;
707
708 local_irq_save(flags);
709 704
710 if (local_softirq_pending()) { 705 sp += THREAD_SIZE - 192 - STACK_BIAS;
711 void *orig_sp, *sp = softirq_stack[smp_processor_id()];
712
713 sp += THREAD_SIZE - 192 - STACK_BIAS;
714
715 __asm__ __volatile__("mov %%sp, %0\n\t"
716 "mov %1, %%sp"
717 : "=&r" (orig_sp)
718 : "r" (sp));
719 __do_softirq();
720 __asm__ __volatile__("mov %0, %%sp"
721 : : "r" (orig_sp));
722 }
723 706
724 local_irq_restore(flags); 707 __asm__ __volatile__("mov %%sp, %0\n\t"
708 "mov %1, %%sp"
709 : "=&r" (orig_sp)
710 : "r" (sp));
711 __do_softirq();
712 __asm__ __volatile__("mov %0, %%sp"
713 : : "r" (orig_sp));
725} 714}
726 715
727#ifdef CONFIG_HOTPLUG_CPU 716#ifdef CONFIG_HOTPLUG_CPU
diff --git a/arch/sparc/kernel/prom_64.c b/arch/sparc/kernel/prom_64.c
index d397d7fc5c28..6b39125eb927 100644
--- a/arch/sparc/kernel/prom_64.c
+++ b/arch/sparc/kernel/prom_64.c
@@ -373,6 +373,59 @@ static const char *get_mid_prop(void)
373 return (tlb_type == spitfire ? "upa-portid" : "portid"); 373 return (tlb_type == spitfire ? "upa-portid" : "portid");
374} 374}
375 375
376bool arch_find_n_match_cpu_physical_id(struct device_node *cpun,
377 int cpu, unsigned int *thread)
378{
379 const char *mid_prop = get_mid_prop();
380 int this_cpu_id;
381
382 /* On hypervisor based platforms we interrogate the 'reg'
383 * property. On everything else we look for a 'upa-portis',
384 * 'portid', or 'cpuid' property.
385 */
386
387 if (tlb_type == hypervisor) {
388 struct property *prop = of_find_property(cpun, "reg", NULL);
389 u32 *regs;
390
391 if (!prop) {
392 pr_warn("CPU node missing reg property\n");
393 return false;
394 }
395 regs = prop->value;
396 this_cpu_id = regs[0] & 0x0fffffff;
397 } else {
398 this_cpu_id = of_getintprop_default(cpun, mid_prop, -1);
399
400 if (this_cpu_id < 0) {
401 mid_prop = "cpuid";
402 this_cpu_id = of_getintprop_default(cpun, mid_prop, -1);
403 }
404 if (this_cpu_id < 0) {
405 pr_warn("CPU node missing cpu ID property\n");
406 return false;
407 }
408 }
409 if (this_cpu_id == cpu) {
410 if (thread) {
411 int proc_id = cpu_data(cpu).proc_id;
412
413 /* On sparc64, the cpu thread information is obtained
414 * either from OBP or the machine description. We've
415 * actually probed this information already long before
416 * this interface gets called so instead of interrogating
417 * both the OF node and the MDESC again, just use what
418 * we discovered already.
419 */
420 if (proc_id < 0)
421 proc_id = 0;
422 *thread = proc_id;
423 }
424 return true;
425 }
426 return false;
427}
428
376static void *of_iterate_over_cpus(void *(*func)(struct device_node *, int, int), int arg) 429static void *of_iterate_over_cpus(void *(*func)(struct device_node *, int, int), int arg)
377{ 430{
378 struct device_node *dp; 431 struct device_node *dp;
diff --git a/arch/tile/include/asm/Kbuild b/arch/tile/include/asm/Kbuild
index 664d6ad23f80..22f3bd147fa7 100644
--- a/arch/tile/include/asm/Kbuild
+++ b/arch/tile/include/asm/Kbuild
@@ -38,3 +38,4 @@ generic-y += termios.h
38generic-y += trace_clock.h 38generic-y += trace_clock.h
39generic-y += types.h 39generic-y += types.h
40generic-y += xor.h 40generic-y += xor.h
41generic-y += preempt.h
diff --git a/arch/um/include/asm/Kbuild b/arch/um/include/asm/Kbuild
index b30f34a79882..fdde187e6087 100644
--- a/arch/um/include/asm/Kbuild
+++ b/arch/um/include/asm/Kbuild
@@ -3,3 +3,4 @@ generic-y += hw_irq.h irq_regs.h kdebug.h percpu.h sections.h topology.h xor.h
3generic-y += ftrace.h pci.h io.h param.h delay.h mutex.h current.h exec.h 3generic-y += ftrace.h pci.h io.h param.h delay.h mutex.h current.h exec.h
4generic-y += switch_to.h clkdev.h 4generic-y += switch_to.h clkdev.h
5generic-y += trace_clock.h 5generic-y += trace_clock.h
6generic-y += preempt.h
diff --git a/arch/unicore32/include/asm/Kbuild b/arch/unicore32/include/asm/Kbuild
index 89d8b6c4e39a..00045cbe5c63 100644
--- a/arch/unicore32/include/asm/Kbuild
+++ b/arch/unicore32/include/asm/Kbuild
@@ -60,3 +60,4 @@ generic-y += unaligned.h
60generic-y += user.h 60generic-y += user.h
61generic-y += vga.h 61generic-y += vga.h
62generic-y += xor.h 62generic-y += xor.h
63generic-y += preempt.h
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index f67e839f06c8..725e1573ea85 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -123,6 +123,7 @@ config X86
123 select COMPAT_OLD_SIGACTION if IA32_EMULATION 123 select COMPAT_OLD_SIGACTION if IA32_EMULATION
124 select RTC_LIB 124 select RTC_LIB
125 select HAVE_DEBUG_STACKOVERFLOW 125 select HAVE_DEBUG_STACKOVERFLOW
126 select HAVE_IRQ_EXIT_ON_IRQ_STACK if X86_64
126 127
127config INSTRUCTION_DECODER 128config INSTRUCTION_DECODER
128 def_bool y 129 def_bool y
@@ -756,20 +757,25 @@ config DMI
756 BIOS code. 757 BIOS code.
757 758
758config GART_IOMMU 759config GART_IOMMU
759 bool "GART IOMMU support" if EXPERT 760 bool "Old AMD GART IOMMU support"
760 default y
761 select SWIOTLB 761 select SWIOTLB
762 depends on X86_64 && PCI && AMD_NB 762 depends on X86_64 && PCI && AMD_NB
763 ---help--- 763 ---help---
764 Support for full DMA access of devices with 32bit memory access only 764 Provides a driver for older AMD Athlon64/Opteron/Turion/Sempron
765 on systems with more than 3GB. This is usually needed for USB, 765 GART based hardware IOMMUs.
766 sound, many IDE/SATA chipsets and some other devices. 766
767 Provides a driver for the AMD Athlon64/Opteron/Turion/Sempron GART 767 The GART supports full DMA access for devices with 32-bit access
768 based hardware IOMMU and a software bounce buffer based IOMMU used 768 limitations, on systems with more than 3 GB. This is usually needed
769 on Intel systems and as fallback. 769 for USB, sound, many IDE/SATA chipsets and some other devices.
770 The code is only active when needed (enough memory and limited 770
771 device) unless CONFIG_IOMMU_DEBUG or iommu=force is specified 771 Newer systems typically have a modern AMD IOMMU, supported via
772 too. 772 the CONFIG_AMD_IOMMU=y config option.
773
774 In normal configurations this driver is only active when needed:
775 there's more than 3 GB of memory and the system contains a
776 32-bit limited device.
777
778 If unsure, say Y.
773 779
774config CALGARY_IOMMU 780config CALGARY_IOMMU
775 bool "IBM Calgary IOMMU support" 781 bool "IBM Calgary IOMMU support"
@@ -825,14 +831,16 @@ config MAXSMP
825config NR_CPUS 831config NR_CPUS
826 int "Maximum number of CPUs" if SMP && !MAXSMP 832 int "Maximum number of CPUs" if SMP && !MAXSMP
827 range 2 8 if SMP && X86_32 && !X86_BIGSMP 833 range 2 8 if SMP && X86_32 && !X86_BIGSMP
828 range 2 512 if SMP && !MAXSMP 834 range 2 512 if SMP && !MAXSMP && !CPUMASK_OFFSTACK
835 range 2 8192 if SMP && !MAXSMP && CPUMASK_OFFSTACK && X86_64
829 default "1" if !SMP 836 default "1" if !SMP
830 default "4096" if MAXSMP 837 default "8192" if MAXSMP
831 default "32" if SMP && (X86_NUMAQ || X86_SUMMIT || X86_BIGSMP || X86_ES7000) 838 default "32" if SMP && (X86_NUMAQ || X86_SUMMIT || X86_BIGSMP || X86_ES7000)
832 default "8" if SMP 839 default "8" if SMP
833 ---help--- 840 ---help---
834 This allows you to specify the maximum number of CPUs which this 841 This allows you to specify the maximum number of CPUs which this
835 kernel will support. The maximum supported value is 512 and the 842 kernel will support. If CPUMASK_OFFSTACK is enabled, the maximum
843 supported value is 4096, otherwise the maximum value is 512. The
836 minimum value which makes sense is 2. 844 minimum value which makes sense is 2.
837 845
838 This is purely to save memory - each supported CPU adds 846 This is purely to save memory - each supported CPU adds
@@ -1594,7 +1602,7 @@ config EFI_STUB
1594 This kernel feature allows a bzImage to be loaded directly 1602 This kernel feature allows a bzImage to be loaded directly
1595 by EFI firmware without the use of a bootloader. 1603 by EFI firmware without the use of a bootloader.
1596 1604
1597 See Documentation/x86/efi-stub.txt for more information. 1605 See Documentation/efi-stub.txt for more information.
1598 1606
1599config SECCOMP 1607config SECCOMP
1600 def_bool y 1608 def_bool y
diff --git a/arch/x86/Kconfig.debug b/arch/x86/Kconfig.debug
index 78d91afb8e50..0f3621ed1db6 100644
--- a/arch/x86/Kconfig.debug
+++ b/arch/x86/Kconfig.debug
@@ -59,6 +59,16 @@ config EARLY_PRINTK_DBGP
59 with klogd/syslogd or the X server. You should normally N here, 59 with klogd/syslogd or the X server. You should normally N here,
60 unless you want to debug such a crash. You need usb debug device. 60 unless you want to debug such a crash. You need usb debug device.
61 61
62config EARLY_PRINTK_EFI
63 bool "Early printk via the EFI framebuffer"
64 depends on EFI && EARLY_PRINTK
65 select FONT_SUPPORT
66 ---help---
67 Write kernel log output directly into the EFI framebuffer.
68
69 This is useful for kernel debugging when your machine crashes very
70 early before the console code is initialized.
71
62config X86_PTDUMP 72config X86_PTDUMP
63 bool "Export kernel pagetable layout to userspace via debugfs" 73 bool "Export kernel pagetable layout to userspace via debugfs"
64 depends on DEBUG_KERNEL 74 depends on DEBUG_KERNEL
diff --git a/arch/x86/boot/Makefile b/arch/x86/boot/Makefile
index 379814bc41e3..dce69a256896 100644
--- a/arch/x86/boot/Makefile
+++ b/arch/x86/boot/Makefile
@@ -71,7 +71,8 @@ GCOV_PROFILE := n
71$(obj)/bzImage: asflags-y := $(SVGA_MODE) 71$(obj)/bzImage: asflags-y := $(SVGA_MODE)
72 72
73quiet_cmd_image = BUILD $@ 73quiet_cmd_image = BUILD $@
74cmd_image = $(obj)/tools/build $(obj)/setup.bin $(obj)/vmlinux.bin $(obj)/zoffset.h > $@ 74cmd_image = $(obj)/tools/build $(obj)/setup.bin $(obj)/vmlinux.bin \
75 $(obj)/zoffset.h $@
75 76
76$(obj)/bzImage: $(obj)/setup.bin $(obj)/vmlinux.bin $(obj)/tools/build FORCE 77$(obj)/bzImage: $(obj)/setup.bin $(obj)/vmlinux.bin $(obj)/tools/build FORCE
77 $(call if_changed,image) 78 $(call if_changed,image)
diff --git a/arch/x86/boot/compressed/eboot.c b/arch/x86/boot/compressed/eboot.c
index b7388a425f09..a7677babf946 100644
--- a/arch/x86/boot/compressed/eboot.c
+++ b/arch/x86/boot/compressed/eboot.c
@@ -19,214 +19,10 @@
19 19
20static efi_system_table_t *sys_table; 20static efi_system_table_t *sys_table;
21 21
22static void efi_char16_printk(efi_char16_t *str)
23{
24 struct efi_simple_text_output_protocol *out;
25
26 out = (struct efi_simple_text_output_protocol *)sys_table->con_out;
27 efi_call_phys2(out->output_string, out, str);
28}
29
30static void efi_printk(char *str)
31{
32 char *s8;
33
34 for (s8 = str; *s8; s8++) {
35 efi_char16_t ch[2] = { 0 };
36
37 ch[0] = *s8;
38 if (*s8 == '\n') {
39 efi_char16_t nl[2] = { '\r', 0 };
40 efi_char16_printk(nl);
41 }
42
43 efi_char16_printk(ch);
44 }
45}
46
47static efi_status_t __get_map(efi_memory_desc_t **map, unsigned long *map_size,
48 unsigned long *desc_size)
49{
50 efi_memory_desc_t *m = NULL;
51 efi_status_t status;
52 unsigned long key;
53 u32 desc_version;
54
55 *map_size = sizeof(*m) * 32;
56again:
57 /*
58 * Add an additional efi_memory_desc_t because we're doing an
59 * allocation which may be in a new descriptor region.
60 */
61 *map_size += sizeof(*m);
62 status = efi_call_phys3(sys_table->boottime->allocate_pool,
63 EFI_LOADER_DATA, *map_size, (void **)&m);
64 if (status != EFI_SUCCESS)
65 goto fail;
66
67 status = efi_call_phys5(sys_table->boottime->get_memory_map, map_size,
68 m, &key, desc_size, &desc_version);
69 if (status == EFI_BUFFER_TOO_SMALL) {
70 efi_call_phys1(sys_table->boottime->free_pool, m);
71 goto again;
72 }
73
74 if (status != EFI_SUCCESS)
75 efi_call_phys1(sys_table->boottime->free_pool, m);
76 22
77fail: 23#include "../../../../drivers/firmware/efi/efi-stub-helper.c"
78 *map = m;
79 return status;
80}
81
82/*
83 * Allocate at the highest possible address that is not above 'max'.
84 */
85static efi_status_t high_alloc(unsigned long size, unsigned long align,
86 unsigned long *addr, unsigned long max)
87{
88 unsigned long map_size, desc_size;
89 efi_memory_desc_t *map;
90 efi_status_t status;
91 unsigned long nr_pages;
92 u64 max_addr = 0;
93 int i;
94
95 status = __get_map(&map, &map_size, &desc_size);
96 if (status != EFI_SUCCESS)
97 goto fail;
98
99 nr_pages = round_up(size, EFI_PAGE_SIZE) / EFI_PAGE_SIZE;
100again:
101 for (i = 0; i < map_size / desc_size; i++) {
102 efi_memory_desc_t *desc;
103 unsigned long m = (unsigned long)map;
104 u64 start, end;
105
106 desc = (efi_memory_desc_t *)(m + (i * desc_size));
107 if (desc->type != EFI_CONVENTIONAL_MEMORY)
108 continue;
109
110 if (desc->num_pages < nr_pages)
111 continue;
112 24
113 start = desc->phys_addr;
114 end = start + desc->num_pages * (1UL << EFI_PAGE_SHIFT);
115 25
116 if ((start + size) > end || (start + size) > max)
117 continue;
118
119 if (end - size > max)
120 end = max;
121
122 if (round_down(end - size, align) < start)
123 continue;
124
125 start = round_down(end - size, align);
126
127 /*
128 * Don't allocate at 0x0. It will confuse code that
129 * checks pointers against NULL.
130 */
131 if (start == 0x0)
132 continue;
133
134 if (start > max_addr)
135 max_addr = start;
136 }
137
138 if (!max_addr)
139 status = EFI_NOT_FOUND;
140 else {
141 status = efi_call_phys4(sys_table->boottime->allocate_pages,
142 EFI_ALLOCATE_ADDRESS, EFI_LOADER_DATA,
143 nr_pages, &max_addr);
144 if (status != EFI_SUCCESS) {
145 max = max_addr;
146 max_addr = 0;
147 goto again;
148 }
149
150 *addr = max_addr;
151 }
152
153free_pool:
154 efi_call_phys1(sys_table->boottime->free_pool, map);
155
156fail:
157 return status;
158}
159
160/*
161 * Allocate at the lowest possible address.
162 */
163static efi_status_t low_alloc(unsigned long size, unsigned long align,
164 unsigned long *addr)
165{
166 unsigned long map_size, desc_size;
167 efi_memory_desc_t *map;
168 efi_status_t status;
169 unsigned long nr_pages;
170 int i;
171
172 status = __get_map(&map, &map_size, &desc_size);
173 if (status != EFI_SUCCESS)
174 goto fail;
175
176 nr_pages = round_up(size, EFI_PAGE_SIZE) / EFI_PAGE_SIZE;
177 for (i = 0; i < map_size / desc_size; i++) {
178 efi_memory_desc_t *desc;
179 unsigned long m = (unsigned long)map;
180 u64 start, end;
181
182 desc = (efi_memory_desc_t *)(m + (i * desc_size));
183
184 if (desc->type != EFI_CONVENTIONAL_MEMORY)
185 continue;
186
187 if (desc->num_pages < nr_pages)
188 continue;
189
190 start = desc->phys_addr;
191 end = start + desc->num_pages * (1UL << EFI_PAGE_SHIFT);
192
193 /*
194 * Don't allocate at 0x0. It will confuse code that
195 * checks pointers against NULL. Skip the first 8
196 * bytes so we start at a nice even number.
197 */
198 if (start == 0x0)
199 start += 8;
200
201 start = round_up(start, align);
202 if ((start + size) > end)
203 continue;
204
205 status = efi_call_phys4(sys_table->boottime->allocate_pages,
206 EFI_ALLOCATE_ADDRESS, EFI_LOADER_DATA,
207 nr_pages, &start);
208 if (status == EFI_SUCCESS) {
209 *addr = start;
210 break;
211 }
212 }
213
214 if (i == map_size / desc_size)
215 status = EFI_NOT_FOUND;
216
217free_pool:
218 efi_call_phys1(sys_table->boottime->free_pool, map);
219fail:
220 return status;
221}
222
223static void low_free(unsigned long size, unsigned long addr)
224{
225 unsigned long nr_pages;
226
227 nr_pages = round_up(size, EFI_PAGE_SIZE) / EFI_PAGE_SIZE;
228 efi_call_phys2(sys_table->boottime->free_pages, addr, nr_pages);
229}
230 26
231static void find_bits(unsigned long mask, u8 *pos, u8 *size) 27static void find_bits(unsigned long mask, u8 *pos, u8 *size)
232{ 28{
@@ -624,242 +420,6 @@ void setup_graphics(struct boot_params *boot_params)
624 } 420 }
625} 421}
626 422
627struct initrd {
628 efi_file_handle_t *handle;
629 u64 size;
630};
631
632/*
633 * Check the cmdline for a LILO-style initrd= arguments.
634 *
635 * We only support loading an initrd from the same filesystem as the
636 * kernel image.
637 */
638static efi_status_t handle_ramdisks(efi_loaded_image_t *image,
639 struct setup_header *hdr)
640{
641 struct initrd *initrds;
642 unsigned long initrd_addr;
643 efi_guid_t fs_proto = EFI_FILE_SYSTEM_GUID;
644 u64 initrd_total;
645 efi_file_io_interface_t *io;
646 efi_file_handle_t *fh;
647 efi_status_t status;
648 int nr_initrds;
649 char *str;
650 int i, j, k;
651
652 initrd_addr = 0;
653 initrd_total = 0;
654
655 str = (char *)(unsigned long)hdr->cmd_line_ptr;
656
657 j = 0; /* See close_handles */
658
659 if (!str || !*str)
660 return EFI_SUCCESS;
661
662 for (nr_initrds = 0; *str; nr_initrds++) {
663 str = strstr(str, "initrd=");
664 if (!str)
665 break;
666
667 str += 7;
668
669 /* Skip any leading slashes */
670 while (*str == '/' || *str == '\\')
671 str++;
672
673 while (*str && *str != ' ' && *str != '\n')
674 str++;
675 }
676
677 if (!nr_initrds)
678 return EFI_SUCCESS;
679
680 status = efi_call_phys3(sys_table->boottime->allocate_pool,
681 EFI_LOADER_DATA,
682 nr_initrds * sizeof(*initrds),
683 &initrds);
684 if (status != EFI_SUCCESS) {
685 efi_printk("Failed to alloc mem for initrds\n");
686 goto fail;
687 }
688
689 str = (char *)(unsigned long)hdr->cmd_line_ptr;
690 for (i = 0; i < nr_initrds; i++) {
691 struct initrd *initrd;
692 efi_file_handle_t *h;
693 efi_file_info_t *info;
694 efi_char16_t filename_16[256];
695 unsigned long info_sz;
696 efi_guid_t info_guid = EFI_FILE_INFO_ID;
697 efi_char16_t *p;
698 u64 file_sz;
699
700 str = strstr(str, "initrd=");
701 if (!str)
702 break;
703
704 str += 7;
705
706 initrd = &initrds[i];
707 p = filename_16;
708
709 /* Skip any leading slashes */
710 while (*str == '/' || *str == '\\')
711 str++;
712
713 while (*str && *str != ' ' && *str != '\n') {
714 if ((u8 *)p >= (u8 *)filename_16 + sizeof(filename_16))
715 break;
716
717 if (*str == '/') {
718 *p++ = '\\';
719 *str++;
720 } else {
721 *p++ = *str++;
722 }
723 }
724
725 *p = '\0';
726
727 /* Only open the volume once. */
728 if (!i) {
729 efi_boot_services_t *boottime;
730
731 boottime = sys_table->boottime;
732
733 status = efi_call_phys3(boottime->handle_protocol,
734 image->device_handle, &fs_proto, &io);
735 if (status != EFI_SUCCESS) {
736 efi_printk("Failed to handle fs_proto\n");
737 goto free_initrds;
738 }
739
740 status = efi_call_phys2(io->open_volume, io, &fh);
741 if (status != EFI_SUCCESS) {
742 efi_printk("Failed to open volume\n");
743 goto free_initrds;
744 }
745 }
746
747 status = efi_call_phys5(fh->open, fh, &h, filename_16,
748 EFI_FILE_MODE_READ, (u64)0);
749 if (status != EFI_SUCCESS) {
750 efi_printk("Failed to open initrd file: ");
751 efi_char16_printk(filename_16);
752 efi_printk("\n");
753 goto close_handles;
754 }
755
756 initrd->handle = h;
757
758 info_sz = 0;
759 status = efi_call_phys4(h->get_info, h, &info_guid,
760 &info_sz, NULL);
761 if (status != EFI_BUFFER_TOO_SMALL) {
762 efi_printk("Failed to get initrd info size\n");
763 goto close_handles;
764 }
765
766grow:
767 status = efi_call_phys3(sys_table->boottime->allocate_pool,
768 EFI_LOADER_DATA, info_sz, &info);
769 if (status != EFI_SUCCESS) {
770 efi_printk("Failed to alloc mem for initrd info\n");
771 goto close_handles;
772 }
773
774 status = efi_call_phys4(h->get_info, h, &info_guid,
775 &info_sz, info);
776 if (status == EFI_BUFFER_TOO_SMALL) {
777 efi_call_phys1(sys_table->boottime->free_pool, info);
778 goto grow;
779 }
780
781 file_sz = info->file_size;
782 efi_call_phys1(sys_table->boottime->free_pool, info);
783
784 if (status != EFI_SUCCESS) {
785 efi_printk("Failed to get initrd info\n");
786 goto close_handles;
787 }
788
789 initrd->size = file_sz;
790 initrd_total += file_sz;
791 }
792
793 if (initrd_total) {
794 unsigned long addr;
795
796 /*
797 * Multiple initrd's need to be at consecutive
798 * addresses in memory, so allocate enough memory for
799 * all the initrd's.
800 */
801 status = high_alloc(initrd_total, 0x1000,
802 &initrd_addr, hdr->initrd_addr_max);
803 if (status != EFI_SUCCESS) {
804 efi_printk("Failed to alloc highmem for initrds\n");
805 goto close_handles;
806 }
807
808 /* We've run out of free low memory. */
809 if (initrd_addr > hdr->initrd_addr_max) {
810 efi_printk("We've run out of free low memory\n");
811 status = EFI_INVALID_PARAMETER;
812 goto free_initrd_total;
813 }
814
815 addr = initrd_addr;
816 for (j = 0; j < nr_initrds; j++) {
817 u64 size;
818
819 size = initrds[j].size;
820 while (size) {
821 u64 chunksize;
822 if (size > EFI_READ_CHUNK_SIZE)
823 chunksize = EFI_READ_CHUNK_SIZE;
824 else
825 chunksize = size;
826 status = efi_call_phys3(fh->read,
827 initrds[j].handle,
828 &chunksize, addr);
829 if (status != EFI_SUCCESS) {
830 efi_printk("Failed to read initrd\n");
831 goto free_initrd_total;
832 }
833 addr += chunksize;
834 size -= chunksize;
835 }
836
837 efi_call_phys1(fh->close, initrds[j].handle);
838 }
839
840 }
841
842 efi_call_phys1(sys_table->boottime->free_pool, initrds);
843
844 hdr->ramdisk_image = initrd_addr;
845 hdr->ramdisk_size = initrd_total;
846
847 return status;
848
849free_initrd_total:
850 low_free(initrd_total, initrd_addr);
851
852close_handles:
853 for (k = j; k < i; k++)
854 efi_call_phys1(fh->close, initrds[k].handle);
855free_initrds:
856 efi_call_phys1(sys_table->boottime->free_pool, initrds);
857fail:
858 hdr->ramdisk_image = 0;
859 hdr->ramdisk_size = 0;
860
861 return status;
862}
863 423
864/* 424/*
865 * Because the x86 boot code expects to be passed a boot_params we 425 * Because the x86 boot code expects to be passed a boot_params we
@@ -875,14 +435,15 @@ struct boot_params *make_boot_params(void *handle, efi_system_table_t *_table)
875 struct efi_info *efi; 435 struct efi_info *efi;
876 efi_loaded_image_t *image; 436 efi_loaded_image_t *image;
877 void *options; 437 void *options;
878 u32 load_options_size;
879 efi_guid_t proto = LOADED_IMAGE_PROTOCOL_GUID; 438 efi_guid_t proto = LOADED_IMAGE_PROTOCOL_GUID;
880 int options_size = 0; 439 int options_size = 0;
881 efi_status_t status; 440 efi_status_t status;
882 unsigned long cmdline; 441 char *cmdline_ptr;
883 u16 *s2; 442 u16 *s2;
884 u8 *s1; 443 u8 *s1;
885 int i; 444 int i;
445 unsigned long ramdisk_addr;
446 unsigned long ramdisk_size;
886 447
887 sys_table = _table; 448 sys_table = _table;
888 449
@@ -893,13 +454,14 @@ struct boot_params *make_boot_params(void *handle, efi_system_table_t *_table)
893 status = efi_call_phys3(sys_table->boottime->handle_protocol, 454 status = efi_call_phys3(sys_table->boottime->handle_protocol,
894 handle, &proto, (void *)&image); 455 handle, &proto, (void *)&image);
895 if (status != EFI_SUCCESS) { 456 if (status != EFI_SUCCESS) {
896 efi_printk("Failed to get handle for LOADED_IMAGE_PROTOCOL\n"); 457 efi_printk(sys_table, "Failed to get handle for LOADED_IMAGE_PROTOCOL\n");
897 return NULL; 458 return NULL;
898 } 459 }
899 460
900 status = low_alloc(0x4000, 1, (unsigned long *)&boot_params); 461 status = efi_low_alloc(sys_table, 0x4000, 1,
462 (unsigned long *)&boot_params);
901 if (status != EFI_SUCCESS) { 463 if (status != EFI_SUCCESS) {
902 efi_printk("Failed to alloc lowmem for boot params\n"); 464 efi_printk(sys_table, "Failed to alloc lowmem for boot params\n");
903 return NULL; 465 return NULL;
904 } 466 }
905 467
@@ -926,40 +488,11 @@ struct boot_params *make_boot_params(void *handle, efi_system_table_t *_table)
926 hdr->type_of_loader = 0x21; 488 hdr->type_of_loader = 0x21;
927 489
928 /* Convert unicode cmdline to ascii */ 490 /* Convert unicode cmdline to ascii */
929 options = image->load_options; 491 cmdline_ptr = efi_convert_cmdline_to_ascii(sys_table, image,
930 load_options_size = image->load_options_size / 2; /* ASCII */ 492 &options_size);
931 cmdline = 0; 493 if (!cmdline_ptr)
932 s2 = (u16 *)options; 494 goto fail;
933 495 hdr->cmd_line_ptr = (unsigned long)cmdline_ptr;
934 if (s2) {
935 while (*s2 && *s2 != '\n' && options_size < load_options_size) {
936 s2++;
937 options_size++;
938 }
939
940 if (options_size) {
941 if (options_size > hdr->cmdline_size)
942 options_size = hdr->cmdline_size;
943
944 options_size++; /* NUL termination */
945
946 status = low_alloc(options_size, 1, &cmdline);
947 if (status != EFI_SUCCESS) {
948 efi_printk("Failed to alloc mem for cmdline\n");
949 goto fail;
950 }
951
952 s1 = (u8 *)(unsigned long)cmdline;
953 s2 = (u16 *)options;
954
955 for (i = 0; i < options_size - 1; i++)
956 *s1++ = *s2++;
957
958 *s1 = '\0';
959 }
960 }
961
962 hdr->cmd_line_ptr = cmdline;
963 496
964 hdr->ramdisk_image = 0; 497 hdr->ramdisk_image = 0;
965 hdr->ramdisk_size = 0; 498 hdr->ramdisk_size = 0;
@@ -969,96 +502,64 @@ struct boot_params *make_boot_params(void *handle, efi_system_table_t *_table)
969 502
970 memset(sdt, 0, sizeof(*sdt)); 503 memset(sdt, 0, sizeof(*sdt));
971 504
972 status = handle_ramdisks(image, hdr); 505 status = handle_cmdline_files(sys_table, image,
506 (char *)(unsigned long)hdr->cmd_line_ptr,
507 "initrd=", hdr->initrd_addr_max,
508 &ramdisk_addr, &ramdisk_size);
973 if (status != EFI_SUCCESS) 509 if (status != EFI_SUCCESS)
974 goto fail2; 510 goto fail2;
511 hdr->ramdisk_image = ramdisk_addr;
512 hdr->ramdisk_size = ramdisk_size;
975 513
976 return boot_params; 514 return boot_params;
977fail2: 515fail2:
978 if (options_size) 516 efi_free(sys_table, options_size, hdr->cmd_line_ptr);
979 low_free(options_size, hdr->cmd_line_ptr);
980fail: 517fail:
981 low_free(0x4000, (unsigned long)boot_params); 518 efi_free(sys_table, 0x4000, (unsigned long)boot_params);
982 return NULL; 519 return NULL;
983} 520}
984 521
985static efi_status_t exit_boot(struct boot_params *boot_params, 522static void add_e820ext(struct boot_params *params,
986 void *handle) 523 struct setup_data *e820ext, u32 nr_entries)
987{ 524{
988 struct efi_info *efi = &boot_params->efi_info; 525 struct setup_data *data;
989 struct e820entry *e820_map = &boot_params->e820_map[0];
990 struct e820entry *prev = NULL;
991 unsigned long size, key, desc_size, _size;
992 efi_memory_desc_t *mem_map;
993 efi_status_t status; 526 efi_status_t status;
994 __u32 desc_version; 527 unsigned long size;
995 bool called_exit = false;
996 u8 nr_entries;
997 int i;
998
999 size = sizeof(*mem_map) * 32;
1000
1001again:
1002 size += sizeof(*mem_map) * 2;
1003 _size = size;
1004 status = low_alloc(size, 1, (unsigned long *)&mem_map);
1005 if (status != EFI_SUCCESS)
1006 return status;
1007
1008get_map:
1009 status = efi_call_phys5(sys_table->boottime->get_memory_map, &size,
1010 mem_map, &key, &desc_size, &desc_version);
1011 if (status == EFI_BUFFER_TOO_SMALL) {
1012 low_free(_size, (unsigned long)mem_map);
1013 goto again;
1014 }
1015 528
1016 if (status != EFI_SUCCESS) 529 e820ext->type = SETUP_E820_EXT;
1017 goto free_mem_map; 530 e820ext->len = nr_entries * sizeof(struct e820entry);
531 e820ext->next = 0;
1018 532
1019 memcpy(&efi->efi_loader_signature, EFI_LOADER_SIGNATURE, sizeof(__u32)); 533 data = (struct setup_data *)(unsigned long)params->hdr.setup_data;
1020 efi->efi_systab = (unsigned long)sys_table;
1021 efi->efi_memdesc_size = desc_size;
1022 efi->efi_memdesc_version = desc_version;
1023 efi->efi_memmap = (unsigned long)mem_map;
1024 efi->efi_memmap_size = size;
1025
1026#ifdef CONFIG_X86_64
1027 efi->efi_systab_hi = (unsigned long)sys_table >> 32;
1028 efi->efi_memmap_hi = (unsigned long)mem_map >> 32;
1029#endif
1030 534
1031 /* Might as well exit boot services now */ 535 while (data && data->next)
1032 status = efi_call_phys2(sys_table->boottime->exit_boot_services, 536 data = (struct setup_data *)(unsigned long)data->next;
1033 handle, key);
1034 if (status != EFI_SUCCESS) {
1035 /*
1036 * ExitBootServices() will fail if any of the event
1037 * handlers change the memory map. In which case, we
1038 * must be prepared to retry, but only once so that
1039 * we're guaranteed to exit on repeated failures instead
1040 * of spinning forever.
1041 */
1042 if (called_exit)
1043 goto free_mem_map;
1044 537
1045 called_exit = true; 538 if (data)
1046 goto get_map; 539 data->next = (unsigned long)e820ext;
1047 } 540 else
541 params->hdr.setup_data = (unsigned long)e820ext;
542}
1048 543
1049 /* Historic? */ 544static efi_status_t setup_e820(struct boot_params *params,
1050 boot_params->alt_mem_k = 32 * 1024; 545 struct setup_data *e820ext, u32 e820ext_size)
546{
547 struct e820entry *e820_map = &params->e820_map[0];
548 struct efi_info *efi = &params->efi_info;
549 struct e820entry *prev = NULL;
550 u32 nr_entries;
551 u32 nr_desc;
552 int i;
1051 553
1052 /*
1053 * Convert the EFI memory map to E820.
1054 */
1055 nr_entries = 0; 554 nr_entries = 0;
1056 for (i = 0; i < size / desc_size; i++) { 555 nr_desc = efi->efi_memmap_size / efi->efi_memdesc_size;
556
557 for (i = 0; i < nr_desc; i++) {
1057 efi_memory_desc_t *d; 558 efi_memory_desc_t *d;
1058 unsigned int e820_type = 0; 559 unsigned int e820_type = 0;
1059 unsigned long m = (unsigned long)mem_map; 560 unsigned long m = efi->efi_memmap;
1060 561
1061 d = (efi_memory_desc_t *)(m + (i * desc_size)); 562 d = (efi_memory_desc_t *)(m + (i * efi->efi_memdesc_size));
1062 switch (d->type) { 563 switch (d->type) {
1063 case EFI_RESERVED_TYPE: 564 case EFI_RESERVED_TYPE:
1064 case EFI_RUNTIME_SERVICES_CODE: 565 case EFI_RUNTIME_SERVICES_CODE:
@@ -1095,61 +596,151 @@ get_map:
1095 596
1096 /* Merge adjacent mappings */ 597 /* Merge adjacent mappings */
1097 if (prev && prev->type == e820_type && 598 if (prev && prev->type == e820_type &&
1098 (prev->addr + prev->size) == d->phys_addr) 599 (prev->addr + prev->size) == d->phys_addr) {
1099 prev->size += d->num_pages << 12; 600 prev->size += d->num_pages << 12;
1100 else { 601 continue;
1101 e820_map->addr = d->phys_addr; 602 }
1102 e820_map->size = d->num_pages << 12; 603
1103 e820_map->type = e820_type; 604 if (nr_entries == ARRAY_SIZE(params->e820_map)) {
1104 prev = e820_map++; 605 u32 need = (nr_desc - i) * sizeof(struct e820entry) +
1105 nr_entries++; 606 sizeof(struct setup_data);
607
608 if (!e820ext || e820ext_size < need)
609 return EFI_BUFFER_TOO_SMALL;
610
611 /* boot_params map full, switch to e820 extended */
612 e820_map = (struct e820entry *)e820ext->data;
1106 } 613 }
614
615 e820_map->addr = d->phys_addr;
616 e820_map->size = d->num_pages << PAGE_SHIFT;
617 e820_map->type = e820_type;
618 prev = e820_map++;
619 nr_entries++;
1107 } 620 }
1108 621
1109 boot_params->e820_entries = nr_entries; 622 if (nr_entries > ARRAY_SIZE(params->e820_map)) {
623 u32 nr_e820ext = nr_entries - ARRAY_SIZE(params->e820_map);
624
625 add_e820ext(params, e820ext, nr_e820ext);
626 nr_entries -= nr_e820ext;
627 }
628
629 params->e820_entries = (u8)nr_entries;
1110 630
1111 return EFI_SUCCESS; 631 return EFI_SUCCESS;
632}
633
634static efi_status_t alloc_e820ext(u32 nr_desc, struct setup_data **e820ext,
635 u32 *e820ext_size)
636{
637 efi_status_t status;
638 unsigned long size;
639
640 size = sizeof(struct setup_data) +
641 sizeof(struct e820entry) * nr_desc;
642
643 if (*e820ext) {
644 efi_call_phys1(sys_table->boottime->free_pool, *e820ext);
645 *e820ext = NULL;
646 *e820ext_size = 0;
647 }
648
649 status = efi_call_phys3(sys_table->boottime->allocate_pool,
650 EFI_LOADER_DATA, size, e820ext);
651
652 if (status == EFI_SUCCESS)
653 *e820ext_size = size;
1112 654
1113free_mem_map:
1114 low_free(_size, (unsigned long)mem_map);
1115 return status; 655 return status;
1116} 656}
1117 657
1118static efi_status_t relocate_kernel(struct setup_header *hdr) 658static efi_status_t exit_boot(struct boot_params *boot_params,
659 void *handle)
1119{ 660{
1120 unsigned long start, nr_pages; 661 struct efi_info *efi = &boot_params->efi_info;
662 unsigned long map_sz, key, desc_size;
663 efi_memory_desc_t *mem_map;
664 struct setup_data *e820ext;
665 __u32 e820ext_size;
666 __u32 nr_desc, prev_nr_desc;
1121 efi_status_t status; 667 efi_status_t status;
668 __u32 desc_version;
669 bool called_exit = false;
670 u8 nr_entries;
671 int i;
1122 672
1123 /* 673 nr_desc = 0;
1124 * The EFI firmware loader could have placed the kernel image 674 e820ext = NULL;
1125 * anywhere in memory, but the kernel has various restrictions 675 e820ext_size = 0;
1126 * on the max physical address it can run at. Attempt to move
1127 * the kernel to boot_params.pref_address, or as low as
1128 * possible.
1129 */
1130 start = hdr->pref_address;
1131 nr_pages = round_up(hdr->init_size, EFI_PAGE_SIZE) / EFI_PAGE_SIZE;
1132 676
1133 status = efi_call_phys4(sys_table->boottime->allocate_pages, 677get_map:
1134 EFI_ALLOCATE_ADDRESS, EFI_LOADER_DATA, 678 status = efi_get_memory_map(sys_table, &mem_map, &map_sz, &desc_size,
1135 nr_pages, &start); 679 &desc_version, &key);
1136 if (status != EFI_SUCCESS) { 680
1137 status = low_alloc(hdr->init_size, hdr->kernel_alignment, 681 if (status != EFI_SUCCESS)
1138 &start); 682 return status;
683
684 prev_nr_desc = nr_desc;
685 nr_desc = map_sz / desc_size;
686 if (nr_desc > prev_nr_desc &&
687 nr_desc > ARRAY_SIZE(boot_params->e820_map)) {
688 u32 nr_e820ext = nr_desc - ARRAY_SIZE(boot_params->e820_map);
689
690 status = alloc_e820ext(nr_e820ext, &e820ext, &e820ext_size);
1139 if (status != EFI_SUCCESS) 691 if (status != EFI_SUCCESS)
1140 efi_printk("Failed to alloc mem for kernel\n"); 692 goto free_mem_map;
693
694 efi_call_phys1(sys_table->boottime->free_pool, mem_map);
695 goto get_map; /* Allocated memory, get map again */
1141 } 696 }
1142 697
1143 if (status == EFI_SUCCESS) 698 memcpy(&efi->efi_loader_signature, EFI_LOADER_SIGNATURE, sizeof(__u32));
1144 memcpy((void *)start, (void *)(unsigned long)hdr->code32_start, 699 efi->efi_systab = (unsigned long)sys_table;
1145 hdr->init_size); 700 efi->efi_memdesc_size = desc_size;
701 efi->efi_memdesc_version = desc_version;
702 efi->efi_memmap = (unsigned long)mem_map;
703 efi->efi_memmap_size = map_sz;
704
705#ifdef CONFIG_X86_64
706 efi->efi_systab_hi = (unsigned long)sys_table >> 32;
707 efi->efi_memmap_hi = (unsigned long)mem_map >> 32;
708#endif
1146 709
1147 hdr->pref_address = hdr->code32_start; 710 /* Might as well exit boot services now */
1148 hdr->code32_start = (__u32)start; 711 status = efi_call_phys2(sys_table->boottime->exit_boot_services,
712 handle, key);
713 if (status != EFI_SUCCESS) {
714 /*
715 * ExitBootServices() will fail if any of the event
716 * handlers change the memory map. In which case, we
717 * must be prepared to retry, but only once so that
718 * we're guaranteed to exit on repeated failures instead
719 * of spinning forever.
720 */
721 if (called_exit)
722 goto free_mem_map;
1149 723
724 called_exit = true;
725 efi_call_phys1(sys_table->boottime->free_pool, mem_map);
726 goto get_map;
727 }
728
729 /* Historic? */
730 boot_params->alt_mem_k = 32 * 1024;
731
732 status = setup_e820(boot_params, e820ext, e820ext_size);
733 if (status != EFI_SUCCESS)
734 return status;
735
736 return EFI_SUCCESS;
737
738free_mem_map:
739 efi_call_phys1(sys_table->boottime->free_pool, mem_map);
1150 return status; 740 return status;
1151} 741}
1152 742
743
1153/* 744/*
1154 * On success we return a pointer to a boot_params structure, and NULL 745 * On success we return a pointer to a boot_params structure, and NULL
1155 * on failure. 746 * on failure.
@@ -1157,7 +748,7 @@ static efi_status_t relocate_kernel(struct setup_header *hdr)
1157struct boot_params *efi_main(void *handle, efi_system_table_t *_table, 748struct boot_params *efi_main(void *handle, efi_system_table_t *_table,
1158 struct boot_params *boot_params) 749 struct boot_params *boot_params)
1159{ 750{
1160 struct desc_ptr *gdt, *idt; 751 struct desc_ptr *gdt;
1161 efi_loaded_image_t *image; 752 efi_loaded_image_t *image;
1162 struct setup_header *hdr = &boot_params->hdr; 753 struct setup_header *hdr = &boot_params->hdr;
1163 efi_status_t status; 754 efi_status_t status;
@@ -1177,37 +768,33 @@ struct boot_params *efi_main(void *handle, efi_system_table_t *_table,
1177 EFI_LOADER_DATA, sizeof(*gdt), 768 EFI_LOADER_DATA, sizeof(*gdt),
1178 (void **)&gdt); 769 (void **)&gdt);
1179 if (status != EFI_SUCCESS) { 770 if (status != EFI_SUCCESS) {
1180 efi_printk("Failed to alloc mem for gdt structure\n"); 771 efi_printk(sys_table, "Failed to alloc mem for gdt structure\n");
1181 goto fail; 772 goto fail;
1182 } 773 }
1183 774
1184 gdt->size = 0x800; 775 gdt->size = 0x800;
1185 status = low_alloc(gdt->size, 8, (unsigned long *)&gdt->address); 776 status = efi_low_alloc(sys_table, gdt->size, 8,
1186 if (status != EFI_SUCCESS) { 777 (unsigned long *)&gdt->address);
1187 efi_printk("Failed to alloc mem for gdt\n");
1188 goto fail;
1189 }
1190
1191 status = efi_call_phys3(sys_table->boottime->allocate_pool,
1192 EFI_LOADER_DATA, sizeof(*idt),
1193 (void **)&idt);
1194 if (status != EFI_SUCCESS) { 778 if (status != EFI_SUCCESS) {
1195 efi_printk("Failed to alloc mem for idt structure\n"); 779 efi_printk(sys_table, "Failed to alloc mem for gdt\n");
1196 goto fail; 780 goto fail;
1197 } 781 }
1198 782
1199 idt->size = 0;
1200 idt->address = 0;
1201
1202 /* 783 /*
1203 * If the kernel isn't already loaded at the preferred load 784 * If the kernel isn't already loaded at the preferred load
1204 * address, relocate it. 785 * address, relocate it.
1205 */ 786 */
1206 if (hdr->pref_address != hdr->code32_start) { 787 if (hdr->pref_address != hdr->code32_start) {
1207 status = relocate_kernel(hdr); 788 unsigned long bzimage_addr = hdr->code32_start;
1208 789 status = efi_relocate_kernel(sys_table, &bzimage_addr,
790 hdr->init_size, hdr->init_size,
791 hdr->pref_address,
792 hdr->kernel_alignment);
1209 if (status != EFI_SUCCESS) 793 if (status != EFI_SUCCESS)
1210 goto fail; 794 goto fail;
795
796 hdr->pref_address = hdr->code32_start;
797 hdr->code32_start = bzimage_addr;
1211 } 798 }
1212 799
1213 status = exit_boot(boot_params, handle); 800 status = exit_boot(boot_params, handle);
@@ -1267,10 +854,8 @@ struct boot_params *efi_main(void *handle, efi_system_table_t *_table,
1267 desc->base2 = 0x00; 854 desc->base2 = 0x00;
1268#endif /* CONFIG_X86_64 */ 855#endif /* CONFIG_X86_64 */
1269 856
1270 asm volatile ("lidt %0" : : "m" (*idt));
1271 asm volatile ("lgdt %0" : : "m" (*gdt));
1272
1273 asm volatile("cli"); 857 asm volatile("cli");
858 asm volatile ("lgdt %0" : : "m" (*gdt));
1274 859
1275 return boot_params; 860 return boot_params;
1276fail: 861fail:
diff --git a/arch/x86/boot/compressed/eboot.h b/arch/x86/boot/compressed/eboot.h
index e5b0a8f91c5f..81b6b652b46a 100644
--- a/arch/x86/boot/compressed/eboot.h
+++ b/arch/x86/boot/compressed/eboot.h
@@ -11,9 +11,6 @@
11 11
12#define DESC_TYPE_CODE_DATA (1 << 0) 12#define DESC_TYPE_CODE_DATA (1 << 0)
13 13
14#define EFI_PAGE_SIZE (1UL << EFI_PAGE_SHIFT)
15#define EFI_READ_CHUNK_SIZE (1024 * 1024)
16
17#define EFI_CONSOLE_OUT_DEVICE_GUID \ 14#define EFI_CONSOLE_OUT_DEVICE_GUID \
18 EFI_GUID(0xd3b36f2c, 0xd551, 0x11d4, 0x9a, 0x46, 0x0, 0x90, 0x27, \ 15 EFI_GUID(0xd3b36f2c, 0xd551, 0x11d4, 0x9a, 0x46, 0x0, 0x90, 0x27, \
19 0x3f, 0xc1, 0x4d) 16 0x3f, 0xc1, 0x4d)
@@ -62,10 +59,4 @@ struct efi_uga_draw_protocol {
62 void *blt; 59 void *blt;
63}; 60};
64 61
65struct efi_simple_text_output_protocol {
66 void *reset;
67 void *output_string;
68 void *test_string;
69};
70
71#endif /* BOOT_COMPRESSED_EBOOT_H */ 62#endif /* BOOT_COMPRESSED_EBOOT_H */
diff --git a/arch/x86/boot/compressed/mkpiggy.c b/arch/x86/boot/compressed/mkpiggy.c
index 958a641483dd..b669ab65bf6c 100644
--- a/arch/x86/boot/compressed/mkpiggy.c
+++ b/arch/x86/boot/compressed/mkpiggy.c
@@ -36,11 +36,12 @@ int main(int argc, char *argv[])
36 uint32_t olen; 36 uint32_t olen;
37 long ilen; 37 long ilen;
38 unsigned long offs; 38 unsigned long offs;
39 FILE *f; 39 FILE *f = NULL;
40 int retval = 1;
40 41
41 if (argc < 2) { 42 if (argc < 2) {
42 fprintf(stderr, "Usage: %s compressed_file\n", argv[0]); 43 fprintf(stderr, "Usage: %s compressed_file\n", argv[0]);
43 return 1; 44 goto bail;
44 } 45 }
45 46
46 /* Get the information for the compressed kernel image first */ 47 /* Get the information for the compressed kernel image first */
@@ -48,7 +49,7 @@ int main(int argc, char *argv[])
48 f = fopen(argv[1], "r"); 49 f = fopen(argv[1], "r");
49 if (!f) { 50 if (!f) {
50 perror(argv[1]); 51 perror(argv[1]);
51 return 1; 52 goto bail;
52 } 53 }
53 54
54 55
@@ -58,12 +59,11 @@ int main(int argc, char *argv[])
58 59
59 if (fread(&olen, sizeof(olen), 1, f) != 1) { 60 if (fread(&olen, sizeof(olen), 1, f) != 1) {
60 perror(argv[1]); 61 perror(argv[1]);
61 return 1; 62 goto bail;
62 } 63 }
63 64
64 ilen = ftell(f); 65 ilen = ftell(f);
65 olen = get_unaligned_le32(&olen); 66 olen = get_unaligned_le32(&olen);
66 fclose(f);
67 67
68 /* 68 /*
69 * Now we have the input (compressed) and output (uncompressed) 69 * Now we have the input (compressed) and output (uncompressed)
@@ -91,5 +91,9 @@ int main(int argc, char *argv[])
91 printf(".incbin \"%s\"\n", argv[1]); 91 printf(".incbin \"%s\"\n", argv[1]);
92 printf("input_data_end:\n"); 92 printf("input_data_end:\n");
93 93
94 return 0; 94 retval = 0;
95bail:
96 if (f)
97 fclose(f);
98 return retval;
95} 99}
diff --git a/arch/x86/boot/tools/build.c b/arch/x86/boot/tools/build.c
index c941d6a8887f..8e15b22391fc 100644
--- a/arch/x86/boot/tools/build.c
+++ b/arch/x86/boot/tools/build.c
@@ -5,14 +5,15 @@
5 */ 5 */
6 6
7/* 7/*
8 * This file builds a disk-image from two different files: 8 * This file builds a disk-image from three different files:
9 * 9 *
10 * - setup: 8086 machine code, sets up system parm 10 * - setup: 8086 machine code, sets up system parm
11 * - system: 80386 code for actual system 11 * - system: 80386 code for actual system
12 * - zoffset.h: header with ZO_* defines
12 * 13 *
13 * It does some checking that all files are of the correct type, and 14 * It does some checking that all files are of the correct type, and writes
14 * just writes the result to stdout, removing headers and padding to 15 * the result to the specified destination, removing headers and padding to
15 * the right amount. It also writes some system data to stderr. 16 * the right amount. It also writes some system data to stdout.
16 */ 17 */
17 18
18/* 19/*
@@ -136,7 +137,7 @@ static void die(const char * str, ...)
136 137
137static void usage(void) 138static void usage(void)
138{ 139{
139 die("Usage: build setup system [zoffset.h] [> image]"); 140 die("Usage: build setup system zoffset.h image");
140} 141}
141 142
142#ifdef CONFIG_EFI_STUB 143#ifdef CONFIG_EFI_STUB
@@ -265,7 +266,7 @@ int main(int argc, char ** argv)
265 int c; 266 int c;
266 u32 sys_size; 267 u32 sys_size;
267 struct stat sb; 268 struct stat sb;
268 FILE *file; 269 FILE *file, *dest;
269 int fd; 270 int fd;
270 void *kernel; 271 void *kernel;
271 u32 crc = 0xffffffffUL; 272 u32 crc = 0xffffffffUL;
@@ -280,10 +281,13 @@ int main(int argc, char ** argv)
280 startup_64 = 0x200; 281 startup_64 = 0x200;
281#endif 282#endif
282 283
283 if (argc == 4) 284 if (argc != 5)
284 parse_zoffset(argv[3]);
285 else if (argc != 3)
286 usage(); 285 usage();
286 parse_zoffset(argv[3]);
287
288 dest = fopen(argv[4], "w");
289 if (!dest)
290 die("Unable to write `%s': %m", argv[4]);
287 291
288 /* Copy the setup code */ 292 /* Copy the setup code */
289 file = fopen(argv[1], "r"); 293 file = fopen(argv[1], "r");
@@ -318,7 +322,7 @@ int main(int argc, char ** argv)
318 /* Set the default root device */ 322 /* Set the default root device */
319 put_unaligned_le16(DEFAULT_ROOT_DEV, &buf[508]); 323 put_unaligned_le16(DEFAULT_ROOT_DEV, &buf[508]);
320 324
321 fprintf(stderr, "Setup is %d bytes (padded to %d bytes).\n", c, i); 325 printf("Setup is %d bytes (padded to %d bytes).\n", c, i);
322 326
323 /* Open and stat the kernel file */ 327 /* Open and stat the kernel file */
324 fd = open(argv[2], O_RDONLY); 328 fd = open(argv[2], O_RDONLY);
@@ -327,7 +331,7 @@ int main(int argc, char ** argv)
327 if (fstat(fd, &sb)) 331 if (fstat(fd, &sb))
328 die("Unable to stat `%s': %m", argv[2]); 332 die("Unable to stat `%s': %m", argv[2]);
329 sz = sb.st_size; 333 sz = sb.st_size;
330 fprintf (stderr, "System is %d kB\n", (sz+1023)/1024); 334 printf("System is %d kB\n", (sz+1023)/1024);
331 kernel = mmap(NULL, sz, PROT_READ, MAP_SHARED, fd, 0); 335 kernel = mmap(NULL, sz, PROT_READ, MAP_SHARED, fd, 0);
332 if (kernel == MAP_FAILED) 336 if (kernel == MAP_FAILED)
333 die("Unable to mmap '%s': %m", argv[2]); 337 die("Unable to mmap '%s': %m", argv[2]);
@@ -348,27 +352,31 @@ int main(int argc, char ** argv)
348#endif 352#endif
349 353
350 crc = partial_crc32(buf, i, crc); 354 crc = partial_crc32(buf, i, crc);
351 if (fwrite(buf, 1, i, stdout) != i) 355 if (fwrite(buf, 1, i, dest) != i)
352 die("Writing setup failed"); 356 die("Writing setup failed");
353 357
354 /* Copy the kernel code */ 358 /* Copy the kernel code */
355 crc = partial_crc32(kernel, sz, crc); 359 crc = partial_crc32(kernel, sz, crc);
356 if (fwrite(kernel, 1, sz, stdout) != sz) 360 if (fwrite(kernel, 1, sz, dest) != sz)
357 die("Writing kernel failed"); 361 die("Writing kernel failed");
358 362
359 /* Add padding leaving 4 bytes for the checksum */ 363 /* Add padding leaving 4 bytes for the checksum */
360 while (sz++ < (sys_size*16) - 4) { 364 while (sz++ < (sys_size*16) - 4) {
361 crc = partial_crc32_one('\0', crc); 365 crc = partial_crc32_one('\0', crc);
362 if (fwrite("\0", 1, 1, stdout) != 1) 366 if (fwrite("\0", 1, 1, dest) != 1)
363 die("Writing padding failed"); 367 die("Writing padding failed");
364 } 368 }
365 369
366 /* Write the CRC */ 370 /* Write the CRC */
367 fprintf(stderr, "CRC %x\n", crc); 371 printf("CRC %x\n", crc);
368 put_unaligned_le32(crc, buf); 372 put_unaligned_le32(crc, buf);
369 if (fwrite(buf, 1, 4, stdout) != 4) 373 if (fwrite(buf, 1, 4, dest) != 4)
370 die("Writing CRC failed"); 374 die("Writing CRC failed");
371 375
376 /* Catch any delayed write failures */
377 if (fclose(dest))
378 die("Writing image failed");
379
372 close(fd); 380 close(fd);
373 381
374 /* Everything is OK */ 382 /* Everything is OK */
diff --git a/arch/x86/configs/i386_defconfig b/arch/x86/configs/i386_defconfig
index 94447086e551..a7fef2621cc9 100644
--- a/arch/x86/configs/i386_defconfig
+++ b/arch/x86/configs/i386_defconfig
@@ -142,6 +142,8 @@ CONFIG_MAC80211=y
142CONFIG_MAC80211_LEDS=y 142CONFIG_MAC80211_LEDS=y
143CONFIG_RFKILL=y 143CONFIG_RFKILL=y
144CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" 144CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
145CONFIG_DEVTMPFS=y
146CONFIG_DEVTMPFS_MOUNT=y
145CONFIG_DEBUG_DEVRES=y 147CONFIG_DEBUG_DEVRES=y
146CONFIG_CONNECTOR=y 148CONFIG_CONNECTOR=y
147CONFIG_BLK_DEV_LOOP=y 149CONFIG_BLK_DEV_LOOP=y
diff --git a/arch/x86/configs/x86_64_defconfig b/arch/x86/configs/x86_64_defconfig
index 671524d0f6c0..c1119d4c1281 100644
--- a/arch/x86/configs/x86_64_defconfig
+++ b/arch/x86/configs/x86_64_defconfig
@@ -141,6 +141,8 @@ CONFIG_MAC80211=y
141CONFIG_MAC80211_LEDS=y 141CONFIG_MAC80211_LEDS=y
142CONFIG_RFKILL=y 142CONFIG_RFKILL=y
143CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" 143CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
144CONFIG_DEVTMPFS=y
145CONFIG_DEVTMPFS_MOUNT=y
144CONFIG_DEBUG_DEVRES=y 146CONFIG_DEBUG_DEVRES=y
145CONFIG_CONNECTOR=y 147CONFIG_CONNECTOR=y
146CONFIG_BLK_DEV_LOOP=y 148CONFIG_BLK_DEV_LOOP=y
diff --git a/arch/x86/include/asm/atomic.h b/arch/x86/include/asm/atomic.h
index 722aa3b04624..da31c8b8a92d 100644
--- a/arch/x86/include/asm/atomic.h
+++ b/arch/x86/include/asm/atomic.h
@@ -6,6 +6,7 @@
6#include <asm/processor.h> 6#include <asm/processor.h>
7#include <asm/alternative.h> 7#include <asm/alternative.h>
8#include <asm/cmpxchg.h> 8#include <asm/cmpxchg.h>
9#include <asm/rmwcc.h>
9 10
10/* 11/*
11 * Atomic operations that C can't guarantee us. Useful for 12 * Atomic operations that C can't guarantee us. Useful for
@@ -76,12 +77,7 @@ static inline void atomic_sub(int i, atomic_t *v)
76 */ 77 */
77static inline int atomic_sub_and_test(int i, atomic_t *v) 78static inline int atomic_sub_and_test(int i, atomic_t *v)
78{ 79{
79 unsigned char c; 80 GEN_BINARY_RMWcc(LOCK_PREFIX "subl", v->counter, i, "%0", "e");
80
81 asm volatile(LOCK_PREFIX "subl %2,%0; sete %1"
82 : "+m" (v->counter), "=qm" (c)
83 : "ir" (i) : "memory");
84 return c;
85} 81}
86 82
87/** 83/**
@@ -118,12 +114,7 @@ static inline void atomic_dec(atomic_t *v)
118 */ 114 */
119static inline int atomic_dec_and_test(atomic_t *v) 115static inline int atomic_dec_and_test(atomic_t *v)
120{ 116{
121 unsigned char c; 117 GEN_UNARY_RMWcc(LOCK_PREFIX "decl", v->counter, "%0", "e");
122
123 asm volatile(LOCK_PREFIX "decl %0; sete %1"
124 : "+m" (v->counter), "=qm" (c)
125 : : "memory");
126 return c != 0;
127} 118}
128 119
129/** 120/**
@@ -136,12 +127,7 @@ static inline int atomic_dec_and_test(atomic_t *v)
136 */ 127 */
137static inline int atomic_inc_and_test(atomic_t *v) 128static inline int atomic_inc_and_test(atomic_t *v)
138{ 129{
139 unsigned char c; 130 GEN_UNARY_RMWcc(LOCK_PREFIX "incl", v->counter, "%0", "e");
140
141 asm volatile(LOCK_PREFIX "incl %0; sete %1"
142 : "+m" (v->counter), "=qm" (c)
143 : : "memory");
144 return c != 0;
145} 131}
146 132
147/** 133/**
@@ -155,12 +141,7 @@ static inline int atomic_inc_and_test(atomic_t *v)
155 */ 141 */
156static inline int atomic_add_negative(int i, atomic_t *v) 142static inline int atomic_add_negative(int i, atomic_t *v)
157{ 143{
158 unsigned char c; 144 GEN_BINARY_RMWcc(LOCK_PREFIX "addl", v->counter, i, "%0", "s");
159
160 asm volatile(LOCK_PREFIX "addl %2,%0; sets %1"
161 : "+m" (v->counter), "=qm" (c)
162 : "ir" (i) : "memory");
163 return c;
164} 145}
165 146
166/** 147/**
diff --git a/arch/x86/include/asm/atomic64_64.h b/arch/x86/include/asm/atomic64_64.h
index 0e1cbfc8ee06..3f065c985aee 100644
--- a/arch/x86/include/asm/atomic64_64.h
+++ b/arch/x86/include/asm/atomic64_64.h
@@ -72,12 +72,7 @@ static inline void atomic64_sub(long i, atomic64_t *v)
72 */ 72 */
73static inline int atomic64_sub_and_test(long i, atomic64_t *v) 73static inline int atomic64_sub_and_test(long i, atomic64_t *v)
74{ 74{
75 unsigned char c; 75 GEN_BINARY_RMWcc(LOCK_PREFIX "subq", v->counter, i, "%0", "e");
76
77 asm volatile(LOCK_PREFIX "subq %2,%0; sete %1"
78 : "=m" (v->counter), "=qm" (c)
79 : "er" (i), "m" (v->counter) : "memory");
80 return c;
81} 76}
82 77
83/** 78/**
@@ -116,12 +111,7 @@ static inline void atomic64_dec(atomic64_t *v)
116 */ 111 */
117static inline int atomic64_dec_and_test(atomic64_t *v) 112static inline int atomic64_dec_and_test(atomic64_t *v)
118{ 113{
119 unsigned char c; 114 GEN_UNARY_RMWcc(LOCK_PREFIX "decq", v->counter, "%0", "e");
120
121 asm volatile(LOCK_PREFIX "decq %0; sete %1"
122 : "=m" (v->counter), "=qm" (c)
123 : "m" (v->counter) : "memory");
124 return c != 0;
125} 115}
126 116
127/** 117/**
@@ -134,12 +124,7 @@ static inline int atomic64_dec_and_test(atomic64_t *v)
134 */ 124 */
135static inline int atomic64_inc_and_test(atomic64_t *v) 125static inline int atomic64_inc_and_test(atomic64_t *v)
136{ 126{
137 unsigned char c; 127 GEN_UNARY_RMWcc(LOCK_PREFIX "incq", v->counter, "%0", "e");
138
139 asm volatile(LOCK_PREFIX "incq %0; sete %1"
140 : "=m" (v->counter), "=qm" (c)
141 : "m" (v->counter) : "memory");
142 return c != 0;
143} 128}
144 129
145/** 130/**
@@ -153,12 +138,7 @@ static inline int atomic64_inc_and_test(atomic64_t *v)
153 */ 138 */
154static inline int atomic64_add_negative(long i, atomic64_t *v) 139static inline int atomic64_add_negative(long i, atomic64_t *v)
155{ 140{
156 unsigned char c; 141 GEN_BINARY_RMWcc(LOCK_PREFIX "addq", v->counter, i, "%0", "s");
157
158 asm volatile(LOCK_PREFIX "addq %2,%0; sets %1"
159 : "=m" (v->counter), "=qm" (c)
160 : "er" (i), "m" (v->counter) : "memory");
161 return c;
162} 142}
163 143
164/** 144/**
diff --git a/arch/x86/include/asm/bitops.h b/arch/x86/include/asm/bitops.h
index 41639ce8fd63..6d76d0935989 100644
--- a/arch/x86/include/asm/bitops.h
+++ b/arch/x86/include/asm/bitops.h
@@ -14,6 +14,7 @@
14 14
15#include <linux/compiler.h> 15#include <linux/compiler.h>
16#include <asm/alternative.h> 16#include <asm/alternative.h>
17#include <asm/rmwcc.h>
17 18
18#if BITS_PER_LONG == 32 19#if BITS_PER_LONG == 32
19# define _BITOPS_LONG_SHIFT 5 20# define _BITOPS_LONG_SHIFT 5
@@ -204,12 +205,7 @@ static inline void change_bit(long nr, volatile unsigned long *addr)
204 */ 205 */
205static inline int test_and_set_bit(long nr, volatile unsigned long *addr) 206static inline int test_and_set_bit(long nr, volatile unsigned long *addr)
206{ 207{
207 int oldbit; 208 GEN_BINARY_RMWcc(LOCK_PREFIX "bts", *addr, nr, "%0", "c");
208
209 asm volatile(LOCK_PREFIX "bts %2,%1\n\t"
210 "sbb %0,%0" : "=r" (oldbit), ADDR : "Ir" (nr) : "memory");
211
212 return oldbit;
213} 209}
214 210
215/** 211/**
@@ -255,13 +251,7 @@ static inline int __test_and_set_bit(long nr, volatile unsigned long *addr)
255 */ 251 */
256static inline int test_and_clear_bit(long nr, volatile unsigned long *addr) 252static inline int test_and_clear_bit(long nr, volatile unsigned long *addr)
257{ 253{
258 int oldbit; 254 GEN_BINARY_RMWcc(LOCK_PREFIX "btr", *addr, nr, "%0", "c");
259
260 asm volatile(LOCK_PREFIX "btr %2,%1\n\t"
261 "sbb %0,%0"
262 : "=r" (oldbit), ADDR : "Ir" (nr) : "memory");
263
264 return oldbit;
265} 255}
266 256
267/** 257/**
@@ -314,13 +304,7 @@ static inline int __test_and_change_bit(long nr, volatile unsigned long *addr)
314 */ 304 */
315static inline int test_and_change_bit(long nr, volatile unsigned long *addr) 305static inline int test_and_change_bit(long nr, volatile unsigned long *addr)
316{ 306{
317 int oldbit; 307 GEN_BINARY_RMWcc(LOCK_PREFIX "btc", *addr, nr, "%0", "c");
318
319 asm volatile(LOCK_PREFIX "btc %2,%1\n\t"
320 "sbb %0,%0"
321 : "=r" (oldbit), ADDR : "Ir" (nr) : "memory");
322
323 return oldbit;
324} 308}
325 309
326static __always_inline int constant_test_bit(long nr, const volatile unsigned long *addr) 310static __always_inline int constant_test_bit(long nr, const volatile unsigned long *addr)
diff --git a/arch/x86/include/asm/calling.h b/arch/x86/include/asm/calling.h
index 0fa675033912..cb4c73bfeb48 100644
--- a/arch/x86/include/asm/calling.h
+++ b/arch/x86/include/asm/calling.h
@@ -48,6 +48,8 @@ For 32-bit we have the following conventions - kernel is built with
48 48
49#include <asm/dwarf2.h> 49#include <asm/dwarf2.h>
50 50
51#ifdef CONFIG_X86_64
52
51/* 53/*
52 * 64-bit system call stack frame layout defines and helpers, 54 * 64-bit system call stack frame layout defines and helpers,
53 * for assembly code: 55 * for assembly code:
@@ -192,3 +194,51 @@ For 32-bit we have the following conventions - kernel is built with
192 .macro icebp 194 .macro icebp
193 .byte 0xf1 195 .byte 0xf1
194 .endm 196 .endm
197
198#else /* CONFIG_X86_64 */
199
200/*
201 * For 32bit only simplified versions of SAVE_ALL/RESTORE_ALL. These
202 * are different from the entry_32.S versions in not changing the segment
203 * registers. So only suitable for in kernel use, not when transitioning
204 * from or to user space. The resulting stack frame is not a standard
205 * pt_regs frame. The main use case is calling C code from assembler
206 * when all the registers need to be preserved.
207 */
208
209 .macro SAVE_ALL
210 pushl_cfi %eax
211 CFI_REL_OFFSET eax, 0
212 pushl_cfi %ebp
213 CFI_REL_OFFSET ebp, 0
214 pushl_cfi %edi
215 CFI_REL_OFFSET edi, 0
216 pushl_cfi %esi
217 CFI_REL_OFFSET esi, 0
218 pushl_cfi %edx
219 CFI_REL_OFFSET edx, 0
220 pushl_cfi %ecx
221 CFI_REL_OFFSET ecx, 0
222 pushl_cfi %ebx
223 CFI_REL_OFFSET ebx, 0
224 .endm
225
226 .macro RESTORE_ALL
227 popl_cfi %ebx
228 CFI_RESTORE ebx
229 popl_cfi %ecx
230 CFI_RESTORE ecx
231 popl_cfi %edx
232 CFI_RESTORE edx
233 popl_cfi %esi
234 CFI_RESTORE esi
235 popl_cfi %edi
236 CFI_RESTORE edi
237 popl_cfi %ebp
238 CFI_RESTORE ebp
239 popl_cfi %eax
240 CFI_RESTORE eax
241 .endm
242
243#endif /* CONFIG_X86_64 */
244
diff --git a/arch/x86/include/asm/efi.h b/arch/x86/include/asm/efi.h
index 0062a0125041..65c6e6e3a552 100644
--- a/arch/x86/include/asm/efi.h
+++ b/arch/x86/include/asm/efi.h
@@ -109,6 +109,8 @@ static inline bool efi_is_native(void)
109 return IS_ENABLED(CONFIG_X86_64) == efi_enabled(EFI_64BIT); 109 return IS_ENABLED(CONFIG_X86_64) == efi_enabled(EFI_64BIT);
110} 110}
111 111
112extern struct console early_efi_console;
113
112#else 114#else
113/* 115/*
114 * IF EFI is not configured, have the EFI calls return -ENOSYS. 116 * IF EFI is not configured, have the EFI calls return -ENOSYS.
diff --git a/arch/x86/include/asm/intel-mid.h b/arch/x86/include/asm/intel-mid.h
new file mode 100644
index 000000000000..459769d39263
--- /dev/null
+++ b/arch/x86/include/asm/intel-mid.h
@@ -0,0 +1,113 @@
1/*
2 * intel-mid.h: Intel MID specific setup code
3 *
4 * (C) Copyright 2009 Intel Corporation
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; version 2
9 * of the License.
10 */
11#ifndef _ASM_X86_INTEL_MID_H
12#define _ASM_X86_INTEL_MID_H
13
14#include <linux/sfi.h>
15#include <linux/platform_device.h>
16
17extern int intel_mid_pci_init(void);
18extern int get_gpio_by_name(const char *name);
19extern void intel_scu_device_register(struct platform_device *pdev);
20extern int __init sfi_parse_mrtc(struct sfi_table_header *table);
21extern int __init sfi_parse_mtmr(struct sfi_table_header *table);
22extern int sfi_mrtc_num;
23extern struct sfi_rtc_table_entry sfi_mrtc_array[];
24
25/*
26 * Here defines the array of devices platform data that IAFW would export
27 * through SFI "DEVS" table, we use name and type to match the device and
28 * its platform data.
29 */
30struct devs_id {
31 char name[SFI_NAME_LEN + 1];
32 u8 type;
33 u8 delay;
34 void *(*get_platform_data)(void *info);
35 /* Custom handler for devices */
36 void (*device_handler)(struct sfi_device_table_entry *pentry,
37 struct devs_id *dev);
38};
39
40#define sfi_device(i) \
41 static const struct devs_id *const __intel_mid_sfi_##i##_dev __used \
42 __attribute__((__section__(".x86_intel_mid_dev.init"))) = &i
43
44/*
45 * Medfield is the follow-up of Moorestown, it combines two chip solution into
46 * one. Other than that it also added always-on and constant tsc and lapic
47 * timers. Medfield is the platform name, and the chip name is called Penwell
48 * we treat Medfield/Penwell as a variant of Moorestown. Penwell can be
49 * identified via MSRs.
50 */
51enum intel_mid_cpu_type {
52 /* 1 was Moorestown */
53 INTEL_MID_CPU_CHIP_PENWELL = 2,
54};
55
56extern enum intel_mid_cpu_type __intel_mid_cpu_chip;
57
58#ifdef CONFIG_X86_INTEL_MID
59
60static inline enum intel_mid_cpu_type intel_mid_identify_cpu(void)
61{
62 return __intel_mid_cpu_chip;
63}
64
65static inline bool intel_mid_has_msic(void)
66{
67 return (intel_mid_identify_cpu() == INTEL_MID_CPU_CHIP_PENWELL);
68}
69
70#else /* !CONFIG_X86_INTEL_MID */
71
72#define intel_mid_identify_cpu() (0)
73#define intel_mid_has_msic() (0)
74
75#endif /* !CONFIG_X86_INTEL_MID */
76
77enum intel_mid_timer_options {
78 INTEL_MID_TIMER_DEFAULT,
79 INTEL_MID_TIMER_APBT_ONLY,
80 INTEL_MID_TIMER_LAPIC_APBT,
81};
82
83extern enum intel_mid_timer_options intel_mid_timer_options;
84
85/*
86 * Penwell uses spread spectrum clock, so the freq number is not exactly
87 * the same as reported by MSR based on SDM.
88 */
89#define PENWELL_FSB_FREQ_83SKU 83200
90#define PENWELL_FSB_FREQ_100SKU 99840
91
92#define SFI_MTMR_MAX_NUM 8
93#define SFI_MRTC_MAX 8
94
95extern struct console early_mrst_console;
96extern void mrst_early_console_init(void);
97
98extern struct console early_hsu_console;
99extern void hsu_early_console_init(const char *);
100
101extern void intel_scu_devices_create(void);
102extern void intel_scu_devices_destroy(void);
103
104/* VRTC timer */
105#define MRST_VRTC_MAP_SZ (1024)
106/*#define MRST_VRTC_PGOFFSET (0xc00) */
107
108extern void intel_mid_rtc_init(void);
109
110/* the offset for the mapping of global gpio pin to irq */
111#define INTEL_MID_IRQ_OFFSET 0x100
112
113#endif /* _ASM_X86_INTEL_MID_H */
diff --git a/arch/x86/include/asm/mrst-vrtc.h b/arch/x86/include/asm/intel_mid_vrtc.h
index 1e69a75412a4..86ff4685c409 100644
--- a/arch/x86/include/asm/mrst-vrtc.h
+++ b/arch/x86/include/asm/intel_mid_vrtc.h
@@ -1,5 +1,5 @@
1#ifndef _MRST_VRTC_H 1#ifndef _INTEL_MID_VRTC_H
2#define _MRST_VRTC_H 2#define _INTEL_MID_VRTC_H
3 3
4extern unsigned char vrtc_cmos_read(unsigned char reg); 4extern unsigned char vrtc_cmos_read(unsigned char reg);
5extern void vrtc_cmos_write(unsigned char val, unsigned char reg); 5extern void vrtc_cmos_write(unsigned char val, unsigned char reg);
diff --git a/arch/x86/include/asm/local.h b/arch/x86/include/asm/local.h
index 2d89e3980cbd..5b23e605e707 100644
--- a/arch/x86/include/asm/local.h
+++ b/arch/x86/include/asm/local.h
@@ -52,12 +52,7 @@ static inline void local_sub(long i, local_t *l)
52 */ 52 */
53static inline int local_sub_and_test(long i, local_t *l) 53static inline int local_sub_and_test(long i, local_t *l)
54{ 54{
55 unsigned char c; 55 GEN_BINARY_RMWcc(_ASM_SUB, l->a.counter, i, "%0", "e");
56
57 asm volatile(_ASM_SUB "%2,%0; sete %1"
58 : "+m" (l->a.counter), "=qm" (c)
59 : "ir" (i) : "memory");
60 return c;
61} 56}
62 57
63/** 58/**
@@ -70,12 +65,7 @@ static inline int local_sub_and_test(long i, local_t *l)
70 */ 65 */
71static inline int local_dec_and_test(local_t *l) 66static inline int local_dec_and_test(local_t *l)
72{ 67{
73 unsigned char c; 68 GEN_UNARY_RMWcc(_ASM_DEC, l->a.counter, "%0", "e");
74
75 asm volatile(_ASM_DEC "%0; sete %1"
76 : "+m" (l->a.counter), "=qm" (c)
77 : : "memory");
78 return c != 0;
79} 69}
80 70
81/** 71/**
@@ -88,12 +78,7 @@ static inline int local_dec_and_test(local_t *l)
88 */ 78 */
89static inline int local_inc_and_test(local_t *l) 79static inline int local_inc_and_test(local_t *l)
90{ 80{
91 unsigned char c; 81 GEN_UNARY_RMWcc(_ASM_INC, l->a.counter, "%0", "e");
92
93 asm volatile(_ASM_INC "%0; sete %1"
94 : "+m" (l->a.counter), "=qm" (c)
95 : : "memory");
96 return c != 0;
97} 82}
98 83
99/** 84/**
@@ -107,12 +92,7 @@ static inline int local_inc_and_test(local_t *l)
107 */ 92 */
108static inline int local_add_negative(long i, local_t *l) 93static inline int local_add_negative(long i, local_t *l)
109{ 94{
110 unsigned char c; 95 GEN_BINARY_RMWcc(_ASM_ADD, l->a.counter, i, "%0", "s");
111
112 asm volatile(_ASM_ADD "%2,%0; sets %1"
113 : "+m" (l->a.counter), "=qm" (c)
114 : "ir" (i) : "memory");
115 return c;
116} 96}
117 97
118/** 98/**
diff --git a/arch/x86/include/asm/mce.h b/arch/x86/include/asm/mce.h
index cbe6b9e404ce..c696a8687567 100644
--- a/arch/x86/include/asm/mce.h
+++ b/arch/x86/include/asm/mce.h
@@ -16,6 +16,7 @@
16#define MCG_EXT_CNT_SHIFT 16 16#define MCG_EXT_CNT_SHIFT 16
17#define MCG_EXT_CNT(c) (((c) & MCG_EXT_CNT_MASK) >> MCG_EXT_CNT_SHIFT) 17#define MCG_EXT_CNT(c) (((c) & MCG_EXT_CNT_MASK) >> MCG_EXT_CNT_SHIFT)
18#define MCG_SER_P (1ULL<<24) /* MCA recovery/new status bits */ 18#define MCG_SER_P (1ULL<<24) /* MCA recovery/new status bits */
19#define MCG_ELOG_P (1ULL<<26) /* Extended error log supported */
19 20
20/* MCG_STATUS register defines */ 21/* MCG_STATUS register defines */
21#define MCG_STATUS_RIPV (1ULL<<0) /* restart ip valid */ 22#define MCG_STATUS_RIPV (1ULL<<0) /* restart ip valid */
diff --git a/arch/x86/include/asm/misc.h b/arch/x86/include/asm/misc.h
new file mode 100644
index 000000000000..475f5bbc7f53
--- /dev/null
+++ b/arch/x86/include/asm/misc.h
@@ -0,0 +1,6 @@
1#ifndef _ASM_X86_MISC_H
2#define _ASM_X86_MISC_H
3
4int num_digits(int val);
5
6#endif /* _ASM_X86_MISC_H */
diff --git a/arch/x86/include/asm/mrst.h b/arch/x86/include/asm/mrst.h
deleted file mode 100644
index fc18bf3ce7c8..000000000000
--- a/arch/x86/include/asm/mrst.h
+++ /dev/null
@@ -1,81 +0,0 @@
1/*
2 * mrst.h: Intel Moorestown platform specific setup code
3 *
4 * (C) Copyright 2009 Intel Corporation
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; version 2
9 * of the License.
10 */
11#ifndef _ASM_X86_MRST_H
12#define _ASM_X86_MRST_H
13
14#include <linux/sfi.h>
15
16extern int pci_mrst_init(void);
17extern int __init sfi_parse_mrtc(struct sfi_table_header *table);
18extern int sfi_mrtc_num;
19extern struct sfi_rtc_table_entry sfi_mrtc_array[];
20
21/*
22 * Medfield is the follow-up of Moorestown, it combines two chip solution into
23 * one. Other than that it also added always-on and constant tsc and lapic
24 * timers. Medfield is the platform name, and the chip name is called Penwell
25 * we treat Medfield/Penwell as a variant of Moorestown. Penwell can be
26 * identified via MSRs.
27 */
28enum mrst_cpu_type {
29 /* 1 was Moorestown */
30 MRST_CPU_CHIP_PENWELL = 2,
31};
32
33extern enum mrst_cpu_type __mrst_cpu_chip;
34
35#ifdef CONFIG_X86_INTEL_MID
36
37static inline enum mrst_cpu_type mrst_identify_cpu(void)
38{
39 return __mrst_cpu_chip;
40}
41
42#else /* !CONFIG_X86_INTEL_MID */
43
44#define mrst_identify_cpu() (0)
45
46#endif /* !CONFIG_X86_INTEL_MID */
47
48enum mrst_timer_options {
49 MRST_TIMER_DEFAULT,
50 MRST_TIMER_APBT_ONLY,
51 MRST_TIMER_LAPIC_APBT,
52};
53
54extern enum mrst_timer_options mrst_timer_options;
55
56/*
57 * Penwell uses spread spectrum clock, so the freq number is not exactly
58 * the same as reported by MSR based on SDM.
59 */
60#define PENWELL_FSB_FREQ_83SKU 83200
61#define PENWELL_FSB_FREQ_100SKU 99840
62
63#define SFI_MTMR_MAX_NUM 8
64#define SFI_MRTC_MAX 8
65
66extern struct console early_mrst_console;
67extern void mrst_early_console_init(void);
68
69extern struct console early_hsu_console;
70extern void hsu_early_console_init(const char *);
71
72extern void intel_scu_devices_create(void);
73extern void intel_scu_devices_destroy(void);
74
75/* VRTC timer */
76#define MRST_VRTC_MAP_SZ (1024)
77/*#define MRST_VRTC_PGOFFSET (0xc00) */
78
79extern void mrst_rtc_init(void);
80
81#endif /* _ASM_X86_MRST_H */
diff --git a/arch/x86/include/asm/preempt.h b/arch/x86/include/asm/preempt.h
new file mode 100644
index 000000000000..8729723636fd
--- /dev/null
+++ b/arch/x86/include/asm/preempt.h
@@ -0,0 +1,100 @@
1#ifndef __ASM_PREEMPT_H
2#define __ASM_PREEMPT_H
3
4#include <asm/rmwcc.h>
5#include <asm/percpu.h>
6#include <linux/thread_info.h>
7
8DECLARE_PER_CPU(int, __preempt_count);
9
10/*
11 * We mask the PREEMPT_NEED_RESCHED bit so as not to confuse all current users
12 * that think a non-zero value indicates we cannot preempt.
13 */
14static __always_inline int preempt_count(void)
15{
16 return __this_cpu_read_4(__preempt_count) & ~PREEMPT_NEED_RESCHED;
17}
18
19static __always_inline void preempt_count_set(int pc)
20{
21 __this_cpu_write_4(__preempt_count, pc);
22}
23
24/*
25 * must be macros to avoid header recursion hell
26 */
27#define task_preempt_count(p) \
28 (task_thread_info(p)->saved_preempt_count & ~PREEMPT_NEED_RESCHED)
29
30#define init_task_preempt_count(p) do { \
31 task_thread_info(p)->saved_preempt_count = PREEMPT_DISABLED; \
32} while (0)
33
34#define init_idle_preempt_count(p, cpu) do { \
35 task_thread_info(p)->saved_preempt_count = PREEMPT_ENABLED; \
36 per_cpu(__preempt_count, (cpu)) = PREEMPT_ENABLED; \
37} while (0)
38
39/*
40 * We fold the NEED_RESCHED bit into the preempt count such that
41 * preempt_enable() can decrement and test for needing to reschedule with a
42 * single instruction.
43 *
44 * We invert the actual bit, so that when the decrement hits 0 we know we both
45 * need to resched (the bit is cleared) and can resched (no preempt count).
46 */
47
48static __always_inline void set_preempt_need_resched(void)
49{
50 __this_cpu_and_4(__preempt_count, ~PREEMPT_NEED_RESCHED);
51}
52
53static __always_inline void clear_preempt_need_resched(void)
54{
55 __this_cpu_or_4(__preempt_count, PREEMPT_NEED_RESCHED);
56}
57
58static __always_inline bool test_preempt_need_resched(void)
59{
60 return !(__this_cpu_read_4(__preempt_count) & PREEMPT_NEED_RESCHED);
61}
62
63/*
64 * The various preempt_count add/sub methods
65 */
66
67static __always_inline void __preempt_count_add(int val)
68{
69 __this_cpu_add_4(__preempt_count, val);
70}
71
72static __always_inline void __preempt_count_sub(int val)
73{
74 __this_cpu_add_4(__preempt_count, -val);
75}
76
77static __always_inline bool __preempt_count_dec_and_test(void)
78{
79 GEN_UNARY_RMWcc("decl", __preempt_count, __percpu_arg(0), "e");
80}
81
82/*
83 * Returns true when we need to resched and can (barring IRQ state).
84 */
85static __always_inline bool should_resched(void)
86{
87 return unlikely(!__this_cpu_read_4(__preempt_count));
88}
89
90#ifdef CONFIG_PREEMPT
91 extern asmlinkage void ___preempt_schedule(void);
92# define __preempt_schedule() asm ("call ___preempt_schedule")
93 extern asmlinkage void preempt_schedule(void);
94# ifdef CONFIG_CONTEXT_TRACKING
95 extern asmlinkage void ___preempt_schedule_context(void);
96# define __preempt_schedule_context() asm ("call ___preempt_schedule_context")
97# endif
98#endif
99
100#endif /* __ASM_PREEMPT_H */
diff --git a/arch/x86/include/asm/prom.h b/arch/x86/include/asm/prom.h
index bade6ac3b14f..fbeb06ed0eaa 100644
--- a/arch/x86/include/asm/prom.h
+++ b/arch/x86/include/asm/prom.h
@@ -39,10 +39,5 @@ static inline void x86_dtb_init(void) { }
39 39
40extern char cmd_line[COMMAND_LINE_SIZE]; 40extern char cmd_line[COMMAND_LINE_SIZE];
41 41
42#define pci_address_to_pio pci_address_to_pio
43unsigned long pci_address_to_pio(phys_addr_t addr);
44
45#define HAVE_ARCH_DEVTREE_FIXUPS
46
47#endif /* __ASSEMBLY__ */ 42#endif /* __ASSEMBLY__ */
48#endif 43#endif
diff --git a/arch/x86/include/asm/rmwcc.h b/arch/x86/include/asm/rmwcc.h
new file mode 100644
index 000000000000..1ff990f1de8e
--- /dev/null
+++ b/arch/x86/include/asm/rmwcc.h
@@ -0,0 +1,41 @@
1#ifndef _ASM_X86_RMWcc
2#define _ASM_X86_RMWcc
3
4#ifdef CC_HAVE_ASM_GOTO
5
6#define __GEN_RMWcc(fullop, var, cc, ...) \
7do { \
8 asm_volatile_goto (fullop "; j" cc " %l[cc_label]" \
9 : : "m" (var), ## __VA_ARGS__ \
10 : "memory" : cc_label); \
11 return 0; \
12cc_label: \
13 return 1; \
14} while (0)
15
16#define GEN_UNARY_RMWcc(op, var, arg0, cc) \
17 __GEN_RMWcc(op " " arg0, var, cc)
18
19#define GEN_BINARY_RMWcc(op, var, val, arg0, cc) \
20 __GEN_RMWcc(op " %1, " arg0, var, cc, "er" (val))
21
22#else /* !CC_HAVE_ASM_GOTO */
23
24#define __GEN_RMWcc(fullop, var, cc, ...) \
25do { \
26 char c; \
27 asm volatile (fullop "; set" cc " %1" \
28 : "+m" (var), "=qm" (c) \
29 : __VA_ARGS__ : "memory"); \
30 return c != 0; \
31} while (0)
32
33#define GEN_UNARY_RMWcc(op, var, arg0, cc) \
34 __GEN_RMWcc(op " " arg0, var, cc)
35
36#define GEN_BINARY_RMWcc(op, var, val, arg0, cc) \
37 __GEN_RMWcc(op " %2, " arg0, var, cc, "er" (val))
38
39#endif /* CC_HAVE_ASM_GOTO */
40
41#endif /* _ASM_X86_RMWcc */
diff --git a/arch/x86/include/asm/setup.h b/arch/x86/include/asm/setup.h
index 347555492dad..59bcf4e22418 100644
--- a/arch/x86/include/asm/setup.h
+++ b/arch/x86/include/asm/setup.h
@@ -51,9 +51,9 @@ extern void i386_reserve_resources(void);
51extern void setup_default_timer_irq(void); 51extern void setup_default_timer_irq(void);
52 52
53#ifdef CONFIG_X86_INTEL_MID 53#ifdef CONFIG_X86_INTEL_MID
54extern void x86_mrst_early_setup(void); 54extern void x86_intel_mid_early_setup(void);
55#else 55#else
56static inline void x86_mrst_early_setup(void) { } 56static inline void x86_intel_mid_early_setup(void) { }
57#endif 57#endif
58 58
59#ifdef CONFIG_X86_INTEL_CE 59#ifdef CONFIG_X86_INTEL_CE
diff --git a/arch/x86/include/asm/thread_info.h b/arch/x86/include/asm/thread_info.h
index 27811190cbd7..c46a46be1ec6 100644
--- a/arch/x86/include/asm/thread_info.h
+++ b/arch/x86/include/asm/thread_info.h
@@ -28,8 +28,7 @@ struct thread_info {
28 __u32 flags; /* low level flags */ 28 __u32 flags; /* low level flags */
29 __u32 status; /* thread synchronous flags */ 29 __u32 status; /* thread synchronous flags */
30 __u32 cpu; /* current CPU */ 30 __u32 cpu; /* current CPU */
31 int preempt_count; /* 0 => preemptable, 31 int saved_preempt_count;
32 <0 => BUG */
33 mm_segment_t addr_limit; 32 mm_segment_t addr_limit;
34 struct restart_block restart_block; 33 struct restart_block restart_block;
35 void __user *sysenter_return; 34 void __user *sysenter_return;
@@ -49,7 +48,7 @@ struct thread_info {
49 .exec_domain = &default_exec_domain, \ 48 .exec_domain = &default_exec_domain, \
50 .flags = 0, \ 49 .flags = 0, \
51 .cpu = 0, \ 50 .cpu = 0, \
52 .preempt_count = INIT_PREEMPT_COUNT, \ 51 .saved_preempt_count = INIT_PREEMPT_COUNT, \
53 .addr_limit = KERNEL_DS, \ 52 .addr_limit = KERNEL_DS, \
54 .restart_block = { \ 53 .restart_block = { \
55 .fn = do_no_restart_syscall, \ 54 .fn = do_no_restart_syscall, \
diff --git a/arch/x86/include/asm/uaccess.h b/arch/x86/include/asm/uaccess.h
index 5838fa911aa0..8ec57c07b125 100644
--- a/arch/x86/include/asm/uaccess.h
+++ b/arch/x86/include/asm/uaccess.h
@@ -542,5 +542,103 @@ extern struct movsl_mask {
542# include <asm/uaccess_64.h> 542# include <asm/uaccess_64.h>
543#endif 543#endif
544 544
545unsigned long __must_check _copy_from_user(void *to, const void __user *from,
546 unsigned n);
547unsigned long __must_check _copy_to_user(void __user *to, const void *from,
548 unsigned n);
549
550#ifdef CONFIG_DEBUG_STRICT_USER_COPY_CHECKS
551# define copy_user_diag __compiletime_error
552#else
553# define copy_user_diag __compiletime_warning
554#endif
555
556extern void copy_user_diag("copy_from_user() buffer size is too small")
557copy_from_user_overflow(void);
558extern void copy_user_diag("copy_to_user() buffer size is too small")
559copy_to_user_overflow(void) __asm__("copy_from_user_overflow");
560
561#undef copy_user_diag
562
563#ifdef CONFIG_DEBUG_STRICT_USER_COPY_CHECKS
564
565extern void
566__compiletime_warning("copy_from_user() buffer size is not provably correct")
567__copy_from_user_overflow(void) __asm__("copy_from_user_overflow");
568#define __copy_from_user_overflow(size, count) __copy_from_user_overflow()
569
570extern void
571__compiletime_warning("copy_to_user() buffer size is not provably correct")
572__copy_to_user_overflow(void) __asm__("copy_from_user_overflow");
573#define __copy_to_user_overflow(size, count) __copy_to_user_overflow()
574
575#else
576
577static inline void
578__copy_from_user_overflow(int size, unsigned long count)
579{
580 WARN(1, "Buffer overflow detected (%d < %lu)!\n", size, count);
581}
582
583#define __copy_to_user_overflow __copy_from_user_overflow
584
585#endif
586
587static inline unsigned long __must_check
588copy_from_user(void *to, const void __user *from, unsigned long n)
589{
590 int sz = __compiletime_object_size(to);
591
592 might_fault();
593
594 /*
595 * While we would like to have the compiler do the checking for us
596 * even in the non-constant size case, any false positives there are
597 * a problem (especially when DEBUG_STRICT_USER_COPY_CHECKS, but even
598 * without - the [hopefully] dangerous looking nature of the warning
599 * would make people go look at the respecitive call sites over and
600 * over again just to find that there's no problem).
601 *
602 * And there are cases where it's just not realistic for the compiler
603 * to prove the count to be in range. For example when multiple call
604 * sites of a helper function - perhaps in different source files -
605 * all doing proper range checking, yet the helper function not doing
606 * so again.
607 *
608 * Therefore limit the compile time checking to the constant size
609 * case, and do only runtime checking for non-constant sizes.
610 */
611
612 if (likely(sz < 0 || sz >= n))
613 n = _copy_from_user(to, from, n);
614 else if(__builtin_constant_p(n))
615 copy_from_user_overflow();
616 else
617 __copy_from_user_overflow(sz, n);
618
619 return n;
620}
621
622static inline unsigned long __must_check
623copy_to_user(void __user *to, const void *from, unsigned long n)
624{
625 int sz = __compiletime_object_size(from);
626
627 might_fault();
628
629 /* See the comment in copy_from_user() above. */
630 if (likely(sz < 0 || sz >= n))
631 n = _copy_to_user(to, from, n);
632 else if(__builtin_constant_p(n))
633 copy_to_user_overflow();
634 else
635 __copy_to_user_overflow(sz, n);
636
637 return n;
638}
639
640#undef __copy_from_user_overflow
641#undef __copy_to_user_overflow
642
545#endif /* _ASM_X86_UACCESS_H */ 643#endif /* _ASM_X86_UACCESS_H */
546 644
diff --git a/arch/x86/include/asm/uaccess_32.h b/arch/x86/include/asm/uaccess_32.h
index 7f760a9f1f61..3c03a5de64d3 100644
--- a/arch/x86/include/asm/uaccess_32.h
+++ b/arch/x86/include/asm/uaccess_32.h
@@ -184,33 +184,4 @@ __copy_from_user_inatomic_nocache(void *to, const void __user *from,
184 return __copy_from_user_ll_nocache_nozero(to, from, n); 184 return __copy_from_user_ll_nocache_nozero(to, from, n);
185} 185}
186 186
187unsigned long __must_check copy_to_user(void __user *to,
188 const void *from, unsigned long n);
189unsigned long __must_check _copy_from_user(void *to,
190 const void __user *from,
191 unsigned long n);
192
193
194extern void copy_from_user_overflow(void)
195#ifdef CONFIG_DEBUG_STRICT_USER_COPY_CHECKS
196 __compiletime_error("copy_from_user() buffer size is not provably correct")
197#else
198 __compiletime_warning("copy_from_user() buffer size is not provably correct")
199#endif
200;
201
202static inline unsigned long __must_check copy_from_user(void *to,
203 const void __user *from,
204 unsigned long n)
205{
206 int sz = __compiletime_object_size(to);
207
208 if (likely(sz == -1 || sz >= n))
209 n = _copy_from_user(to, from, n);
210 else
211 copy_from_user_overflow();
212
213 return n;
214}
215
216#endif /* _ASM_X86_UACCESS_32_H */ 187#endif /* _ASM_X86_UACCESS_32_H */
diff --git a/arch/x86/include/asm/uaccess_64.h b/arch/x86/include/asm/uaccess_64.h
index 4f7923dd0007..190413d0de57 100644
--- a/arch/x86/include/asm/uaccess_64.h
+++ b/arch/x86/include/asm/uaccess_64.h
@@ -46,42 +46,13 @@ copy_user_generic(void *to, const void *from, unsigned len)
46} 46}
47 47
48__must_check unsigned long 48__must_check unsigned long
49_copy_to_user(void __user *to, const void *from, unsigned len);
50__must_check unsigned long
51_copy_from_user(void *to, const void __user *from, unsigned len);
52__must_check unsigned long
53copy_in_user(void __user *to, const void __user *from, unsigned len); 49copy_in_user(void __user *to, const void __user *from, unsigned len);
54 50
55static inline unsigned long __must_check copy_from_user(void *to,
56 const void __user *from,
57 unsigned long n)
58{
59 int sz = __compiletime_object_size(to);
60
61 might_fault();
62 if (likely(sz == -1 || sz >= n))
63 n = _copy_from_user(to, from, n);
64#ifdef CONFIG_DEBUG_VM
65 else
66 WARN(1, "Buffer overflow detected!\n");
67#endif
68 return n;
69}
70
71static __always_inline __must_check 51static __always_inline __must_check
72int copy_to_user(void __user *dst, const void *src, unsigned size) 52int __copy_from_user_nocheck(void *dst, const void __user *src, unsigned size)
73{
74 might_fault();
75
76 return _copy_to_user(dst, src, size);
77}
78
79static __always_inline __must_check
80int __copy_from_user(void *dst, const void __user *src, unsigned size)
81{ 53{
82 int ret = 0; 54 int ret = 0;
83 55
84 might_fault();
85 if (!__builtin_constant_p(size)) 56 if (!__builtin_constant_p(size))
86 return copy_user_generic(dst, (__force void *)src, size); 57 return copy_user_generic(dst, (__force void *)src, size);
87 switch (size) { 58 switch (size) {
@@ -121,11 +92,17 @@ int __copy_from_user(void *dst, const void __user *src, unsigned size)
121} 92}
122 93
123static __always_inline __must_check 94static __always_inline __must_check
124int __copy_to_user(void __user *dst, const void *src, unsigned size) 95int __copy_from_user(void *dst, const void __user *src, unsigned size)
96{
97 might_fault();
98 return __copy_from_user_nocheck(dst, src, size);
99}
100
101static __always_inline __must_check
102int __copy_to_user_nocheck(void __user *dst, const void *src, unsigned size)
125{ 103{
126 int ret = 0; 104 int ret = 0;
127 105
128 might_fault();
129 if (!__builtin_constant_p(size)) 106 if (!__builtin_constant_p(size))
130 return copy_user_generic((__force void *)dst, src, size); 107 return copy_user_generic((__force void *)dst, src, size);
131 switch (size) { 108 switch (size) {
@@ -165,6 +142,13 @@ int __copy_to_user(void __user *dst, const void *src, unsigned size)
165} 142}
166 143
167static __always_inline __must_check 144static __always_inline __must_check
145int __copy_to_user(void __user *dst, const void *src, unsigned size)
146{
147 might_fault();
148 return __copy_to_user_nocheck(dst, src, size);
149}
150
151static __always_inline __must_check
168int __copy_in_user(void __user *dst, const void __user *src, unsigned size) 152int __copy_in_user(void __user *dst, const void __user *src, unsigned size)
169{ 153{
170 int ret = 0; 154 int ret = 0;
@@ -220,13 +204,13 @@ int __copy_in_user(void __user *dst, const void __user *src, unsigned size)
220static __must_check __always_inline int 204static __must_check __always_inline int
221__copy_from_user_inatomic(void *dst, const void __user *src, unsigned size) 205__copy_from_user_inatomic(void *dst, const void __user *src, unsigned size)
222{ 206{
223 return copy_user_generic(dst, (__force const void *)src, size); 207 return __copy_from_user_nocheck(dst, (__force const void *)src, size);
224} 208}
225 209
226static __must_check __always_inline int 210static __must_check __always_inline int
227__copy_to_user_inatomic(void __user *dst, const void *src, unsigned size) 211__copy_to_user_inatomic(void __user *dst, const void *src, unsigned size)
228{ 212{
229 return copy_user_generic((__force void *)dst, src, size); 213 return __copy_to_user_nocheck((__force void *)dst, src, size);
230} 214}
231 215
232extern long __copy_user_nocache(void *dst, const void __user *src, 216extern long __copy_user_nocache(void *dst, const void __user *src,
diff --git a/arch/x86/include/asm/uprobes.h b/arch/x86/include/asm/uprobes.h
index 6e5197910fd8..3087ea9c5f2e 100644
--- a/arch/x86/include/asm/uprobes.h
+++ b/arch/x86/include/asm/uprobes.h
@@ -35,7 +35,10 @@ typedef u8 uprobe_opcode_t;
35 35
36struct arch_uprobe { 36struct arch_uprobe {
37 u16 fixups; 37 u16 fixups;
38 u8 insn[MAX_UINSN_BYTES]; 38 union {
39 u8 insn[MAX_UINSN_BYTES];
40 u8 ixol[MAX_UINSN_BYTES];
41 };
39#ifdef CONFIG_X86_64 42#ifdef CONFIG_X86_64
40 unsigned long rip_rela_target_address; 43 unsigned long rip_rela_target_address;
41#endif 44#endif
@@ -49,11 +52,4 @@ struct arch_uprobe_task {
49 unsigned int saved_tf; 52 unsigned int saved_tf;
50}; 53};
51 54
52extern int arch_uprobe_analyze_insn(struct arch_uprobe *aup, struct mm_struct *mm, unsigned long addr);
53extern int arch_uprobe_pre_xol(struct arch_uprobe *aup, struct pt_regs *regs);
54extern int arch_uprobe_post_xol(struct arch_uprobe *aup, struct pt_regs *regs);
55extern bool arch_uprobe_xol_was_trapped(struct task_struct *tsk);
56extern int arch_uprobe_exception_notify(struct notifier_block *self, unsigned long val, void *data);
57extern void arch_uprobe_abort_xol(struct arch_uprobe *aup, struct pt_regs *regs);
58extern unsigned long arch_uretprobe_hijack_return_addr(unsigned long trampoline_vaddr, struct pt_regs *regs);
59#endif /* _ASM_UPROBES_H */ 55#endif /* _ASM_UPROBES_H */
diff --git a/arch/x86/include/asm/uv/uv.h b/arch/x86/include/asm/uv/uv.h
index 062921ef34e9..6b964a0b86d1 100644
--- a/arch/x86/include/asm/uv/uv.h
+++ b/arch/x86/include/asm/uv/uv.h
@@ -12,6 +12,7 @@ extern enum uv_system_type get_uv_system_type(void);
12extern int is_uv_system(void); 12extern int is_uv_system(void);
13extern void uv_cpu_init(void); 13extern void uv_cpu_init(void);
14extern void uv_nmi_init(void); 14extern void uv_nmi_init(void);
15extern void uv_register_nmi_notifier(void);
15extern void uv_system_init(void); 16extern void uv_system_init(void);
16extern const struct cpumask *uv_flush_tlb_others(const struct cpumask *cpumask, 17extern const struct cpumask *uv_flush_tlb_others(const struct cpumask *cpumask,
17 struct mm_struct *mm, 18 struct mm_struct *mm,
@@ -25,6 +26,7 @@ static inline enum uv_system_type get_uv_system_type(void) { return UV_NONE; }
25static inline int is_uv_system(void) { return 0; } 26static inline int is_uv_system(void) { return 0; }
26static inline void uv_cpu_init(void) { } 27static inline void uv_cpu_init(void) { }
27static inline void uv_system_init(void) { } 28static inline void uv_system_init(void) { }
29static inline void uv_register_nmi_notifier(void) { }
28static inline const struct cpumask * 30static inline const struct cpumask *
29uv_flush_tlb_others(const struct cpumask *cpumask, struct mm_struct *mm, 31uv_flush_tlb_others(const struct cpumask *cpumask, struct mm_struct *mm,
30 unsigned long start, unsigned long end, unsigned int cpu) 32 unsigned long start, unsigned long end, unsigned int cpu)
diff --git a/arch/x86/include/asm/uv/uv_hub.h b/arch/x86/include/asm/uv/uv_hub.h
index 2c32df95bb78..a30836c8ac4d 100644
--- a/arch/x86/include/asm/uv/uv_hub.h
+++ b/arch/x86/include/asm/uv/uv_hub.h
@@ -502,8 +502,8 @@ struct uv_blade_info {
502 unsigned short nr_online_cpus; 502 unsigned short nr_online_cpus;
503 unsigned short pnode; 503 unsigned short pnode;
504 short memory_nid; 504 short memory_nid;
505 spinlock_t nmi_lock; 505 spinlock_t nmi_lock; /* obsolete, see uv_hub_nmi */
506 unsigned long nmi_count; 506 unsigned long nmi_count; /* obsolete, see uv_hub_nmi */
507}; 507};
508extern struct uv_blade_info *uv_blade_info; 508extern struct uv_blade_info *uv_blade_info;
509extern short *uv_node_to_blade; 509extern short *uv_node_to_blade;
@@ -576,6 +576,59 @@ static inline int uv_num_possible_blades(void)
576 return uv_possible_blades; 576 return uv_possible_blades;
577} 577}
578 578
579/* Per Hub NMI support */
580extern void uv_nmi_setup(void);
581
582/* BMC sets a bit this MMR non-zero before sending an NMI */
583#define UVH_NMI_MMR UVH_SCRATCH5
584#define UVH_NMI_MMR_CLEAR UVH_SCRATCH5_ALIAS
585#define UVH_NMI_MMR_SHIFT 63
586#define UVH_NMI_MMR_TYPE "SCRATCH5"
587
588/* Newer SMM NMI handler, not present in all systems */
589#define UVH_NMI_MMRX UVH_EVENT_OCCURRED0
590#define UVH_NMI_MMRX_CLEAR UVH_EVENT_OCCURRED0_ALIAS
591#define UVH_NMI_MMRX_SHIFT (is_uv1_hub() ? \
592 UV1H_EVENT_OCCURRED0_EXTIO_INT0_SHFT :\
593 UVXH_EVENT_OCCURRED0_EXTIO_INT0_SHFT)
594#define UVH_NMI_MMRX_TYPE "EXTIO_INT0"
595
596/* Non-zero indicates newer SMM NMI handler present */
597#define UVH_NMI_MMRX_SUPPORTED UVH_EXTIO_INT0_BROADCAST
598
599/* Indicates to BIOS that we want to use the newer SMM NMI handler */
600#define UVH_NMI_MMRX_REQ UVH_SCRATCH5_ALIAS_2
601#define UVH_NMI_MMRX_REQ_SHIFT 62
602
603struct uv_hub_nmi_s {
604 raw_spinlock_t nmi_lock;
605 atomic_t in_nmi; /* flag this node in UV NMI IRQ */
606 atomic_t cpu_owner; /* last locker of this struct */
607 atomic_t read_mmr_count; /* count of MMR reads */
608 atomic_t nmi_count; /* count of true UV NMIs */
609 unsigned long nmi_value; /* last value read from NMI MMR */
610};
611
612struct uv_cpu_nmi_s {
613 struct uv_hub_nmi_s *hub;
614 atomic_t state;
615 atomic_t pinging;
616 int queries;
617 int pings;
618};
619
620DECLARE_PER_CPU(struct uv_cpu_nmi_s, __uv_cpu_nmi);
621#define uv_cpu_nmi (__get_cpu_var(__uv_cpu_nmi))
622#define uv_hub_nmi (uv_cpu_nmi.hub)
623#define uv_cpu_nmi_per(cpu) (per_cpu(__uv_cpu_nmi, cpu))
624#define uv_hub_nmi_per(cpu) (uv_cpu_nmi_per(cpu).hub)
625
626/* uv_cpu_nmi_states */
627#define UV_NMI_STATE_OUT 0
628#define UV_NMI_STATE_IN 1
629#define UV_NMI_STATE_DUMP 2
630#define UV_NMI_STATE_DUMP_DONE 3
631
579/* Update SCIR state */ 632/* Update SCIR state */
580static inline void uv_set_scir_bits(unsigned char value) 633static inline void uv_set_scir_bits(unsigned char value)
581{ 634{
diff --git a/arch/x86/include/asm/uv/uv_mmrs.h b/arch/x86/include/asm/uv/uv_mmrs.h
index bd5f80e58a23..e42249bcf7e1 100644
--- a/arch/x86/include/asm/uv/uv_mmrs.h
+++ b/arch/x86/include/asm/uv/uv_mmrs.h
@@ -461,6 +461,23 @@ union uvh_event_occurred0_u {
461 461
462 462
463/* ========================================================================= */ 463/* ========================================================================= */
464/* UVH_EXTIO_INT0_BROADCAST */
465/* ========================================================================= */
466#define UVH_EXTIO_INT0_BROADCAST 0x61448UL
467#define UVH_EXTIO_INT0_BROADCAST_32 0x3f0
468
469#define UVH_EXTIO_INT0_BROADCAST_ENABLE_SHFT 0
470#define UVH_EXTIO_INT0_BROADCAST_ENABLE_MASK 0x0000000000000001UL
471
472union uvh_extio_int0_broadcast_u {
473 unsigned long v;
474 struct uvh_extio_int0_broadcast_s {
475 unsigned long enable:1; /* RW */
476 unsigned long rsvd_1_63:63;
477 } s;
478};
479
480/* ========================================================================= */
464/* UVH_GR0_TLB_INT0_CONFIG */ 481/* UVH_GR0_TLB_INT0_CONFIG */
465/* ========================================================================= */ 482/* ========================================================================= */
466#define UVH_GR0_TLB_INT0_CONFIG 0x61b00UL 483#define UVH_GR0_TLB_INT0_CONFIG 0x61b00UL
@@ -2606,6 +2623,20 @@ union uvh_scratch5_u {
2606}; 2623};
2607 2624
2608/* ========================================================================= */ 2625/* ========================================================================= */
2626/* UVH_SCRATCH5_ALIAS */
2627/* ========================================================================= */
2628#define UVH_SCRATCH5_ALIAS 0x2d0208UL
2629#define UVH_SCRATCH5_ALIAS_32 0x780
2630
2631
2632/* ========================================================================= */
2633/* UVH_SCRATCH5_ALIAS_2 */
2634/* ========================================================================= */
2635#define UVH_SCRATCH5_ALIAS_2 0x2d0210UL
2636#define UVH_SCRATCH5_ALIAS_2_32 0x788
2637
2638
2639/* ========================================================================= */
2609/* UVXH_EVENT_OCCURRED2 */ 2640/* UVXH_EVENT_OCCURRED2 */
2610/* ========================================================================= */ 2641/* ========================================================================= */
2611#define UVXH_EVENT_OCCURRED2 0x70100UL 2642#define UVXH_EVENT_OCCURRED2 0x70100UL
diff --git a/arch/x86/include/uapi/asm/bootparam.h b/arch/x86/include/uapi/asm/bootparam.h
index c15ddaf90710..9c3733c5f8f7 100644
--- a/arch/x86/include/uapi/asm/bootparam.h
+++ b/arch/x86/include/uapi/asm/bootparam.h
@@ -158,7 +158,7 @@ enum {
158 X86_SUBARCH_PC = 0, 158 X86_SUBARCH_PC = 0,
159 X86_SUBARCH_LGUEST, 159 X86_SUBARCH_LGUEST,
160 X86_SUBARCH_XEN, 160 X86_SUBARCH_XEN,
161 X86_SUBARCH_MRST, 161 X86_SUBARCH_INTEL_MID,
162 X86_SUBARCH_CE4100, 162 X86_SUBARCH_CE4100,
163 X86_NR_SUBARCHS, 163 X86_NR_SUBARCHS,
164}; 164};
diff --git a/arch/x86/include/uapi/asm/hyperv.h b/arch/x86/include/uapi/asm/hyperv.h
index b80420bcd09d..b8f1c0176cbc 100644
--- a/arch/x86/include/uapi/asm/hyperv.h
+++ b/arch/x86/include/uapi/asm/hyperv.h
@@ -27,6 +27,19 @@
27#define HV_X64_MSR_VP_RUNTIME_AVAILABLE (1 << 0) 27#define HV_X64_MSR_VP_RUNTIME_AVAILABLE (1 << 0)
28/* Partition Reference Counter (HV_X64_MSR_TIME_REF_COUNT) available*/ 28/* Partition Reference Counter (HV_X64_MSR_TIME_REF_COUNT) available*/
29#define HV_X64_MSR_TIME_REF_COUNT_AVAILABLE (1 << 1) 29#define HV_X64_MSR_TIME_REF_COUNT_AVAILABLE (1 << 1)
30
31/*
32 * There is a single feature flag that signifies the presence of the MSR
33 * that can be used to retrieve both the local APIC Timer frequency as
34 * well as the TSC frequency.
35 */
36
37/* Local APIC timer frequency MSR (HV_X64_MSR_APIC_FREQUENCY) is available */
38#define HV_X64_MSR_APIC_FREQUENCY_AVAILABLE (1 << 11)
39
40/* TSC frequency MSR (HV_X64_MSR_TSC_FREQUENCY) is available */
41#define HV_X64_MSR_TSC_FREQUENCY_AVAILABLE (1 << 11)
42
30/* 43/*
31 * Basic SynIC MSRs (HV_X64_MSR_SCONTROL through HV_X64_MSR_EOM 44 * Basic SynIC MSRs (HV_X64_MSR_SCONTROL through HV_X64_MSR_EOM
32 * and HV_X64_MSR_SINT0 through HV_X64_MSR_SINT15) available 45 * and HV_X64_MSR_SINT0 through HV_X64_MSR_SINT15) available
@@ -136,6 +149,12 @@
136/* MSR used to read the per-partition time reference counter */ 149/* MSR used to read the per-partition time reference counter */
137#define HV_X64_MSR_TIME_REF_COUNT 0x40000020 150#define HV_X64_MSR_TIME_REF_COUNT 0x40000020
138 151
152/* MSR used to retrieve the TSC frequency */
153#define HV_X64_MSR_TSC_FREQUENCY 0x40000022
154
155/* MSR used to retrieve the local APIC timer frequency */
156#define HV_X64_MSR_APIC_FREQUENCY 0x40000023
157
139/* Define the virtual APIC registers */ 158/* Define the virtual APIC registers */
140#define HV_X64_MSR_EOI 0x40000070 159#define HV_X64_MSR_EOI 0x40000070
141#define HV_X64_MSR_ICR 0x40000071 160#define HV_X64_MSR_ICR 0x40000071
diff --git a/arch/x86/kernel/Makefile b/arch/x86/kernel/Makefile
index a5408b965c9d..9b0a34e2cd79 100644
--- a/arch/x86/kernel/Makefile
+++ b/arch/x86/kernel/Makefile
@@ -36,6 +36,8 @@ obj-y += tsc.o io_delay.o rtc.o
36obj-y += pci-iommu_table.o 36obj-y += pci-iommu_table.o
37obj-y += resource.o 37obj-y += resource.o
38 38
39obj-$(CONFIG_PREEMPT) += preempt.o
40
39obj-y += process.o 41obj-y += process.o
40obj-y += i387.o xsave.o 42obj-y += i387.o xsave.o
41obj-y += ptrace.o 43obj-y += ptrace.o
diff --git a/arch/x86/kernel/apb_timer.c b/arch/x86/kernel/apb_timer.c
index c9876efecafb..af5b08ab3b71 100644
--- a/arch/x86/kernel/apb_timer.c
+++ b/arch/x86/kernel/apb_timer.c
@@ -40,7 +40,7 @@
40 40
41#include <asm/fixmap.h> 41#include <asm/fixmap.h>
42#include <asm/apb_timer.h> 42#include <asm/apb_timer.h>
43#include <asm/mrst.h> 43#include <asm/intel-mid.h>
44#include <asm/time.h> 44#include <asm/time.h>
45 45
46#define APBT_CLOCKEVENT_RATING 110 46#define APBT_CLOCKEVENT_RATING 110
@@ -157,13 +157,13 @@ static int __init apbt_clockevent_register(void)
157 157
158 adev->num = smp_processor_id(); 158 adev->num = smp_processor_id();
159 adev->timer = dw_apb_clockevent_init(smp_processor_id(), "apbt0", 159 adev->timer = dw_apb_clockevent_init(smp_processor_id(), "apbt0",
160 mrst_timer_options == MRST_TIMER_LAPIC_APBT ? 160 intel_mid_timer_options == INTEL_MID_TIMER_LAPIC_APBT ?
161 APBT_CLOCKEVENT_RATING - 100 : APBT_CLOCKEVENT_RATING, 161 APBT_CLOCKEVENT_RATING - 100 : APBT_CLOCKEVENT_RATING,
162 adev_virt_addr(adev), 0, apbt_freq); 162 adev_virt_addr(adev), 0, apbt_freq);
163 /* Firmware does EOI handling for us. */ 163 /* Firmware does EOI handling for us. */
164 adev->timer->eoi = NULL; 164 adev->timer->eoi = NULL;
165 165
166 if (mrst_timer_options == MRST_TIMER_LAPIC_APBT) { 166 if (intel_mid_timer_options == INTEL_MID_TIMER_LAPIC_APBT) {
167 global_clock_event = &adev->timer->ced; 167 global_clock_event = &adev->timer->ced;
168 printk(KERN_DEBUG "%s clockevent registered as global\n", 168 printk(KERN_DEBUG "%s clockevent registered as global\n",
169 global_clock_event->name); 169 global_clock_event->name);
@@ -253,7 +253,7 @@ static int apbt_cpuhp_notify(struct notifier_block *n,
253 253
254static __init int apbt_late_init(void) 254static __init int apbt_late_init(void)
255{ 255{
256 if (mrst_timer_options == MRST_TIMER_LAPIC_APBT || 256 if (intel_mid_timer_options == INTEL_MID_TIMER_LAPIC_APBT ||
257 !apb_timer_block_enabled) 257 !apb_timer_block_enabled)
258 return 0; 258 return 0;
259 /* This notifier should be called after workqueue is ready */ 259 /* This notifier should be called after workqueue is ready */
@@ -340,7 +340,7 @@ void __init apbt_time_init(void)
340 } 340 }
341#ifdef CONFIG_SMP 341#ifdef CONFIG_SMP
342 /* kernel cmdline disable apb timer, so we will use lapic timers */ 342 /* kernel cmdline disable apb timer, so we will use lapic timers */
343 if (mrst_timer_options == MRST_TIMER_LAPIC_APBT) { 343 if (intel_mid_timer_options == INTEL_MID_TIMER_LAPIC_APBT) {
344 printk(KERN_INFO "apbt: disabled per cpu timer\n"); 344 printk(KERN_INFO "apbt: disabled per cpu timer\n");
345 return; 345 return;
346 } 346 }
diff --git a/arch/x86/kernel/apic/x2apic_uv_x.c b/arch/x86/kernel/apic/x2apic_uv_x.c
index a419814cea57..ad0dc0428baf 100644
--- a/arch/x86/kernel/apic/x2apic_uv_x.c
+++ b/arch/x86/kernel/apic/x2apic_uv_x.c
@@ -39,12 +39,6 @@
39#include <asm/x86_init.h> 39#include <asm/x86_init.h>
40#include <asm/nmi.h> 40#include <asm/nmi.h>
41 41
42/* BMC sets a bit this MMR non-zero before sending an NMI */
43#define UVH_NMI_MMR UVH_SCRATCH5
44#define UVH_NMI_MMR_CLEAR (UVH_NMI_MMR + 8)
45#define UV_NMI_PENDING_MASK (1UL << 63)
46DEFINE_PER_CPU(unsigned long, cpu_last_nmi_count);
47
48DEFINE_PER_CPU(int, x2apic_extra_bits); 42DEFINE_PER_CPU(int, x2apic_extra_bits);
49 43
50#define PR_DEVEL(fmt, args...) pr_devel("%s: " fmt, __func__, args) 44#define PR_DEVEL(fmt, args...) pr_devel("%s: " fmt, __func__, args)
@@ -58,7 +52,6 @@ int uv_min_hub_revision_id;
58EXPORT_SYMBOL_GPL(uv_min_hub_revision_id); 52EXPORT_SYMBOL_GPL(uv_min_hub_revision_id);
59unsigned int uv_apicid_hibits; 53unsigned int uv_apicid_hibits;
60EXPORT_SYMBOL_GPL(uv_apicid_hibits); 54EXPORT_SYMBOL_GPL(uv_apicid_hibits);
61static DEFINE_SPINLOCK(uv_nmi_lock);
62 55
63static struct apic apic_x2apic_uv_x; 56static struct apic apic_x2apic_uv_x;
64 57
@@ -847,68 +840,6 @@ void uv_cpu_init(void)
847 set_x2apic_extra_bits(uv_hub_info->pnode); 840 set_x2apic_extra_bits(uv_hub_info->pnode);
848} 841}
849 842
850/*
851 * When NMI is received, print a stack trace.
852 */
853int uv_handle_nmi(unsigned int reason, struct pt_regs *regs)
854{
855 unsigned long real_uv_nmi;
856 int bid;
857
858 /*
859 * Each blade has an MMR that indicates when an NMI has been sent
860 * to cpus on the blade. If an NMI is detected, atomically
861 * clear the MMR and update a per-blade NMI count used to
862 * cause each cpu on the blade to notice a new NMI.
863 */
864 bid = uv_numa_blade_id();
865 real_uv_nmi = (uv_read_local_mmr(UVH_NMI_MMR) & UV_NMI_PENDING_MASK);
866
867 if (unlikely(real_uv_nmi)) {
868 spin_lock(&uv_blade_info[bid].nmi_lock);
869 real_uv_nmi = (uv_read_local_mmr(UVH_NMI_MMR) & UV_NMI_PENDING_MASK);
870 if (real_uv_nmi) {
871 uv_blade_info[bid].nmi_count++;
872 uv_write_local_mmr(UVH_NMI_MMR_CLEAR, UV_NMI_PENDING_MASK);
873 }
874 spin_unlock(&uv_blade_info[bid].nmi_lock);
875 }
876
877 if (likely(__get_cpu_var(cpu_last_nmi_count) == uv_blade_info[bid].nmi_count))
878 return NMI_DONE;
879
880 __get_cpu_var(cpu_last_nmi_count) = uv_blade_info[bid].nmi_count;
881
882 /*
883 * Use a lock so only one cpu prints at a time.
884 * This prevents intermixed output.
885 */
886 spin_lock(&uv_nmi_lock);
887 pr_info("UV NMI stack dump cpu %u:\n", smp_processor_id());
888 dump_stack();
889 spin_unlock(&uv_nmi_lock);
890
891 return NMI_HANDLED;
892}
893
894void uv_register_nmi_notifier(void)
895{
896 if (register_nmi_handler(NMI_UNKNOWN, uv_handle_nmi, 0, "uv"))
897 printk(KERN_WARNING "UV NMI handler failed to register\n");
898}
899
900void uv_nmi_init(void)
901{
902 unsigned int value;
903
904 /*
905 * Unmask NMI on all cpus
906 */
907 value = apic_read(APIC_LVT1) | APIC_DM_NMI;
908 value &= ~APIC_LVT_MASKED;
909 apic_write(APIC_LVT1, value);
910}
911
912void __init uv_system_init(void) 843void __init uv_system_init(void)
913{ 844{
914 union uvh_rh_gam_config_mmr_u m_n_config; 845 union uvh_rh_gam_config_mmr_u m_n_config;
@@ -1046,6 +977,7 @@ void __init uv_system_init(void)
1046 map_mmr_high(max_pnode); 977 map_mmr_high(max_pnode);
1047 map_mmioh_high(min_pnode, max_pnode); 978 map_mmioh_high(min_pnode, max_pnode);
1048 979
980 uv_nmi_setup();
1049 uv_cpu_init(); 981 uv_cpu_init();
1050 uv_scir_register_cpu_notifier(); 982 uv_scir_register_cpu_notifier();
1051 uv_register_nmi_notifier(); 983 uv_register_nmi_notifier();
diff --git a/arch/x86/kernel/asm-offsets.c b/arch/x86/kernel/asm-offsets.c
index 28610822fb3c..9f6b9341950f 100644
--- a/arch/x86/kernel/asm-offsets.c
+++ b/arch/x86/kernel/asm-offsets.c
@@ -32,7 +32,6 @@ void common(void) {
32 OFFSET(TI_flags, thread_info, flags); 32 OFFSET(TI_flags, thread_info, flags);
33 OFFSET(TI_status, thread_info, status); 33 OFFSET(TI_status, thread_info, status);
34 OFFSET(TI_addr_limit, thread_info, addr_limit); 34 OFFSET(TI_addr_limit, thread_info, addr_limit);
35 OFFSET(TI_preempt_count, thread_info, preempt_count);
36 35
37 BLANK(); 36 BLANK();
38 OFFSET(crypto_tfm_ctx_offset, crypto_tfm, __crt_ctx); 37 OFFSET(crypto_tfm_ctx_offset, crypto_tfm, __crt_ctx);
diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c
index 903a264af981..3daece79a142 100644
--- a/arch/x86/kernel/cpu/amd.c
+++ b/arch/x86/kernel/cpu/amd.c
@@ -823,8 +823,8 @@ static const struct cpu_dev amd_cpu_dev = {
823 .c_vendor = "AMD", 823 .c_vendor = "AMD",
824 .c_ident = { "AuthenticAMD" }, 824 .c_ident = { "AuthenticAMD" },
825#ifdef CONFIG_X86_32 825#ifdef CONFIG_X86_32
826 .c_models = { 826 .legacy_models = {
827 { .vendor = X86_VENDOR_AMD, .family = 4, .model_names = 827 { .family = 4, .model_names =
828 { 828 {
829 [3] = "486 DX/2", 829 [3] = "486 DX/2",
830 [7] = "486 DX/2-WB", 830 [7] = "486 DX/2-WB",
@@ -835,7 +835,7 @@ static const struct cpu_dev amd_cpu_dev = {
835 } 835 }
836 }, 836 },
837 }, 837 },
838 .c_size_cache = amd_size_cache, 838 .legacy_cache_size = amd_size_cache,
839#endif 839#endif
840 .c_early_init = early_init_amd, 840 .c_early_init = early_init_amd,
841 .c_detect_tlb = cpu_detect_tlb_amd, 841 .c_detect_tlb = cpu_detect_tlb_amd,
diff --git a/arch/x86/kernel/cpu/centaur.c b/arch/x86/kernel/cpu/centaur.c
index fbf6c3bc2400..8d5652dc99dd 100644
--- a/arch/x86/kernel/cpu/centaur.c
+++ b/arch/x86/kernel/cpu/centaur.c
@@ -468,10 +468,10 @@ static void init_centaur(struct cpuinfo_x86 *c)
468#endif 468#endif
469} 469}
470 470
471#ifdef CONFIG_X86_32
471static unsigned int 472static unsigned int
472centaur_size_cache(struct cpuinfo_x86 *c, unsigned int size) 473centaur_size_cache(struct cpuinfo_x86 *c, unsigned int size)
473{ 474{
474#ifdef CONFIG_X86_32
475 /* VIA C3 CPUs (670-68F) need further shifting. */ 475 /* VIA C3 CPUs (670-68F) need further shifting. */
476 if ((c->x86 == 6) && ((c->x86_model == 7) || (c->x86_model == 8))) 476 if ((c->x86 == 6) && ((c->x86_model == 7) || (c->x86_model == 8)))
477 size >>= 8; 477 size >>= 8;
@@ -484,16 +484,18 @@ centaur_size_cache(struct cpuinfo_x86 *c, unsigned int size)
484 if ((c->x86 == 6) && (c->x86_model == 9) && 484 if ((c->x86 == 6) && (c->x86_model == 9) &&
485 (c->x86_mask == 1) && (size == 65)) 485 (c->x86_mask == 1) && (size == 65))
486 size -= 1; 486 size -= 1;
487#endif
488 return size; 487 return size;
489} 488}
489#endif
490 490
491static const struct cpu_dev centaur_cpu_dev = { 491static const struct cpu_dev centaur_cpu_dev = {
492 .c_vendor = "Centaur", 492 .c_vendor = "Centaur",
493 .c_ident = { "CentaurHauls" }, 493 .c_ident = { "CentaurHauls" },
494 .c_early_init = early_init_centaur, 494 .c_early_init = early_init_centaur,
495 .c_init = init_centaur, 495 .c_init = init_centaur,
496 .c_size_cache = centaur_size_cache, 496#ifdef CONFIG_X86_32
497 .legacy_cache_size = centaur_size_cache,
498#endif
497 .c_x86_vendor = X86_VENDOR_CENTAUR, 499 .c_x86_vendor = X86_VENDOR_CENTAUR,
498}; 500};
499 501
diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
index 2793d1f095a2..6abc172b8258 100644
--- a/arch/x86/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu/common.c
@@ -346,7 +346,8 @@ static void filter_cpuid_features(struct cpuinfo_x86 *c, bool warn)
346/* Look up CPU names by table lookup. */ 346/* Look up CPU names by table lookup. */
347static const char *table_lookup_model(struct cpuinfo_x86 *c) 347static const char *table_lookup_model(struct cpuinfo_x86 *c)
348{ 348{
349 const struct cpu_model_info *info; 349#ifdef CONFIG_X86_32
350 const struct legacy_cpu_model_info *info;
350 351
351 if (c->x86_model >= 16) 352 if (c->x86_model >= 16)
352 return NULL; /* Range check */ 353 return NULL; /* Range check */
@@ -354,13 +355,14 @@ static const char *table_lookup_model(struct cpuinfo_x86 *c)
354 if (!this_cpu) 355 if (!this_cpu)
355 return NULL; 356 return NULL;
356 357
357 info = this_cpu->c_models; 358 info = this_cpu->legacy_models;
358 359
359 while (info && info->family) { 360 while (info->family) {
360 if (info->family == c->x86) 361 if (info->family == c->x86)
361 return info->model_names[c->x86_model]; 362 return info->model_names[c->x86_model];
362 info++; 363 info++;
363 } 364 }
365#endif
364 return NULL; /* Not found */ 366 return NULL; /* Not found */
365} 367}
366 368
@@ -450,8 +452,8 @@ void cpu_detect_cache_sizes(struct cpuinfo_x86 *c)
450 c->x86_tlbsize += ((ebx >> 16) & 0xfff) + (ebx & 0xfff); 452 c->x86_tlbsize += ((ebx >> 16) & 0xfff) + (ebx & 0xfff);
451#else 453#else
452 /* do processor-specific cache resizing */ 454 /* do processor-specific cache resizing */
453 if (this_cpu->c_size_cache) 455 if (this_cpu->legacy_cache_size)
454 l2size = this_cpu->c_size_cache(c, l2size); 456 l2size = this_cpu->legacy_cache_size(c, l2size);
455 457
456 /* Allow user to override all this if necessary. */ 458 /* Allow user to override all this if necessary. */
457 if (cachesize_override != -1) 459 if (cachesize_override != -1)
@@ -1095,6 +1097,9 @@ DEFINE_PER_CPU(char *, irq_stack_ptr) =
1095 1097
1096DEFINE_PER_CPU(unsigned int, irq_count) __visible = -1; 1098DEFINE_PER_CPU(unsigned int, irq_count) __visible = -1;
1097 1099
1100DEFINE_PER_CPU(int, __preempt_count) = INIT_PREEMPT_COUNT;
1101EXPORT_PER_CPU_SYMBOL(__preempt_count);
1102
1098DEFINE_PER_CPU(struct task_struct *, fpu_owner_task); 1103DEFINE_PER_CPU(struct task_struct *, fpu_owner_task);
1099 1104
1100/* 1105/*
@@ -1169,6 +1174,8 @@ void debug_stack_reset(void)
1169 1174
1170DEFINE_PER_CPU(struct task_struct *, current_task) = &init_task; 1175DEFINE_PER_CPU(struct task_struct *, current_task) = &init_task;
1171EXPORT_PER_CPU_SYMBOL(current_task); 1176EXPORT_PER_CPU_SYMBOL(current_task);
1177DEFINE_PER_CPU(int, __preempt_count) = INIT_PREEMPT_COUNT;
1178EXPORT_PER_CPU_SYMBOL(__preempt_count);
1172DEFINE_PER_CPU(struct task_struct *, fpu_owner_task); 1179DEFINE_PER_CPU(struct task_struct *, fpu_owner_task);
1173 1180
1174#ifdef CONFIG_CC_STACKPROTECTOR 1181#ifdef CONFIG_CC_STACKPROTECTOR
diff --git a/arch/x86/kernel/cpu/cpu.h b/arch/x86/kernel/cpu/cpu.h
index 4041c24ae7db..c37dc37e8317 100644
--- a/arch/x86/kernel/cpu/cpu.h
+++ b/arch/x86/kernel/cpu/cpu.h
@@ -1,12 +1,6 @@
1#ifndef ARCH_X86_CPU_H 1#ifndef ARCH_X86_CPU_H
2#define ARCH_X86_CPU_H 2#define ARCH_X86_CPU_H
3 3
4struct cpu_model_info {
5 int vendor;
6 int family;
7 const char *model_names[16];
8};
9
10/* attempt to consolidate cpu attributes */ 4/* attempt to consolidate cpu attributes */
11struct cpu_dev { 5struct cpu_dev {
12 const char *c_vendor; 6 const char *c_vendor;
@@ -14,15 +8,23 @@ struct cpu_dev {
14 /* some have two possibilities for cpuid string */ 8 /* some have two possibilities for cpuid string */
15 const char *c_ident[2]; 9 const char *c_ident[2];
16 10
17 struct cpu_model_info c_models[4];
18
19 void (*c_early_init)(struct cpuinfo_x86 *); 11 void (*c_early_init)(struct cpuinfo_x86 *);
20 void (*c_bsp_init)(struct cpuinfo_x86 *); 12 void (*c_bsp_init)(struct cpuinfo_x86 *);
21 void (*c_init)(struct cpuinfo_x86 *); 13 void (*c_init)(struct cpuinfo_x86 *);
22 void (*c_identify)(struct cpuinfo_x86 *); 14 void (*c_identify)(struct cpuinfo_x86 *);
23 void (*c_detect_tlb)(struct cpuinfo_x86 *); 15 void (*c_detect_tlb)(struct cpuinfo_x86 *);
24 unsigned int (*c_size_cache)(struct cpuinfo_x86 *, unsigned int);
25 int c_x86_vendor; 16 int c_x86_vendor;
17#ifdef CONFIG_X86_32
18 /* Optional vendor specific routine to obtain the cache size. */
19 unsigned int (*legacy_cache_size)(struct cpuinfo_x86 *,
20 unsigned int);
21
22 /* Family/stepping-based lookup table for model names. */
23 struct legacy_cpu_model_info {
24 int family;
25 const char *model_names[16];
26 } legacy_models[5];
27#endif
26}; 28};
27 29
28struct _tlb_table { 30struct _tlb_table {
diff --git a/arch/x86/kernel/cpu/intel.c b/arch/x86/kernel/cpu/intel.c
index ec7299566f79..dc1ec0dff939 100644
--- a/arch/x86/kernel/cpu/intel.c
+++ b/arch/x86/kernel/cpu/intel.c
@@ -665,8 +665,8 @@ static const struct cpu_dev intel_cpu_dev = {
665 .c_vendor = "Intel", 665 .c_vendor = "Intel",
666 .c_ident = { "GenuineIntel" }, 666 .c_ident = { "GenuineIntel" },
667#ifdef CONFIG_X86_32 667#ifdef CONFIG_X86_32
668 .c_models = { 668 .legacy_models = {
669 { .vendor = X86_VENDOR_INTEL, .family = 4, .model_names = 669 { .family = 4, .model_names =
670 { 670 {
671 [0] = "486 DX-25/33", 671 [0] = "486 DX-25/33",
672 [1] = "486 DX-50", 672 [1] = "486 DX-50",
@@ -679,7 +679,7 @@ static const struct cpu_dev intel_cpu_dev = {
679 [9] = "486 DX/4-WB" 679 [9] = "486 DX/4-WB"
680 } 680 }
681 }, 681 },
682 { .vendor = X86_VENDOR_INTEL, .family = 5, .model_names = 682 { .family = 5, .model_names =
683 { 683 {
684 [0] = "Pentium 60/66 A-step", 684 [0] = "Pentium 60/66 A-step",
685 [1] = "Pentium 60/66", 685 [1] = "Pentium 60/66",
@@ -690,7 +690,7 @@ static const struct cpu_dev intel_cpu_dev = {
690 [8] = "Mobile Pentium MMX" 690 [8] = "Mobile Pentium MMX"
691 } 691 }
692 }, 692 },
693 { .vendor = X86_VENDOR_INTEL, .family = 6, .model_names = 693 { .family = 6, .model_names =
694 { 694 {
695 [0] = "Pentium Pro A-step", 695 [0] = "Pentium Pro A-step",
696 [1] = "Pentium Pro", 696 [1] = "Pentium Pro",
@@ -704,7 +704,7 @@ static const struct cpu_dev intel_cpu_dev = {
704 [11] = "Pentium III (Tualatin)", 704 [11] = "Pentium III (Tualatin)",
705 } 705 }
706 }, 706 },
707 { .vendor = X86_VENDOR_INTEL, .family = 15, .model_names = 707 { .family = 15, .model_names =
708 { 708 {
709 [0] = "Pentium 4 (Unknown)", 709 [0] = "Pentium 4 (Unknown)",
710 [1] = "Pentium 4 (Willamette)", 710 [1] = "Pentium 4 (Willamette)",
@@ -714,7 +714,7 @@ static const struct cpu_dev intel_cpu_dev = {
714 } 714 }
715 }, 715 },
716 }, 716 },
717 .c_size_cache = intel_size_cache, 717 .legacy_cache_size = intel_size_cache,
718#endif 718#endif
719 .c_detect_tlb = intel_detect_tlb, 719 .c_detect_tlb = intel_detect_tlb,
720 .c_early_init = early_init_intel, 720 .c_early_init = early_init_intel,
diff --git a/arch/x86/kernel/cpu/mcheck/mce-apei.c b/arch/x86/kernel/cpu/mcheck/mce-apei.c
index cd8b166a1735..de8b60a53f69 100644
--- a/arch/x86/kernel/cpu/mcheck/mce-apei.c
+++ b/arch/x86/kernel/cpu/mcheck/mce-apei.c
@@ -42,8 +42,7 @@ void apei_mce_report_mem_error(int corrected, struct cper_sec_mem_err *mem_err)
42 struct mce m; 42 struct mce m;
43 43
44 /* Only corrected MC is reported */ 44 /* Only corrected MC is reported */
45 if (!corrected || !(mem_err->validation_bits & 45 if (!corrected || !(mem_err->validation_bits & CPER_MEM_VALID_PA))
46 CPER_MEM_VALID_PHYSICAL_ADDRESS))
47 return; 46 return;
48 47
49 mce_setup(&m); 48 mce_setup(&m);
diff --git a/arch/x86/kernel/cpu/mshyperv.c b/arch/x86/kernel/cpu/mshyperv.c
index 71a39f3621ba..9f7ca266864a 100644
--- a/arch/x86/kernel/cpu/mshyperv.c
+++ b/arch/x86/kernel/cpu/mshyperv.c
@@ -15,6 +15,7 @@
15#include <linux/clocksource.h> 15#include <linux/clocksource.h>
16#include <linux/module.h> 16#include <linux/module.h>
17#include <linux/hardirq.h> 17#include <linux/hardirq.h>
18#include <linux/efi.h>
18#include <linux/interrupt.h> 19#include <linux/interrupt.h>
19#include <asm/processor.h> 20#include <asm/processor.h>
20#include <asm/hypervisor.h> 21#include <asm/hypervisor.h>
@@ -23,6 +24,8 @@
23#include <asm/desc.h> 24#include <asm/desc.h>
24#include <asm/idle.h> 25#include <asm/idle.h>
25#include <asm/irq_regs.h> 26#include <asm/irq_regs.h>
27#include <asm/i8259.h>
28#include <asm/apic.h>
26 29
27struct ms_hyperv_info ms_hyperv; 30struct ms_hyperv_info ms_hyperv;
28EXPORT_SYMBOL_GPL(ms_hyperv); 31EXPORT_SYMBOL_GPL(ms_hyperv);
@@ -76,6 +79,30 @@ static void __init ms_hyperv_init_platform(void)
76 printk(KERN_INFO "HyperV: features 0x%x, hints 0x%x\n", 79 printk(KERN_INFO "HyperV: features 0x%x, hints 0x%x\n",
77 ms_hyperv.features, ms_hyperv.hints); 80 ms_hyperv.features, ms_hyperv.hints);
78 81
82#ifdef CONFIG_X86_LOCAL_APIC
83 if (ms_hyperv.features & HV_X64_MSR_APIC_FREQUENCY_AVAILABLE) {
84 /*
85 * Get the APIC frequency.
86 */
87 u64 hv_lapic_frequency;
88
89 rdmsrl(HV_X64_MSR_APIC_FREQUENCY, hv_lapic_frequency);
90 hv_lapic_frequency = div_u64(hv_lapic_frequency, HZ);
91 lapic_timer_frequency = hv_lapic_frequency;
92 printk(KERN_INFO "HyperV: LAPIC Timer Frequency: %#x\n",
93 lapic_timer_frequency);
94
95 /*
96 * On Hyper-V, when we are booting off an EFI firmware stack,
97 * we do not have many legacy devices including PIC, PIT etc.
98 */
99 if (efi_enabled(EFI_BOOT)) {
100 printk(KERN_INFO "HyperV: Using null_legacy_pic\n");
101 legacy_pic = &null_legacy_pic;
102 }
103 }
104#endif
105
79 if (ms_hyperv.features & HV_X64_MSR_TIME_REF_COUNT_AVAILABLE) 106 if (ms_hyperv.features & HV_X64_MSR_TIME_REF_COUNT_AVAILABLE)
80 clocksource_register_hz(&hyperv_cs, NSEC_PER_SEC/100); 107 clocksource_register_hz(&hyperv_cs, NSEC_PER_SEC/100);
81} 108}
diff --git a/arch/x86/kernel/cpu/perf_event.c b/arch/x86/kernel/cpu/perf_event.c
index 8a87a3224121..8e132931614d 100644
--- a/arch/x86/kernel/cpu/perf_event.c
+++ b/arch/x86/kernel/cpu/perf_event.c
@@ -1989,7 +1989,7 @@ perf_callchain_user32(struct pt_regs *regs, struct perf_callchain_entry *entry)
1989 frame.return_address = 0; 1989 frame.return_address = 0;
1990 1990
1991 bytes = copy_from_user_nmi(&frame, fp, sizeof(frame)); 1991 bytes = copy_from_user_nmi(&frame, fp, sizeof(frame));
1992 if (bytes != sizeof(frame)) 1992 if (bytes != 0)
1993 break; 1993 break;
1994 1994
1995 if (!valid_user_frame(fp, sizeof(frame))) 1995 if (!valid_user_frame(fp, sizeof(frame)))
@@ -2041,7 +2041,7 @@ perf_callchain_user(struct perf_callchain_entry *entry, struct pt_regs *regs)
2041 frame.return_address = 0; 2041 frame.return_address = 0;
2042 2042
2043 bytes = copy_from_user_nmi(&frame, fp, sizeof(frame)); 2043 bytes = copy_from_user_nmi(&frame, fp, sizeof(frame));
2044 if (bytes != sizeof(frame)) 2044 if (bytes != 0)
2045 break; 2045 break;
2046 2046
2047 if (!valid_user_frame(fp, sizeof(frame))) 2047 if (!valid_user_frame(fp, sizeof(frame)))
diff --git a/arch/x86/kernel/cpu/perf_event.h b/arch/x86/kernel/cpu/perf_event.h
index cc16faae0538..fd00bb29425d 100644
--- a/arch/x86/kernel/cpu/perf_event.h
+++ b/arch/x86/kernel/cpu/perf_event.h
@@ -164,6 +164,11 @@ struct cpu_hw_events {
164 struct perf_guest_switch_msr guest_switch_msrs[X86_PMC_IDX_MAX]; 164 struct perf_guest_switch_msr guest_switch_msrs[X86_PMC_IDX_MAX];
165 165
166 /* 166 /*
167 * Intel checkpoint mask
168 */
169 u64 intel_cp_status;
170
171 /*
167 * manage shared (per-core, per-cpu) registers 172 * manage shared (per-core, per-cpu) registers
168 * used on Intel NHM/WSM/SNB 173 * used on Intel NHM/WSM/SNB
169 */ 174 */
@@ -440,6 +445,7 @@ struct x86_pmu {
440 int lbr_nr; /* hardware stack size */ 445 int lbr_nr; /* hardware stack size */
441 u64 lbr_sel_mask; /* LBR_SELECT valid bits */ 446 u64 lbr_sel_mask; /* LBR_SELECT valid bits */
442 const int *lbr_sel_map; /* lbr_select mappings */ 447 const int *lbr_sel_map; /* lbr_select mappings */
448 bool lbr_double_abort; /* duplicated lbr aborts */
443 449
444 /* 450 /*
445 * Extra registers for events 451 * Extra registers for events
diff --git a/arch/x86/kernel/cpu/perf_event_intel.c b/arch/x86/kernel/cpu/perf_event_intel.c
index f31a1655d1ff..0fa4f242f050 100644
--- a/arch/x86/kernel/cpu/perf_event_intel.c
+++ b/arch/x86/kernel/cpu/perf_event_intel.c
@@ -190,9 +190,9 @@ static struct extra_reg intel_snbep_extra_regs[] __read_mostly = {
190 EVENT_EXTRA_END 190 EVENT_EXTRA_END
191}; 191};
192 192
193EVENT_ATTR_STR(mem-loads, mem_ld_nhm, "event=0x0b,umask=0x10,ldlat=3"); 193EVENT_ATTR_STR(mem-loads, mem_ld_nhm, "event=0x0b,umask=0x10,ldlat=3");
194EVENT_ATTR_STR(mem-loads, mem_ld_snb, "event=0xcd,umask=0x1,ldlat=3"); 194EVENT_ATTR_STR(mem-loads, mem_ld_snb, "event=0xcd,umask=0x1,ldlat=3");
195EVENT_ATTR_STR(mem-stores, mem_st_snb, "event=0xcd,umask=0x2"); 195EVENT_ATTR_STR(mem-stores, mem_st_snb, "event=0xcd,umask=0x2");
196 196
197struct attribute *nhm_events_attrs[] = { 197struct attribute *nhm_events_attrs[] = {
198 EVENT_PTR(mem_ld_nhm), 198 EVENT_PTR(mem_ld_nhm),
@@ -1184,6 +1184,11 @@ static void intel_pmu_disable_fixed(struct hw_perf_event *hwc)
1184 wrmsrl(hwc->config_base, ctrl_val); 1184 wrmsrl(hwc->config_base, ctrl_val);
1185} 1185}
1186 1186
1187static inline bool event_is_checkpointed(struct perf_event *event)
1188{
1189 return (event->hw.config & HSW_IN_TX_CHECKPOINTED) != 0;
1190}
1191
1187static void intel_pmu_disable_event(struct perf_event *event) 1192static void intel_pmu_disable_event(struct perf_event *event)
1188{ 1193{
1189 struct hw_perf_event *hwc = &event->hw; 1194 struct hw_perf_event *hwc = &event->hw;
@@ -1197,6 +1202,7 @@ static void intel_pmu_disable_event(struct perf_event *event)
1197 1202
1198 cpuc->intel_ctrl_guest_mask &= ~(1ull << hwc->idx); 1203 cpuc->intel_ctrl_guest_mask &= ~(1ull << hwc->idx);
1199 cpuc->intel_ctrl_host_mask &= ~(1ull << hwc->idx); 1204 cpuc->intel_ctrl_host_mask &= ~(1ull << hwc->idx);
1205 cpuc->intel_cp_status &= ~(1ull << hwc->idx);
1200 1206
1201 /* 1207 /*
1202 * must disable before any actual event 1208 * must disable before any actual event
@@ -1271,6 +1277,9 @@ static void intel_pmu_enable_event(struct perf_event *event)
1271 if (event->attr.exclude_guest) 1277 if (event->attr.exclude_guest)
1272 cpuc->intel_ctrl_host_mask |= (1ull << hwc->idx); 1278 cpuc->intel_ctrl_host_mask |= (1ull << hwc->idx);
1273 1279
1280 if (unlikely(event_is_checkpointed(event)))
1281 cpuc->intel_cp_status |= (1ull << hwc->idx);
1282
1274 if (unlikely(hwc->config_base == MSR_ARCH_PERFMON_FIXED_CTR_CTRL)) { 1283 if (unlikely(hwc->config_base == MSR_ARCH_PERFMON_FIXED_CTR_CTRL)) {
1275 intel_pmu_enable_fixed(hwc); 1284 intel_pmu_enable_fixed(hwc);
1276 return; 1285 return;
@@ -1289,6 +1298,17 @@ static void intel_pmu_enable_event(struct perf_event *event)
1289int intel_pmu_save_and_restart(struct perf_event *event) 1298int intel_pmu_save_and_restart(struct perf_event *event)
1290{ 1299{
1291 x86_perf_event_update(event); 1300 x86_perf_event_update(event);
1301 /*
1302 * For a checkpointed counter always reset back to 0. This
1303 * avoids a situation where the counter overflows, aborts the
1304 * transaction and is then set back to shortly before the
1305 * overflow, and overflows and aborts again.
1306 */
1307 if (unlikely(event_is_checkpointed(event))) {
1308 /* No race with NMIs because the counter should not be armed */
1309 wrmsrl(event->hw.event_base, 0);
1310 local64_set(&event->hw.prev_count, 0);
1311 }
1292 return x86_perf_event_set_period(event); 1312 return x86_perf_event_set_period(event);
1293} 1313}
1294 1314
@@ -1372,6 +1392,13 @@ again:
1372 x86_pmu.drain_pebs(regs); 1392 x86_pmu.drain_pebs(regs);
1373 } 1393 }
1374 1394
1395 /*
1396 * Checkpointed counters can lead to 'spurious' PMIs because the
1397 * rollback caused by the PMI will have cleared the overflow status
1398 * bit. Therefore always force probe these counters.
1399 */
1400 status |= cpuc->intel_cp_status;
1401
1375 for_each_set_bit(bit, (unsigned long *)&status, X86_PMC_IDX_MAX) { 1402 for_each_set_bit(bit, (unsigned long *)&status, X86_PMC_IDX_MAX) {
1376 struct perf_event *event = cpuc->events[bit]; 1403 struct perf_event *event = cpuc->events[bit];
1377 1404
@@ -1837,6 +1864,20 @@ static int hsw_hw_config(struct perf_event *event)
1837 event->attr.precise_ip > 0)) 1864 event->attr.precise_ip > 0))
1838 return -EOPNOTSUPP; 1865 return -EOPNOTSUPP;
1839 1866
1867 if (event_is_checkpointed(event)) {
1868 /*
1869 * Sampling of checkpointed events can cause situations where
1870 * the CPU constantly aborts because of a overflow, which is
1871 * then checkpointed back and ignored. Forbid checkpointing
1872 * for sampling.
1873 *
1874 * But still allow a long sampling period, so that perf stat
1875 * from KVM works.
1876 */
1877 if (event->attr.sample_period > 0 &&
1878 event->attr.sample_period < 0x7fffffff)
1879 return -EOPNOTSUPP;
1880 }
1840 return 0; 1881 return 0;
1841} 1882}
1842 1883
@@ -2182,10 +2223,36 @@ static __init void intel_nehalem_quirk(void)
2182 } 2223 }
2183} 2224}
2184 2225
2185EVENT_ATTR_STR(mem-loads, mem_ld_hsw, "event=0xcd,umask=0x1,ldlat=3"); 2226EVENT_ATTR_STR(mem-loads, mem_ld_hsw, "event=0xcd,umask=0x1,ldlat=3");
2186EVENT_ATTR_STR(mem-stores, mem_st_hsw, "event=0xd0,umask=0x82") 2227EVENT_ATTR_STR(mem-stores, mem_st_hsw, "event=0xd0,umask=0x82")
2228
2229/* Haswell special events */
2230EVENT_ATTR_STR(tx-start, tx_start, "event=0xc9,umask=0x1");
2231EVENT_ATTR_STR(tx-commit, tx_commit, "event=0xc9,umask=0x2");
2232EVENT_ATTR_STR(tx-abort, tx_abort, "event=0xc9,umask=0x4");
2233EVENT_ATTR_STR(tx-capacity, tx_capacity, "event=0x54,umask=0x2");
2234EVENT_ATTR_STR(tx-conflict, tx_conflict, "event=0x54,umask=0x1");
2235EVENT_ATTR_STR(el-start, el_start, "event=0xc8,umask=0x1");
2236EVENT_ATTR_STR(el-commit, el_commit, "event=0xc8,umask=0x2");
2237EVENT_ATTR_STR(el-abort, el_abort, "event=0xc8,umask=0x4");
2238EVENT_ATTR_STR(el-capacity, el_capacity, "event=0x54,umask=0x2");
2239EVENT_ATTR_STR(el-conflict, el_conflict, "event=0x54,umask=0x1");
2240EVENT_ATTR_STR(cycles-t, cycles_t, "event=0x3c,in_tx=1");
2241EVENT_ATTR_STR(cycles-ct, cycles_ct, "event=0x3c,in_tx=1,in_tx_cp=1");
2187 2242
2188static struct attribute *hsw_events_attrs[] = { 2243static struct attribute *hsw_events_attrs[] = {
2244 EVENT_PTR(tx_start),
2245 EVENT_PTR(tx_commit),
2246 EVENT_PTR(tx_abort),
2247 EVENT_PTR(tx_capacity),
2248 EVENT_PTR(tx_conflict),
2249 EVENT_PTR(el_start),
2250 EVENT_PTR(el_commit),
2251 EVENT_PTR(el_abort),
2252 EVENT_PTR(el_capacity),
2253 EVENT_PTR(el_conflict),
2254 EVENT_PTR(cycles_t),
2255 EVENT_PTR(cycles_ct),
2189 EVENT_PTR(mem_ld_hsw), 2256 EVENT_PTR(mem_ld_hsw),
2190 EVENT_PTR(mem_st_hsw), 2257 EVENT_PTR(mem_st_hsw),
2191 NULL 2258 NULL
@@ -2452,6 +2519,7 @@ __init int intel_pmu_init(void)
2452 x86_pmu.hw_config = hsw_hw_config; 2519 x86_pmu.hw_config = hsw_hw_config;
2453 x86_pmu.get_event_constraints = hsw_get_event_constraints; 2520 x86_pmu.get_event_constraints = hsw_get_event_constraints;
2454 x86_pmu.cpu_events = hsw_events_attrs; 2521 x86_pmu.cpu_events = hsw_events_attrs;
2522 x86_pmu.lbr_double_abort = true;
2455 pr_cont("Haswell events, "); 2523 pr_cont("Haswell events, ");
2456 break; 2524 break;
2457 2525
diff --git a/arch/x86/kernel/cpu/perf_event_intel_ds.c b/arch/x86/kernel/cpu/perf_event_intel_ds.c
index ab3ba1c1b7dd..ae96cfa5eddd 100644
--- a/arch/x86/kernel/cpu/perf_event_intel_ds.c
+++ b/arch/x86/kernel/cpu/perf_event_intel_ds.c
@@ -12,6 +12,7 @@
12 12
13#define BTS_BUFFER_SIZE (PAGE_SIZE << 4) 13#define BTS_BUFFER_SIZE (PAGE_SIZE << 4)
14#define PEBS_BUFFER_SIZE PAGE_SIZE 14#define PEBS_BUFFER_SIZE PAGE_SIZE
15#define PEBS_FIXUP_SIZE PAGE_SIZE
15 16
16/* 17/*
17 * pebs_record_32 for p4 and core not supported 18 * pebs_record_32 for p4 and core not supported
@@ -182,18 +183,32 @@ struct pebs_record_nhm {
182 * Same as pebs_record_nhm, with two additional fields. 183 * Same as pebs_record_nhm, with two additional fields.
183 */ 184 */
184struct pebs_record_hsw { 185struct pebs_record_hsw {
185 struct pebs_record_nhm nhm; 186 u64 flags, ip;
186 /* 187 u64 ax, bx, cx, dx;
187 * Real IP of the event. In the Intel documentation this 188 u64 si, di, bp, sp;
188 * is called eventingrip. 189 u64 r8, r9, r10, r11;
189 */ 190 u64 r12, r13, r14, r15;
190 u64 real_ip; 191 u64 status, dla, dse, lat;
191 /* 192 u64 real_ip, tsx_tuning;
192 * TSX tuning information field: abort cycles and abort flags. 193};
193 */ 194
194 u64 tsx_tuning; 195union hsw_tsx_tuning {
196 struct {
197 u32 cycles_last_block : 32,
198 hle_abort : 1,
199 rtm_abort : 1,
200 instruction_abort : 1,
201 non_instruction_abort : 1,
202 retry : 1,
203 data_conflict : 1,
204 capacity_writes : 1,
205 capacity_reads : 1;
206 };
207 u64 value;
195}; 208};
196 209
210#define PEBS_HSW_TSX_FLAGS 0xff00000000ULL
211
197void init_debug_store_on_cpu(int cpu) 212void init_debug_store_on_cpu(int cpu)
198{ 213{
199 struct debug_store *ds = per_cpu(cpu_hw_events, cpu).ds; 214 struct debug_store *ds = per_cpu(cpu_hw_events, cpu).ds;
@@ -214,12 +229,14 @@ void fini_debug_store_on_cpu(int cpu)
214 wrmsr_on_cpu(cpu, MSR_IA32_DS_AREA, 0, 0); 229 wrmsr_on_cpu(cpu, MSR_IA32_DS_AREA, 0, 0);
215} 230}
216 231
232static DEFINE_PER_CPU(void *, insn_buffer);
233
217static int alloc_pebs_buffer(int cpu) 234static int alloc_pebs_buffer(int cpu)
218{ 235{
219 struct debug_store *ds = per_cpu(cpu_hw_events, cpu).ds; 236 struct debug_store *ds = per_cpu(cpu_hw_events, cpu).ds;
220 int node = cpu_to_node(cpu); 237 int node = cpu_to_node(cpu);
221 int max, thresh = 1; /* always use a single PEBS record */ 238 int max, thresh = 1; /* always use a single PEBS record */
222 void *buffer; 239 void *buffer, *ibuffer;
223 240
224 if (!x86_pmu.pebs) 241 if (!x86_pmu.pebs)
225 return 0; 242 return 0;
@@ -228,6 +245,19 @@ static int alloc_pebs_buffer(int cpu)
228 if (unlikely(!buffer)) 245 if (unlikely(!buffer))
229 return -ENOMEM; 246 return -ENOMEM;
230 247
248 /*
249 * HSW+ already provides us the eventing ip; no need to allocate this
250 * buffer then.
251 */
252 if (x86_pmu.intel_cap.pebs_format < 2) {
253 ibuffer = kzalloc_node(PEBS_FIXUP_SIZE, GFP_KERNEL, node);
254 if (!ibuffer) {
255 kfree(buffer);
256 return -ENOMEM;
257 }
258 per_cpu(insn_buffer, cpu) = ibuffer;
259 }
260
231 max = PEBS_BUFFER_SIZE / x86_pmu.pebs_record_size; 261 max = PEBS_BUFFER_SIZE / x86_pmu.pebs_record_size;
232 262
233 ds->pebs_buffer_base = (u64)(unsigned long)buffer; 263 ds->pebs_buffer_base = (u64)(unsigned long)buffer;
@@ -248,6 +278,9 @@ static void release_pebs_buffer(int cpu)
248 if (!ds || !x86_pmu.pebs) 278 if (!ds || !x86_pmu.pebs)
249 return; 279 return;
250 280
281 kfree(per_cpu(insn_buffer, cpu));
282 per_cpu(insn_buffer, cpu) = NULL;
283
251 kfree((void *)(unsigned long)ds->pebs_buffer_base); 284 kfree((void *)(unsigned long)ds->pebs_buffer_base);
252 ds->pebs_buffer_base = 0; 285 ds->pebs_buffer_base = 0;
253} 286}
@@ -715,6 +748,7 @@ static int intel_pmu_pebs_fixup_ip(struct pt_regs *regs)
715 unsigned long old_to, to = cpuc->lbr_entries[0].to; 748 unsigned long old_to, to = cpuc->lbr_entries[0].to;
716 unsigned long ip = regs->ip; 749 unsigned long ip = regs->ip;
717 int is_64bit = 0; 750 int is_64bit = 0;
751 void *kaddr;
718 752
719 /* 753 /*
720 * We don't need to fixup if the PEBS assist is fault like 754 * We don't need to fixup if the PEBS assist is fault like
@@ -738,7 +772,7 @@ static int intel_pmu_pebs_fixup_ip(struct pt_regs *regs)
738 * unsigned math, either ip is before the start (impossible) or 772 * unsigned math, either ip is before the start (impossible) or
739 * the basic block is larger than 1 page (sanity) 773 * the basic block is larger than 1 page (sanity)
740 */ 774 */
741 if ((ip - to) > PAGE_SIZE) 775 if ((ip - to) > PEBS_FIXUP_SIZE)
742 return 0; 776 return 0;
743 777
744 /* 778 /*
@@ -749,29 +783,33 @@ static int intel_pmu_pebs_fixup_ip(struct pt_regs *regs)
749 return 1; 783 return 1;
750 } 784 }
751 785
786 if (!kernel_ip(ip)) {
787 int size, bytes;
788 u8 *buf = this_cpu_read(insn_buffer);
789
790 size = ip - to; /* Must fit our buffer, see above */
791 bytes = copy_from_user_nmi(buf, (void __user *)to, size);
792 if (bytes != 0)
793 return 0;
794
795 kaddr = buf;
796 } else {
797 kaddr = (void *)to;
798 }
799
752 do { 800 do {
753 struct insn insn; 801 struct insn insn;
754 u8 buf[MAX_INSN_SIZE];
755 void *kaddr;
756 802
757 old_to = to; 803 old_to = to;
758 if (!kernel_ip(ip)) {
759 int bytes, size = MAX_INSN_SIZE;
760
761 bytes = copy_from_user_nmi(buf, (void __user *)to, size);
762 if (bytes != size)
763 return 0;
764
765 kaddr = buf;
766 } else
767 kaddr = (void *)to;
768 804
769#ifdef CONFIG_X86_64 805#ifdef CONFIG_X86_64
770 is_64bit = kernel_ip(to) || !test_thread_flag(TIF_IA32); 806 is_64bit = kernel_ip(to) || !test_thread_flag(TIF_IA32);
771#endif 807#endif
772 insn_init(&insn, kaddr, is_64bit); 808 insn_init(&insn, kaddr, is_64bit);
773 insn_get_length(&insn); 809 insn_get_length(&insn);
810
774 to += insn.length; 811 to += insn.length;
812 kaddr += insn.length;
775 } while (to < ip); 813 } while (to < ip);
776 814
777 if (to == ip) { 815 if (to == ip) {
@@ -786,16 +824,34 @@ static int intel_pmu_pebs_fixup_ip(struct pt_regs *regs)
786 return 0; 824 return 0;
787} 825}
788 826
827static inline u64 intel_hsw_weight(struct pebs_record_hsw *pebs)
828{
829 if (pebs->tsx_tuning) {
830 union hsw_tsx_tuning tsx = { .value = pebs->tsx_tuning };
831 return tsx.cycles_last_block;
832 }
833 return 0;
834}
835
836static inline u64 intel_hsw_transaction(struct pebs_record_hsw *pebs)
837{
838 u64 txn = (pebs->tsx_tuning & PEBS_HSW_TSX_FLAGS) >> 32;
839
840 /* For RTM XABORTs also log the abort code from AX */
841 if ((txn & PERF_TXN_TRANSACTION) && (pebs->ax & 1))
842 txn |= ((pebs->ax >> 24) & 0xff) << PERF_TXN_ABORT_SHIFT;
843 return txn;
844}
845
789static void __intel_pmu_pebs_event(struct perf_event *event, 846static void __intel_pmu_pebs_event(struct perf_event *event,
790 struct pt_regs *iregs, void *__pebs) 847 struct pt_regs *iregs, void *__pebs)
791{ 848{
792 /* 849 /*
793 * We cast to pebs_record_nhm to get the load latency data 850 * We cast to the biggest pebs_record but are careful not to
794 * if extra_reg MSR_PEBS_LD_LAT_THRESHOLD used 851 * unconditionally access the 'extra' entries.
795 */ 852 */
796 struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events); 853 struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
797 struct pebs_record_nhm *pebs = __pebs; 854 struct pebs_record_hsw *pebs = __pebs;
798 struct pebs_record_hsw *pebs_hsw = __pebs;
799 struct perf_sample_data data; 855 struct perf_sample_data data;
800 struct pt_regs regs; 856 struct pt_regs regs;
801 u64 sample_type; 857 u64 sample_type;
@@ -854,7 +910,7 @@ static void __intel_pmu_pebs_event(struct perf_event *event,
854 regs.sp = pebs->sp; 910 regs.sp = pebs->sp;
855 911
856 if (event->attr.precise_ip > 1 && x86_pmu.intel_cap.pebs_format >= 2) { 912 if (event->attr.precise_ip > 1 && x86_pmu.intel_cap.pebs_format >= 2) {
857 regs.ip = pebs_hsw->real_ip; 913 regs.ip = pebs->real_ip;
858 regs.flags |= PERF_EFLAGS_EXACT; 914 regs.flags |= PERF_EFLAGS_EXACT;
859 } else if (event->attr.precise_ip > 1 && intel_pmu_pebs_fixup_ip(&regs)) 915 } else if (event->attr.precise_ip > 1 && intel_pmu_pebs_fixup_ip(&regs))
860 regs.flags |= PERF_EFLAGS_EXACT; 916 regs.flags |= PERF_EFLAGS_EXACT;
@@ -862,9 +918,18 @@ static void __intel_pmu_pebs_event(struct perf_event *event,
862 regs.flags &= ~PERF_EFLAGS_EXACT; 918 regs.flags &= ~PERF_EFLAGS_EXACT;
863 919
864 if ((event->attr.sample_type & PERF_SAMPLE_ADDR) && 920 if ((event->attr.sample_type & PERF_SAMPLE_ADDR) &&
865 x86_pmu.intel_cap.pebs_format >= 1) 921 x86_pmu.intel_cap.pebs_format >= 1)
866 data.addr = pebs->dla; 922 data.addr = pebs->dla;
867 923
924 if (x86_pmu.intel_cap.pebs_format >= 2) {
925 /* Only set the TSX weight when no memory weight. */
926 if ((event->attr.sample_type & PERF_SAMPLE_WEIGHT) && !fll)
927 data.weight = intel_hsw_weight(pebs);
928
929 if (event->attr.sample_type & PERF_SAMPLE_TRANSACTION)
930 data.txn = intel_hsw_transaction(pebs);
931 }
932
868 if (has_branch_stack(event)) 933 if (has_branch_stack(event))
869 data.br_stack = &cpuc->lbr_stack; 934 data.br_stack = &cpuc->lbr_stack;
870 935
@@ -913,17 +978,34 @@ static void intel_pmu_drain_pebs_core(struct pt_regs *iregs)
913 __intel_pmu_pebs_event(event, iregs, at); 978 __intel_pmu_pebs_event(event, iregs, at);
914} 979}
915 980
916static void __intel_pmu_drain_pebs_nhm(struct pt_regs *iregs, void *at, 981static void intel_pmu_drain_pebs_nhm(struct pt_regs *iregs)
917 void *top)
918{ 982{
919 struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events); 983 struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
920 struct debug_store *ds = cpuc->ds; 984 struct debug_store *ds = cpuc->ds;
921 struct perf_event *event = NULL; 985 struct perf_event *event = NULL;
986 void *at, *top;
922 u64 status = 0; 987 u64 status = 0;
923 int bit; 988 int bit;
924 989
990 if (!x86_pmu.pebs_active)
991 return;
992
993 at = (struct pebs_record_nhm *)(unsigned long)ds->pebs_buffer_base;
994 top = (struct pebs_record_nhm *)(unsigned long)ds->pebs_index;
995
925 ds->pebs_index = ds->pebs_buffer_base; 996 ds->pebs_index = ds->pebs_buffer_base;
926 997
998 if (unlikely(at > top))
999 return;
1000
1001 /*
1002 * Should not happen, we program the threshold at 1 and do not
1003 * set a reset value.
1004 */
1005 WARN_ONCE(top - at > x86_pmu.max_pebs_events * x86_pmu.pebs_record_size,
1006 "Unexpected number of pebs records %ld\n",
1007 (long)(top - at) / x86_pmu.pebs_record_size);
1008
927 for (; at < top; at += x86_pmu.pebs_record_size) { 1009 for (; at < top; at += x86_pmu.pebs_record_size) {
928 struct pebs_record_nhm *p = at; 1010 struct pebs_record_nhm *p = at;
929 1011
@@ -951,61 +1033,6 @@ static void __intel_pmu_drain_pebs_nhm(struct pt_regs *iregs, void *at,
951 } 1033 }
952} 1034}
953 1035
954static void intel_pmu_drain_pebs_nhm(struct pt_regs *iregs)
955{
956 struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
957 struct debug_store *ds = cpuc->ds;
958 struct pebs_record_nhm *at, *top;
959 int n;
960
961 if (!x86_pmu.pebs_active)
962 return;
963
964 at = (struct pebs_record_nhm *)(unsigned long)ds->pebs_buffer_base;
965 top = (struct pebs_record_nhm *)(unsigned long)ds->pebs_index;
966
967 ds->pebs_index = ds->pebs_buffer_base;
968
969 n = top - at;
970 if (n <= 0)
971 return;
972
973 /*
974 * Should not happen, we program the threshold at 1 and do not
975 * set a reset value.
976 */
977 WARN_ONCE(n > x86_pmu.max_pebs_events,
978 "Unexpected number of pebs records %d\n", n);
979
980 return __intel_pmu_drain_pebs_nhm(iregs, at, top);
981}
982
983static void intel_pmu_drain_pebs_hsw(struct pt_regs *iregs)
984{
985 struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
986 struct debug_store *ds = cpuc->ds;
987 struct pebs_record_hsw *at, *top;
988 int n;
989
990 if (!x86_pmu.pebs_active)
991 return;
992
993 at = (struct pebs_record_hsw *)(unsigned long)ds->pebs_buffer_base;
994 top = (struct pebs_record_hsw *)(unsigned long)ds->pebs_index;
995
996 n = top - at;
997 if (n <= 0)
998 return;
999 /*
1000 * Should not happen, we program the threshold at 1 and do not
1001 * set a reset value.
1002 */
1003 WARN_ONCE(n > x86_pmu.max_pebs_events,
1004 "Unexpected number of pebs records %d\n", n);
1005
1006 return __intel_pmu_drain_pebs_nhm(iregs, at, top);
1007}
1008
1009/* 1036/*
1010 * BTS, PEBS probe and setup 1037 * BTS, PEBS probe and setup
1011 */ 1038 */
@@ -1040,7 +1067,7 @@ void intel_ds_init(void)
1040 case 2: 1067 case 2:
1041 pr_cont("PEBS fmt2%c, ", pebs_type); 1068 pr_cont("PEBS fmt2%c, ", pebs_type);
1042 x86_pmu.pebs_record_size = sizeof(struct pebs_record_hsw); 1069 x86_pmu.pebs_record_size = sizeof(struct pebs_record_hsw);
1043 x86_pmu.drain_pebs = intel_pmu_drain_pebs_hsw; 1070 x86_pmu.drain_pebs = intel_pmu_drain_pebs_nhm;
1044 break; 1071 break;
1045 1072
1046 default: 1073 default:
diff --git a/arch/x86/kernel/cpu/perf_event_intel_lbr.c b/arch/x86/kernel/cpu/perf_event_intel_lbr.c
index d5be06a5005e..d82d155aca8c 100644
--- a/arch/x86/kernel/cpu/perf_event_intel_lbr.c
+++ b/arch/x86/kernel/cpu/perf_event_intel_lbr.c
@@ -284,6 +284,7 @@ static void intel_pmu_lbr_read_64(struct cpu_hw_events *cpuc)
284 int lbr_format = x86_pmu.intel_cap.lbr_format; 284 int lbr_format = x86_pmu.intel_cap.lbr_format;
285 u64 tos = intel_pmu_lbr_tos(); 285 u64 tos = intel_pmu_lbr_tos();
286 int i; 286 int i;
287 int out = 0;
287 288
288 for (i = 0; i < x86_pmu.lbr_nr; i++) { 289 for (i = 0; i < x86_pmu.lbr_nr; i++) {
289 unsigned long lbr_idx = (tos - i) & mask; 290 unsigned long lbr_idx = (tos - i) & mask;
@@ -306,15 +307,27 @@ static void intel_pmu_lbr_read_64(struct cpu_hw_events *cpuc)
306 } 307 }
307 from = (u64)((((s64)from) << skip) >> skip); 308 from = (u64)((((s64)from) << skip) >> skip);
308 309
309 cpuc->lbr_entries[i].from = from; 310 /*
310 cpuc->lbr_entries[i].to = to; 311 * Some CPUs report duplicated abort records,
311 cpuc->lbr_entries[i].mispred = mis; 312 * with the second entry not having an abort bit set.
312 cpuc->lbr_entries[i].predicted = pred; 313 * Skip them here. This loop runs backwards,
313 cpuc->lbr_entries[i].in_tx = in_tx; 314 * so we need to undo the previous record.
314 cpuc->lbr_entries[i].abort = abort; 315 * If the abort just happened outside the window
315 cpuc->lbr_entries[i].reserved = 0; 316 * the extra entry cannot be removed.
317 */
318 if (abort && x86_pmu.lbr_double_abort && out > 0)
319 out--;
320
321 cpuc->lbr_entries[out].from = from;
322 cpuc->lbr_entries[out].to = to;
323 cpuc->lbr_entries[out].mispred = mis;
324 cpuc->lbr_entries[out].predicted = pred;
325 cpuc->lbr_entries[out].in_tx = in_tx;
326 cpuc->lbr_entries[out].abort = abort;
327 cpuc->lbr_entries[out].reserved = 0;
328 out++;
316 } 329 }
317 cpuc->lbr_stack.nr = i; 330 cpuc->lbr_stack.nr = out;
318} 331}
319 332
320void intel_pmu_lbr_read(void) 333void intel_pmu_lbr_read(void)
@@ -478,7 +491,7 @@ static int branch_type(unsigned long from, unsigned long to, int abort)
478 491
479 /* may fail if text not present */ 492 /* may fail if text not present */
480 bytes = copy_from_user_nmi(buf, (void __user *)from, size); 493 bytes = copy_from_user_nmi(buf, (void __user *)from, size);
481 if (bytes != size) 494 if (bytes != 0)
482 return X86_BR_NONE; 495 return X86_BR_NONE;
483 496
484 addr = buf; 497 addr = buf;
diff --git a/arch/x86/kernel/cpu/perf_event_intel_uncore.c b/arch/x86/kernel/cpu/perf_event_intel_uncore.c
index 4118f9f68315..29c248799ced 100644
--- a/arch/x86/kernel/cpu/perf_event_intel_uncore.c
+++ b/arch/x86/kernel/cpu/perf_event_intel_uncore.c
@@ -997,6 +997,20 @@ static int snbep_pci2phy_map_init(int devid)
997 } 997 }
998 } 998 }
999 999
1000 if (!err) {
1001 /*
1002 * For PCI bus with no UBOX device, find the next bus
1003 * that has UBOX device and use its mapping.
1004 */
1005 i = -1;
1006 for (bus = 255; bus >= 0; bus--) {
1007 if (pcibus_to_physid[bus] >= 0)
1008 i = pcibus_to_physid[bus];
1009 else
1010 pcibus_to_physid[bus] = i;
1011 }
1012 }
1013
1000 if (ubox_dev) 1014 if (ubox_dev)
1001 pci_dev_put(ubox_dev); 1015 pci_dev_put(ubox_dev);
1002 1016
@@ -1099,6 +1113,24 @@ static struct attribute *ivt_uncore_qpi_formats_attr[] = {
1099 &format_attr_umask.attr, 1113 &format_attr_umask.attr,
1100 &format_attr_edge.attr, 1114 &format_attr_edge.attr,
1101 &format_attr_thresh8.attr, 1115 &format_attr_thresh8.attr,
1116 &format_attr_match_rds.attr,
1117 &format_attr_match_rnid30.attr,
1118 &format_attr_match_rnid4.attr,
1119 &format_attr_match_dnid.attr,
1120 &format_attr_match_mc.attr,
1121 &format_attr_match_opc.attr,
1122 &format_attr_match_vnw.attr,
1123 &format_attr_match0.attr,
1124 &format_attr_match1.attr,
1125 &format_attr_mask_rds.attr,
1126 &format_attr_mask_rnid30.attr,
1127 &format_attr_mask_rnid4.attr,
1128 &format_attr_mask_dnid.attr,
1129 &format_attr_mask_mc.attr,
1130 &format_attr_mask_opc.attr,
1131 &format_attr_mask_vnw.attr,
1132 &format_attr_mask0.attr,
1133 &format_attr_mask1.attr,
1102 NULL, 1134 NULL,
1103}; 1135};
1104 1136
@@ -1312,17 +1344,83 @@ static struct intel_uncore_type ivt_uncore_imc = {
1312 IVT_UNCORE_PCI_COMMON_INIT(), 1344 IVT_UNCORE_PCI_COMMON_INIT(),
1313}; 1345};
1314 1346
1347/* registers in IRP boxes are not properly aligned */
1348static unsigned ivt_uncore_irp_ctls[] = {0xd8, 0xdc, 0xe0, 0xe4};
1349static unsigned ivt_uncore_irp_ctrs[] = {0xa0, 0xb0, 0xb8, 0xc0};
1350
1351static void ivt_uncore_irp_enable_event(struct intel_uncore_box *box, struct perf_event *event)
1352{
1353 struct pci_dev *pdev = box->pci_dev;
1354 struct hw_perf_event *hwc = &event->hw;
1355
1356 pci_write_config_dword(pdev, ivt_uncore_irp_ctls[hwc->idx],
1357 hwc->config | SNBEP_PMON_CTL_EN);
1358}
1359
1360static void ivt_uncore_irp_disable_event(struct intel_uncore_box *box, struct perf_event *event)
1361{
1362 struct pci_dev *pdev = box->pci_dev;
1363 struct hw_perf_event *hwc = &event->hw;
1364
1365 pci_write_config_dword(pdev, ivt_uncore_irp_ctls[hwc->idx], hwc->config);
1366}
1367
1368static u64 ivt_uncore_irp_read_counter(struct intel_uncore_box *box, struct perf_event *event)
1369{
1370 struct pci_dev *pdev = box->pci_dev;
1371 struct hw_perf_event *hwc = &event->hw;
1372 u64 count = 0;
1373
1374 pci_read_config_dword(pdev, ivt_uncore_irp_ctrs[hwc->idx], (u32 *)&count);
1375 pci_read_config_dword(pdev, ivt_uncore_irp_ctrs[hwc->idx] + 4, (u32 *)&count + 1);
1376
1377 return count;
1378}
1379
1380static struct intel_uncore_ops ivt_uncore_irp_ops = {
1381 .init_box = ivt_uncore_pci_init_box,
1382 .disable_box = snbep_uncore_pci_disable_box,
1383 .enable_box = snbep_uncore_pci_enable_box,
1384 .disable_event = ivt_uncore_irp_disable_event,
1385 .enable_event = ivt_uncore_irp_enable_event,
1386 .read_counter = ivt_uncore_irp_read_counter,
1387};
1388
1389static struct intel_uncore_type ivt_uncore_irp = {
1390 .name = "irp",
1391 .num_counters = 4,
1392 .num_boxes = 1,
1393 .perf_ctr_bits = 48,
1394 .event_mask = IVT_PMON_RAW_EVENT_MASK,
1395 .box_ctl = SNBEP_PCI_PMON_BOX_CTL,
1396 .ops = &ivt_uncore_irp_ops,
1397 .format_group = &ivt_uncore_format_group,
1398};
1399
1400static struct intel_uncore_ops ivt_uncore_qpi_ops = {
1401 .init_box = ivt_uncore_pci_init_box,
1402 .disable_box = snbep_uncore_pci_disable_box,
1403 .enable_box = snbep_uncore_pci_enable_box,
1404 .disable_event = snbep_uncore_pci_disable_event,
1405 .enable_event = snbep_qpi_enable_event,
1406 .read_counter = snbep_uncore_pci_read_counter,
1407 .hw_config = snbep_qpi_hw_config,
1408 .get_constraint = uncore_get_constraint,
1409 .put_constraint = uncore_put_constraint,
1410};
1411
1315static struct intel_uncore_type ivt_uncore_qpi = { 1412static struct intel_uncore_type ivt_uncore_qpi = {
1316 .name = "qpi", 1413 .name = "qpi",
1317 .num_counters = 4, 1414 .num_counters = 4,
1318 .num_boxes = 3, 1415 .num_boxes = 3,
1319 .perf_ctr_bits = 48, 1416 .perf_ctr_bits = 48,
1320 .perf_ctr = SNBEP_PCI_PMON_CTR0, 1417 .perf_ctr = SNBEP_PCI_PMON_CTR0,
1321 .event_ctl = SNBEP_PCI_PMON_CTL0, 1418 .event_ctl = SNBEP_PCI_PMON_CTL0,
1322 .event_mask = IVT_QPI_PCI_PMON_RAW_EVENT_MASK, 1419 .event_mask = IVT_QPI_PCI_PMON_RAW_EVENT_MASK,
1323 .box_ctl = SNBEP_PCI_PMON_BOX_CTL, 1420 .box_ctl = SNBEP_PCI_PMON_BOX_CTL,
1324 .ops = &ivt_uncore_pci_ops, 1421 .num_shared_regs = 1,
1325 .format_group = &ivt_uncore_qpi_format_group, 1422 .ops = &ivt_uncore_qpi_ops,
1423 .format_group = &ivt_uncore_qpi_format_group,
1326}; 1424};
1327 1425
1328static struct intel_uncore_type ivt_uncore_r2pcie = { 1426static struct intel_uncore_type ivt_uncore_r2pcie = {
@@ -1346,6 +1444,7 @@ static struct intel_uncore_type ivt_uncore_r3qpi = {
1346enum { 1444enum {
1347 IVT_PCI_UNCORE_HA, 1445 IVT_PCI_UNCORE_HA,
1348 IVT_PCI_UNCORE_IMC, 1446 IVT_PCI_UNCORE_IMC,
1447 IVT_PCI_UNCORE_IRP,
1349 IVT_PCI_UNCORE_QPI, 1448 IVT_PCI_UNCORE_QPI,
1350 IVT_PCI_UNCORE_R2PCIE, 1449 IVT_PCI_UNCORE_R2PCIE,
1351 IVT_PCI_UNCORE_R3QPI, 1450 IVT_PCI_UNCORE_R3QPI,
@@ -1354,6 +1453,7 @@ enum {
1354static struct intel_uncore_type *ivt_pci_uncores[] = { 1453static struct intel_uncore_type *ivt_pci_uncores[] = {
1355 [IVT_PCI_UNCORE_HA] = &ivt_uncore_ha, 1454 [IVT_PCI_UNCORE_HA] = &ivt_uncore_ha,
1356 [IVT_PCI_UNCORE_IMC] = &ivt_uncore_imc, 1455 [IVT_PCI_UNCORE_IMC] = &ivt_uncore_imc,
1456 [IVT_PCI_UNCORE_IRP] = &ivt_uncore_irp,
1357 [IVT_PCI_UNCORE_QPI] = &ivt_uncore_qpi, 1457 [IVT_PCI_UNCORE_QPI] = &ivt_uncore_qpi,
1358 [IVT_PCI_UNCORE_R2PCIE] = &ivt_uncore_r2pcie, 1458 [IVT_PCI_UNCORE_R2PCIE] = &ivt_uncore_r2pcie,
1359 [IVT_PCI_UNCORE_R3QPI] = &ivt_uncore_r3qpi, 1459 [IVT_PCI_UNCORE_R3QPI] = &ivt_uncore_r3qpi,
@@ -1401,6 +1501,10 @@ static DEFINE_PCI_DEVICE_TABLE(ivt_uncore_pci_ids) = {
1401 PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0xef1), 1501 PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0xef1),
1402 .driver_data = UNCORE_PCI_DEV_DATA(IVT_PCI_UNCORE_IMC, 7), 1502 .driver_data = UNCORE_PCI_DEV_DATA(IVT_PCI_UNCORE_IMC, 7),
1403 }, 1503 },
1504 { /* IRP */
1505 PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0xe39),
1506 .driver_data = UNCORE_PCI_DEV_DATA(IVT_PCI_UNCORE_IRP, 0),
1507 },
1404 { /* QPI0 Port 0 */ 1508 { /* QPI0 Port 0 */
1405 PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0xe32), 1509 PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0xe32),
1406 .driver_data = UNCORE_PCI_DEV_DATA(IVT_PCI_UNCORE_QPI, 0), 1510 .driver_data = UNCORE_PCI_DEV_DATA(IVT_PCI_UNCORE_QPI, 0),
@@ -1429,6 +1533,16 @@ static DEFINE_PCI_DEVICE_TABLE(ivt_uncore_pci_ids) = {
1429 PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0xe3e), 1533 PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0xe3e),
1430 .driver_data = UNCORE_PCI_DEV_DATA(IVT_PCI_UNCORE_R3QPI, 2), 1534 .driver_data = UNCORE_PCI_DEV_DATA(IVT_PCI_UNCORE_R3QPI, 2),
1431 }, 1535 },
1536 { /* QPI Port 0 filter */
1537 PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0xe86),
1538 .driver_data = UNCORE_PCI_DEV_DATA(UNCORE_EXTRA_PCI_DEV,
1539 SNBEP_PCI_QPI_PORT0_FILTER),
1540 },
1541 { /* QPI Port 0 filter */
1542 PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0xe96),
1543 .driver_data = UNCORE_PCI_DEV_DATA(UNCORE_EXTRA_PCI_DEV,
1544 SNBEP_PCI_QPI_PORT1_FILTER),
1545 },
1432 { /* end: all zeroes */ } 1546 { /* end: all zeroes */ }
1433}; 1547};
1434 1548
diff --git a/arch/x86/kernel/cpu/proc.c b/arch/x86/kernel/cpu/proc.c
index aee6317b902f..06fe3ed8b851 100644
--- a/arch/x86/kernel/cpu/proc.c
+++ b/arch/x86/kernel/cpu/proc.c
@@ -11,15 +11,12 @@ static void show_cpuinfo_core(struct seq_file *m, struct cpuinfo_x86 *c,
11 unsigned int cpu) 11 unsigned int cpu)
12{ 12{
13#ifdef CONFIG_SMP 13#ifdef CONFIG_SMP
14 if (c->x86_max_cores * smp_num_siblings > 1) { 14 seq_printf(m, "physical id\t: %d\n", c->phys_proc_id);
15 seq_printf(m, "physical id\t: %d\n", c->phys_proc_id); 15 seq_printf(m, "siblings\t: %d\n", cpumask_weight(cpu_core_mask(cpu)));
16 seq_printf(m, "siblings\t: %d\n", 16 seq_printf(m, "core id\t\t: %d\n", c->cpu_core_id);
17 cpumask_weight(cpu_core_mask(cpu))); 17 seq_printf(m, "cpu cores\t: %d\n", c->booted_cores);
18 seq_printf(m, "core id\t\t: %d\n", c->cpu_core_id); 18 seq_printf(m, "apicid\t\t: %d\n", c->apicid);
19 seq_printf(m, "cpu cores\t: %d\n", c->booted_cores); 19 seq_printf(m, "initial apicid\t: %d\n", c->initial_apicid);
20 seq_printf(m, "apicid\t\t: %d\n", c->apicid);
21 seq_printf(m, "initial apicid\t: %d\n", c->initial_apicid);
22 }
23#endif 20#endif
24} 21}
25 22
diff --git a/arch/x86/kernel/cpu/umc.c b/arch/x86/kernel/cpu/umc.c
index 202759a14121..75c5ad5d35cc 100644
--- a/arch/x86/kernel/cpu/umc.c
+++ b/arch/x86/kernel/cpu/umc.c
@@ -11,8 +11,8 @@
11static const struct cpu_dev umc_cpu_dev = { 11static const struct cpu_dev umc_cpu_dev = {
12 .c_vendor = "UMC", 12 .c_vendor = "UMC",
13 .c_ident = { "UMC UMC UMC" }, 13 .c_ident = { "UMC UMC UMC" },
14 .c_models = { 14 .legacy_models = {
15 { .vendor = X86_VENDOR_UMC, .family = 4, .model_names = 15 { .family = 4, .model_names =
16 { 16 {
17 [1] = "U5D", 17 [1] = "U5D",
18 [2] = "U5S", 18 [2] = "U5S",
diff --git a/arch/x86/kernel/crash.c b/arch/x86/kernel/crash.c
index e0e0841eef45..18677a90d6a3 100644
--- a/arch/x86/kernel/crash.c
+++ b/arch/x86/kernel/crash.c
@@ -127,12 +127,12 @@ void native_machine_crash_shutdown(struct pt_regs *regs)
127 cpu_emergency_vmxoff(); 127 cpu_emergency_vmxoff();
128 cpu_emergency_svm_disable(); 128 cpu_emergency_svm_disable();
129 129
130 lapic_shutdown();
131#ifdef CONFIG_X86_IO_APIC 130#ifdef CONFIG_X86_IO_APIC
132 /* Prevent crash_kexec() from deadlocking on ioapic_lock. */ 131 /* Prevent crash_kexec() from deadlocking on ioapic_lock. */
133 ioapic_zap_locks(); 132 ioapic_zap_locks();
134 disable_IO_APIC(); 133 disable_IO_APIC();
135#endif 134#endif
135 lapic_shutdown();
136#ifdef CONFIG_HPET_TIMER 136#ifdef CONFIG_HPET_TIMER
137 hpet_disable(); 137 hpet_disable();
138#endif 138#endif
diff --git a/arch/x86/kernel/devicetree.c b/arch/x86/kernel/devicetree.c
index 376dc7873447..d35078ea1446 100644
--- a/arch/x86/kernel/devicetree.c
+++ b/arch/x86/kernel/devicetree.c
@@ -20,22 +20,13 @@
20#include <asm/hpet.h> 20#include <asm/hpet.h>
21#include <asm/apic.h> 21#include <asm/apic.h>
22#include <asm/pci_x86.h> 22#include <asm/pci_x86.h>
23#include <asm/setup.h>
23 24
24__initdata u64 initial_dtb; 25__initdata u64 initial_dtb;
25char __initdata cmd_line[COMMAND_LINE_SIZE]; 26char __initdata cmd_line[COMMAND_LINE_SIZE];
26 27
27int __initdata of_ioapic; 28int __initdata of_ioapic;
28 29
29unsigned long pci_address_to_pio(phys_addr_t address)
30{
31 /*
32 * The ioport address can be directly used by inX / outX
33 */
34 BUG_ON(address >= (1 << 16));
35 return (unsigned long)address;
36}
37EXPORT_SYMBOL_GPL(pci_address_to_pio);
38
39void __init early_init_dt_scan_chosen_arch(unsigned long node) 30void __init early_init_dt_scan_chosen_arch(unsigned long node)
40{ 31{
41 BUG(); 32 BUG();
@@ -51,15 +42,6 @@ void * __init early_init_dt_alloc_memory_arch(u64 size, u64 align)
51 return __alloc_bootmem(size, align, __pa(MAX_DMA_ADDRESS)); 42 return __alloc_bootmem(size, align, __pa(MAX_DMA_ADDRESS));
52} 43}
53 44
54#ifdef CONFIG_BLK_DEV_INITRD
55void __init early_init_dt_setup_initrd_arch(u64 start, u64 end)
56{
57 initrd_start = (unsigned long)__va(start);
58 initrd_end = (unsigned long)__va(end);
59 initrd_below_start_ok = 1;
60}
61#endif
62
63void __init add_dtb(u64 data) 45void __init add_dtb(u64 data)
64{ 46{
65 initial_dtb = data + offsetof(struct setup_data, data); 47 initial_dtb = data + offsetof(struct setup_data, data);
@@ -105,7 +87,6 @@ struct device_node *pcibios_get_phb_of_node(struct pci_bus *bus)
105 87
106static int x86_of_pci_irq_enable(struct pci_dev *dev) 88static int x86_of_pci_irq_enable(struct pci_dev *dev)
107{ 89{
108 struct of_irq oirq;
109 u32 virq; 90 u32 virq;
110 int ret; 91 int ret;
111 u8 pin; 92 u8 pin;
@@ -116,12 +97,7 @@ static int x86_of_pci_irq_enable(struct pci_dev *dev)
116 if (!pin) 97 if (!pin)
117 return 0; 98 return 0;
118 99
119 ret = of_irq_map_pci(dev, &oirq); 100 virq = of_irq_parse_and_map_pci(dev, 0, 0);
120 if (ret)
121 return ret;
122
123 virq = irq_create_of_mapping(oirq.controller, oirq.specifier,
124 oirq.size);
125 if (virq == 0) 101 if (virq == 0)
126 return -EINVAL; 102 return -EINVAL;
127 dev->irq = virq; 103 dev->irq = virq;
@@ -230,7 +206,7 @@ static void __init dtb_apic_setup(void)
230static void __init x86_flattree_get_config(void) 206static void __init x86_flattree_get_config(void)
231{ 207{
232 u32 size, map_len; 208 u32 size, map_len;
233 void *new_dtb; 209 struct boot_param_header *dt;
234 210
235 if (!initial_dtb) 211 if (!initial_dtb)
236 return; 212 return;
@@ -238,24 +214,17 @@ static void __init x86_flattree_get_config(void)
238 map_len = max(PAGE_SIZE - (initial_dtb & ~PAGE_MASK), 214 map_len = max(PAGE_SIZE - (initial_dtb & ~PAGE_MASK),
239 (u64)sizeof(struct boot_param_header)); 215 (u64)sizeof(struct boot_param_header));
240 216
241 initial_boot_params = early_memremap(initial_dtb, map_len); 217 dt = early_memremap(initial_dtb, map_len);
242 size = be32_to_cpu(initial_boot_params->totalsize); 218 size = be32_to_cpu(dt->totalsize);
243 if (map_len < size) { 219 if (map_len < size) {
244 early_iounmap(initial_boot_params, map_len); 220 early_iounmap(dt, map_len);
245 initial_boot_params = early_memremap(initial_dtb, size); 221 dt = early_memremap(initial_dtb, size);
246 map_len = size; 222 map_len = size;
247 } 223 }
248 224
249 new_dtb = alloc_bootmem(size); 225 initial_boot_params = dt;
250 memcpy(new_dtb, initial_boot_params, size); 226 unflatten_and_copy_device_tree();
251 early_iounmap(initial_boot_params, map_len); 227 early_iounmap(dt, map_len);
252
253 initial_boot_params = new_dtb;
254
255 /* root level address cells */
256 of_scan_flat_dt(early_init_dt_scan_root, NULL);
257
258 unflatten_device_tree();
259} 228}
260#else 229#else
261static inline void x86_flattree_get_config(void) { } 230static inline void x86_flattree_get_config(void) { }
diff --git a/arch/x86/kernel/early_printk.c b/arch/x86/kernel/early_printk.c
index d15f575a861b..01d1c187c9f9 100644
--- a/arch/x86/kernel/early_printk.c
+++ b/arch/x86/kernel/early_printk.c
@@ -14,9 +14,11 @@
14#include <xen/hvc-console.h> 14#include <xen/hvc-console.h>
15#include <asm/pci-direct.h> 15#include <asm/pci-direct.h>
16#include <asm/fixmap.h> 16#include <asm/fixmap.h>
17#include <asm/mrst.h> 17#include <asm/intel-mid.h>
18#include <asm/pgtable.h> 18#include <asm/pgtable.h>
19#include <linux/usb/ehci_def.h> 19#include <linux/usb/ehci_def.h>
20#include <linux/efi.h>
21#include <asm/efi.h>
20 22
21/* Simple VGA output */ 23/* Simple VGA output */
22#define VGABASE (__ISA_IO_base + 0xb8000) 24#define VGABASE (__ISA_IO_base + 0xb8000)
@@ -234,6 +236,11 @@ static int __init setup_early_printk(char *buf)
234 early_console_register(&early_hsu_console, keep); 236 early_console_register(&early_hsu_console, keep);
235 } 237 }
236#endif 238#endif
239#ifdef CONFIG_EARLY_PRINTK_EFI
240 if (!strncmp(buf, "efi", 3))
241 early_console_register(&early_efi_console, keep);
242#endif
243
237 buf++; 244 buf++;
238 } 245 }
239 return 0; 246 return 0;
diff --git a/arch/x86/kernel/entry_32.S b/arch/x86/kernel/entry_32.S
index f0dcb0ceb6a2..fd1bc1b15e6d 100644
--- a/arch/x86/kernel/entry_32.S
+++ b/arch/x86/kernel/entry_32.S
@@ -362,12 +362,9 @@ END(ret_from_exception)
362#ifdef CONFIG_PREEMPT 362#ifdef CONFIG_PREEMPT
363ENTRY(resume_kernel) 363ENTRY(resume_kernel)
364 DISABLE_INTERRUPTS(CLBR_ANY) 364 DISABLE_INTERRUPTS(CLBR_ANY)
365 cmpl $0,TI_preempt_count(%ebp) # non-zero preempt_count ?
366 jnz restore_all
367need_resched: 365need_resched:
368 movl TI_flags(%ebp), %ecx # need_resched set ? 366 cmpl $0,PER_CPU_VAR(__preempt_count)
369 testb $_TIF_NEED_RESCHED, %cl 367 jnz restore_all
370 jz restore_all
371 testl $X86_EFLAGS_IF,PT_EFLAGS(%esp) # interrupts off (exception path) ? 368 testl $X86_EFLAGS_IF,PT_EFLAGS(%esp) # interrupts off (exception path) ?
372 jz restore_all 369 jz restore_all
373 call preempt_schedule_irq 370 call preempt_schedule_irq
diff --git a/arch/x86/kernel/entry_64.S b/arch/x86/kernel/entry_64.S
index b077f4cc225a..603be7c70675 100644
--- a/arch/x86/kernel/entry_64.S
+++ b/arch/x86/kernel/entry_64.S
@@ -1103,10 +1103,8 @@ retint_signal:
1103 /* Returning to kernel space. Check if we need preemption */ 1103 /* Returning to kernel space. Check if we need preemption */
1104 /* rcx: threadinfo. interrupts off. */ 1104 /* rcx: threadinfo. interrupts off. */
1105ENTRY(retint_kernel) 1105ENTRY(retint_kernel)
1106 cmpl $0,TI_preempt_count(%rcx) 1106 cmpl $0,PER_CPU_VAR(__preempt_count)
1107 jnz retint_restore_args 1107 jnz retint_restore_args
1108 bt $TIF_NEED_RESCHED,TI_flags(%rcx)
1109 jnc retint_restore_args
1110 bt $9,EFLAGS-ARGOFFSET(%rsp) /* interrupts off? */ 1108 bt $9,EFLAGS-ARGOFFSET(%rsp) /* interrupts off? */
1111 jnc retint_restore_args 1109 jnc retint_restore_args
1112 call preempt_schedule_irq 1110 call preempt_schedule_irq
@@ -1342,7 +1340,7 @@ bad_gs:
1342 .previous 1340 .previous
1343 1341
1344/* Call softirq on interrupt stack. Interrupts are off. */ 1342/* Call softirq on interrupt stack. Interrupts are off. */
1345ENTRY(call_softirq) 1343ENTRY(do_softirq_own_stack)
1346 CFI_STARTPROC 1344 CFI_STARTPROC
1347 pushq_cfi %rbp 1345 pushq_cfi %rbp
1348 CFI_REL_OFFSET rbp,0 1346 CFI_REL_OFFSET rbp,0
@@ -1359,7 +1357,7 @@ ENTRY(call_softirq)
1359 decl PER_CPU_VAR(irq_count) 1357 decl PER_CPU_VAR(irq_count)
1360 ret 1358 ret
1361 CFI_ENDPROC 1359 CFI_ENDPROC
1362END(call_softirq) 1360END(do_softirq_own_stack)
1363 1361
1364#ifdef CONFIG_XEN 1362#ifdef CONFIG_XEN
1365zeroentry xen_hypervisor_callback xen_do_hypervisor_callback 1363zeroentry xen_hypervisor_callback xen_do_hypervisor_callback
diff --git a/arch/x86/kernel/head32.c b/arch/x86/kernel/head32.c
index 06f87bece92a..c61a14a4a310 100644
--- a/arch/x86/kernel/head32.c
+++ b/arch/x86/kernel/head32.c
@@ -35,8 +35,8 @@ asmlinkage void __init i386_start_kernel(void)
35 35
36 /* Call the subarch specific early setup function */ 36 /* Call the subarch specific early setup function */
37 switch (boot_params.hdr.hardware_subarch) { 37 switch (boot_params.hdr.hardware_subarch) {
38 case X86_SUBARCH_MRST: 38 case X86_SUBARCH_INTEL_MID:
39 x86_mrst_early_setup(); 39 x86_intel_mid_early_setup();
40 break; 40 break;
41 case X86_SUBARCH_CE4100: 41 case X86_SUBARCH_CE4100:
42 x86_ce4100_early_setup(); 42 x86_ce4100_early_setup();
diff --git a/arch/x86/kernel/i386_ksyms_32.c b/arch/x86/kernel/i386_ksyms_32.c
index 0fa69127209a..05fd74f537d6 100644
--- a/arch/x86/kernel/i386_ksyms_32.c
+++ b/arch/x86/kernel/i386_ksyms_32.c
@@ -37,3 +37,10 @@ EXPORT_SYMBOL(strstr);
37 37
38EXPORT_SYMBOL(csum_partial); 38EXPORT_SYMBOL(csum_partial);
39EXPORT_SYMBOL(empty_zero_page); 39EXPORT_SYMBOL(empty_zero_page);
40
41#ifdef CONFIG_PREEMPT
42EXPORT_SYMBOL(___preempt_schedule);
43#ifdef CONFIG_CONTEXT_TRACKING
44EXPORT_SYMBOL(___preempt_schedule_context);
45#endif
46#endif
diff --git a/arch/x86/kernel/i8259.c b/arch/x86/kernel/i8259.c
index 9a5c460404dc..2e977b5d61dd 100644
--- a/arch/x86/kernel/i8259.c
+++ b/arch/x86/kernel/i8259.c
@@ -312,8 +312,7 @@ static void init_8259A(int auto_eoi)
312 */ 312 */
313 outb_pic(0x11, PIC_MASTER_CMD); /* ICW1: select 8259A-1 init */ 313 outb_pic(0x11, PIC_MASTER_CMD); /* ICW1: select 8259A-1 init */
314 314
315 /* ICW2: 8259A-1 IR0-7 mapped to 0x30-0x37 on x86-64, 315 /* ICW2: 8259A-1 IR0-7 mapped to 0x30-0x37 */
316 to 0x20-0x27 on i386 */
317 outb_pic(IRQ0_VECTOR, PIC_MASTER_IMR); 316 outb_pic(IRQ0_VECTOR, PIC_MASTER_IMR);
318 317
319 /* 8259A-1 (the master) has a slave on IR2 */ 318 /* 8259A-1 (the master) has a slave on IR2 */
diff --git a/arch/x86/kernel/irq_32.c b/arch/x86/kernel/irq_32.c
index 4186755f1d7c..d7fcbedc9c43 100644
--- a/arch/x86/kernel/irq_32.c
+++ b/arch/x86/kernel/irq_32.c
@@ -100,9 +100,6 @@ execute_on_irq_stack(int overflow, struct irq_desc *desc, int irq)
100 irqctx->tinfo.task = curctx->tinfo.task; 100 irqctx->tinfo.task = curctx->tinfo.task;
101 irqctx->tinfo.previous_esp = current_stack_pointer; 101 irqctx->tinfo.previous_esp = current_stack_pointer;
102 102
103 /* Copy the preempt_count so that the [soft]irq checks work. */
104 irqctx->tinfo.preempt_count = curctx->tinfo.preempt_count;
105
106 if (unlikely(overflow)) 103 if (unlikely(overflow))
107 call_on_stack(print_stack_overflow, isp); 104 call_on_stack(print_stack_overflow, isp);
108 105
@@ -131,7 +128,6 @@ void irq_ctx_init(int cpu)
131 THREAD_SIZE_ORDER)); 128 THREAD_SIZE_ORDER));
132 memset(&irqctx->tinfo, 0, sizeof(struct thread_info)); 129 memset(&irqctx->tinfo, 0, sizeof(struct thread_info));
133 irqctx->tinfo.cpu = cpu; 130 irqctx->tinfo.cpu = cpu;
134 irqctx->tinfo.preempt_count = HARDIRQ_OFFSET;
135 irqctx->tinfo.addr_limit = MAKE_MM_SEG(0); 131 irqctx->tinfo.addr_limit = MAKE_MM_SEG(0);
136 132
137 per_cpu(hardirq_ctx, cpu) = irqctx; 133 per_cpu(hardirq_ctx, cpu) = irqctx;
@@ -149,35 +145,21 @@ void irq_ctx_init(int cpu)
149 cpu, per_cpu(hardirq_ctx, cpu), per_cpu(softirq_ctx, cpu)); 145 cpu, per_cpu(hardirq_ctx, cpu), per_cpu(softirq_ctx, cpu));
150} 146}
151 147
152asmlinkage void do_softirq(void) 148void do_softirq_own_stack(void)
153{ 149{
154 unsigned long flags;
155 struct thread_info *curctx; 150 struct thread_info *curctx;
156 union irq_ctx *irqctx; 151 union irq_ctx *irqctx;
157 u32 *isp; 152 u32 *isp;
158 153
159 if (in_interrupt()) 154 curctx = current_thread_info();
160 return; 155 irqctx = __this_cpu_read(softirq_ctx);
161 156 irqctx->tinfo.task = curctx->task;
162 local_irq_save(flags); 157 irqctx->tinfo.previous_esp = current_stack_pointer;
163
164 if (local_softirq_pending()) {
165 curctx = current_thread_info();
166 irqctx = __this_cpu_read(softirq_ctx);
167 irqctx->tinfo.task = curctx->task;
168 irqctx->tinfo.previous_esp = current_stack_pointer;
169
170 /* build the stack frame on the softirq stack */
171 isp = (u32 *) ((char *)irqctx + sizeof(*irqctx));
172 158
173 call_on_stack(__do_softirq, isp); 159 /* build the stack frame on the softirq stack */
174 /* 160 isp = (u32 *) ((char *)irqctx + sizeof(*irqctx));
175 * Shouldn't happen, we returned above if in_interrupt():
176 */
177 WARN_ON_ONCE(softirq_count());
178 }
179 161
180 local_irq_restore(flags); 162 call_on_stack(__do_softirq, isp);
181} 163}
182 164
183bool handle_irq(unsigned irq, struct pt_regs *regs) 165bool handle_irq(unsigned irq, struct pt_regs *regs)
diff --git a/arch/x86/kernel/irq_64.c b/arch/x86/kernel/irq_64.c
index d04d3ecded62..4d1c746892eb 100644
--- a/arch/x86/kernel/irq_64.c
+++ b/arch/x86/kernel/irq_64.c
@@ -87,24 +87,3 @@ bool handle_irq(unsigned irq, struct pt_regs *regs)
87 generic_handle_irq_desc(irq, desc); 87 generic_handle_irq_desc(irq, desc);
88 return true; 88 return true;
89} 89}
90
91
92extern void call_softirq(void);
93
94asmlinkage void do_softirq(void)
95{
96 __u32 pending;
97 unsigned long flags;
98
99 if (in_interrupt())
100 return;
101
102 local_irq_save(flags);
103 pending = local_softirq_pending();
104 /* Switch to interrupt stack */
105 if (pending) {
106 call_softirq();
107 WARN_ON_ONCE(softirq_count());
108 }
109 local_irq_restore(flags);
110}
diff --git a/arch/x86/kernel/msr.c b/arch/x86/kernel/msr.c
index 88458faea2f8..05266b5aae22 100644
--- a/arch/x86/kernel/msr.c
+++ b/arch/x86/kernel/msr.c
@@ -46,7 +46,7 @@ static struct class *msr_class;
46static loff_t msr_seek(struct file *file, loff_t offset, int orig) 46static loff_t msr_seek(struct file *file, loff_t offset, int orig)
47{ 47{
48 loff_t ret; 48 loff_t ret;
49 struct inode *inode = file->f_mapping->host; 49 struct inode *inode = file_inode(file);
50 50
51 mutex_lock(&inode->i_mutex); 51 mutex_lock(&inode->i_mutex);
52 switch (orig) { 52 switch (orig) {
diff --git a/arch/x86/kernel/preempt.S b/arch/x86/kernel/preempt.S
new file mode 100644
index 000000000000..ca7f0d58a87d
--- /dev/null
+++ b/arch/x86/kernel/preempt.S
@@ -0,0 +1,25 @@
1
2#include <linux/linkage.h>
3#include <asm/dwarf2.h>
4#include <asm/asm.h>
5#include <asm/calling.h>
6
7ENTRY(___preempt_schedule)
8 CFI_STARTPROC
9 SAVE_ALL
10 call preempt_schedule
11 RESTORE_ALL
12 ret
13 CFI_ENDPROC
14
15#ifdef CONFIG_CONTEXT_TRACKING
16
17ENTRY(___preempt_schedule_context)
18 CFI_STARTPROC
19 SAVE_ALL
20 call preempt_schedule_context
21 RESTORE_ALL
22 ret
23 CFI_ENDPROC
24
25#endif
diff --git a/arch/x86/kernel/process.c b/arch/x86/kernel/process.c
index c83516be1052..3fb8d95ab8b5 100644
--- a/arch/x86/kernel/process.c
+++ b/arch/x86/kernel/process.c
@@ -391,9 +391,9 @@ static void amd_e400_idle(void)
391 * The switch back from broadcast mode needs to be 391 * The switch back from broadcast mode needs to be
392 * called with interrupts disabled. 392 * called with interrupts disabled.
393 */ 393 */
394 local_irq_disable(); 394 local_irq_disable();
395 clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_EXIT, &cpu); 395 clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_EXIT, &cpu);
396 local_irq_enable(); 396 local_irq_enable();
397 } else 397 } else
398 default_idle(); 398 default_idle();
399} 399}
diff --git a/arch/x86/kernel/process_32.c b/arch/x86/kernel/process_32.c
index 884f98f69354..c2ec1aa6d454 100644
--- a/arch/x86/kernel/process_32.c
+++ b/arch/x86/kernel/process_32.c
@@ -292,6 +292,14 @@ __switch_to(struct task_struct *prev_p, struct task_struct *next_p)
292 set_iopl_mask(next->iopl); 292 set_iopl_mask(next->iopl);
293 293
294 /* 294 /*
295 * If it were not for PREEMPT_ACTIVE we could guarantee that the
296 * preempt_count of all tasks was equal here and this would not be
297 * needed.
298 */
299 task_thread_info(prev_p)->saved_preempt_count = this_cpu_read(__preempt_count);
300 this_cpu_write(__preempt_count, task_thread_info(next_p)->saved_preempt_count);
301
302 /*
295 * Now maybe handle debug registers and/or IO bitmaps 303 * Now maybe handle debug registers and/or IO bitmaps
296 */ 304 */
297 if (unlikely(task_thread_info(prev_p)->flags & _TIF_WORK_CTXSW_PREV || 305 if (unlikely(task_thread_info(prev_p)->flags & _TIF_WORK_CTXSW_PREV ||
diff --git a/arch/x86/kernel/process_64.c b/arch/x86/kernel/process_64.c
index bb1dc51bab05..45ab4d6fc8a7 100644
--- a/arch/x86/kernel/process_64.c
+++ b/arch/x86/kernel/process_64.c
@@ -363,6 +363,14 @@ __switch_to(struct task_struct *prev_p, struct task_struct *next_p)
363 this_cpu_write(old_rsp, next->usersp); 363 this_cpu_write(old_rsp, next->usersp);
364 this_cpu_write(current_task, next_p); 364 this_cpu_write(current_task, next_p);
365 365
366 /*
367 * If it were not for PREEMPT_ACTIVE we could guarantee that the
368 * preempt_count of all tasks was equal here and this would not be
369 * needed.
370 */
371 task_thread_info(prev_p)->saved_preempt_count = this_cpu_read(__preempt_count);
372 this_cpu_write(__preempt_count, task_thread_info(next_p)->saved_preempt_count);
373
366 this_cpu_write(kernel_stack, 374 this_cpu_write(kernel_stack,
367 (unsigned long)task_stack_page(next_p) + 375 (unsigned long)task_stack_page(next_p) +
368 THREAD_SIZE - KERNEL_STACK_OFFSET); 376 THREAD_SIZE - KERNEL_STACK_OFFSET);
diff --git a/arch/x86/kernel/reboot.c b/arch/x86/kernel/reboot.c
index 7e920bff99a3..da3c599584a3 100644
--- a/arch/x86/kernel/reboot.c
+++ b/arch/x86/kernel/reboot.c
@@ -61,7 +61,7 @@ static int __init set_bios_reboot(const struct dmi_system_id *d)
61 if (reboot_type != BOOT_BIOS) { 61 if (reboot_type != BOOT_BIOS) {
62 reboot_type = BOOT_BIOS; 62 reboot_type = BOOT_BIOS;
63 pr_info("%s series board detected. Selecting %s-method for reboots.\n", 63 pr_info("%s series board detected. Selecting %s-method for reboots.\n",
64 "BIOS", d->ident); 64 d->ident, "BIOS");
65 } 65 }
66 return 0; 66 return 0;
67} 67}
@@ -117,7 +117,7 @@ static int __init set_pci_reboot(const struct dmi_system_id *d)
117 if (reboot_type != BOOT_CF9) { 117 if (reboot_type != BOOT_CF9) {
118 reboot_type = BOOT_CF9; 118 reboot_type = BOOT_CF9;
119 pr_info("%s series board detected. Selecting %s-method for reboots.\n", 119 pr_info("%s series board detected. Selecting %s-method for reboots.\n",
120 "PCI", d->ident); 120 d->ident, "PCI");
121 } 121 }
122 return 0; 122 return 0;
123} 123}
@@ -127,7 +127,7 @@ static int __init set_kbd_reboot(const struct dmi_system_id *d)
127 if (reboot_type != BOOT_KBD) { 127 if (reboot_type != BOOT_KBD) {
128 reboot_type = BOOT_KBD; 128 reboot_type = BOOT_KBD;
129 pr_info("%s series board detected. Selecting %s-method for reboot.\n", 129 pr_info("%s series board detected. Selecting %s-method for reboot.\n",
130 "KBD", d->ident); 130 d->ident, "KBD");
131 } 131 }
132 return 0; 132 return 0;
133} 133}
@@ -136,252 +136,256 @@ static int __init set_kbd_reboot(const struct dmi_system_id *d)
136 * This is a single dmi_table handling all reboot quirks. 136 * This is a single dmi_table handling all reboot quirks.
137 */ 137 */
138static struct dmi_system_id __initdata reboot_dmi_table[] = { 138static struct dmi_system_id __initdata reboot_dmi_table[] = {
139 { /* Handle problems with rebooting on Dell E520's */ 139
140 .callback = set_bios_reboot, 140 /* Acer */
141 .ident = "Dell E520", 141 { /* Handle reboot issue on Acer Aspire one */
142 .callback = set_kbd_reboot,
143 .ident = "Acer Aspire One A110",
142 .matches = { 144 .matches = {
143 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), 145 DMI_MATCH(DMI_SYS_VENDOR, "Acer"),
144 DMI_MATCH(DMI_PRODUCT_NAME, "Dell DM061"), 146 DMI_MATCH(DMI_PRODUCT_NAME, "AOA110"),
145 }, 147 },
146 }, 148 },
147 { /* Handle problems with rebooting on Dell 1300's */ 149
148 .callback = set_bios_reboot, 150 /* Apple */
149 .ident = "Dell PowerEdge 1300", 151 { /* Handle problems with rebooting on Apple MacBook5 */
152 .callback = set_pci_reboot,
153 .ident = "Apple MacBook5",
150 .matches = { 154 .matches = {
151 DMI_MATCH(DMI_SYS_VENDOR, "Dell Computer Corporation"), 155 DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."),
152 DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 1300/"), 156 DMI_MATCH(DMI_PRODUCT_NAME, "MacBook5"),
153 }, 157 },
154 }, 158 },
155 { /* Handle problems with rebooting on Dell 300's */ 159 { /* Handle problems with rebooting on Apple MacBookPro5 */
156 .callback = set_bios_reboot, 160 .callback = set_pci_reboot,
157 .ident = "Dell PowerEdge 300", 161 .ident = "Apple MacBookPro5",
158 .matches = { 162 .matches = {
159 DMI_MATCH(DMI_SYS_VENDOR, "Dell Computer Corporation"), 163 DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."),
160 DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 300/"), 164 DMI_MATCH(DMI_PRODUCT_NAME, "MacBookPro5"),
161 }, 165 },
162 }, 166 },
163 { /* Handle problems with rebooting on Dell Optiplex 745's SFF */ 167 { /* Handle problems with rebooting on Apple Macmini3,1 */
164 .callback = set_bios_reboot, 168 .callback = set_pci_reboot,
165 .ident = "Dell OptiPlex 745", 169 .ident = "Apple Macmini3,1",
166 .matches = { 170 .matches = {
167 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), 171 DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."),
168 DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex 745"), 172 DMI_MATCH(DMI_PRODUCT_NAME, "Macmini3,1"),
169 }, 173 },
170 }, 174 },
171 { /* Handle problems with rebooting on Dell Optiplex 745's DFF */ 175 { /* Handle problems with rebooting on the iMac9,1. */
172 .callback = set_bios_reboot, 176 .callback = set_pci_reboot,
173 .ident = "Dell OptiPlex 745", 177 .ident = "Apple iMac9,1",
174 .matches = { 178 .matches = {
175 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), 179 DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."),
176 DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex 745"), 180 DMI_MATCH(DMI_PRODUCT_NAME, "iMac9,1"),
177 DMI_MATCH(DMI_BOARD_NAME, "0MM599"),
178 }, 181 },
179 }, 182 },
180 { /* Handle problems with rebooting on Dell Optiplex 745 with 0KW626 */ 183
184 /* ASUS */
185 { /* Handle problems with rebooting on ASUS P4S800 */
181 .callback = set_bios_reboot, 186 .callback = set_bios_reboot,
182 .ident = "Dell OptiPlex 745", 187 .ident = "ASUS P4S800",
183 .matches = { 188 .matches = {
184 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), 189 DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
185 DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex 745"), 190 DMI_MATCH(DMI_BOARD_NAME, "P4S800"),
186 DMI_MATCH(DMI_BOARD_NAME, "0KW626"),
187 }, 191 },
188 }, 192 },
189 { /* Handle problems with rebooting on Dell Optiplex 330 with 0KP561 */ 193
194 /* Dell */
195 { /* Handle problems with rebooting on Dell DXP061 */
190 .callback = set_bios_reboot, 196 .callback = set_bios_reboot,
191 .ident = "Dell OptiPlex 330", 197 .ident = "Dell DXP061",
192 .matches = { 198 .matches = {
193 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), 199 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
194 DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex 330"), 200 DMI_MATCH(DMI_PRODUCT_NAME, "Dell DXP061"),
195 DMI_MATCH(DMI_BOARD_NAME, "0KP561"),
196 }, 201 },
197 }, 202 },
198 { /* Handle problems with rebooting on Dell Optiplex 360 with 0T656F */ 203 { /* Handle problems with rebooting on Dell E520's */
199 .callback = set_bios_reboot, 204 .callback = set_bios_reboot,
200 .ident = "Dell OptiPlex 360", 205 .ident = "Dell E520",
201 .matches = { 206 .matches = {
202 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), 207 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
203 DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex 360"), 208 DMI_MATCH(DMI_PRODUCT_NAME, "Dell DM061"),
204 DMI_MATCH(DMI_BOARD_NAME, "0T656F"),
205 }, 209 },
206 }, 210 },
207 { /* Handle problems with rebooting on Dell OptiPlex 760 with 0G919G */ 211 { /* Handle problems with rebooting on the Latitude E5410. */
208 .callback = set_bios_reboot, 212 .callback = set_pci_reboot,
209 .ident = "Dell OptiPlex 760", 213 .ident = "Dell Latitude E5410",
210 .matches = { 214 .matches = {
211 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), 215 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
212 DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex 760"), 216 DMI_MATCH(DMI_PRODUCT_NAME, "Latitude E5410"),
213 DMI_MATCH(DMI_BOARD_NAME, "0G919G"),
214 }, 217 },
215 }, 218 },
216 { /* Handle problems with rebooting on Dell 2400's */ 219 { /* Handle problems with rebooting on the Latitude E5420. */
217 .callback = set_bios_reboot, 220 .callback = set_pci_reboot,
218 .ident = "Dell PowerEdge 2400", 221 .ident = "Dell Latitude E5420",
219 .matches = { 222 .matches = {
220 DMI_MATCH(DMI_SYS_VENDOR, "Dell Computer Corporation"), 223 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
221 DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 2400"), 224 DMI_MATCH(DMI_PRODUCT_NAME, "Latitude E5420"),
222 }, 225 },
223 }, 226 },
224 { /* Handle problems with rebooting on Dell T5400's */ 227 { /* Handle problems with rebooting on the Latitude E6320. */
225 .callback = set_bios_reboot, 228 .callback = set_pci_reboot,
226 .ident = "Dell Precision T5400", 229 .ident = "Dell Latitude E6320",
227 .matches = { 230 .matches = {
228 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), 231 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
229 DMI_MATCH(DMI_PRODUCT_NAME, "Precision WorkStation T5400"), 232 DMI_MATCH(DMI_PRODUCT_NAME, "Latitude E6320"),
230 }, 233 },
231 }, 234 },
232 { /* Handle problems with rebooting on Dell T7400's */ 235 { /* Handle problems with rebooting on the Latitude E6420. */
233 .callback = set_bios_reboot, 236 .callback = set_pci_reboot,
234 .ident = "Dell Precision T7400", 237 .ident = "Dell Latitude E6420",
235 .matches = { 238 .matches = {
236 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), 239 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
237 DMI_MATCH(DMI_PRODUCT_NAME, "Precision WorkStation T7400"), 240 DMI_MATCH(DMI_PRODUCT_NAME, "Latitude E6420"),
238 }, 241 },
239 }, 242 },
240 { /* Handle problems with rebooting on HP laptops */ 243 { /* Handle problems with rebooting on Dell Optiplex 330 with 0KP561 */
241 .callback = set_bios_reboot, 244 .callback = set_bios_reboot,
242 .ident = "HP Compaq Laptop", 245 .ident = "Dell OptiPlex 330",
243 .matches = { 246 .matches = {
244 DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"), 247 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
245 DMI_MATCH(DMI_PRODUCT_NAME, "HP Compaq"), 248 DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex 330"),
249 DMI_MATCH(DMI_BOARD_NAME, "0KP561"),
246 }, 250 },
247 }, 251 },
248 { /* Handle problems with rebooting on Dell XPS710 */ 252 { /* Handle problems with rebooting on Dell Optiplex 360 with 0T656F */
249 .callback = set_bios_reboot, 253 .callback = set_bios_reboot,
250 .ident = "Dell XPS710", 254 .ident = "Dell OptiPlex 360",
251 .matches = { 255 .matches = {
252 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), 256 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
253 DMI_MATCH(DMI_PRODUCT_NAME, "Dell XPS710"), 257 DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex 360"),
258 DMI_MATCH(DMI_BOARD_NAME, "0T656F"),
254 }, 259 },
255 }, 260 },
256 { /* Handle problems with rebooting on Dell DXP061 */ 261 { /* Handle problems with rebooting on Dell Optiplex 745's SFF */
257 .callback = set_bios_reboot, 262 .callback = set_bios_reboot,
258 .ident = "Dell DXP061", 263 .ident = "Dell OptiPlex 745",
259 .matches = { 264 .matches = {
260 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), 265 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
261 DMI_MATCH(DMI_PRODUCT_NAME, "Dell DXP061"), 266 DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex 745"),
262 }, 267 },
263 }, 268 },
264 { /* Handle problems with rebooting on Sony VGN-Z540N */ 269 { /* Handle problems with rebooting on Dell Optiplex 745's DFF */
265 .callback = set_bios_reboot, 270 .callback = set_bios_reboot,
266 .ident = "Sony VGN-Z540N", 271 .ident = "Dell OptiPlex 745",
267 .matches = { 272 .matches = {
268 DMI_MATCH(DMI_SYS_VENDOR, "Sony Corporation"), 273 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
269 DMI_MATCH(DMI_PRODUCT_NAME, "VGN-Z540N"), 274 DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex 745"),
275 DMI_MATCH(DMI_BOARD_NAME, "0MM599"),
270 }, 276 },
271 }, 277 },
272 { /* Handle problems with rebooting on ASUS P4S800 */ 278 { /* Handle problems with rebooting on Dell Optiplex 745 with 0KW626 */
273 .callback = set_bios_reboot, 279 .callback = set_bios_reboot,
274 .ident = "ASUS P4S800", 280 .ident = "Dell OptiPlex 745",
275 .matches = {
276 DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
277 DMI_MATCH(DMI_BOARD_NAME, "P4S800"),
278 },
279 },
280
281 { /* Handle reboot issue on Acer Aspire one */
282 .callback = set_kbd_reboot,
283 .ident = "Acer Aspire One A110",
284 .matches = { 281 .matches = {
285 DMI_MATCH(DMI_SYS_VENDOR, "Acer"), 282 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
286 DMI_MATCH(DMI_PRODUCT_NAME, "AOA110"), 283 DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex 745"),
284 DMI_MATCH(DMI_BOARD_NAME, "0KW626"),
287 }, 285 },
288 }, 286 },
289 { /* Handle problems with rebooting on Apple MacBook5 */ 287 { /* Handle problems with rebooting on Dell OptiPlex 760 with 0G919G */
290 .callback = set_pci_reboot, 288 .callback = set_bios_reboot,
291 .ident = "Apple MacBook5", 289 .ident = "Dell OptiPlex 760",
292 .matches = { 290 .matches = {
293 DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."), 291 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
294 DMI_MATCH(DMI_PRODUCT_NAME, "MacBook5"), 292 DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex 760"),
293 DMI_MATCH(DMI_BOARD_NAME, "0G919G"),
295 }, 294 },
296 }, 295 },
297 { /* Handle problems with rebooting on Apple MacBookPro5 */ 296 { /* Handle problems with rebooting on the OptiPlex 990. */
298 .callback = set_pci_reboot, 297 .callback = set_pci_reboot,
299 .ident = "Apple MacBookPro5", 298 .ident = "Dell OptiPlex 990",
300 .matches = { 299 .matches = {
301 DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."), 300 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
302 DMI_MATCH(DMI_PRODUCT_NAME, "MacBookPro5"), 301 DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex 990"),
303 }, 302 },
304 }, 303 },
305 { /* Handle problems with rebooting on Apple Macmini3,1 */ 304 { /* Handle problems with rebooting on Dell 300's */
306 .callback = set_pci_reboot, 305 .callback = set_bios_reboot,
307 .ident = "Apple Macmini3,1", 306 .ident = "Dell PowerEdge 300",
308 .matches = { 307 .matches = {
309 DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."), 308 DMI_MATCH(DMI_SYS_VENDOR, "Dell Computer Corporation"),
310 DMI_MATCH(DMI_PRODUCT_NAME, "Macmini3,1"), 309 DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 300/"),
311 }, 310 },
312 }, 311 },
313 { /* Handle problems with rebooting on the iMac9,1. */ 312 { /* Handle problems with rebooting on Dell 1300's */
314 .callback = set_pci_reboot, 313 .callback = set_bios_reboot,
315 .ident = "Apple iMac9,1", 314 .ident = "Dell PowerEdge 1300",
316 .matches = { 315 .matches = {
317 DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."), 316 DMI_MATCH(DMI_SYS_VENDOR, "Dell Computer Corporation"),
318 DMI_MATCH(DMI_PRODUCT_NAME, "iMac9,1"), 317 DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 1300/"),
319 }, 318 },
320 }, 319 },
321 { /* Handle problems with rebooting on the Latitude E6320. */ 320 { /* Handle problems with rebooting on Dell 2400's */
322 .callback = set_pci_reboot, 321 .callback = set_bios_reboot,
323 .ident = "Dell Latitude E6320", 322 .ident = "Dell PowerEdge 2400",
324 .matches = { 323 .matches = {
325 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), 324 DMI_MATCH(DMI_SYS_VENDOR, "Dell Computer Corporation"),
326 DMI_MATCH(DMI_PRODUCT_NAME, "Latitude E6320"), 325 DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 2400"),
327 }, 326 },
328 }, 327 },
329 { /* Handle problems with rebooting on the Latitude E5410. */ 328 { /* Handle problems with rebooting on the Dell PowerEdge C6100. */
330 .callback = set_pci_reboot, 329 .callback = set_pci_reboot,
331 .ident = "Dell Latitude E5410", 330 .ident = "Dell PowerEdge C6100",
332 .matches = { 331 .matches = {
333 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), 332 DMI_MATCH(DMI_SYS_VENDOR, "Dell"),
334 DMI_MATCH(DMI_PRODUCT_NAME, "Latitude E5410"), 333 DMI_MATCH(DMI_PRODUCT_NAME, "C6100"),
335 }, 334 },
336 }, 335 },
337 { /* Handle problems with rebooting on the Latitude E5420. */ 336 { /* Handle problems with rebooting on the Precision M6600. */
338 .callback = set_pci_reboot, 337 .callback = set_pci_reboot,
339 .ident = "Dell Latitude E5420", 338 .ident = "Dell Precision M6600",
340 .matches = { 339 .matches = {
341 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), 340 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
342 DMI_MATCH(DMI_PRODUCT_NAME, "Latitude E5420"), 341 DMI_MATCH(DMI_PRODUCT_NAME, "Precision M6600"),
343 }, 342 },
344 }, 343 },
345 { /* Handle problems with rebooting on the Latitude E6420. */ 344 { /* Handle problems with rebooting on Dell T5400's */
346 .callback = set_pci_reboot, 345 .callback = set_bios_reboot,
347 .ident = "Dell Latitude E6420", 346 .ident = "Dell Precision T5400",
348 .matches = { 347 .matches = {
349 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), 348 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
350 DMI_MATCH(DMI_PRODUCT_NAME, "Latitude E6420"), 349 DMI_MATCH(DMI_PRODUCT_NAME, "Precision WorkStation T5400"),
351 }, 350 },
352 }, 351 },
353 { /* Handle problems with rebooting on the OptiPlex 990. */ 352 { /* Handle problems with rebooting on Dell T7400's */
354 .callback = set_pci_reboot, 353 .callback = set_bios_reboot,
355 .ident = "Dell OptiPlex 990", 354 .ident = "Dell Precision T7400",
356 .matches = { 355 .matches = {
357 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), 356 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
358 DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex 990"), 357 DMI_MATCH(DMI_PRODUCT_NAME, "Precision WorkStation T7400"),
359 }, 358 },
360 }, 359 },
361 { /* Handle problems with rebooting on the Precision M6600. */ 360 { /* Handle problems with rebooting on Dell XPS710 */
362 .callback = set_pci_reboot, 361 .callback = set_bios_reboot,
363 .ident = "Dell Precision M6600", 362 .ident = "Dell XPS710",
364 .matches = { 363 .matches = {
365 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), 364 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
366 DMI_MATCH(DMI_PRODUCT_NAME, "Precision M6600"), 365 DMI_MATCH(DMI_PRODUCT_NAME, "Dell XPS710"),
367 }, 366 },
368 }, 367 },
369 { /* Handle problems with rebooting on the Dell PowerEdge C6100. */ 368
370 .callback = set_pci_reboot, 369 /* Hewlett-Packard */
371 .ident = "Dell PowerEdge C6100", 370 { /* Handle problems with rebooting on HP laptops */
371 .callback = set_bios_reboot,
372 .ident = "HP Compaq Laptop",
372 .matches = { 373 .matches = {
373 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), 374 DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"),
374 DMI_MATCH(DMI_PRODUCT_NAME, "C6100"), 375 DMI_MATCH(DMI_PRODUCT_NAME, "HP Compaq"),
375 }, 376 },
376 }, 377 },
377 { /* Some C6100 machines were shipped with vendor being 'Dell'. */ 378
378 .callback = set_pci_reboot, 379 /* Sony */
379 .ident = "Dell PowerEdge C6100", 380 { /* Handle problems with rebooting on Sony VGN-Z540N */
381 .callback = set_bios_reboot,
382 .ident = "Sony VGN-Z540N",
380 .matches = { 383 .matches = {
381 DMI_MATCH(DMI_SYS_VENDOR, "Dell"), 384 DMI_MATCH(DMI_SYS_VENDOR, "Sony Corporation"),
382 DMI_MATCH(DMI_PRODUCT_NAME, "C6100"), 385 DMI_MATCH(DMI_PRODUCT_NAME, "VGN-Z540N"),
383 }, 386 },
384 }, 387 },
388
385 { } 389 { }
386}; 390};
387 391
@@ -535,10 +539,13 @@ static void native_machine_emergency_restart(void)
535 539
536 case BOOT_CF9_COND: 540 case BOOT_CF9_COND:
537 if (port_cf9_safe) { 541 if (port_cf9_safe) {
538 u8 cf9 = inb(0xcf9) & ~6; 542 u8 reboot_code = reboot_mode == REBOOT_WARM ?
543 0x06 : 0x0E;
544 u8 cf9 = inb(0xcf9) & ~reboot_code;
539 outb(cf9|2, 0xcf9); /* Request hard reset */ 545 outb(cf9|2, 0xcf9); /* Request hard reset */
540 udelay(50); 546 udelay(50);
541 outb(cf9|6, 0xcf9); /* Actually do the reset */ 547 /* Actually do the reset */
548 outb(cf9|reboot_code, 0xcf9);
542 udelay(50); 549 udelay(50);
543 } 550 }
544 reboot_type = BOOT_KBD; 551 reboot_type = BOOT_KBD;
@@ -550,6 +557,10 @@ static void native_machine_emergency_restart(void)
550void native_machine_shutdown(void) 557void native_machine_shutdown(void)
551{ 558{
552 /* Stop the cpus and apics */ 559 /* Stop the cpus and apics */
560#ifdef CONFIG_X86_IO_APIC
561 disable_IO_APIC();
562#endif
563
553#ifdef CONFIG_SMP 564#ifdef CONFIG_SMP
554 /* 565 /*
555 * Stop all of the others. Also disable the local irq to 566 * Stop all of the others. Also disable the local irq to
@@ -562,10 +573,6 @@ void native_machine_shutdown(void)
562 573
563 lapic_shutdown(); 574 lapic_shutdown();
564 575
565#ifdef CONFIG_X86_IO_APIC
566 disable_IO_APIC();
567#endif
568
569#ifdef CONFIG_HPET_TIMER 576#ifdef CONFIG_HPET_TIMER
570 hpet_disable(); 577 hpet_disable();
571#endif 578#endif
diff --git a/arch/x86/kernel/rtc.c b/arch/x86/kernel/rtc.c
index 0aa29394ed6f..ca9622a25e95 100644
--- a/arch/x86/kernel/rtc.c
+++ b/arch/x86/kernel/rtc.c
@@ -12,7 +12,7 @@
12#include <asm/vsyscall.h> 12#include <asm/vsyscall.h>
13#include <asm/x86_init.h> 13#include <asm/x86_init.h>
14#include <asm/time.h> 14#include <asm/time.h>
15#include <asm/mrst.h> 15#include <asm/intel-mid.h>
16#include <asm/rtc.h> 16#include <asm/rtc.h>
17 17
18#ifdef CONFIG_X86_32 18#ifdef CONFIG_X86_32
@@ -189,9 +189,17 @@ static __init int add_rtc_cmos(void)
189 return 0; 189 return 0;
190 190
191 /* Intel MID platforms don't have ioport rtc */ 191 /* Intel MID platforms don't have ioport rtc */
192 if (mrst_identify_cpu()) 192 if (intel_mid_identify_cpu())
193 return -ENODEV; 193 return -ENODEV;
194 194
195#ifdef CONFIG_ACPI
196 if (acpi_gbl_FADT.boot_flags & ACPI_FADT_NO_CMOS_RTC) {
197 /* This warning can likely go away again in a year or two. */
198 pr_info("ACPI: not registering RTC platform device\n");
199 return -ENODEV;
200 }
201#endif
202
195 platform_device_register(&rtc_device); 203 platform_device_register(&rtc_device);
196 dev_info(&rtc_device.dev, 204 dev_info(&rtc_device.dev,
197 "registered platform RTC device (no PNP device found)\n"); 205 "registered platform RTC device (no PNP device found)\n");
diff --git a/arch/x86/kernel/setup.c b/arch/x86/kernel/setup.c
index f0de6294b955..918d489fa53d 100644
--- a/arch/x86/kernel/setup.c
+++ b/arch/x86/kernel/setup.c
@@ -993,6 +993,7 @@ void __init setup_arch(char **cmdline_p)
993 efi_init(); 993 efi_init();
994 994
995 dmi_scan_machine(); 995 dmi_scan_machine();
996 dmi_memdev_walk();
996 dmi_set_dump_stack_arch_desc(); 997 dmi_set_dump_stack_arch_desc();
997 998
998 /* 999 /*
diff --git a/arch/x86/kernel/smpboot.c b/arch/x86/kernel/smpboot.c
index 6cacab671f9b..2a165580fa16 100644
--- a/arch/x86/kernel/smpboot.c
+++ b/arch/x86/kernel/smpboot.c
@@ -73,11 +73,10 @@
73#include <asm/setup.h> 73#include <asm/setup.h>
74#include <asm/uv/uv.h> 74#include <asm/uv/uv.h>
75#include <linux/mc146818rtc.h> 75#include <linux/mc146818rtc.h>
76
77#include <asm/smpboot_hooks.h> 76#include <asm/smpboot_hooks.h>
78#include <asm/i8259.h> 77#include <asm/i8259.h>
79
80#include <asm/realmode.h> 78#include <asm/realmode.h>
79#include <asm/misc.h>
81 80
82/* State of each CPU */ 81/* State of each CPU */
83DEFINE_PER_CPU(int, cpu_state) = { 0 }; 82DEFINE_PER_CPU(int, cpu_state) = { 0 };
@@ -648,22 +647,46 @@ wakeup_secondary_cpu_via_init(int phys_apicid, unsigned long start_eip)
648 return (send_status | accept_status); 647 return (send_status | accept_status);
649} 648}
650 649
650void smp_announce(void)
651{
652 int num_nodes = num_online_nodes();
653
654 printk(KERN_INFO "x86: Booted up %d node%s, %d CPUs\n",
655 num_nodes, (num_nodes > 1 ? "s" : ""), num_online_cpus());
656}
657
651/* reduce the number of lines printed when booting a large cpu count system */ 658/* reduce the number of lines printed when booting a large cpu count system */
652static void announce_cpu(int cpu, int apicid) 659static void announce_cpu(int cpu, int apicid)
653{ 660{
654 static int current_node = -1; 661 static int current_node = -1;
655 int node = early_cpu_to_node(cpu); 662 int node = early_cpu_to_node(cpu);
656 int max_cpu_present = find_last_bit(cpumask_bits(cpu_present_mask), NR_CPUS); 663 static int width, node_width;
664
665 if (!width)
666 width = num_digits(num_possible_cpus()) + 1; /* + '#' sign */
667
668 if (!node_width)
669 node_width = num_digits(num_possible_nodes()) + 1; /* + '#' */
670
671 if (cpu == 1)
672 printk(KERN_INFO "x86: Booting SMP configuration:\n");
657 673
658 if (system_state == SYSTEM_BOOTING) { 674 if (system_state == SYSTEM_BOOTING) {
659 if (node != current_node) { 675 if (node != current_node) {
660 if (current_node > (-1)) 676 if (current_node > (-1))
661 pr_cont(" OK\n"); 677 pr_cont("\n");
662 current_node = node; 678 current_node = node;
663 pr_info("Booting Node %3d, Processors ", node); 679
680 printk(KERN_INFO ".... node %*s#%d, CPUs: ",
681 node_width - num_digits(node), " ", node);
664 } 682 }
665 pr_cont(" #%4d%s", cpu, cpu == max_cpu_present ? " OK\n" : ""); 683
666 return; 684 /* Add padding for the BSP */
685 if (cpu == 1)
686 pr_cont("%*s", width + 1, " ");
687
688 pr_cont("%*s#%d", width - num_digits(cpu), " ", cpu);
689
667 } else 690 } else
668 pr_info("Booting Node %d Processor %d APIC 0x%x\n", 691 pr_info("Booting Node %d Processor %d APIC 0x%x\n",
669 node, cpu, apicid); 692 node, cpu, apicid);
diff --git a/arch/x86/kernel/traps.c b/arch/x86/kernel/traps.c
index 8c8093b146ca..729aa779ff75 100644
--- a/arch/x86/kernel/traps.c
+++ b/arch/x86/kernel/traps.c
@@ -88,7 +88,7 @@ static inline void conditional_sti(struct pt_regs *regs)
88 88
89static inline void preempt_conditional_sti(struct pt_regs *regs) 89static inline void preempt_conditional_sti(struct pt_regs *regs)
90{ 90{
91 inc_preempt_count(); 91 preempt_count_inc();
92 if (regs->flags & X86_EFLAGS_IF) 92 if (regs->flags & X86_EFLAGS_IF)
93 local_irq_enable(); 93 local_irq_enable();
94} 94}
@@ -103,7 +103,7 @@ static inline void preempt_conditional_cli(struct pt_regs *regs)
103{ 103{
104 if (regs->flags & X86_EFLAGS_IF) 104 if (regs->flags & X86_EFLAGS_IF)
105 local_irq_disable(); 105 local_irq_disable();
106 dec_preempt_count(); 106 preempt_count_dec();
107} 107}
108 108
109static int __kprobes 109static int __kprobes
diff --git a/arch/x86/kernel/vmlinux.lds.S b/arch/x86/kernel/vmlinux.lds.S
index 10c4f3006afd..da6b35a98260 100644
--- a/arch/x86/kernel/vmlinux.lds.S
+++ b/arch/x86/kernel/vmlinux.lds.S
@@ -199,6 +199,15 @@ SECTIONS
199 __x86_cpu_dev_end = .; 199 __x86_cpu_dev_end = .;
200 } 200 }
201 201
202#ifdef CONFIG_X86_INTEL_MID
203 .x86_intel_mid_dev.init : AT(ADDR(.x86_intel_mid_dev.init) - \
204 LOAD_OFFSET) {
205 __x86_intel_mid_dev_start = .;
206 *(.x86_intel_mid_dev.init)
207 __x86_intel_mid_dev_end = .;
208 }
209#endif
210
202 /* 211 /*
203 * start address and size of operations which during runtime 212 * start address and size of operations which during runtime
204 * can be patched with virtualization friendly instructions or 213 * can be patched with virtualization friendly instructions or
diff --git a/arch/x86/kernel/x8664_ksyms_64.c b/arch/x86/kernel/x8664_ksyms_64.c
index b014d9414d08..040681928e9d 100644
--- a/arch/x86/kernel/x8664_ksyms_64.c
+++ b/arch/x86/kernel/x8664_ksyms_64.c
@@ -66,3 +66,10 @@ EXPORT_SYMBOL(empty_zero_page);
66#ifndef CONFIG_PARAVIRT 66#ifndef CONFIG_PARAVIRT
67EXPORT_SYMBOL(native_load_gs_index); 67EXPORT_SYMBOL(native_load_gs_index);
68#endif 68#endif
69
70#ifdef CONFIG_PREEMPT
71EXPORT_SYMBOL(___preempt_schedule);
72#ifdef CONFIG_CONTEXT_TRACKING
73EXPORT_SYMBOL(___preempt_schedule_context);
74#endif
75#endif
diff --git a/arch/x86/lib/Makefile b/arch/x86/lib/Makefile
index 96b2c6697c9d..992d63bb154f 100644
--- a/arch/x86/lib/Makefile
+++ b/arch/x86/lib/Makefile
@@ -16,7 +16,7 @@ clean-files := inat-tables.c
16 16
17obj-$(CONFIG_SMP) += msr-smp.o cache-smp.o 17obj-$(CONFIG_SMP) += msr-smp.o cache-smp.o
18 18
19lib-y := delay.o 19lib-y := delay.o misc.o
20lib-y += thunk_$(BITS).o 20lib-y += thunk_$(BITS).o
21lib-y += usercopy_$(BITS).o usercopy.o getuser.o putuser.o 21lib-y += usercopy_$(BITS).o usercopy.o getuser.o putuser.o
22lib-y += memcpy_$(BITS).o 22lib-y += memcpy_$(BITS).o
diff --git a/arch/x86/lib/misc.c b/arch/x86/lib/misc.c
new file mode 100644
index 000000000000..76b373af03f0
--- /dev/null
+++ b/arch/x86/lib/misc.c
@@ -0,0 +1,21 @@
1/*
2 * Count the digits of @val including a possible sign.
3 *
4 * (Typed on and submitted from hpa's mobile phone.)
5 */
6int num_digits(int val)
7{
8 int m = 10;
9 int d = 1;
10
11 if (val < 0) {
12 d++;
13 val = -val;
14 }
15
16 while (val >= m) {
17 m *= 10;
18 d++;
19 }
20 return d;
21}
diff --git a/arch/x86/lib/usercopy.c b/arch/x86/lib/usercopy.c
index 4f74d94c8d97..ddf9ecb53cc3 100644
--- a/arch/x86/lib/usercopy.c
+++ b/arch/x86/lib/usercopy.c
@@ -11,39 +11,26 @@
11#include <linux/sched.h> 11#include <linux/sched.h>
12 12
13/* 13/*
14 * best effort, GUP based copy_from_user() that is NMI-safe 14 * We rely on the nested NMI work to allow atomic faults from the NMI path; the
15 * nested NMI paths are careful to preserve CR2.
15 */ 16 */
16unsigned long 17unsigned long
17copy_from_user_nmi(void *to, const void __user *from, unsigned long n) 18copy_from_user_nmi(void *to, const void __user *from, unsigned long n)
18{ 19{
19 unsigned long offset, addr = (unsigned long)from; 20 unsigned long ret;
20 unsigned long size, len = 0;
21 struct page *page;
22 void *map;
23 int ret;
24 21
25 if (__range_not_ok(from, n, TASK_SIZE)) 22 if (__range_not_ok(from, n, TASK_SIZE))
26 return len; 23 return 0;
27 24
28 do { 25 /*
29 ret = __get_user_pages_fast(addr, 1, 0, &page); 26 * Even though this function is typically called from NMI/IRQ context
30 if (!ret) 27 * disable pagefaults so that its behaviour is consistent even when
31 break; 28 * called form other contexts.
32 29 */
33 offset = addr & (PAGE_SIZE - 1); 30 pagefault_disable();
34 size = min(PAGE_SIZE - offset, n - len); 31 ret = __copy_from_user_inatomic(to, from, n);
35 32 pagefault_enable();
36 map = kmap_atomic(page); 33
37 memcpy(to, map+offset, size); 34 return ret;
38 kunmap_atomic(map);
39 put_page(page);
40
41 len += size;
42 to += size;
43 addr += size;
44
45 } while (len < n);
46
47 return len;
48} 35}
49EXPORT_SYMBOL_GPL(copy_from_user_nmi); 36EXPORT_SYMBOL_GPL(copy_from_user_nmi);
diff --git a/arch/x86/lib/usercopy_32.c b/arch/x86/lib/usercopy_32.c
index 3eb18acd0e40..e2f5e21c03b3 100644
--- a/arch/x86/lib/usercopy_32.c
+++ b/arch/x86/lib/usercopy_32.c
@@ -654,14 +654,13 @@ EXPORT_SYMBOL(__copy_from_user_ll_nocache_nozero);
654 * Returns number of bytes that could not be copied. 654 * Returns number of bytes that could not be copied.
655 * On success, this will be zero. 655 * On success, this will be zero.
656 */ 656 */
657unsigned long 657unsigned long _copy_to_user(void __user *to, const void *from, unsigned n)
658copy_to_user(void __user *to, const void *from, unsigned long n)
659{ 658{
660 if (access_ok(VERIFY_WRITE, to, n)) 659 if (access_ok(VERIFY_WRITE, to, n))
661 n = __copy_to_user(to, from, n); 660 n = __copy_to_user(to, from, n);
662 return n; 661 return n;
663} 662}
664EXPORT_SYMBOL(copy_to_user); 663EXPORT_SYMBOL(_copy_to_user);
665 664
666/** 665/**
667 * copy_from_user: - Copy a block of data from user space. 666 * copy_from_user: - Copy a block of data from user space.
@@ -679,8 +678,7 @@ EXPORT_SYMBOL(copy_to_user);
679 * If some data could not be copied, this function will pad the copied 678 * If some data could not be copied, this function will pad the copied
680 * data to the requested size using zero bytes. 679 * data to the requested size using zero bytes.
681 */ 680 */
682unsigned long 681unsigned long _copy_from_user(void *to, const void __user *from, unsigned n)
683_copy_from_user(void *to, const void __user *from, unsigned long n)
684{ 682{
685 if (access_ok(VERIFY_READ, from, n)) 683 if (access_ok(VERIFY_READ, from, n))
686 n = __copy_from_user(to, from, n); 684 n = __copy_from_user(to, from, n);
diff --git a/arch/x86/mm/fault.c b/arch/x86/mm/fault.c
index 3aaeffcfd67a..7a517bb41060 100644
--- a/arch/x86/mm/fault.c
+++ b/arch/x86/mm/fault.c
@@ -51,7 +51,7 @@ kmmio_fault(struct pt_regs *regs, unsigned long addr)
51 return 0; 51 return 0;
52} 52}
53 53
54static inline int __kprobes notify_page_fault(struct pt_regs *regs) 54static inline int __kprobes kprobes_fault(struct pt_regs *regs)
55{ 55{
56 int ret = 0; 56 int ret = 0;
57 57
@@ -1048,7 +1048,7 @@ __do_page_fault(struct pt_regs *regs, unsigned long error_code)
1048 return; 1048 return;
1049 1049
1050 /* kprobes don't want to hook the spurious faults: */ 1050 /* kprobes don't want to hook the spurious faults: */
1051 if (notify_page_fault(regs)) 1051 if (kprobes_fault(regs))
1052 return; 1052 return;
1053 /* 1053 /*
1054 * Don't take the mm semaphore here. If we fixup a prefetch 1054 * Don't take the mm semaphore here. If we fixup a prefetch
@@ -1060,23 +1060,8 @@ __do_page_fault(struct pt_regs *regs, unsigned long error_code)
1060 } 1060 }
1061 1061
1062 /* kprobes don't want to hook the spurious faults: */ 1062 /* kprobes don't want to hook the spurious faults: */
1063 if (unlikely(notify_page_fault(regs))) 1063 if (unlikely(kprobes_fault(regs)))
1064 return; 1064 return;
1065 /*
1066 * It's safe to allow irq's after cr2 has been saved and the
1067 * vmalloc fault has been handled.
1068 *
1069 * User-mode registers count as a user access even for any
1070 * potential system fault or CPU buglet:
1071 */
1072 if (user_mode_vm(regs)) {
1073 local_irq_enable();
1074 error_code |= PF_USER;
1075 flags |= FAULT_FLAG_USER;
1076 } else {
1077 if (regs->flags & X86_EFLAGS_IF)
1078 local_irq_enable();
1079 }
1080 1065
1081 if (unlikely(error_code & PF_RSVD)) 1066 if (unlikely(error_code & PF_RSVD))
1082 pgtable_bad(regs, error_code, address); 1067 pgtable_bad(regs, error_code, address);
@@ -1088,8 +1073,6 @@ __do_page_fault(struct pt_regs *regs, unsigned long error_code)
1088 } 1073 }
1089 } 1074 }
1090 1075
1091 perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS, 1, regs, address);
1092
1093 /* 1076 /*
1094 * If we're in an interrupt, have no user context or are running 1077 * If we're in an interrupt, have no user context or are running
1095 * in an atomic region then we must not take the fault: 1078 * in an atomic region then we must not take the fault:
@@ -1099,6 +1082,24 @@ __do_page_fault(struct pt_regs *regs, unsigned long error_code)
1099 return; 1082 return;
1100 } 1083 }
1101 1084
1085 /*
1086 * It's safe to allow irq's after cr2 has been saved and the
1087 * vmalloc fault has been handled.
1088 *
1089 * User-mode registers count as a user access even for any
1090 * potential system fault or CPU buglet:
1091 */
1092 if (user_mode_vm(regs)) {
1093 local_irq_enable();
1094 error_code |= PF_USER;
1095 flags |= FAULT_FLAG_USER;
1096 } else {
1097 if (regs->flags & X86_EFLAGS_IF)
1098 local_irq_enable();
1099 }
1100
1101 perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS, 1, regs, address);
1102
1102 if (error_code & PF_WRITE) 1103 if (error_code & PF_WRITE)
1103 flags |= FAULT_FLAG_WRITE; 1104 flags |= FAULT_FLAG_WRITE;
1104 1105
diff --git a/arch/x86/mm/init.c b/arch/x86/mm/init.c
index 04664cdb7fda..ce32017c5e38 100644
--- a/arch/x86/mm/init.c
+++ b/arch/x86/mm/init.c
@@ -399,8 +399,25 @@ static unsigned long __init init_range_memory_mapping(
399 return mapped_ram_size; 399 return mapped_ram_size;
400} 400}
401 401
402/* (PUD_SHIFT-PMD_SHIFT)/2 */ 402static unsigned long __init get_new_step_size(unsigned long step_size)
403#define STEP_SIZE_SHIFT 5 403{
404 /*
405 * Explain why we shift by 5 and why we don't have to worry about
406 * 'step_size << 5' overflowing:
407 *
408 * initial mapped size is PMD_SIZE (2M).
409 * We can not set step_size to be PUD_SIZE (1G) yet.
410 * In worse case, when we cross the 1G boundary, and
411 * PG_LEVEL_2M is not set, we will need 1+1+512 pages (2M + 8k)
412 * to map 1G range with PTE. Use 5 as shift for now.
413 *
414 * Don't need to worry about overflow, on 32bit, when step_size
415 * is 0, round_down() returns 0 for start, and that turns it
416 * into 0x100000000ULL.
417 */
418 return step_size << 5;
419}
420
404void __init init_mem_mapping(void) 421void __init init_mem_mapping(void)
405{ 422{
406 unsigned long end, real_end, start, last_start; 423 unsigned long end, real_end, start, last_start;
@@ -449,7 +466,7 @@ void __init init_mem_mapping(void)
449 min_pfn_mapped = last_start >> PAGE_SHIFT; 466 min_pfn_mapped = last_start >> PAGE_SHIFT;
450 /* only increase step_size after big range get mapped */ 467 /* only increase step_size after big range get mapped */
451 if (new_mapped_ram_size > mapped_ram_size) 468 if (new_mapped_ram_size > mapped_ram_size)
452 step_size <<= STEP_SIZE_SHIFT; 469 step_size = get_new_step_size(step_size);
453 mapped_ram_size += new_mapped_ram_size; 470 mapped_ram_size += new_mapped_ram_size;
454 } 471 }
455 472
diff --git a/arch/x86/oprofile/backtrace.c b/arch/x86/oprofile/backtrace.c
index d6aa6e8315d1..5d04be5efb64 100644
--- a/arch/x86/oprofile/backtrace.c
+++ b/arch/x86/oprofile/backtrace.c
@@ -47,7 +47,7 @@ dump_user_backtrace_32(struct stack_frame_ia32 *head)
47 unsigned long bytes; 47 unsigned long bytes;
48 48
49 bytes = copy_from_user_nmi(bufhead, head, sizeof(bufhead)); 49 bytes = copy_from_user_nmi(bufhead, head, sizeof(bufhead));
50 if (bytes != sizeof(bufhead)) 50 if (bytes != 0)
51 return NULL; 51 return NULL;
52 52
53 fp = (struct stack_frame_ia32 *) compat_ptr(bufhead[0].next_frame); 53 fp = (struct stack_frame_ia32 *) compat_ptr(bufhead[0].next_frame);
@@ -93,7 +93,7 @@ static struct stack_frame *dump_user_backtrace(struct stack_frame *head)
93 unsigned long bytes; 93 unsigned long bytes;
94 94
95 bytes = copy_from_user_nmi(bufhead, head, sizeof(bufhead)); 95 bytes = copy_from_user_nmi(bufhead, head, sizeof(bufhead));
96 if (bytes != sizeof(bufhead)) 96 if (bytes != 0)
97 return NULL; 97 return NULL;
98 98
99 oprofile_add_trace(bufhead[0].return_address); 99 oprofile_add_trace(bufhead[0].return_address);
diff --git a/arch/x86/pci/Makefile b/arch/x86/pci/Makefile
index ee0af58ca5bd..e063eed0f912 100644
--- a/arch/x86/pci/Makefile
+++ b/arch/x86/pci/Makefile
@@ -18,7 +18,7 @@ obj-$(CONFIG_X86_VISWS) += visws.o
18obj-$(CONFIG_X86_NUMAQ) += numaq_32.o 18obj-$(CONFIG_X86_NUMAQ) += numaq_32.o
19obj-$(CONFIG_X86_NUMACHIP) += numachip.o 19obj-$(CONFIG_X86_NUMACHIP) += numachip.o
20 20
21obj-$(CONFIG_X86_INTEL_MID) += mrst.o 21obj-$(CONFIG_X86_INTEL_MID) += intel_mid_pci.o
22 22
23obj-y += common.o early.o 23obj-y += common.o early.o
24obj-y += bus_numa.o 24obj-y += bus_numa.o
diff --git a/arch/x86/pci/mrst.c b/arch/x86/pci/intel_mid_pci.c
index 903fded50786..51384ca727ad 100644
--- a/arch/x86/pci/mrst.c
+++ b/arch/x86/pci/intel_mid_pci.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * Moorestown PCI support 2 * Intel MID PCI support
3 * Copyright (c) 2008 Intel Corporation 3 * Copyright (c) 2008 Intel Corporation
4 * Jesse Barnes <jesse.barnes@intel.com> 4 * Jesse Barnes <jesse.barnes@intel.com>
5 * 5 *
@@ -150,12 +150,12 @@ static bool type1_access_ok(unsigned int bus, unsigned int devfn, int reg)
150 * shim. Therefore, use the header type in shim instead. 150 * shim. Therefore, use the header type in shim instead.
151 */ 151 */
152 if (reg >= 0x100 || reg == PCI_STATUS || reg == PCI_HEADER_TYPE) 152 if (reg >= 0x100 || reg == PCI_STATUS || reg == PCI_HEADER_TYPE)
153 return 0; 153 return false;
154 if (bus == 0 && (devfn == PCI_DEVFN(2, 0) 154 if (bus == 0 && (devfn == PCI_DEVFN(2, 0)
155 || devfn == PCI_DEVFN(0, 0) 155 || devfn == PCI_DEVFN(0, 0)
156 || devfn == PCI_DEVFN(3, 0))) 156 || devfn == PCI_DEVFN(3, 0)))
157 return 1; 157 return true;
158 return 0; /* Langwell on others */ 158 return false; /* Langwell on others */
159} 159}
160 160
161static int pci_read(struct pci_bus *bus, unsigned int devfn, int where, 161static int pci_read(struct pci_bus *bus, unsigned int devfn, int where,
@@ -205,7 +205,7 @@ static int pci_write(struct pci_bus *bus, unsigned int devfn, int where,
205 where, size, value); 205 where, size, value);
206} 206}
207 207
208static int mrst_pci_irq_enable(struct pci_dev *dev) 208static int intel_mid_pci_irq_enable(struct pci_dev *dev)
209{ 209{
210 u8 pin; 210 u8 pin;
211 struct io_apic_irq_attr irq_attr; 211 struct io_apic_irq_attr irq_attr;
@@ -225,23 +225,23 @@ static int mrst_pci_irq_enable(struct pci_dev *dev)
225 return 0; 225 return 0;
226} 226}
227 227
228struct pci_ops pci_mrst_ops = { 228struct pci_ops intel_mid_pci_ops = {
229 .read = pci_read, 229 .read = pci_read,
230 .write = pci_write, 230 .write = pci_write,
231}; 231};
232 232
233/** 233/**
234 * pci_mrst_init - installs pci_mrst_ops 234 * intel_mid_pci_init - installs intel_mid_pci_ops
235 * 235 *
236 * Moorestown has an interesting PCI implementation (see above). 236 * Moorestown has an interesting PCI implementation (see above).
237 * Called when the early platform detection installs it. 237 * Called when the early platform detection installs it.
238 */ 238 */
239int __init pci_mrst_init(void) 239int __init intel_mid_pci_init(void)
240{ 240{
241 pr_info("Intel MID platform detected, using MID PCI ops\n"); 241 pr_info("Intel MID platform detected, using MID PCI ops\n");
242 pci_mmcfg_late_init(); 242 pci_mmcfg_late_init();
243 pcibios_enable_irq = mrst_pci_irq_enable; 243 pcibios_enable_irq = intel_mid_pci_irq_enable;
244 pci_root_ops = pci_mrst_ops; 244 pci_root_ops = intel_mid_pci_ops;
245 pci_soc_mode = 1; 245 pci_soc_mode = 1;
246 /* Continue with standard init */ 246 /* Continue with standard init */
247 return 1; 247 return 1;
diff --git a/arch/x86/platform/Makefile b/arch/x86/platform/Makefile
index 01e0231a113e..20342d4c82ce 100644
--- a/arch/x86/platform/Makefile
+++ b/arch/x86/platform/Makefile
@@ -4,7 +4,7 @@ obj-y += efi/
4obj-y += geode/ 4obj-y += geode/
5obj-y += goldfish/ 5obj-y += goldfish/
6obj-y += iris/ 6obj-y += iris/
7obj-y += mrst/ 7obj-y += intel-mid/
8obj-y += olpc/ 8obj-y += olpc/
9obj-y += scx200/ 9obj-y += scx200/
10obj-y += sfi/ 10obj-y += sfi/
diff --git a/arch/x86/platform/efi/Makefile b/arch/x86/platform/efi/Makefile
index 6db1cc4c7534..b7b0b35c1981 100644
--- a/arch/x86/platform/efi/Makefile
+++ b/arch/x86/platform/efi/Makefile
@@ -1,2 +1,3 @@
1obj-$(CONFIG_EFI) += efi.o efi_$(BITS).o efi_stub_$(BITS).o 1obj-$(CONFIG_EFI) += efi.o efi_$(BITS).o efi_stub_$(BITS).o
2obj-$(CONFIG_ACPI_BGRT) += efi-bgrt.o 2obj-$(CONFIG_ACPI_BGRT) += efi-bgrt.o
3obj-$(CONFIG_EARLY_PRINTK_EFI) += early_printk.o
diff --git a/arch/x86/platform/efi/early_printk.c b/arch/x86/platform/efi/early_printk.c
new file mode 100644
index 000000000000..6599a0027b76
--- /dev/null
+++ b/arch/x86/platform/efi/early_printk.c
@@ -0,0 +1,191 @@
1/*
2 * Copyright (C) 2013 Intel Corporation; author Matt Fleming
3 *
4 * This file is part of the Linux kernel, and is made available under
5 * the terms of the GNU General Public License version 2.
6 */
7
8#include <linux/console.h>
9#include <linux/efi.h>
10#include <linux/font.h>
11#include <linux/io.h>
12#include <linux/kernel.h>
13#include <asm/setup.h>
14
15static const struct font_desc *font;
16static u32 efi_x, efi_y;
17
18static __init void early_efi_clear_scanline(unsigned int y)
19{
20 unsigned long base, *dst;
21 u16 len;
22
23 base = boot_params.screen_info.lfb_base;
24 len = boot_params.screen_info.lfb_linelength;
25
26 dst = early_ioremap(base + y*len, len);
27 if (!dst)
28 return;
29
30 memset(dst, 0, len);
31 early_iounmap(dst, len);
32}
33
34static __init void early_efi_scroll_up(void)
35{
36 unsigned long base, *dst, *src;
37 u16 len;
38 u32 i, height;
39
40 base = boot_params.screen_info.lfb_base;
41 len = boot_params.screen_info.lfb_linelength;
42 height = boot_params.screen_info.lfb_height;
43
44 for (i = 0; i < height - font->height; i++) {
45 dst = early_ioremap(base + i*len, len);
46 if (!dst)
47 return;
48
49 src = early_ioremap(base + (i + font->height) * len, len);
50 if (!src) {
51 early_iounmap(dst, len);
52 return;
53 }
54
55 memmove(dst, src, len);
56
57 early_iounmap(src, len);
58 early_iounmap(dst, len);
59 }
60}
61
62static void early_efi_write_char(u32 *dst, unsigned char c, unsigned int h)
63{
64 const u32 color_black = 0x00000000;
65 const u32 color_white = 0x00ffffff;
66 const u8 *src;
67 u8 s8;
68 int m;
69
70 src = font->data + c * font->height;
71 s8 = *(src + h);
72
73 for (m = 0; m < 8; m++) {
74 if ((s8 >> (7 - m)) & 1)
75 *dst = color_white;
76 else
77 *dst = color_black;
78 dst++;
79 }
80}
81
82static __init void
83early_efi_write(struct console *con, const char *str, unsigned int num)
84{
85 struct screen_info *si;
86 unsigned long base;
87 unsigned int len;
88 const char *s;
89 void *dst;
90
91 base = boot_params.screen_info.lfb_base;
92 si = &boot_params.screen_info;
93 len = si->lfb_linelength;
94
95 while (num) {
96 unsigned int linemax;
97 unsigned int h, count = 0;
98
99 for (s = str; *s && *s != '\n'; s++) {
100 if (count == num)
101 break;
102 count++;
103 }
104
105 linemax = (si->lfb_width - efi_x) / font->width;
106 if (count > linemax)
107 count = linemax;
108
109 for (h = 0; h < font->height; h++) {
110 unsigned int n, x;
111
112 dst = early_ioremap(base + (efi_y + h) * len, len);
113 if (!dst)
114 return;
115
116 s = str;
117 n = count;
118 x = efi_x;
119
120 while (n-- > 0) {
121 early_efi_write_char(dst + x*4, *s, h);
122 x += font->width;
123 s++;
124 }
125
126 early_iounmap(dst, len);
127 }
128
129 num -= count;
130 efi_x += count * font->width;
131 str += count;
132
133 if (num > 0 && *s == '\n') {
134 efi_x = 0;
135 efi_y += font->height;
136 str++;
137 num--;
138 }
139
140 if (efi_x >= si->lfb_width) {
141 efi_x = 0;
142 efi_y += font->height;
143 }
144
145 if (efi_y + font->height >= si->lfb_height) {
146 u32 i;
147
148 efi_y -= font->height;
149 early_efi_scroll_up();
150
151 for (i = 0; i < font->height; i++)
152 early_efi_clear_scanline(efi_y + i);
153 }
154 }
155}
156
157static __init int early_efi_setup(struct console *con, char *options)
158{
159 struct screen_info *si;
160 u16 xres, yres;
161 u32 i;
162
163 si = &boot_params.screen_info;
164 xres = si->lfb_width;
165 yres = si->lfb_height;
166
167 /*
168 * early_efi_write_char() implicitly assumes a framebuffer with
169 * 32-bits per pixel.
170 */
171 if (si->lfb_depth != 32)
172 return -ENODEV;
173
174 font = get_default_font(xres, yres, -1, -1);
175 if (!font)
176 return -ENODEV;
177
178 efi_y = rounddown(yres, font->height) - font->height;
179 for (i = 0; i < (yres - efi_y) / font->height; i++)
180 early_efi_scroll_up();
181
182 return 0;
183}
184
185struct console early_efi_console = {
186 .name = "earlyefi",
187 .write = early_efi_write,
188 .setup = early_efi_setup,
189 .flags = CON_PRINTBUFFER,
190 .index = -1,
191};
diff --git a/arch/x86/platform/efi/efi.c b/arch/x86/platform/efi/efi.c
index c7e22ab29a5a..92c02344a060 100644
--- a/arch/x86/platform/efi/efi.c
+++ b/arch/x86/platform/efi/efi.c
@@ -60,19 +60,6 @@
60 60
61static efi_char16_t efi_dummy_name[6] = { 'D', 'U', 'M', 'M', 'Y', 0 }; 61static efi_char16_t efi_dummy_name[6] = { 'D', 'U', 'M', 'M', 'Y', 0 };
62 62
63struct efi __read_mostly efi = {
64 .mps = EFI_INVALID_TABLE_ADDR,
65 .acpi = EFI_INVALID_TABLE_ADDR,
66 .acpi20 = EFI_INVALID_TABLE_ADDR,
67 .smbios = EFI_INVALID_TABLE_ADDR,
68 .sal_systab = EFI_INVALID_TABLE_ADDR,
69 .boot_info = EFI_INVALID_TABLE_ADDR,
70 .hcdp = EFI_INVALID_TABLE_ADDR,
71 .uga = EFI_INVALID_TABLE_ADDR,
72 .uv_systab = EFI_INVALID_TABLE_ADDR,
73};
74EXPORT_SYMBOL(efi);
75
76struct efi_memory_map memmap; 63struct efi_memory_map memmap;
77 64
78static struct efi efi_phys __initdata; 65static struct efi efi_phys __initdata;
@@ -80,6 +67,13 @@ static efi_system_table_t efi_systab __initdata;
80 67
81unsigned long x86_efi_facility; 68unsigned long x86_efi_facility;
82 69
70static __initdata efi_config_table_type_t arch_tables[] = {
71#ifdef CONFIG_X86_UV
72 {UV_SYSTEM_TABLE_GUID, "UVsystab", &efi.uv_systab},
73#endif
74 {NULL_GUID, NULL, NULL},
75};
76
83/* 77/*
84 * Returns 1 if 'facility' is enabled, 0 otherwise. 78 * Returns 1 if 'facility' is enabled, 0 otherwise.
85 */ 79 */
@@ -399,6 +393,8 @@ int __init efi_memblock_x86_reserve_range(void)
399 393
400 memblock_reserve(pmap, memmap.nr_map * memmap.desc_size); 394 memblock_reserve(pmap, memmap.nr_map * memmap.desc_size);
401 395
396 efi.memmap = &memmap;
397
402 return 0; 398 return 0;
403} 399}
404 400
@@ -578,80 +574,6 @@ static int __init efi_systab_init(void *phys)
578 return 0; 574 return 0;
579} 575}
580 576
581static int __init efi_config_init(u64 tables, int nr_tables)
582{
583 void *config_tables, *tablep;
584 int i, sz;
585
586 if (efi_enabled(EFI_64BIT))
587 sz = sizeof(efi_config_table_64_t);
588 else
589 sz = sizeof(efi_config_table_32_t);
590
591 /*
592 * Let's see what config tables the firmware passed to us.
593 */
594 config_tables = early_ioremap(tables, nr_tables * sz);
595 if (config_tables == NULL) {
596 pr_err("Could not map Configuration table!\n");
597 return -ENOMEM;
598 }
599
600 tablep = config_tables;
601 pr_info("");
602 for (i = 0; i < efi.systab->nr_tables; i++) {
603 efi_guid_t guid;
604 unsigned long table;
605
606 if (efi_enabled(EFI_64BIT)) {
607 u64 table64;
608 guid = ((efi_config_table_64_t *)tablep)->guid;
609 table64 = ((efi_config_table_64_t *)tablep)->table;
610 table = table64;
611#ifdef CONFIG_X86_32
612 if (table64 >> 32) {
613 pr_cont("\n");
614 pr_err("Table located above 4GB, disabling EFI.\n");
615 early_iounmap(config_tables,
616 efi.systab->nr_tables * sz);
617 return -EINVAL;
618 }
619#endif
620 } else {
621 guid = ((efi_config_table_32_t *)tablep)->guid;
622 table = ((efi_config_table_32_t *)tablep)->table;
623 }
624 if (!efi_guidcmp(guid, MPS_TABLE_GUID)) {
625 efi.mps = table;
626 pr_cont(" MPS=0x%lx ", table);
627 } else if (!efi_guidcmp(guid, ACPI_20_TABLE_GUID)) {
628 efi.acpi20 = table;
629 pr_cont(" ACPI 2.0=0x%lx ", table);
630 } else if (!efi_guidcmp(guid, ACPI_TABLE_GUID)) {
631 efi.acpi = table;
632 pr_cont(" ACPI=0x%lx ", table);
633 } else if (!efi_guidcmp(guid, SMBIOS_TABLE_GUID)) {
634 efi.smbios = table;
635 pr_cont(" SMBIOS=0x%lx ", table);
636#ifdef CONFIG_X86_UV
637 } else if (!efi_guidcmp(guid, UV_SYSTEM_TABLE_GUID)) {
638 efi.uv_systab = table;
639 pr_cont(" UVsystab=0x%lx ", table);
640#endif
641 } else if (!efi_guidcmp(guid, HCDP_TABLE_GUID)) {
642 efi.hcdp = table;
643 pr_cont(" HCDP=0x%lx ", table);
644 } else if (!efi_guidcmp(guid, UGA_IO_PROTOCOL_GUID)) {
645 efi.uga = table;
646 pr_cont(" UGA=0x%lx ", table);
647 }
648 tablep += sz;
649 }
650 pr_cont("\n");
651 early_iounmap(config_tables, efi.systab->nr_tables * sz);
652 return 0;
653}
654
655static int __init efi_runtime_init(void) 577static int __init efi_runtime_init(void)
656{ 578{
657 efi_runtime_services_t *runtime; 579 efi_runtime_services_t *runtime;
@@ -745,7 +667,7 @@ void __init efi_init(void)
745 efi.systab->hdr.revision >> 16, 667 efi.systab->hdr.revision >> 16,
746 efi.systab->hdr.revision & 0xffff, vendor); 668 efi.systab->hdr.revision & 0xffff, vendor);
747 669
748 if (efi_config_init(efi.systab->tables, efi.systab->nr_tables)) 670 if (efi_config_init(arch_tables))
749 return; 671 return;
750 672
751 set_bit(EFI_CONFIG_TABLES, &x86_efi_facility); 673 set_bit(EFI_CONFIG_TABLES, &x86_efi_facility);
@@ -816,34 +738,6 @@ static void __init runtime_code_page_mkexec(void)
816 } 738 }
817} 739}
818 740
819/*
820 * We can't ioremap data in EFI boot services RAM, because we've already mapped
821 * it as RAM. So, look it up in the existing EFI memory map instead. Only
822 * callable after efi_enter_virtual_mode and before efi_free_boot_services.
823 */
824void __iomem *efi_lookup_mapped_addr(u64 phys_addr)
825{
826 void *p;
827 if (WARN_ON(!memmap.map))
828 return NULL;
829 for (p = memmap.map; p < memmap.map_end; p += memmap.desc_size) {
830 efi_memory_desc_t *md = p;
831 u64 size = md->num_pages << EFI_PAGE_SHIFT;
832 u64 end = md->phys_addr + size;
833 if (!(md->attribute & EFI_MEMORY_RUNTIME) &&
834 md->type != EFI_BOOT_SERVICES_CODE &&
835 md->type != EFI_BOOT_SERVICES_DATA)
836 continue;
837 if (!md->virt_addr)
838 continue;
839 if (phys_addr >= md->phys_addr && phys_addr < end) {
840 phys_addr += md->virt_addr - md->phys_addr;
841 return (__force void __iomem *)(unsigned long)phys_addr;
842 }
843 }
844 return NULL;
845}
846
847void efi_memory_uc(u64 addr, unsigned long size) 741void efi_memory_uc(u64 addr, unsigned long size)
848{ 742{
849 unsigned long page_shift = 1UL << EFI_PAGE_SHIFT; 743 unsigned long page_shift = 1UL << EFI_PAGE_SHIFT;
diff --git a/arch/x86/platform/geode/alix.c b/arch/x86/platform/geode/alix.c
index 90e23e7679a5..76b6632d3143 100644
--- a/arch/x86/platform/geode/alix.c
+++ b/arch/x86/platform/geode/alix.c
@@ -98,7 +98,7 @@ static struct platform_device alix_leds_dev = {
98 .dev.platform_data = &alix_leds_data, 98 .dev.platform_data = &alix_leds_data,
99}; 99};
100 100
101static struct __initdata platform_device *alix_devs[] = { 101static struct platform_device *alix_devs[] __initdata = {
102 &alix_buttons_dev, 102 &alix_buttons_dev,
103 &alix_leds_dev, 103 &alix_leds_dev,
104}; 104};
diff --git a/arch/x86/platform/geode/geos.c b/arch/x86/platform/geode/geos.c
index c2e6d53558be..aa733fba2471 100644
--- a/arch/x86/platform/geode/geos.c
+++ b/arch/x86/platform/geode/geos.c
@@ -87,7 +87,7 @@ static struct platform_device geos_leds_dev = {
87 .dev.platform_data = &geos_leds_data, 87 .dev.platform_data = &geos_leds_data,
88}; 88};
89 89
90static struct __initdata platform_device *geos_devs[] = { 90static struct platform_device *geos_devs[] __initdata = {
91 &geos_buttons_dev, 91 &geos_buttons_dev,
92 &geos_leds_dev, 92 &geos_leds_dev,
93}; 93};
diff --git a/arch/x86/platform/geode/net5501.c b/arch/x86/platform/geode/net5501.c
index 646e3b5b4bb6..927e38c0089f 100644
--- a/arch/x86/platform/geode/net5501.c
+++ b/arch/x86/platform/geode/net5501.c
@@ -78,7 +78,7 @@ static struct platform_device net5501_leds_dev = {
78 .dev.platform_data = &net5501_leds_data, 78 .dev.platform_data = &net5501_leds_data,
79}; 79};
80 80
81static struct __initdata platform_device *net5501_devs[] = { 81static struct platform_device *net5501_devs[] __initdata = {
82 &net5501_buttons_dev, 82 &net5501_buttons_dev,
83 &net5501_leds_dev, 83 &net5501_leds_dev,
84}; 84};
diff --git a/arch/x86/platform/intel-mid/Makefile b/arch/x86/platform/intel-mid/Makefile
new file mode 100644
index 000000000000..01cc29ea5ff7
--- /dev/null
+++ b/arch/x86/platform/intel-mid/Makefile
@@ -0,0 +1,7 @@
1obj-$(CONFIG_X86_INTEL_MID) += intel-mid.o
2obj-$(CONFIG_X86_INTEL_MID) += intel_mid_vrtc.o
3obj-$(CONFIG_EARLY_PRINTK_INTEL_MID) += early_printk_intel_mid.o
4# SFI specific code
5ifdef CONFIG_X86_INTEL_MID
6obj-$(CONFIG_SFI) += sfi.o device_libs/
7endif
diff --git a/arch/x86/platform/intel-mid/device_libs/Makefile b/arch/x86/platform/intel-mid/device_libs/Makefile
new file mode 100644
index 000000000000..097e7a7940d8
--- /dev/null
+++ b/arch/x86/platform/intel-mid/device_libs/Makefile
@@ -0,0 +1,22 @@
1# IPC Devices
2obj-y += platform_ipc.o
3obj-$(subst m,y,$(CONFIG_MFD_INTEL_MSIC)) += platform_msic.o
4obj-$(subst m,y,$(CONFIG_SND_MFLD_MACHINE)) += platform_msic_audio.o
5obj-$(subst m,y,$(CONFIG_GPIO_MSIC)) += platform_msic_gpio.o
6obj-$(subst m,y,$(CONFIG_MFD_INTEL_MSIC)) += platform_msic_ocd.o
7obj-$(subst m,y,$(CONFIG_MFD_INTEL_MSIC)) += platform_msic_battery.o
8obj-$(subst m,y,$(CONFIG_INTEL_MID_POWER_BUTTON)) += platform_msic_power_btn.o
9obj-$(subst m,y,$(CONFIG_GPIO_INTEL_PMIC)) += platform_pmic_gpio.o
10obj-$(subst m,y,$(CONFIG_INTEL_MFLD_THERMAL)) += platform_msic_thermal.o
11# I2C Devices
12obj-$(subst m,y,$(CONFIG_SENSORS_EMC1403)) += platform_emc1403.o
13obj-$(subst m,y,$(CONFIG_SENSORS_LIS3LV02D)) += platform_lis331.o
14obj-$(subst m,y,$(CONFIG_GPIO_PCA953X)) += platform_max7315.o
15obj-$(subst m,y,$(CONFIG_INPUT_MPU3050)) += platform_mpu3050.o
16obj-$(subst m,y,$(CONFIG_INPUT_BMA150)) += platform_bma023.o
17obj-$(subst m,y,$(CONFIG_GPIO_PCA953X)) += platform_tca6416.o
18obj-$(subst m,y,$(CONFIG_DRM_MEDFIELD)) += platform_tc35876x.o
19# SPI Devices
20obj-$(subst m,y,$(CONFIG_SERIAL_MRST_MAX3110)) += platform_max3111.o
21# MISC Devices
22obj-$(subst m,y,$(CONFIG_KEYBOARD_GPIO)) += platform_gpio_keys.o
diff --git a/arch/x86/platform/intel-mid/device_libs/platform_bma023.c b/arch/x86/platform/intel-mid/device_libs/platform_bma023.c
new file mode 100644
index 000000000000..0ae7f2ae2296
--- /dev/null
+++ b/arch/x86/platform/intel-mid/device_libs/platform_bma023.c
@@ -0,0 +1,20 @@
1/*
2 * platform_bma023.c: bma023 platform data initilization file
3 *
4 * (C) Copyright 2013 Intel Corporation
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; version 2
9 * of the License.
10 */
11
12#include <asm/intel-mid.h>
13
14static const struct devs_id bma023_dev_id __initconst = {
15 .name = "bma023",
16 .type = SFI_DEV_TYPE_I2C,
17 .delay = 1,
18};
19
20sfi_device(bma023_dev_id);
diff --git a/arch/x86/platform/intel-mid/device_libs/platform_emc1403.c b/arch/x86/platform/intel-mid/device_libs/platform_emc1403.c
new file mode 100644
index 000000000000..0d942c1d26d5
--- /dev/null
+++ b/arch/x86/platform/intel-mid/device_libs/platform_emc1403.c
@@ -0,0 +1,41 @@
1/*
2 * platform_emc1403.c: emc1403 platform data initilization file
3 *
4 * (C) Copyright 2013 Intel Corporation
5 * Author: Sathyanarayanan Kuppuswamy <sathyanarayanan.kuppuswamy@intel.com>
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; version 2
10 * of the License.
11 */
12
13#include <linux/init.h>
14#include <linux/gpio.h>
15#include <linux/i2c.h>
16#include <asm/intel-mid.h>
17
18static void __init *emc1403_platform_data(void *info)
19{
20 static short intr2nd_pdata;
21 struct i2c_board_info *i2c_info = info;
22 int intr = get_gpio_by_name("thermal_int");
23 int intr2nd = get_gpio_by_name("thermal_alert");
24
25 if (intr == -1 || intr2nd == -1)
26 return NULL;
27
28 i2c_info->irq = intr + INTEL_MID_IRQ_OFFSET;
29 intr2nd_pdata = intr2nd + INTEL_MID_IRQ_OFFSET;
30
31 return &intr2nd_pdata;
32}
33
34static const struct devs_id emc1403_dev_id __initconst = {
35 .name = "emc1403",
36 .type = SFI_DEV_TYPE_I2C,
37 .delay = 1,
38 .get_platform_data = &emc1403_platform_data,
39};
40
41sfi_device(emc1403_dev_id);
diff --git a/arch/x86/platform/intel-mid/device_libs/platform_gpio_keys.c b/arch/x86/platform/intel-mid/device_libs/platform_gpio_keys.c
new file mode 100644
index 000000000000..a013a4834bbe
--- /dev/null
+++ b/arch/x86/platform/intel-mid/device_libs/platform_gpio_keys.c
@@ -0,0 +1,83 @@
1/*
2 * platform_gpio_keys.c: gpio_keys platform data initilization file
3 *
4 * (C) Copyright 2013 Intel Corporation
5 * Author: Sathyanarayanan Kuppuswamy <sathyanarayanan.kuppuswamy@intel.com>
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; version 2
10 * of the License.
11 */
12
13#include <linux/input.h>
14#include <linux/init.h>
15#include <linux/kernel.h>
16#include <linux/gpio.h>
17#include <linux/gpio_keys.h>
18#include <linux/platform_device.h>
19#include <asm/intel-mid.h>
20
21#define DEVICE_NAME "gpio-keys"
22
23/*
24 * we will search these buttons in SFI GPIO table (by name)
25 * and register them dynamically. Please add all possible
26 * buttons here, we will shrink them if no GPIO found.
27 */
28static struct gpio_keys_button gpio_button[] = {
29 {KEY_POWER, -1, 1, "power_btn", EV_KEY, 0, 3000},
30 {KEY_PROG1, -1, 1, "prog_btn1", EV_KEY, 0, 20},
31 {KEY_PROG2, -1, 1, "prog_btn2", EV_KEY, 0, 20},
32 {SW_LID, -1, 1, "lid_switch", EV_SW, 0, 20},
33 {KEY_VOLUMEUP, -1, 1, "vol_up", EV_KEY, 0, 20},
34 {KEY_VOLUMEDOWN, -1, 1, "vol_down", EV_KEY, 0, 20},
35 {KEY_CAMERA, -1, 1, "camera_full", EV_KEY, 0, 20},
36 {KEY_CAMERA_FOCUS, -1, 1, "camera_half", EV_KEY, 0, 20},
37 {SW_KEYPAD_SLIDE, -1, 1, "MagSw1", EV_SW, 0, 20},
38 {SW_KEYPAD_SLIDE, -1, 1, "MagSw2", EV_SW, 0, 20},
39};
40
41static struct gpio_keys_platform_data gpio_keys = {
42 .buttons = gpio_button,
43 .rep = 1,
44 .nbuttons = -1, /* will fill it after search */
45};
46
47static struct platform_device pb_device = {
48 .name = DEVICE_NAME,
49 .id = -1,
50 .dev = {
51 .platform_data = &gpio_keys,
52 },
53};
54
55/*
56 * Shrink the non-existent buttons, register the gpio button
57 * device if there is some
58 */
59static int __init pb_keys_init(void)
60{
61 struct gpio_keys_button *gb = gpio_button;
62 int i, num, good = 0;
63
64 num = sizeof(gpio_button) / sizeof(struct gpio_keys_button);
65 for (i = 0; i < num; i++) {
66 gb[i].gpio = get_gpio_by_name(gb[i].desc);
67 pr_debug("info[%2d]: name = %s, gpio = %d\n", i, gb[i].desc,
68 gb[i].gpio);
69 if (gb[i].gpio == -1)
70 continue;
71
72 if (i != good)
73 gb[good] = gb[i];
74 good++;
75 }
76
77 if (good) {
78 gpio_keys.nbuttons = good;
79 return platform_device_register(&pb_device);
80 }
81 return 0;
82}
83late_initcall(pb_keys_init);
diff --git a/arch/x86/platform/intel-mid/device_libs/platform_ipc.c b/arch/x86/platform/intel-mid/device_libs/platform_ipc.c
new file mode 100644
index 000000000000..a84b73d6c4a0
--- /dev/null
+++ b/arch/x86/platform/intel-mid/device_libs/platform_ipc.c
@@ -0,0 +1,68 @@
1/*
2 * platform_ipc.c: IPC platform library file
3 *
4 * (C) Copyright 2013 Intel Corporation
5 * Author: Sathyanarayanan Kuppuswamy <sathyanarayanan.kuppuswamy@intel.com>
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; version 2
10 * of the License.
11 */
12
13#include <linux/init.h>
14#include <linux/kernel.h>
15#include <linux/interrupt.h>
16#include <linux/sfi.h>
17#include <linux/gpio.h>
18#include <asm/intel-mid.h>
19#include "platform_ipc.h"
20
21void __init ipc_device_handler(struct sfi_device_table_entry *pentry,
22 struct devs_id *dev)
23{
24 struct platform_device *pdev;
25 void *pdata = NULL;
26 static struct resource res __initdata = {
27 .name = "IRQ",
28 .flags = IORESOURCE_IRQ,
29 };
30
31 pr_debug("IPC bus, name = %16.16s, irq = 0x%2x\n",
32 pentry->name, pentry->irq);
33
34 /*
35 * We need to call platform init of IPC devices to fill misc_pdata
36 * structure. It will be used in msic_init for initialization.
37 */
38 if (dev != NULL)
39 pdata = dev->get_platform_data(pentry);
40
41 /*
42 * On Medfield the platform device creation is handled by the MSIC
43 * MFD driver so we don't need to do it here.
44 */
45 if (intel_mid_has_msic())
46 return;
47
48 pdev = platform_device_alloc(pentry->name, 0);
49 if (pdev == NULL) {
50 pr_err("out of memory for SFI platform device '%s'.\n",
51 pentry->name);
52 return;
53 }
54 res.start = pentry->irq;
55 platform_device_add_resources(pdev, &res, 1);
56
57 pdev->dev.platform_data = pdata;
58 intel_scu_device_register(pdev);
59}
60
61static const struct devs_id pmic_audio_dev_id __initconst = {
62 .name = "pmic_audio",
63 .type = SFI_DEV_TYPE_IPC,
64 .delay = 1,
65 .device_handler = &ipc_device_handler,
66};
67
68sfi_device(pmic_audio_dev_id);
diff --git a/arch/x86/platform/intel-mid/device_libs/platform_ipc.h b/arch/x86/platform/intel-mid/device_libs/platform_ipc.h
new file mode 100644
index 000000000000..8f568dd79605
--- /dev/null
+++ b/arch/x86/platform/intel-mid/device_libs/platform_ipc.h
@@ -0,0 +1,17 @@
1/*
2 * platform_ipc.h: IPC platform library header file
3 *
4 * (C) Copyright 2013 Intel Corporation
5 * Author: Sathyanarayanan Kuppuswamy <sathyanarayanan.kuppuswamy@intel.com>
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; version 2
10 * of the License.
11 */
12#ifndef _PLATFORM_IPC_H_
13#define _PLATFORM_IPC_H_
14
15extern void __init ipc_device_handler(struct sfi_device_table_entry *pentry,
16 struct devs_id *dev) __attribute__((weak));
17#endif
diff --git a/arch/x86/platform/intel-mid/device_libs/platform_lis331.c b/arch/x86/platform/intel-mid/device_libs/platform_lis331.c
new file mode 100644
index 000000000000..15278c11f714
--- /dev/null
+++ b/arch/x86/platform/intel-mid/device_libs/platform_lis331.c
@@ -0,0 +1,39 @@
1/*
2 * platform_lis331.c: lis331 platform data initilization file
3 *
4 * (C) Copyright 2013 Intel Corporation
5 * Author: Sathyanarayanan Kuppuswamy <sathyanarayanan.kuppuswamy@intel.com>
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; version 2
10 * of the License.
11 */
12
13#include <linux/i2c.h>
14#include <linux/gpio.h>
15#include <asm/intel-mid.h>
16
17static void __init *lis331dl_platform_data(void *info)
18{
19 static short intr2nd_pdata;
20 struct i2c_board_info *i2c_info = info;
21 int intr = get_gpio_by_name("accel_int");
22 int intr2nd = get_gpio_by_name("accel_2");
23
24 if (intr == -1 || intr2nd == -1)
25 return NULL;
26
27 i2c_info->irq = intr + INTEL_MID_IRQ_OFFSET;
28 intr2nd_pdata = intr2nd + INTEL_MID_IRQ_OFFSET;
29
30 return &intr2nd_pdata;
31}
32
33static const struct devs_id lis331dl_dev_id __initconst = {
34 .name = "i2c_accel",
35 .type = SFI_DEV_TYPE_I2C,
36 .get_platform_data = &lis331dl_platform_data,
37};
38
39sfi_device(lis331dl_dev_id);
diff --git a/arch/x86/platform/intel-mid/device_libs/platform_max3111.c b/arch/x86/platform/intel-mid/device_libs/platform_max3111.c
new file mode 100644
index 000000000000..afd1df94e0e5
--- /dev/null
+++ b/arch/x86/platform/intel-mid/device_libs/platform_max3111.c
@@ -0,0 +1,35 @@
1/*
2 * platform_max3111.c: max3111 platform data initilization file
3 *
4 * (C) Copyright 2013 Intel Corporation
5 * Author: Sathyanarayanan Kuppuswamy <sathyanarayanan.kuppuswamy@intel.com>
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; version 2
10 * of the License.
11 */
12
13#include <linux/gpio.h>
14#include <linux/spi/spi.h>
15#include <asm/intel-mid.h>
16
17static void __init *max3111_platform_data(void *info)
18{
19 struct spi_board_info *spi_info = info;
20 int intr = get_gpio_by_name("max3111_int");
21
22 spi_info->mode = SPI_MODE_0;
23 if (intr == -1)
24 return NULL;
25 spi_info->irq = intr + INTEL_MID_IRQ_OFFSET;
26 return NULL;
27}
28
29static const struct devs_id max3111_dev_id __initconst = {
30 .name = "spi_max3111",
31 .type = SFI_DEV_TYPE_SPI,
32 .get_platform_data = &max3111_platform_data,
33};
34
35sfi_device(max3111_dev_id);
diff --git a/arch/x86/platform/intel-mid/device_libs/platform_max7315.c b/arch/x86/platform/intel-mid/device_libs/platform_max7315.c
new file mode 100644
index 000000000000..94ade10024ae
--- /dev/null
+++ b/arch/x86/platform/intel-mid/device_libs/platform_max7315.c
@@ -0,0 +1,79 @@
1/*
2 * platform_max7315.c: max7315 platform data initilization file
3 *
4 * (C) Copyright 2013 Intel Corporation
5 * Author: Sathyanarayanan Kuppuswamy <sathyanarayanan.kuppuswamy@intel.com>
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; version 2
10 * of the License.
11 */
12
13#include <linux/init.h>
14#include <linux/gpio.h>
15#include <linux/i2c.h>
16#include <linux/platform_data/pca953x.h>
17#include <asm/intel-mid.h>
18
19#define MAX7315_NUM 2
20
21static void __init *max7315_platform_data(void *info)
22{
23 static struct pca953x_platform_data max7315_pdata[MAX7315_NUM];
24 static int nr;
25 struct pca953x_platform_data *max7315 = &max7315_pdata[nr];
26 struct i2c_board_info *i2c_info = info;
27 int gpio_base, intr;
28 char base_pin_name[SFI_NAME_LEN + 1];
29 char intr_pin_name[SFI_NAME_LEN + 1];
30
31 if (nr == MAX7315_NUM) {
32 pr_err("too many max7315s, we only support %d\n",
33 MAX7315_NUM);
34 return NULL;
35 }
36 /* we have several max7315 on the board, we only need load several
37 * instances of the same pca953x driver to cover them
38 */
39 strcpy(i2c_info->type, "max7315");
40 if (nr++) {
41 sprintf(base_pin_name, "max7315_%d_base", nr);
42 sprintf(intr_pin_name, "max7315_%d_int", nr);
43 } else {
44 strcpy(base_pin_name, "max7315_base");
45 strcpy(intr_pin_name, "max7315_int");
46 }
47
48 gpio_base = get_gpio_by_name(base_pin_name);
49 intr = get_gpio_by_name(intr_pin_name);
50
51 if (gpio_base == -1)
52 return NULL;
53 max7315->gpio_base = gpio_base;
54 if (intr != -1) {
55 i2c_info->irq = intr + INTEL_MID_IRQ_OFFSET;
56 max7315->irq_base = gpio_base + INTEL_MID_IRQ_OFFSET;
57 } else {
58 i2c_info->irq = -1;
59 max7315->irq_base = -1;
60 }
61 return max7315;
62}
63
64static const struct devs_id max7315_dev_id __initconst = {
65 .name = "i2c_max7315",
66 .type = SFI_DEV_TYPE_I2C,
67 .delay = 1,
68 .get_platform_data = &max7315_platform_data,
69};
70
71static const struct devs_id max7315_2_dev_id __initconst = {
72 .name = "i2c_max7315_2",
73 .type = SFI_DEV_TYPE_I2C,
74 .delay = 1,
75 .get_platform_data = &max7315_platform_data,
76};
77
78sfi_device(max7315_dev_id);
79sfi_device(max7315_2_dev_id);
diff --git a/arch/x86/platform/intel-mid/device_libs/platform_mpu3050.c b/arch/x86/platform/intel-mid/device_libs/platform_mpu3050.c
new file mode 100644
index 000000000000..dd28d63c84fb
--- /dev/null
+++ b/arch/x86/platform/intel-mid/device_libs/platform_mpu3050.c
@@ -0,0 +1,36 @@
1/*
2 * platform_mpu3050.c: mpu3050 platform data initilization file
3 *
4 * (C) Copyright 2013 Intel Corporation
5 * Author: Sathyanarayanan Kuppuswamy <sathyanarayanan.kuppuswamy@intel.com>
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; version 2
10 * of the License.
11 */
12
13#include <linux/gpio.h>
14#include <linux/i2c.h>
15#include <asm/intel-mid.h>
16
17static void *mpu3050_platform_data(void *info)
18{
19 struct i2c_board_info *i2c_info = info;
20 int intr = get_gpio_by_name("mpu3050_int");
21
22 if (intr == -1)
23 return NULL;
24
25 i2c_info->irq = intr + INTEL_MID_IRQ_OFFSET;
26 return NULL;
27}
28
29static const struct devs_id mpu3050_dev_id __initconst = {
30 .name = "mpu3050",
31 .type = SFI_DEV_TYPE_I2C,
32 .delay = 1,
33 .get_platform_data = &mpu3050_platform_data,
34};
35
36sfi_device(mpu3050_dev_id);
diff --git a/arch/x86/platform/intel-mid/device_libs/platform_msic.c b/arch/x86/platform/intel-mid/device_libs/platform_msic.c
new file mode 100644
index 000000000000..9f4a775a69d6
--- /dev/null
+++ b/arch/x86/platform/intel-mid/device_libs/platform_msic.c
@@ -0,0 +1,87 @@
1/*
2 * platform_msic.c: MSIC platform data initilization file
3 *
4 * (C) Copyright 2013 Intel Corporation
5 * Author: Sathyanarayanan Kuppuswamy <sathyanarayanan.kuppuswamy@intel.com>
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; version 2
10 * of the License.
11 */
12
13#include <linux/kernel.h>
14#include <linux/interrupt.h>
15#include <linux/scatterlist.h>
16#include <linux/init.h>
17#include <linux/sfi.h>
18#include <linux/mfd/intel_msic.h>
19#include <asm/intel_scu_ipc.h>
20#include <asm/intel-mid.h>
21#include "platform_msic.h"
22
23struct intel_msic_platform_data msic_pdata;
24
25static struct resource msic_resources[] = {
26 {
27 .start = INTEL_MSIC_IRQ_PHYS_BASE,
28 .end = INTEL_MSIC_IRQ_PHYS_BASE + 64 - 1,
29 .flags = IORESOURCE_MEM,
30 },
31};
32
33static struct platform_device msic_device = {
34 .name = "intel_msic",
35 .id = -1,
36 .dev = {
37 .platform_data = &msic_pdata,
38 },
39 .num_resources = ARRAY_SIZE(msic_resources),
40 .resource = msic_resources,
41};
42
43static int msic_scu_status_change(struct notifier_block *nb,
44 unsigned long code, void *data)
45{
46 if (code == SCU_DOWN) {
47 platform_device_unregister(&msic_device);
48 return 0;
49 }
50
51 return platform_device_register(&msic_device);
52}
53
54static int __init msic_init(void)
55{
56 static struct notifier_block msic_scu_notifier = {
57 .notifier_call = msic_scu_status_change,
58 };
59
60 /*
61 * We need to be sure that the SCU IPC is ready before MSIC device
62 * can be registered.
63 */
64 if (intel_mid_has_msic())
65 intel_scu_notifier_add(&msic_scu_notifier);
66
67 return 0;
68}
69arch_initcall(msic_init);
70
71/*
72 * msic_generic_platform_data - sets generic platform data for the block
73 * @info: pointer to the SFI device table entry for this block
74 * @block: MSIC block
75 *
76 * Function sets IRQ number from the SFI table entry for given device to
77 * the MSIC platform data.
78 */
79void *msic_generic_platform_data(void *info, enum intel_msic_block block)
80{
81 struct sfi_device_table_entry *entry = info;
82
83 BUG_ON(block < 0 || block >= INTEL_MSIC_BLOCK_LAST);
84 msic_pdata.irq[block] = entry->irq;
85
86 return NULL;
87}
diff --git a/arch/x86/platform/intel-mid/device_libs/platform_msic.h b/arch/x86/platform/intel-mid/device_libs/platform_msic.h
new file mode 100644
index 000000000000..917eb56d77da
--- /dev/null
+++ b/arch/x86/platform/intel-mid/device_libs/platform_msic.h
@@ -0,0 +1,19 @@
1/*
2 * platform_msic.h: MSIC platform data header file
3 *
4 * (C) Copyright 2013 Intel Corporation
5 * Author: Sathyanarayanan Kuppuswamy <sathyanarayanan.kuppuswamy@intel.com>
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; version 2
10 * of the License.
11 */
12#ifndef _PLATFORM_MSIC_H_
13#define _PLATFORM_MSIC_H_
14
15extern struct intel_msic_platform_data msic_pdata;
16
17extern void *msic_generic_platform_data(void *info,
18 enum intel_msic_block block) __attribute__((weak));
19#endif
diff --git a/arch/x86/platform/intel-mid/device_libs/platform_msic_audio.c b/arch/x86/platform/intel-mid/device_libs/platform_msic_audio.c
new file mode 100644
index 000000000000..29629397d2b3
--- /dev/null
+++ b/arch/x86/platform/intel-mid/device_libs/platform_msic_audio.c
@@ -0,0 +1,47 @@
1/*
2 * platform_msic_audio.c: MSIC audio platform data initilization file
3 *
4 * (C) Copyright 2013 Intel Corporation
5 * Author: Sathyanarayanan Kuppuswamy <sathyanarayanan.kuppuswamy@intel.com>
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; version 2
10 * of the License.
11 */
12
13#include <linux/kernel.h>
14#include <linux/interrupt.h>
15#include <linux/scatterlist.h>
16#include <linux/init.h>
17#include <linux/sfi.h>
18#include <linux/platform_device.h>
19#include <linux/mfd/intel_msic.h>
20#include <asm/intel-mid.h>
21
22#include "platform_msic.h"
23#include "platform_ipc.h"
24
25static void *msic_audio_platform_data(void *info)
26{
27 struct platform_device *pdev;
28
29 pdev = platform_device_register_simple("sst-platform", -1, NULL, 0);
30
31 if (IS_ERR(pdev)) {
32 pr_err("failed to create audio platform device\n");
33 return NULL;
34 }
35
36 return msic_generic_platform_data(info, INTEL_MSIC_BLOCK_AUDIO);
37}
38
39static const struct devs_id msic_audio_dev_id __initconst = {
40 .name = "msic_audio",
41 .type = SFI_DEV_TYPE_IPC,
42 .delay = 1,
43 .get_platform_data = &msic_audio_platform_data,
44 .device_handler = &ipc_device_handler,
45};
46
47sfi_device(msic_audio_dev_id);
diff --git a/arch/x86/platform/intel-mid/device_libs/platform_msic_battery.c b/arch/x86/platform/intel-mid/device_libs/platform_msic_battery.c
new file mode 100644
index 000000000000..f446c33df1a8
--- /dev/null
+++ b/arch/x86/platform/intel-mid/device_libs/platform_msic_battery.c
@@ -0,0 +1,37 @@
1/*
2 * platform_msic_battery.c: MSIC battery platform data initilization file
3 *
4 * (C) Copyright 2013 Intel Corporation
5 * Author: Sathyanarayanan Kuppuswamy <sathyanarayanan.kuppuswamy@intel.com>
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; version 2
10 * of the License.
11 */
12
13#include <linux/kernel.h>
14#include <linux/interrupt.h>
15#include <linux/scatterlist.h>
16#include <linux/init.h>
17#include <linux/sfi.h>
18#include <linux/mfd/intel_msic.h>
19#include <asm/intel-mid.h>
20
21#include "platform_msic.h"
22#include "platform_ipc.h"
23
24static void __init *msic_battery_platform_data(void *info)
25{
26 return msic_generic_platform_data(info, INTEL_MSIC_BLOCK_BATTERY);
27}
28
29static const struct devs_id msic_battery_dev_id __initconst = {
30 .name = "msic_battery",
31 .type = SFI_DEV_TYPE_IPC,
32 .delay = 1,
33 .get_platform_data = &msic_battery_platform_data,
34 .device_handler = &ipc_device_handler,
35};
36
37sfi_device(msic_battery_dev_id);
diff --git a/arch/x86/platform/intel-mid/device_libs/platform_msic_gpio.c b/arch/x86/platform/intel-mid/device_libs/platform_msic_gpio.c
new file mode 100644
index 000000000000..2a4f7b1dd917
--- /dev/null
+++ b/arch/x86/platform/intel-mid/device_libs/platform_msic_gpio.c
@@ -0,0 +1,48 @@
1/*
2 * platform_msic_gpio.c: MSIC GPIO platform data initilization file
3 *
4 * (C) Copyright 2013 Intel Corporation
5 * Author: Sathyanarayanan Kuppuswamy <sathyanarayanan.kuppuswamy@intel.com>
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; version 2
10 * of the License.
11 */
12
13#include <linux/kernel.h>
14#include <linux/interrupt.h>
15#include <linux/scatterlist.h>
16#include <linux/sfi.h>
17#include <linux/init.h>
18#include <linux/gpio.h>
19#include <linux/mfd/intel_msic.h>
20#include <asm/intel-mid.h>
21
22#include "platform_msic.h"
23#include "platform_ipc.h"
24
25static void __init *msic_gpio_platform_data(void *info)
26{
27 static struct intel_msic_gpio_pdata msic_gpio_pdata;
28
29 int gpio = get_gpio_by_name("msic_gpio_base");
30
31 if (gpio < 0)
32 return NULL;
33
34 msic_gpio_pdata.gpio_base = gpio;
35 msic_pdata.gpio = &msic_gpio_pdata;
36
37 return msic_generic_platform_data(info, INTEL_MSIC_BLOCK_GPIO);
38}
39
40static const struct devs_id msic_gpio_dev_id __initconst = {
41 .name = "msic_gpio",
42 .type = SFI_DEV_TYPE_IPC,
43 .delay = 1,
44 .get_platform_data = &msic_gpio_platform_data,
45 .device_handler = &ipc_device_handler,
46};
47
48sfi_device(msic_gpio_dev_id);
diff --git a/arch/x86/platform/intel-mid/device_libs/platform_msic_ocd.c b/arch/x86/platform/intel-mid/device_libs/platform_msic_ocd.c
new file mode 100644
index 000000000000..6497111ddb54
--- /dev/null
+++ b/arch/x86/platform/intel-mid/device_libs/platform_msic_ocd.c
@@ -0,0 +1,49 @@
1/*
2 * platform_msic_ocd.c: MSIC OCD platform data initilization file
3 *
4 * (C) Copyright 2013 Intel Corporation
5 * Author: Sathyanarayanan Kuppuswamy <sathyanarayanan.kuppuswamy@intel.com>
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; version 2
10 * of the License.
11 */
12
13#include <linux/kernel.h>
14#include <linux/interrupt.h>
15#include <linux/scatterlist.h>
16#include <linux/sfi.h>
17#include <linux/init.h>
18#include <linux/gpio.h>
19#include <linux/mfd/intel_msic.h>
20#include <asm/intel-mid.h>
21
22#include "platform_msic.h"
23#include "platform_ipc.h"
24
25static void __init *msic_ocd_platform_data(void *info)
26{
27 static struct intel_msic_ocd_pdata msic_ocd_pdata;
28 int gpio;
29
30 gpio = get_gpio_by_name("ocd_gpio");
31
32 if (gpio < 0)
33 return NULL;
34
35 msic_ocd_pdata.gpio = gpio;
36 msic_pdata.ocd = &msic_ocd_pdata;
37
38 return msic_generic_platform_data(info, INTEL_MSIC_BLOCK_OCD);
39}
40
41static const struct devs_id msic_ocd_dev_id __initconst = {
42 .name = "msic_ocd",
43 .type = SFI_DEV_TYPE_IPC,
44 .delay = 1,
45 .get_platform_data = &msic_ocd_platform_data,
46 .device_handler = &ipc_device_handler,
47};
48
49sfi_device(msic_ocd_dev_id);
diff --git a/arch/x86/platform/intel-mid/device_libs/platform_msic_power_btn.c b/arch/x86/platform/intel-mid/device_libs/platform_msic_power_btn.c
new file mode 100644
index 000000000000..83a3459bc337
--- /dev/null
+++ b/arch/x86/platform/intel-mid/device_libs/platform_msic_power_btn.c
@@ -0,0 +1,36 @@
1/*
2 * platform_msic_power_btn.c: MSIC power btn platform data initilization file
3 *
4 * (C) Copyright 2013 Intel Corporation
5 * Author: Sathyanarayanan Kuppuswamy <sathyanarayanan.kuppuswamy@intel.com>
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; version 2
10 * of the License.
11 */
12#include <linux/kernel.h>
13#include <linux/interrupt.h>
14#include <linux/scatterlist.h>
15#include <linux/sfi.h>
16#include <linux/init.h>
17#include <linux/mfd/intel_msic.h>
18#include <asm/intel-mid.h>
19
20#include "platform_msic.h"
21#include "platform_ipc.h"
22
23static void __init *msic_power_btn_platform_data(void *info)
24{
25 return msic_generic_platform_data(info, INTEL_MSIC_BLOCK_POWER_BTN);
26}
27
28static const struct devs_id msic_power_btn_dev_id __initconst = {
29 .name = "msic_power_btn",
30 .type = SFI_DEV_TYPE_IPC,
31 .delay = 1,
32 .get_platform_data = &msic_power_btn_platform_data,
33 .device_handler = &ipc_device_handler,
34};
35
36sfi_device(msic_power_btn_dev_id);
diff --git a/arch/x86/platform/intel-mid/device_libs/platform_msic_thermal.c b/arch/x86/platform/intel-mid/device_libs/platform_msic_thermal.c
new file mode 100644
index 000000000000..a351878b96bc
--- /dev/null
+++ b/arch/x86/platform/intel-mid/device_libs/platform_msic_thermal.c
@@ -0,0 +1,37 @@
1/*
2 * platform_msic_thermal.c: msic_thermal platform data initilization file
3 *
4 * (C) Copyright 2013 Intel Corporation
5 * Author: Sathyanarayanan Kuppuswamy <sathyanarayanan.kuppuswamy@intel.com>
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; version 2
10 * of the License.
11 */
12
13#include <linux/input.h>
14#include <linux/init.h>
15#include <linux/kernel.h>
16#include <linux/gpio.h>
17#include <linux/platform_device.h>
18#include <linux/mfd/intel_msic.h>
19#include <asm/intel-mid.h>
20
21#include "platform_msic.h"
22#include "platform_ipc.h"
23
24static void __init *msic_thermal_platform_data(void *info)
25{
26 return msic_generic_platform_data(info, INTEL_MSIC_BLOCK_THERMAL);
27}
28
29static const struct devs_id msic_thermal_dev_id __initconst = {
30 .name = "msic_thermal",
31 .type = SFI_DEV_TYPE_IPC,
32 .delay = 1,
33 .get_platform_data = &msic_thermal_platform_data,
34 .device_handler = &ipc_device_handler,
35};
36
37sfi_device(msic_thermal_dev_id);
diff --git a/arch/x86/platform/intel-mid/device_libs/platform_pmic_gpio.c b/arch/x86/platform/intel-mid/device_libs/platform_pmic_gpio.c
new file mode 100644
index 000000000000..d87182a09263
--- /dev/null
+++ b/arch/x86/platform/intel-mid/device_libs/platform_pmic_gpio.c
@@ -0,0 +1,54 @@
1/*
2 * platform_pmic_gpio.c: PMIC GPIO platform data initilization file
3 *
4 * (C) Copyright 2013 Intel Corporation
5 * Author: Sathyanarayanan Kuppuswamy <sathyanarayanan.kuppuswamy@intel.com>
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; version 2
10 * of the License.
11 */
12
13#include <linux/kernel.h>
14#include <linux/interrupt.h>
15#include <linux/scatterlist.h>
16#include <linux/gpio.h>
17#include <linux/init.h>
18#include <linux/sfi.h>
19#include <linux/intel_pmic_gpio.h>
20#include <asm/intel-mid.h>
21
22#include "platform_ipc.h"
23
24static void __init *pmic_gpio_platform_data(void *info)
25{
26 static struct intel_pmic_gpio_platform_data pmic_gpio_pdata;
27 int gpio_base = get_gpio_by_name("pmic_gpio_base");
28
29 if (gpio_base == -1)
30 gpio_base = 64;
31 pmic_gpio_pdata.gpio_base = gpio_base;
32 pmic_gpio_pdata.irq_base = gpio_base + INTEL_MID_IRQ_OFFSET;
33 pmic_gpio_pdata.gpiointr = 0xffffeff8;
34
35 return &pmic_gpio_pdata;
36}
37
38static const struct devs_id pmic_gpio_spi_dev_id __initconst = {
39 .name = "pmic_gpio",
40 .type = SFI_DEV_TYPE_SPI,
41 .delay = 1,
42 .get_platform_data = &pmic_gpio_platform_data,
43};
44
45static const struct devs_id pmic_gpio_ipc_dev_id __initconst = {
46 .name = "pmic_gpio",
47 .type = SFI_DEV_TYPE_IPC,
48 .delay = 1,
49 .get_platform_data = &pmic_gpio_platform_data,
50 .device_handler = &ipc_device_handler
51};
52
53sfi_device(pmic_gpio_spi_dev_id);
54sfi_device(pmic_gpio_ipc_dev_id);
diff --git a/arch/x86/platform/intel-mid/device_libs/platform_tc35876x.c b/arch/x86/platform/intel-mid/device_libs/platform_tc35876x.c
new file mode 100644
index 000000000000..740fc757050c
--- /dev/null
+++ b/arch/x86/platform/intel-mid/device_libs/platform_tc35876x.c
@@ -0,0 +1,36 @@
1/*
2 * platform_tc35876x.c: tc35876x platform data initilization file
3 *
4 * (C) Copyright 2013 Intel Corporation
5 * Author: Sathyanarayanan Kuppuswamy <sathyanarayanan.kuppuswamy@intel.com>
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; version 2
10 * of the License.
11 */
12
13#include <linux/gpio.h>
14#include <linux/i2c/tc35876x.h>
15#include <asm/intel-mid.h>
16
17/*tc35876x DSI_LVDS bridge chip and panel platform data*/
18static void *tc35876x_platform_data(void *data)
19{
20 static struct tc35876x_platform_data pdata;
21
22 /* gpio pins set to -1 will not be used by the driver */
23 pdata.gpio_bridge_reset = get_gpio_by_name("LCMB_RXEN");
24 pdata.gpio_panel_bl_en = get_gpio_by_name("6S6P_BL_EN");
25 pdata.gpio_panel_vadd = get_gpio_by_name("EN_VREG_LCD_V3P3");
26
27 return &pdata;
28}
29
30static const struct devs_id tc35876x_dev_id __initconst = {
31 .name = "i2c_disp_brig",
32 .type = SFI_DEV_TYPE_I2C,
33 .get_platform_data = &tc35876x_platform_data,
34};
35
36sfi_device(tc35876x_dev_id);
diff --git a/arch/x86/platform/intel-mid/device_libs/platform_tca6416.c b/arch/x86/platform/intel-mid/device_libs/platform_tca6416.c
new file mode 100644
index 000000000000..22881c9a6737
--- /dev/null
+++ b/arch/x86/platform/intel-mid/device_libs/platform_tca6416.c
@@ -0,0 +1,57 @@
1/*
2 * platform_tca6416.c: tca6416 platform data initilization file
3 *
4 * (C) Copyright 2013 Intel Corporation
5 * Author: Sathyanarayanan Kuppuswamy <sathyanarayanan.kuppuswamy@intel.com>
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; version 2
10 * of the License.
11 */
12
13#include <linux/platform_data/pca953x.h>
14#include <linux/i2c.h>
15#include <linux/gpio.h>
16#include <asm/intel-mid.h>
17
18#define TCA6416_NAME "tca6416"
19#define TCA6416_BASE "tca6416_base"
20#define TCA6416_INTR "tca6416_int"
21
22static void *tca6416_platform_data(void *info)
23{
24 static struct pca953x_platform_data tca6416;
25 struct i2c_board_info *i2c_info = info;
26 int gpio_base, intr;
27 char base_pin_name[SFI_NAME_LEN + 1];
28 char intr_pin_name[SFI_NAME_LEN + 1];
29
30 strcpy(i2c_info->type, TCA6416_NAME);
31 strcpy(base_pin_name, TCA6416_BASE);
32 strcpy(intr_pin_name, TCA6416_INTR);
33
34 gpio_base = get_gpio_by_name(base_pin_name);
35 intr = get_gpio_by_name(intr_pin_name);
36
37 if (gpio_base == -1)
38 return NULL;
39 tca6416.gpio_base = gpio_base;
40 if (intr != -1) {
41 i2c_info->irq = intr + INTEL_MID_IRQ_OFFSET;
42 tca6416.irq_base = gpio_base + INTEL_MID_IRQ_OFFSET;
43 } else {
44 i2c_info->irq = -1;
45 tca6416.irq_base = -1;
46 }
47 return &tca6416;
48}
49
50static const struct devs_id tca6416_dev_id __initconst = {
51 .name = "tca6416",
52 .type = SFI_DEV_TYPE_I2C,
53 .delay = 1,
54 .get_platform_data = &tca6416_platform_data,
55};
56
57sfi_device(tca6416_dev_id);
diff --git a/arch/x86/platform/mrst/early_printk_mrst.c b/arch/x86/platform/intel-mid/early_printk_intel_mid.c
index 028454f0c3a5..4f702f554f6e 100644
--- a/arch/x86/platform/mrst/early_printk_mrst.c
+++ b/arch/x86/platform/intel-mid/early_printk_intel_mid.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * early_printk_mrst.c - early consoles for Intel MID platforms 2 * early_printk_intel_mid.c - early consoles for Intel MID platforms
3 * 3 *
4 * Copyright (c) 2008-2010, Intel Corporation 4 * Copyright (c) 2008-2010, Intel Corporation
5 * 5 *
@@ -27,7 +27,7 @@
27 27
28#include <asm/fixmap.h> 28#include <asm/fixmap.h>
29#include <asm/pgtable.h> 29#include <asm/pgtable.h>
30#include <asm/mrst.h> 30#include <asm/intel-mid.h>
31 31
32#define MRST_SPI_TIMEOUT 0x200000 32#define MRST_SPI_TIMEOUT 0x200000
33#define MRST_REGBASE_SPI0 0xff128000 33#define MRST_REGBASE_SPI0 0xff128000
@@ -152,7 +152,7 @@ void mrst_early_console_init(void)
152 spi0_cdiv = ((*pclk_spi0) & 0xe00) >> 9; 152 spi0_cdiv = ((*pclk_spi0) & 0xe00) >> 9;
153 freq = 100000000 / (spi0_cdiv + 1); 153 freq = 100000000 / (spi0_cdiv + 1);
154 154
155 if (mrst_identify_cpu() == MRST_CPU_CHIP_PENWELL) 155 if (intel_mid_identify_cpu() == INTEL_MID_CPU_CHIP_PENWELL)
156 mrst_spi_paddr = MRST_REGBASE_SPI1; 156 mrst_spi_paddr = MRST_REGBASE_SPI1;
157 157
158 pspi = (void *)set_fixmap_offset_nocache(FIX_EARLYCON_MEM_BASE, 158 pspi = (void *)set_fixmap_offset_nocache(FIX_EARLYCON_MEM_BASE,
@@ -213,13 +213,14 @@ static void early_mrst_spi_putc(char c)
213 } 213 }
214 214
215 if (!timeout) 215 if (!timeout)
216 pr_warning("MRST earlycon: timed out\n"); 216 pr_warn("MRST earlycon: timed out\n");
217 else 217 else
218 max3110_write_data(c); 218 max3110_write_data(c);
219} 219}
220 220
221/* Early SPI only uses polling mode */ 221/* Early SPI only uses polling mode */
222static void early_mrst_spi_write(struct console *con, const char *str, unsigned n) 222static void early_mrst_spi_write(struct console *con, const char *str,
223 unsigned n)
223{ 224{
224 int i; 225 int i;
225 226
diff --git a/arch/x86/platform/intel-mid/intel-mid.c b/arch/x86/platform/intel-mid/intel-mid.c
new file mode 100644
index 000000000000..f90e290f689f
--- /dev/null
+++ b/arch/x86/platform/intel-mid/intel-mid.c
@@ -0,0 +1,213 @@
1/*
2 * intel-mid.c: Intel MID platform setup code
3 *
4 * (C) Copyright 2008, 2012 Intel Corporation
5 * Author: Jacob Pan (jacob.jun.pan@intel.com)
6 * Author: Sathyanarayanan Kuppuswamy <sathyanarayanan.kuppuswamy@intel.com>
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License
10 * as published by the Free Software Foundation; version 2
11 * of the License.
12 */
13
14#define pr_fmt(fmt) "intel_mid: " fmt
15
16#include <linux/init.h>
17#include <linux/kernel.h>
18#include <linux/interrupt.h>
19#include <linux/scatterlist.h>
20#include <linux/sfi.h>
21#include <linux/irq.h>
22#include <linux/module.h>
23#include <linux/notifier.h>
24
25#include <asm/setup.h>
26#include <asm/mpspec_def.h>
27#include <asm/hw_irq.h>
28#include <asm/apic.h>
29#include <asm/io_apic.h>
30#include <asm/intel-mid.h>
31#include <asm/intel_mid_vrtc.h>
32#include <asm/io.h>
33#include <asm/i8259.h>
34#include <asm/intel_scu_ipc.h>
35#include <asm/apb_timer.h>
36#include <asm/reboot.h>
37
38/*
39 * the clockevent devices on Moorestown/Medfield can be APBT or LAPIC clock,
40 * cmdline option x86_intel_mid_timer can be used to override the configuration
41 * to prefer one or the other.
42 * at runtime, there are basically three timer configurations:
43 * 1. per cpu apbt clock only
44 * 2. per cpu always-on lapic clocks only, this is Penwell/Medfield only
45 * 3. per cpu lapic clock (C3STOP) and one apbt clock, with broadcast.
46 *
47 * by default (without cmdline option), platform code first detects cpu type
48 * to see if we are on lincroft or penwell, then set up both lapic or apbt
49 * clocks accordingly.
50 * i.e. by default, medfield uses configuration #2, moorestown uses #1.
51 * config #3 is supported but not recommended on medfield.
52 *
53 * rating and feature summary:
54 * lapic (with C3STOP) --------- 100
55 * apbt (always-on) ------------ 110
56 * lapic (always-on,ARAT) ------ 150
57 */
58
59enum intel_mid_timer_options intel_mid_timer_options;
60
61enum intel_mid_cpu_type __intel_mid_cpu_chip;
62EXPORT_SYMBOL_GPL(__intel_mid_cpu_chip);
63
64static void intel_mid_power_off(void)
65{
66}
67
68static void intel_mid_reboot(void)
69{
70 intel_scu_ipc_simple_command(IPCMSG_COLD_BOOT, 0);
71}
72
73static unsigned long __init intel_mid_calibrate_tsc(void)
74{
75 unsigned long fast_calibrate;
76 u32 lo, hi, ratio, fsb;
77
78 rdmsr(MSR_IA32_PERF_STATUS, lo, hi);
79 pr_debug("IA32 perf status is 0x%x, 0x%0x\n", lo, hi);
80 ratio = (hi >> 8) & 0x1f;
81 pr_debug("ratio is %d\n", ratio);
82 if (!ratio) {
83 pr_err("read a zero ratio, should be incorrect!\n");
84 pr_err("force tsc ratio to 16 ...\n");
85 ratio = 16;
86 }
87 rdmsr(MSR_FSB_FREQ, lo, hi);
88 if ((lo & 0x7) == 0x7)
89 fsb = PENWELL_FSB_FREQ_83SKU;
90 else
91 fsb = PENWELL_FSB_FREQ_100SKU;
92 fast_calibrate = ratio * fsb;
93 pr_debug("read penwell tsc %lu khz\n", fast_calibrate);
94 lapic_timer_frequency = fsb * 1000 / HZ;
95 /* mark tsc clocksource as reliable */
96 set_cpu_cap(&boot_cpu_data, X86_FEATURE_TSC_RELIABLE);
97
98 if (fast_calibrate)
99 return fast_calibrate;
100
101 return 0;
102}
103
104static void __init intel_mid_time_init(void)
105{
106 sfi_table_parse(SFI_SIG_MTMR, NULL, NULL, sfi_parse_mtmr);
107 switch (intel_mid_timer_options) {
108 case INTEL_MID_TIMER_APBT_ONLY:
109 break;
110 case INTEL_MID_TIMER_LAPIC_APBT:
111 x86_init.timers.setup_percpu_clockev = setup_boot_APIC_clock;
112 x86_cpuinit.setup_percpu_clockev = setup_secondary_APIC_clock;
113 break;
114 default:
115 if (!boot_cpu_has(X86_FEATURE_ARAT))
116 break;
117 x86_init.timers.setup_percpu_clockev = setup_boot_APIC_clock;
118 x86_cpuinit.setup_percpu_clockev = setup_secondary_APIC_clock;
119 return;
120 }
121 /* we need at least one APB timer */
122 pre_init_apic_IRQ0();
123 apbt_time_init();
124}
125
126static void intel_mid_arch_setup(void)
127{
128 if (boot_cpu_data.x86 == 6 && boot_cpu_data.x86_model == 0x27)
129 __intel_mid_cpu_chip = INTEL_MID_CPU_CHIP_PENWELL;
130 else {
131 pr_err("Unknown Intel MID CPU (%d:%d), default to Penwell\n",
132 boot_cpu_data.x86, boot_cpu_data.x86_model);
133 __intel_mid_cpu_chip = INTEL_MID_CPU_CHIP_PENWELL;
134 }
135}
136
137/* MID systems don't have i8042 controller */
138static int intel_mid_i8042_detect(void)
139{
140 return 0;
141}
142
143/*
144 * Moorestown does not have external NMI source nor port 0x61 to report
145 * NMI status. The possible NMI sources are from pmu as a result of NMI
146 * watchdog or lock debug. Reading io port 0x61 results in 0xff which
147 * misled NMI handler.
148 */
149static unsigned char intel_mid_get_nmi_reason(void)
150{
151 return 0;
152}
153
154/*
155 * Moorestown specific x86_init function overrides and early setup
156 * calls.
157 */
158void __init x86_intel_mid_early_setup(void)
159{
160 x86_init.resources.probe_roms = x86_init_noop;
161 x86_init.resources.reserve_resources = x86_init_noop;
162
163 x86_init.timers.timer_init = intel_mid_time_init;
164 x86_init.timers.setup_percpu_clockev = x86_init_noop;
165
166 x86_init.irqs.pre_vector_init = x86_init_noop;
167
168 x86_init.oem.arch_setup = intel_mid_arch_setup;
169
170 x86_cpuinit.setup_percpu_clockev = apbt_setup_secondary_clock;
171
172 x86_platform.calibrate_tsc = intel_mid_calibrate_tsc;
173 x86_platform.i8042_detect = intel_mid_i8042_detect;
174 x86_init.timers.wallclock_init = intel_mid_rtc_init;
175 x86_platform.get_nmi_reason = intel_mid_get_nmi_reason;
176
177 x86_init.pci.init = intel_mid_pci_init;
178 x86_init.pci.fixup_irqs = x86_init_noop;
179
180 legacy_pic = &null_legacy_pic;
181
182 pm_power_off = intel_mid_power_off;
183 machine_ops.emergency_restart = intel_mid_reboot;
184
185 /* Avoid searching for BIOS MP tables */
186 x86_init.mpparse.find_smp_config = x86_init_noop;
187 x86_init.mpparse.get_smp_config = x86_init_uint_noop;
188 set_bit(MP_BUS_ISA, mp_bus_not_pci);
189}
190
191/*
192 * if user does not want to use per CPU apb timer, just give it a lower rating
193 * than local apic timer and skip the late per cpu timer init.
194 */
195static inline int __init setup_x86_intel_mid_timer(char *arg)
196{
197 if (!arg)
198 return -EINVAL;
199
200 if (strcmp("apbt_only", arg) == 0)
201 intel_mid_timer_options = INTEL_MID_TIMER_APBT_ONLY;
202 else if (strcmp("lapic_and_apbt", arg) == 0)
203 intel_mid_timer_options = INTEL_MID_TIMER_LAPIC_APBT;
204 else {
205 pr_warn("X86 INTEL_MID timer option %s not recognised"
206 " use x86_intel_mid_timer=apbt_only or lapic_and_apbt\n",
207 arg);
208 return -EINVAL;
209 }
210 return 0;
211}
212__setup("x86_intel_mid_timer=", setup_x86_intel_mid_timer);
213
diff --git a/arch/x86/platform/mrst/vrtc.c b/arch/x86/platform/intel-mid/intel_mid_vrtc.c
index 5e355b134ba4..4762cff7facd 100644
--- a/arch/x86/platform/mrst/vrtc.c
+++ b/arch/x86/platform/intel-mid/intel_mid_vrtc.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * vrtc.c: Driver for virtual RTC device on Intel MID platform 2 * intel_mid_vrtc.c: Driver for virtual RTC device on Intel MID platform
3 * 3 *
4 * (C) Copyright 2009 Intel Corporation 4 * (C) Copyright 2009 Intel Corporation
5 * 5 *
@@ -23,8 +23,8 @@
23#include <linux/sfi.h> 23#include <linux/sfi.h>
24#include <linux/platform_device.h> 24#include <linux/platform_device.h>
25 25
26#include <asm/mrst.h> 26#include <asm/intel-mid.h>
27#include <asm/mrst-vrtc.h> 27#include <asm/intel_mid_vrtc.h>
28#include <asm/time.h> 28#include <asm/time.h>
29#include <asm/fixmap.h> 29#include <asm/fixmap.h>
30 30
@@ -79,7 +79,7 @@ void vrtc_get_time(struct timespec *now)
79 /* vRTC YEAR reg contains the offset to 1972 */ 79 /* vRTC YEAR reg contains the offset to 1972 */
80 year += 1972; 80 year += 1972;
81 81
82 printk(KERN_INFO "vRTC: sec: %d min: %d hour: %d day: %d " 82 pr_info("vRTC: sec: %d min: %d hour: %d day: %d "
83 "mon: %d year: %d\n", sec, min, hour, mday, mon, year); 83 "mon: %d year: %d\n", sec, min, hour, mday, mon, year);
84 84
85 now->tv_sec = mktime(year, mon, mday, hour, min, sec); 85 now->tv_sec = mktime(year, mon, mday, hour, min, sec);
@@ -109,15 +109,14 @@ int vrtc_set_mmss(const struct timespec *now)
109 vrtc_cmos_write(tm.tm_sec, RTC_SECONDS); 109 vrtc_cmos_write(tm.tm_sec, RTC_SECONDS);
110 spin_unlock_irqrestore(&rtc_lock, flags); 110 spin_unlock_irqrestore(&rtc_lock, flags);
111 } else { 111 } else {
112 printk(KERN_ERR 112 pr_err("%s: Invalid vRTC value: write of %lx to vRTC failed\n",
113 "%s: Invalid vRTC value: write of %lx to vRTC failed\n",
114 __FUNCTION__, now->tv_sec); 113 __FUNCTION__, now->tv_sec);
115 retval = -EINVAL; 114 retval = -EINVAL;
116 } 115 }
117 return retval; 116 return retval;
118} 117}
119 118
120void __init mrst_rtc_init(void) 119void __init intel_mid_rtc_init(void)
121{ 120{
122 unsigned long vrtc_paddr; 121 unsigned long vrtc_paddr;
123 122
@@ -155,10 +154,10 @@ static struct platform_device vrtc_device = {
155}; 154};
156 155
157/* Register the RTC device if appropriate */ 156/* Register the RTC device if appropriate */
158static int __init mrst_device_create(void) 157static int __init intel_mid_device_create(void)
159{ 158{
160 /* No Moorestown, no device */ 159 /* No Moorestown, no device */
161 if (!mrst_identify_cpu()) 160 if (!intel_mid_identify_cpu())
162 return -ENODEV; 161 return -ENODEV;
163 /* No timer, no device */ 162 /* No timer, no device */
164 if (!sfi_mrtc_num) 163 if (!sfi_mrtc_num)
@@ -175,4 +174,4 @@ static int __init mrst_device_create(void)
175 return platform_device_register(&vrtc_device); 174 return platform_device_register(&vrtc_device);
176} 175}
177 176
178module_init(mrst_device_create); 177module_init(intel_mid_device_create);
diff --git a/arch/x86/platform/intel-mid/sfi.c b/arch/x86/platform/intel-mid/sfi.c
new file mode 100644
index 000000000000..c84c1ca396bf
--- /dev/null
+++ b/arch/x86/platform/intel-mid/sfi.c
@@ -0,0 +1,488 @@
1/*
2 * intel_mid_sfi.c: Intel MID SFI initialization code
3 *
4 * (C) Copyright 2013 Intel Corporation
5 * Author: Sathyanarayanan Kuppuswamy <sathyanarayanan.kuppuswamy@intel.com>
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; version 2
10 * of the License.
11 */
12
13#include <linux/init.h>
14#include <linux/kernel.h>
15#include <linux/interrupt.h>
16#include <linux/scatterlist.h>
17#include <linux/sfi.h>
18#include <linux/intel_pmic_gpio.h>
19#include <linux/spi/spi.h>
20#include <linux/i2c.h>
21#include <linux/skbuff.h>
22#include <linux/gpio.h>
23#include <linux/gpio_keys.h>
24#include <linux/input.h>
25#include <linux/platform_device.h>
26#include <linux/irq.h>
27#include <linux/module.h>
28#include <linux/notifier.h>
29#include <linux/mmc/core.h>
30#include <linux/mmc/card.h>
31#include <linux/blkdev.h>
32
33#include <asm/setup.h>
34#include <asm/mpspec_def.h>
35#include <asm/hw_irq.h>
36#include <asm/apic.h>
37#include <asm/io_apic.h>
38#include <asm/intel-mid.h>
39#include <asm/intel_mid_vrtc.h>
40#include <asm/io.h>
41#include <asm/i8259.h>
42#include <asm/intel_scu_ipc.h>
43#include <asm/apb_timer.h>
44#include <asm/reboot.h>
45
46#define SFI_SIG_OEM0 "OEM0"
47#define MAX_IPCDEVS 24
48#define MAX_SCU_SPI 24
49#define MAX_SCU_I2C 24
50
51static struct platform_device *ipc_devs[MAX_IPCDEVS];
52static struct spi_board_info *spi_devs[MAX_SCU_SPI];
53static struct i2c_board_info *i2c_devs[MAX_SCU_I2C];
54static struct sfi_gpio_table_entry *gpio_table;
55static struct sfi_timer_table_entry sfi_mtimer_array[SFI_MTMR_MAX_NUM];
56static int ipc_next_dev;
57static int spi_next_dev;
58static int i2c_next_dev;
59static int i2c_bus[MAX_SCU_I2C];
60static int gpio_num_entry;
61static u32 sfi_mtimer_usage[SFI_MTMR_MAX_NUM];
62int sfi_mrtc_num;
63int sfi_mtimer_num;
64
65struct sfi_rtc_table_entry sfi_mrtc_array[SFI_MRTC_MAX];
66EXPORT_SYMBOL_GPL(sfi_mrtc_array);
67
68struct blocking_notifier_head intel_scu_notifier =
69 BLOCKING_NOTIFIER_INIT(intel_scu_notifier);
70EXPORT_SYMBOL_GPL(intel_scu_notifier);
71
72#define intel_mid_sfi_get_pdata(dev, priv) \
73 ((dev)->get_platform_data ? (dev)->get_platform_data(priv) : NULL)
74
75/* parse all the mtimer info to a static mtimer array */
76int __init sfi_parse_mtmr(struct sfi_table_header *table)
77{
78 struct sfi_table_simple *sb;
79 struct sfi_timer_table_entry *pentry;
80 struct mpc_intsrc mp_irq;
81 int totallen;
82
83 sb = (struct sfi_table_simple *)table;
84 if (!sfi_mtimer_num) {
85 sfi_mtimer_num = SFI_GET_NUM_ENTRIES(sb,
86 struct sfi_timer_table_entry);
87 pentry = (struct sfi_timer_table_entry *) sb->pentry;
88 totallen = sfi_mtimer_num * sizeof(*pentry);
89 memcpy(sfi_mtimer_array, pentry, totallen);
90 }
91
92 pr_debug("SFI MTIMER info (num = %d):\n", sfi_mtimer_num);
93 pentry = sfi_mtimer_array;
94 for (totallen = 0; totallen < sfi_mtimer_num; totallen++, pentry++) {
95 pr_debug("timer[%d]: paddr = 0x%08x, freq = %dHz, irq = %d\n",
96 totallen, (u32)pentry->phys_addr,
97 pentry->freq_hz, pentry->irq);
98 if (!pentry->irq)
99 continue;
100 mp_irq.type = MP_INTSRC;
101 mp_irq.irqtype = mp_INT;
102/* triggering mode edge bit 2-3, active high polarity bit 0-1 */
103 mp_irq.irqflag = 5;
104 mp_irq.srcbus = MP_BUS_ISA;
105 mp_irq.srcbusirq = pentry->irq; /* IRQ */
106 mp_irq.dstapic = MP_APIC_ALL;
107 mp_irq.dstirq = pentry->irq;
108 mp_save_irq(&mp_irq);
109 }
110
111 return 0;
112}
113
114struct sfi_timer_table_entry *sfi_get_mtmr(int hint)
115{
116 int i;
117 if (hint < sfi_mtimer_num) {
118 if (!sfi_mtimer_usage[hint]) {
119 pr_debug("hint taken for timer %d irq %d\n",
120 hint, sfi_mtimer_array[hint].irq);
121 sfi_mtimer_usage[hint] = 1;
122 return &sfi_mtimer_array[hint];
123 }
124 }
125 /* take the first timer available */
126 for (i = 0; i < sfi_mtimer_num;) {
127 if (!sfi_mtimer_usage[i]) {
128 sfi_mtimer_usage[i] = 1;
129 return &sfi_mtimer_array[i];
130 }
131 i++;
132 }
133 return NULL;
134}
135
136void sfi_free_mtmr(struct sfi_timer_table_entry *mtmr)
137{
138 int i;
139 for (i = 0; i < sfi_mtimer_num;) {
140 if (mtmr->irq == sfi_mtimer_array[i].irq) {
141 sfi_mtimer_usage[i] = 0;
142 return;
143 }
144 i++;
145 }
146}
147
148/* parse all the mrtc info to a global mrtc array */
149int __init sfi_parse_mrtc(struct sfi_table_header *table)
150{
151 struct sfi_table_simple *sb;
152 struct sfi_rtc_table_entry *pentry;
153 struct mpc_intsrc mp_irq;
154
155 int totallen;
156
157 sb = (struct sfi_table_simple *)table;
158 if (!sfi_mrtc_num) {
159 sfi_mrtc_num = SFI_GET_NUM_ENTRIES(sb,
160 struct sfi_rtc_table_entry);
161 pentry = (struct sfi_rtc_table_entry *)sb->pentry;
162 totallen = sfi_mrtc_num * sizeof(*pentry);
163 memcpy(sfi_mrtc_array, pentry, totallen);
164 }
165
166 pr_debug("SFI RTC info (num = %d):\n", sfi_mrtc_num);
167 pentry = sfi_mrtc_array;
168 for (totallen = 0; totallen < sfi_mrtc_num; totallen++, pentry++) {
169 pr_debug("RTC[%d]: paddr = 0x%08x, irq = %d\n",
170 totallen, (u32)pentry->phys_addr, pentry->irq);
171 mp_irq.type = MP_INTSRC;
172 mp_irq.irqtype = mp_INT;
173 mp_irq.irqflag = 0xf; /* level trigger and active low */
174 mp_irq.srcbus = MP_BUS_ISA;
175 mp_irq.srcbusirq = pentry->irq; /* IRQ */
176 mp_irq.dstapic = MP_APIC_ALL;
177 mp_irq.dstirq = pentry->irq;
178 mp_save_irq(&mp_irq);
179 }
180 return 0;
181}
182
183
184/*
185 * Parsing GPIO table first, since the DEVS table will need this table
186 * to map the pin name to the actual pin.
187 */
188static int __init sfi_parse_gpio(struct sfi_table_header *table)
189{
190 struct sfi_table_simple *sb;
191 struct sfi_gpio_table_entry *pentry;
192 int num, i;
193
194 if (gpio_table)
195 return 0;
196 sb = (struct sfi_table_simple *)table;
197 num = SFI_GET_NUM_ENTRIES(sb, struct sfi_gpio_table_entry);
198 pentry = (struct sfi_gpio_table_entry *)sb->pentry;
199
200 gpio_table = kmalloc(num * sizeof(*pentry), GFP_KERNEL);
201 if (!gpio_table)
202 return -1;
203 memcpy(gpio_table, pentry, num * sizeof(*pentry));
204 gpio_num_entry = num;
205
206 pr_debug("GPIO pin info:\n");
207 for (i = 0; i < num; i++, pentry++)
208 pr_debug("info[%2d]: controller = %16.16s, pin_name = %16.16s,"
209 " pin = %d\n", i,
210 pentry->controller_name,
211 pentry->pin_name,
212 pentry->pin_no);
213 return 0;
214}
215
216int get_gpio_by_name(const char *name)
217{
218 struct sfi_gpio_table_entry *pentry = gpio_table;
219 int i;
220
221 if (!pentry)
222 return -1;
223 for (i = 0; i < gpio_num_entry; i++, pentry++) {
224 if (!strncmp(name, pentry->pin_name, SFI_NAME_LEN))
225 return pentry->pin_no;
226 }
227 return -1;
228}
229
230void __init intel_scu_device_register(struct platform_device *pdev)
231{
232 if (ipc_next_dev == MAX_IPCDEVS)
233 pr_err("too many SCU IPC devices");
234 else
235 ipc_devs[ipc_next_dev++] = pdev;
236}
237
238static void __init intel_scu_spi_device_register(struct spi_board_info *sdev)
239{
240 struct spi_board_info *new_dev;
241
242 if (spi_next_dev == MAX_SCU_SPI) {
243 pr_err("too many SCU SPI devices");
244 return;
245 }
246
247 new_dev = kzalloc(sizeof(*sdev), GFP_KERNEL);
248 if (!new_dev) {
249 pr_err("failed to alloc mem for delayed spi dev %s\n",
250 sdev->modalias);
251 return;
252 }
253 memcpy(new_dev, sdev, sizeof(*sdev));
254
255 spi_devs[spi_next_dev++] = new_dev;
256}
257
258static void __init intel_scu_i2c_device_register(int bus,
259 struct i2c_board_info *idev)
260{
261 struct i2c_board_info *new_dev;
262
263 if (i2c_next_dev == MAX_SCU_I2C) {
264 pr_err("too many SCU I2C devices");
265 return;
266 }
267
268 new_dev = kzalloc(sizeof(*idev), GFP_KERNEL);
269 if (!new_dev) {
270 pr_err("failed to alloc mem for delayed i2c dev %s\n",
271 idev->type);
272 return;
273 }
274 memcpy(new_dev, idev, sizeof(*idev));
275
276 i2c_bus[i2c_next_dev] = bus;
277 i2c_devs[i2c_next_dev++] = new_dev;
278}
279
280/* Called by IPC driver */
281void intel_scu_devices_create(void)
282{
283 int i;
284
285 for (i = 0; i < ipc_next_dev; i++)
286 platform_device_add(ipc_devs[i]);
287
288 for (i = 0; i < spi_next_dev; i++)
289 spi_register_board_info(spi_devs[i], 1);
290
291 for (i = 0; i < i2c_next_dev; i++) {
292 struct i2c_adapter *adapter;
293 struct i2c_client *client;
294
295 adapter = i2c_get_adapter(i2c_bus[i]);
296 if (adapter) {
297 client = i2c_new_device(adapter, i2c_devs[i]);
298 if (!client)
299 pr_err("can't create i2c device %s\n",
300 i2c_devs[i]->type);
301 } else
302 i2c_register_board_info(i2c_bus[i], i2c_devs[i], 1);
303 }
304 intel_scu_notifier_post(SCU_AVAILABLE, NULL);
305}
306EXPORT_SYMBOL_GPL(intel_scu_devices_create);
307
308/* Called by IPC driver */
309void intel_scu_devices_destroy(void)
310{
311 int i;
312
313 intel_scu_notifier_post(SCU_DOWN, NULL);
314
315 for (i = 0; i < ipc_next_dev; i++)
316 platform_device_del(ipc_devs[i]);
317}
318EXPORT_SYMBOL_GPL(intel_scu_devices_destroy);
319
320static void __init install_irq_resource(struct platform_device *pdev, int irq)
321{
322 /* Single threaded */
323 static struct resource res __initdata = {
324 .name = "IRQ",
325 .flags = IORESOURCE_IRQ,
326 };
327 res.start = irq;
328 platform_device_add_resources(pdev, &res, 1);
329}
330
331static void __init sfi_handle_ipc_dev(struct sfi_device_table_entry *pentry,
332 struct devs_id *dev)
333{
334 struct platform_device *pdev;
335 void *pdata = NULL;
336
337 pr_debug("IPC bus, name = %16.16s, irq = 0x%2x\n",
338 pentry->name, pentry->irq);
339 pdata = intel_mid_sfi_get_pdata(dev, pentry);
340
341 pdev = platform_device_alloc(pentry->name, 0);
342 if (pdev == NULL) {
343 pr_err("out of memory for SFI platform device '%s'.\n",
344 pentry->name);
345 return;
346 }
347 install_irq_resource(pdev, pentry->irq);
348
349 pdev->dev.platform_data = pdata;
350 platform_device_add(pdev);
351}
352
353static void __init sfi_handle_spi_dev(struct sfi_device_table_entry *pentry,
354 struct devs_id *dev)
355{
356 struct spi_board_info spi_info;
357 void *pdata = NULL;
358
359 memset(&spi_info, 0, sizeof(spi_info));
360 strncpy(spi_info.modalias, pentry->name, SFI_NAME_LEN);
361 spi_info.irq = ((pentry->irq == (u8)0xff) ? 0 : pentry->irq);
362 spi_info.bus_num = pentry->host_num;
363 spi_info.chip_select = pentry->addr;
364 spi_info.max_speed_hz = pentry->max_freq;
365 pr_debug("SPI bus=%d, name=%16.16s, irq=0x%2x, max_freq=%d, cs=%d\n",
366 spi_info.bus_num,
367 spi_info.modalias,
368 spi_info.irq,
369 spi_info.max_speed_hz,
370 spi_info.chip_select);
371
372 pdata = intel_mid_sfi_get_pdata(dev, &spi_info);
373
374 spi_info.platform_data = pdata;
375 if (dev->delay)
376 intel_scu_spi_device_register(&spi_info);
377 else
378 spi_register_board_info(&spi_info, 1);
379}
380
381static void __init sfi_handle_i2c_dev(struct sfi_device_table_entry *pentry,
382 struct devs_id *dev)
383{
384 struct i2c_board_info i2c_info;
385 void *pdata = NULL;
386
387 memset(&i2c_info, 0, sizeof(i2c_info));
388 strncpy(i2c_info.type, pentry->name, SFI_NAME_LEN);
389 i2c_info.irq = ((pentry->irq == (u8)0xff) ? 0 : pentry->irq);
390 i2c_info.addr = pentry->addr;
391 pr_debug("I2C bus = %d, name = %16.16s, irq = 0x%2x, addr = 0x%x\n",
392 pentry->host_num,
393 i2c_info.type,
394 i2c_info.irq,
395 i2c_info.addr);
396 pdata = intel_mid_sfi_get_pdata(dev, &i2c_info);
397 i2c_info.platform_data = pdata;
398
399 if (dev->delay)
400 intel_scu_i2c_device_register(pentry->host_num, &i2c_info);
401 else
402 i2c_register_board_info(pentry->host_num, &i2c_info, 1);
403}
404
405extern struct devs_id *const __x86_intel_mid_dev_start[],
406 *const __x86_intel_mid_dev_end[];
407
408static struct devs_id __init *get_device_id(u8 type, char *name)
409{
410 struct devs_id *const *dev_table;
411
412 for (dev_table = __x86_intel_mid_dev_start;
413 dev_table < __x86_intel_mid_dev_end; dev_table++) {
414 struct devs_id *dev = *dev_table;
415 if (dev->type == type &&
416 !strncmp(dev->name, name, SFI_NAME_LEN)) {
417 return dev;
418 }
419 }
420
421 return NULL;
422}
423
424static int __init sfi_parse_devs(struct sfi_table_header *table)
425{
426 struct sfi_table_simple *sb;
427 struct sfi_device_table_entry *pentry;
428 struct devs_id *dev = NULL;
429 int num, i;
430 int ioapic;
431 struct io_apic_irq_attr irq_attr;
432
433 sb = (struct sfi_table_simple *)table;
434 num = SFI_GET_NUM_ENTRIES(sb, struct sfi_device_table_entry);
435 pentry = (struct sfi_device_table_entry *)sb->pentry;
436
437 for (i = 0; i < num; i++, pentry++) {
438 int irq = pentry->irq;
439
440 if (irq != (u8)0xff) { /* native RTE case */
441 /* these SPI2 devices are not exposed to system as PCI
442 * devices, but they have separate RTE entry in IOAPIC
443 * so we have to enable them one by one here
444 */
445 ioapic = mp_find_ioapic(irq);
446 irq_attr.ioapic = ioapic;
447 irq_attr.ioapic_pin = irq;
448 irq_attr.trigger = 1;
449 irq_attr.polarity = 1;
450 io_apic_set_pci_routing(NULL, irq, &irq_attr);
451 } else
452 irq = 0; /* No irq */
453
454 dev = get_device_id(pentry->type, pentry->name);
455
456 if (!dev)
457 continue;
458
459 if (dev->device_handler) {
460 dev->device_handler(pentry, dev);
461 } else {
462 switch (pentry->type) {
463 case SFI_DEV_TYPE_IPC:
464 sfi_handle_ipc_dev(pentry, dev);
465 break;
466 case SFI_DEV_TYPE_SPI:
467 sfi_handle_spi_dev(pentry, dev);
468 break;
469 case SFI_DEV_TYPE_I2C:
470 sfi_handle_i2c_dev(pentry, dev);
471 break;
472 case SFI_DEV_TYPE_UART:
473 case SFI_DEV_TYPE_HSI:
474 default:
475 break;
476 }
477 }
478 }
479 return 0;
480}
481
482static int __init intel_mid_platform_init(void)
483{
484 sfi_table_parse(SFI_SIG_GPIO, NULL, NULL, sfi_parse_gpio);
485 sfi_table_parse(SFI_SIG_DEVS, NULL, NULL, sfi_parse_devs);
486 return 0;
487}
488arch_initcall(intel_mid_platform_init);
diff --git a/arch/x86/platform/mrst/Makefile b/arch/x86/platform/mrst/Makefile
deleted file mode 100644
index af1da7e623f9..000000000000
--- a/arch/x86/platform/mrst/Makefile
+++ /dev/null
@@ -1,3 +0,0 @@
1obj-$(CONFIG_X86_INTEL_MID) += mrst.o
2obj-$(CONFIG_X86_INTEL_MID) += vrtc.o
3obj-$(CONFIG_EARLY_PRINTK_INTEL_MID) += early_printk_mrst.o
diff --git a/arch/x86/platform/mrst/mrst.c b/arch/x86/platform/mrst/mrst.c
deleted file mode 100644
index 3ca5957b7a34..000000000000
--- a/arch/x86/platform/mrst/mrst.c
+++ /dev/null
@@ -1,1052 +0,0 @@
1/*
2 * mrst.c: Intel Moorestown platform specific setup code
3 *
4 * (C) Copyright 2008 Intel Corporation
5 * Author: Jacob Pan (jacob.jun.pan@intel.com)
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; version 2
10 * of the License.
11 */
12
13#define pr_fmt(fmt) "mrst: " fmt
14
15#include <linux/init.h>
16#include <linux/kernel.h>
17#include <linux/interrupt.h>
18#include <linux/scatterlist.h>
19#include <linux/sfi.h>
20#include <linux/intel_pmic_gpio.h>
21#include <linux/spi/spi.h>
22#include <linux/i2c.h>
23#include <linux/platform_data/pca953x.h>
24#include <linux/gpio_keys.h>
25#include <linux/input.h>
26#include <linux/platform_device.h>
27#include <linux/irq.h>
28#include <linux/module.h>
29#include <linux/notifier.h>
30#include <linux/mfd/intel_msic.h>
31#include <linux/gpio.h>
32#include <linux/i2c/tc35876x.h>
33
34#include <asm/setup.h>
35#include <asm/mpspec_def.h>
36#include <asm/hw_irq.h>
37#include <asm/apic.h>
38#include <asm/io_apic.h>
39#include <asm/mrst.h>
40#include <asm/mrst-vrtc.h>
41#include <asm/io.h>
42#include <asm/i8259.h>
43#include <asm/intel_scu_ipc.h>
44#include <asm/apb_timer.h>
45#include <asm/reboot.h>
46
47/*
48 * the clockevent devices on Moorestown/Medfield can be APBT or LAPIC clock,
49 * cmdline option x86_mrst_timer can be used to override the configuration
50 * to prefer one or the other.
51 * at runtime, there are basically three timer configurations:
52 * 1. per cpu apbt clock only
53 * 2. per cpu always-on lapic clocks only, this is Penwell/Medfield only
54 * 3. per cpu lapic clock (C3STOP) and one apbt clock, with broadcast.
55 *
56 * by default (without cmdline option), platform code first detects cpu type
57 * to see if we are on lincroft or penwell, then set up both lapic or apbt
58 * clocks accordingly.
59 * i.e. by default, medfield uses configuration #2, moorestown uses #1.
60 * config #3 is supported but not recommended on medfield.
61 *
62 * rating and feature summary:
63 * lapic (with C3STOP) --------- 100
64 * apbt (always-on) ------------ 110
65 * lapic (always-on,ARAT) ------ 150
66 */
67
68enum mrst_timer_options mrst_timer_options;
69
70static u32 sfi_mtimer_usage[SFI_MTMR_MAX_NUM];
71static struct sfi_timer_table_entry sfi_mtimer_array[SFI_MTMR_MAX_NUM];
72enum mrst_cpu_type __mrst_cpu_chip;
73EXPORT_SYMBOL_GPL(__mrst_cpu_chip);
74
75int sfi_mtimer_num;
76
77struct sfi_rtc_table_entry sfi_mrtc_array[SFI_MRTC_MAX];
78EXPORT_SYMBOL_GPL(sfi_mrtc_array);
79int sfi_mrtc_num;
80
81static void mrst_power_off(void)
82{
83}
84
85static void mrst_reboot(void)
86{
87 intel_scu_ipc_simple_command(IPCMSG_COLD_BOOT, 0);
88}
89
90/* parse all the mtimer info to a static mtimer array */
91static int __init sfi_parse_mtmr(struct sfi_table_header *table)
92{
93 struct sfi_table_simple *sb;
94 struct sfi_timer_table_entry *pentry;
95 struct mpc_intsrc mp_irq;
96 int totallen;
97
98 sb = (struct sfi_table_simple *)table;
99 if (!sfi_mtimer_num) {
100 sfi_mtimer_num = SFI_GET_NUM_ENTRIES(sb,
101 struct sfi_timer_table_entry);
102 pentry = (struct sfi_timer_table_entry *) sb->pentry;
103 totallen = sfi_mtimer_num * sizeof(*pentry);
104 memcpy(sfi_mtimer_array, pentry, totallen);
105 }
106
107 pr_debug("SFI MTIMER info (num = %d):\n", sfi_mtimer_num);
108 pentry = sfi_mtimer_array;
109 for (totallen = 0; totallen < sfi_mtimer_num; totallen++, pentry++) {
110 pr_debug("timer[%d]: paddr = 0x%08x, freq = %dHz,"
111 " irq = %d\n", totallen, (u32)pentry->phys_addr,
112 pentry->freq_hz, pentry->irq);
113 if (!pentry->irq)
114 continue;
115 mp_irq.type = MP_INTSRC;
116 mp_irq.irqtype = mp_INT;
117/* triggering mode edge bit 2-3, active high polarity bit 0-1 */
118 mp_irq.irqflag = 5;
119 mp_irq.srcbus = MP_BUS_ISA;
120 mp_irq.srcbusirq = pentry->irq; /* IRQ */
121 mp_irq.dstapic = MP_APIC_ALL;
122 mp_irq.dstirq = pentry->irq;
123 mp_save_irq(&mp_irq);
124 }
125
126 return 0;
127}
128
129struct sfi_timer_table_entry *sfi_get_mtmr(int hint)
130{
131 int i;
132 if (hint < sfi_mtimer_num) {
133 if (!sfi_mtimer_usage[hint]) {
134 pr_debug("hint taken for timer %d irq %d\n",\
135 hint, sfi_mtimer_array[hint].irq);
136 sfi_mtimer_usage[hint] = 1;
137 return &sfi_mtimer_array[hint];
138 }
139 }
140 /* take the first timer available */
141 for (i = 0; i < sfi_mtimer_num;) {
142 if (!sfi_mtimer_usage[i]) {
143 sfi_mtimer_usage[i] = 1;
144 return &sfi_mtimer_array[i];
145 }
146 i++;
147 }
148 return NULL;
149}
150
151void sfi_free_mtmr(struct sfi_timer_table_entry *mtmr)
152{
153 int i;
154 for (i = 0; i < sfi_mtimer_num;) {
155 if (mtmr->irq == sfi_mtimer_array[i].irq) {
156 sfi_mtimer_usage[i] = 0;
157 return;
158 }
159 i++;
160 }
161}
162
163/* parse all the mrtc info to a global mrtc array */
164int __init sfi_parse_mrtc(struct sfi_table_header *table)
165{
166 struct sfi_table_simple *sb;
167 struct sfi_rtc_table_entry *pentry;
168 struct mpc_intsrc mp_irq;
169
170 int totallen;
171
172 sb = (struct sfi_table_simple *)table;
173 if (!sfi_mrtc_num) {
174 sfi_mrtc_num = SFI_GET_NUM_ENTRIES(sb,
175 struct sfi_rtc_table_entry);
176 pentry = (struct sfi_rtc_table_entry *)sb->pentry;
177 totallen = sfi_mrtc_num * sizeof(*pentry);
178 memcpy(sfi_mrtc_array, pentry, totallen);
179 }
180
181 pr_debug("SFI RTC info (num = %d):\n", sfi_mrtc_num);
182 pentry = sfi_mrtc_array;
183 for (totallen = 0; totallen < sfi_mrtc_num; totallen++, pentry++) {
184 pr_debug("RTC[%d]: paddr = 0x%08x, irq = %d\n",
185 totallen, (u32)pentry->phys_addr, pentry->irq);
186 mp_irq.type = MP_INTSRC;
187 mp_irq.irqtype = mp_INT;
188 mp_irq.irqflag = 0xf; /* level trigger and active low */
189 mp_irq.srcbus = MP_BUS_ISA;
190 mp_irq.srcbusirq = pentry->irq; /* IRQ */
191 mp_irq.dstapic = MP_APIC_ALL;
192 mp_irq.dstirq = pentry->irq;
193 mp_save_irq(&mp_irq);
194 }
195 return 0;
196}
197
198static unsigned long __init mrst_calibrate_tsc(void)
199{
200 unsigned long fast_calibrate;
201 u32 lo, hi, ratio, fsb;
202
203 rdmsr(MSR_IA32_PERF_STATUS, lo, hi);
204 pr_debug("IA32 perf status is 0x%x, 0x%0x\n", lo, hi);
205 ratio = (hi >> 8) & 0x1f;
206 pr_debug("ratio is %d\n", ratio);
207 if (!ratio) {
208 pr_err("read a zero ratio, should be incorrect!\n");
209 pr_err("force tsc ratio to 16 ...\n");
210 ratio = 16;
211 }
212 rdmsr(MSR_FSB_FREQ, lo, hi);
213 if ((lo & 0x7) == 0x7)
214 fsb = PENWELL_FSB_FREQ_83SKU;
215 else
216 fsb = PENWELL_FSB_FREQ_100SKU;
217 fast_calibrate = ratio * fsb;
218 pr_debug("read penwell tsc %lu khz\n", fast_calibrate);
219 lapic_timer_frequency = fsb * 1000 / HZ;
220 /* mark tsc clocksource as reliable */
221 set_cpu_cap(&boot_cpu_data, X86_FEATURE_TSC_RELIABLE);
222
223 if (fast_calibrate)
224 return fast_calibrate;
225
226 return 0;
227}
228
229static void __init mrst_time_init(void)
230{
231 sfi_table_parse(SFI_SIG_MTMR, NULL, NULL, sfi_parse_mtmr);
232 switch (mrst_timer_options) {
233 case MRST_TIMER_APBT_ONLY:
234 break;
235 case MRST_TIMER_LAPIC_APBT:
236 x86_init.timers.setup_percpu_clockev = setup_boot_APIC_clock;
237 x86_cpuinit.setup_percpu_clockev = setup_secondary_APIC_clock;
238 break;
239 default:
240 if (!boot_cpu_has(X86_FEATURE_ARAT))
241 break;
242 x86_init.timers.setup_percpu_clockev = setup_boot_APIC_clock;
243 x86_cpuinit.setup_percpu_clockev = setup_secondary_APIC_clock;
244 return;
245 }
246 /* we need at least one APB timer */
247 pre_init_apic_IRQ0();
248 apbt_time_init();
249}
250
251static void mrst_arch_setup(void)
252{
253 if (boot_cpu_data.x86 == 6 && boot_cpu_data.x86_model == 0x27)
254 __mrst_cpu_chip = MRST_CPU_CHIP_PENWELL;
255 else {
256 pr_err("Unknown Intel MID CPU (%d:%d), default to Penwell\n",
257 boot_cpu_data.x86, boot_cpu_data.x86_model);
258 __mrst_cpu_chip = MRST_CPU_CHIP_PENWELL;
259 }
260}
261
262/* MID systems don't have i8042 controller */
263static int mrst_i8042_detect(void)
264{
265 return 0;
266}
267
268/*
269 * Moorestown does not have external NMI source nor port 0x61 to report
270 * NMI status. The possible NMI sources are from pmu as a result of NMI
271 * watchdog or lock debug. Reading io port 0x61 results in 0xff which
272 * misled NMI handler.
273 */
274static unsigned char mrst_get_nmi_reason(void)
275{
276 return 0;
277}
278
279/*
280 * Moorestown specific x86_init function overrides and early setup
281 * calls.
282 */
283void __init x86_mrst_early_setup(void)
284{
285 x86_init.resources.probe_roms = x86_init_noop;
286 x86_init.resources.reserve_resources = x86_init_noop;
287
288 x86_init.timers.timer_init = mrst_time_init;
289 x86_init.timers.setup_percpu_clockev = x86_init_noop;
290
291 x86_init.irqs.pre_vector_init = x86_init_noop;
292
293 x86_init.oem.arch_setup = mrst_arch_setup;
294
295 x86_cpuinit.setup_percpu_clockev = apbt_setup_secondary_clock;
296
297 x86_platform.calibrate_tsc = mrst_calibrate_tsc;
298 x86_platform.i8042_detect = mrst_i8042_detect;
299 x86_init.timers.wallclock_init = mrst_rtc_init;
300 x86_platform.get_nmi_reason = mrst_get_nmi_reason;
301
302 x86_init.pci.init = pci_mrst_init;
303 x86_init.pci.fixup_irqs = x86_init_noop;
304
305 legacy_pic = &null_legacy_pic;
306
307 /* Moorestown specific power_off/restart method */
308 pm_power_off = mrst_power_off;
309 machine_ops.emergency_restart = mrst_reboot;
310
311 /* Avoid searching for BIOS MP tables */
312 x86_init.mpparse.find_smp_config = x86_init_noop;
313 x86_init.mpparse.get_smp_config = x86_init_uint_noop;
314 set_bit(MP_BUS_ISA, mp_bus_not_pci);
315}
316
317/*
318 * if user does not want to use per CPU apb timer, just give it a lower rating
319 * than local apic timer and skip the late per cpu timer init.
320 */
321static inline int __init setup_x86_mrst_timer(char *arg)
322{
323 if (!arg)
324 return -EINVAL;
325
326 if (strcmp("apbt_only", arg) == 0)
327 mrst_timer_options = MRST_TIMER_APBT_ONLY;
328 else if (strcmp("lapic_and_apbt", arg) == 0)
329 mrst_timer_options = MRST_TIMER_LAPIC_APBT;
330 else {
331 pr_warning("X86 MRST timer option %s not recognised"
332 " use x86_mrst_timer=apbt_only or lapic_and_apbt\n",
333 arg);
334 return -EINVAL;
335 }
336 return 0;
337}
338__setup("x86_mrst_timer=", setup_x86_mrst_timer);
339
340/*
341 * Parsing GPIO table first, since the DEVS table will need this table
342 * to map the pin name to the actual pin.
343 */
344static struct sfi_gpio_table_entry *gpio_table;
345static int gpio_num_entry;
346
347static int __init sfi_parse_gpio(struct sfi_table_header *table)
348{
349 struct sfi_table_simple *sb;
350 struct sfi_gpio_table_entry *pentry;
351 int num, i;
352
353 if (gpio_table)
354 return 0;
355 sb = (struct sfi_table_simple *)table;
356 num = SFI_GET_NUM_ENTRIES(sb, struct sfi_gpio_table_entry);
357 pentry = (struct sfi_gpio_table_entry *)sb->pentry;
358
359 gpio_table = kmalloc(num * sizeof(*pentry), GFP_KERNEL);
360 if (!gpio_table)
361 return -1;
362 memcpy(gpio_table, pentry, num * sizeof(*pentry));
363 gpio_num_entry = num;
364
365 pr_debug("GPIO pin info:\n");
366 for (i = 0; i < num; i++, pentry++)
367 pr_debug("info[%2d]: controller = %16.16s, pin_name = %16.16s,"
368 " pin = %d\n", i,
369 pentry->controller_name,
370 pentry->pin_name,
371 pentry->pin_no);
372 return 0;
373}
374
375static int get_gpio_by_name(const char *name)
376{
377 struct sfi_gpio_table_entry *pentry = gpio_table;
378 int i;
379
380 if (!pentry)
381 return -1;
382 for (i = 0; i < gpio_num_entry; i++, pentry++) {
383 if (!strncmp(name, pentry->pin_name, SFI_NAME_LEN))
384 return pentry->pin_no;
385 }
386 return -1;
387}
388
389/*
390 * Here defines the array of devices platform data that IAFW would export
391 * through SFI "DEVS" table, we use name and type to match the device and
392 * its platform data.
393 */
394struct devs_id {
395 char name[SFI_NAME_LEN + 1];
396 u8 type;
397 u8 delay;
398 void *(*get_platform_data)(void *info);
399};
400
401/* the offset for the mapping of global gpio pin to irq */
402#define MRST_IRQ_OFFSET 0x100
403
404static void __init *pmic_gpio_platform_data(void *info)
405{
406 static struct intel_pmic_gpio_platform_data pmic_gpio_pdata;
407 int gpio_base = get_gpio_by_name("pmic_gpio_base");
408
409 if (gpio_base == -1)
410 gpio_base = 64;
411 pmic_gpio_pdata.gpio_base = gpio_base;
412 pmic_gpio_pdata.irq_base = gpio_base + MRST_IRQ_OFFSET;
413 pmic_gpio_pdata.gpiointr = 0xffffeff8;
414
415 return &pmic_gpio_pdata;
416}
417
418static void __init *max3111_platform_data(void *info)
419{
420 struct spi_board_info *spi_info = info;
421 int intr = get_gpio_by_name("max3111_int");
422
423 spi_info->mode = SPI_MODE_0;
424 if (intr == -1)
425 return NULL;
426 spi_info->irq = intr + MRST_IRQ_OFFSET;
427 return NULL;
428}
429
430/* we have multiple max7315 on the board ... */
431#define MAX7315_NUM 2
432static void __init *max7315_platform_data(void *info)
433{
434 static struct pca953x_platform_data max7315_pdata[MAX7315_NUM];
435 static int nr;
436 struct pca953x_platform_data *max7315 = &max7315_pdata[nr];
437 struct i2c_board_info *i2c_info = info;
438 int gpio_base, intr;
439 char base_pin_name[SFI_NAME_LEN + 1];
440 char intr_pin_name[SFI_NAME_LEN + 1];
441
442 if (nr == MAX7315_NUM) {
443 pr_err("too many max7315s, we only support %d\n",
444 MAX7315_NUM);
445 return NULL;
446 }
447 /* we have several max7315 on the board, we only need load several
448 * instances of the same pca953x driver to cover them
449 */
450 strcpy(i2c_info->type, "max7315");
451 if (nr++) {
452 sprintf(base_pin_name, "max7315_%d_base", nr);
453 sprintf(intr_pin_name, "max7315_%d_int", nr);
454 } else {
455 strcpy(base_pin_name, "max7315_base");
456 strcpy(intr_pin_name, "max7315_int");
457 }
458
459 gpio_base = get_gpio_by_name(base_pin_name);
460 intr = get_gpio_by_name(intr_pin_name);
461
462 if (gpio_base == -1)
463 return NULL;
464 max7315->gpio_base = gpio_base;
465 if (intr != -1) {
466 i2c_info->irq = intr + MRST_IRQ_OFFSET;
467 max7315->irq_base = gpio_base + MRST_IRQ_OFFSET;
468 } else {
469 i2c_info->irq = -1;
470 max7315->irq_base = -1;
471 }
472 return max7315;
473}
474
475static void *tca6416_platform_data(void *info)
476{
477 static struct pca953x_platform_data tca6416;
478 struct i2c_board_info *i2c_info = info;
479 int gpio_base, intr;
480 char base_pin_name[SFI_NAME_LEN + 1];
481 char intr_pin_name[SFI_NAME_LEN + 1];
482
483 strcpy(i2c_info->type, "tca6416");
484 strcpy(base_pin_name, "tca6416_base");
485 strcpy(intr_pin_name, "tca6416_int");
486
487 gpio_base = get_gpio_by_name(base_pin_name);
488 intr = get_gpio_by_name(intr_pin_name);
489
490 if (gpio_base == -1)
491 return NULL;
492 tca6416.gpio_base = gpio_base;
493 if (intr != -1) {
494 i2c_info->irq = intr + MRST_IRQ_OFFSET;
495 tca6416.irq_base = gpio_base + MRST_IRQ_OFFSET;
496 } else {
497 i2c_info->irq = -1;
498 tca6416.irq_base = -1;
499 }
500 return &tca6416;
501}
502
503static void *mpu3050_platform_data(void *info)
504{
505 struct i2c_board_info *i2c_info = info;
506 int intr = get_gpio_by_name("mpu3050_int");
507
508 if (intr == -1)
509 return NULL;
510
511 i2c_info->irq = intr + MRST_IRQ_OFFSET;
512 return NULL;
513}
514
515static void __init *emc1403_platform_data(void *info)
516{
517 static short intr2nd_pdata;
518 struct i2c_board_info *i2c_info = info;
519 int intr = get_gpio_by_name("thermal_int");
520 int intr2nd = get_gpio_by_name("thermal_alert");
521
522 if (intr == -1 || intr2nd == -1)
523 return NULL;
524
525 i2c_info->irq = intr + MRST_IRQ_OFFSET;
526 intr2nd_pdata = intr2nd + MRST_IRQ_OFFSET;
527
528 return &intr2nd_pdata;
529}
530
531static void __init *lis331dl_platform_data(void *info)
532{
533 static short intr2nd_pdata;
534 struct i2c_board_info *i2c_info = info;
535 int intr = get_gpio_by_name("accel_int");
536 int intr2nd = get_gpio_by_name("accel_2");
537
538 if (intr == -1 || intr2nd == -1)
539 return NULL;
540
541 i2c_info->irq = intr + MRST_IRQ_OFFSET;
542 intr2nd_pdata = intr2nd + MRST_IRQ_OFFSET;
543
544 return &intr2nd_pdata;
545}
546
547static void __init *no_platform_data(void *info)
548{
549 return NULL;
550}
551
552static struct resource msic_resources[] = {
553 {
554 .start = INTEL_MSIC_IRQ_PHYS_BASE,
555 .end = INTEL_MSIC_IRQ_PHYS_BASE + 64 - 1,
556 .flags = IORESOURCE_MEM,
557 },
558};
559
560static struct intel_msic_platform_data msic_pdata;
561
562static struct platform_device msic_device = {
563 .name = "intel_msic",
564 .id = -1,
565 .dev = {
566 .platform_data = &msic_pdata,
567 },
568 .num_resources = ARRAY_SIZE(msic_resources),
569 .resource = msic_resources,
570};
571
572static inline bool mrst_has_msic(void)
573{
574 return mrst_identify_cpu() == MRST_CPU_CHIP_PENWELL;
575}
576
577static int msic_scu_status_change(struct notifier_block *nb,
578 unsigned long code, void *data)
579{
580 if (code == SCU_DOWN) {
581 platform_device_unregister(&msic_device);
582 return 0;
583 }
584
585 return platform_device_register(&msic_device);
586}
587
588static int __init msic_init(void)
589{
590 static struct notifier_block msic_scu_notifier = {
591 .notifier_call = msic_scu_status_change,
592 };
593
594 /*
595 * We need to be sure that the SCU IPC is ready before MSIC device
596 * can be registered.
597 */
598 if (mrst_has_msic())
599 intel_scu_notifier_add(&msic_scu_notifier);
600
601 return 0;
602}
603arch_initcall(msic_init);
604
605/*
606 * msic_generic_platform_data - sets generic platform data for the block
607 * @info: pointer to the SFI device table entry for this block
608 * @block: MSIC block
609 *
610 * Function sets IRQ number from the SFI table entry for given device to
611 * the MSIC platform data.
612 */
613static void *msic_generic_platform_data(void *info, enum intel_msic_block block)
614{
615 struct sfi_device_table_entry *entry = info;
616
617 BUG_ON(block < 0 || block >= INTEL_MSIC_BLOCK_LAST);
618 msic_pdata.irq[block] = entry->irq;
619
620 return no_platform_data(info);
621}
622
623static void *msic_battery_platform_data(void *info)
624{
625 return msic_generic_platform_data(info, INTEL_MSIC_BLOCK_BATTERY);
626}
627
628static void *msic_gpio_platform_data(void *info)
629{
630 static struct intel_msic_gpio_pdata pdata;
631 int gpio = get_gpio_by_name("msic_gpio_base");
632
633 if (gpio < 0)
634 return NULL;
635
636 pdata.gpio_base = gpio;
637 msic_pdata.gpio = &pdata;
638
639 return msic_generic_platform_data(info, INTEL_MSIC_BLOCK_GPIO);
640}
641
642static void *msic_audio_platform_data(void *info)
643{
644 struct platform_device *pdev;
645
646 pdev = platform_device_register_simple("sst-platform", -1, NULL, 0);
647 if (IS_ERR(pdev)) {
648 pr_err("failed to create audio platform device\n");
649 return NULL;
650 }
651
652 return msic_generic_platform_data(info, INTEL_MSIC_BLOCK_AUDIO);
653}
654
655static void *msic_power_btn_platform_data(void *info)
656{
657 return msic_generic_platform_data(info, INTEL_MSIC_BLOCK_POWER_BTN);
658}
659
660static void *msic_ocd_platform_data(void *info)
661{
662 static struct intel_msic_ocd_pdata pdata;
663 int gpio = get_gpio_by_name("ocd_gpio");
664
665 if (gpio < 0)
666 return NULL;
667
668 pdata.gpio = gpio;
669 msic_pdata.ocd = &pdata;
670
671 return msic_generic_platform_data(info, INTEL_MSIC_BLOCK_OCD);
672}
673
674static void *msic_thermal_platform_data(void *info)
675{
676 return msic_generic_platform_data(info, INTEL_MSIC_BLOCK_THERMAL);
677}
678
679/* tc35876x DSI-LVDS bridge chip and panel platform data */
680static void *tc35876x_platform_data(void *data)
681{
682 static struct tc35876x_platform_data pdata;
683
684 /* gpio pins set to -1 will not be used by the driver */
685 pdata.gpio_bridge_reset = get_gpio_by_name("LCMB_RXEN");
686 pdata.gpio_panel_bl_en = get_gpio_by_name("6S6P_BL_EN");
687 pdata.gpio_panel_vadd = get_gpio_by_name("EN_VREG_LCD_V3P3");
688
689 return &pdata;
690}
691
692static const struct devs_id __initconst device_ids[] = {
693 {"bma023", SFI_DEV_TYPE_I2C, 1, &no_platform_data},
694 {"pmic_gpio", SFI_DEV_TYPE_SPI, 1, &pmic_gpio_platform_data},
695 {"pmic_gpio", SFI_DEV_TYPE_IPC, 1, &pmic_gpio_platform_data},
696 {"spi_max3111", SFI_DEV_TYPE_SPI, 0, &max3111_platform_data},
697 {"i2c_max7315", SFI_DEV_TYPE_I2C, 1, &max7315_platform_data},
698 {"i2c_max7315_2", SFI_DEV_TYPE_I2C, 1, &max7315_platform_data},
699 {"tca6416", SFI_DEV_TYPE_I2C, 1, &tca6416_platform_data},
700 {"emc1403", SFI_DEV_TYPE_I2C, 1, &emc1403_platform_data},
701 {"i2c_accel", SFI_DEV_TYPE_I2C, 0, &lis331dl_platform_data},
702 {"pmic_audio", SFI_DEV_TYPE_IPC, 1, &no_platform_data},
703 {"mpu3050", SFI_DEV_TYPE_I2C, 1, &mpu3050_platform_data},
704 {"i2c_disp_brig", SFI_DEV_TYPE_I2C, 0, &tc35876x_platform_data},
705
706 /* MSIC subdevices */
707 {"msic_battery", SFI_DEV_TYPE_IPC, 1, &msic_battery_platform_data},
708 {"msic_gpio", SFI_DEV_TYPE_IPC, 1, &msic_gpio_platform_data},
709 {"msic_audio", SFI_DEV_TYPE_IPC, 1, &msic_audio_platform_data},
710 {"msic_power_btn", SFI_DEV_TYPE_IPC, 1, &msic_power_btn_platform_data},
711 {"msic_ocd", SFI_DEV_TYPE_IPC, 1, &msic_ocd_platform_data},
712 {"msic_thermal", SFI_DEV_TYPE_IPC, 1, &msic_thermal_platform_data},
713
714 {},
715};
716
717#define MAX_IPCDEVS 24
718static struct platform_device *ipc_devs[MAX_IPCDEVS];
719static int ipc_next_dev;
720
721#define MAX_SCU_SPI 24
722static struct spi_board_info *spi_devs[MAX_SCU_SPI];
723static int spi_next_dev;
724
725#define MAX_SCU_I2C 24
726static struct i2c_board_info *i2c_devs[MAX_SCU_I2C];
727static int i2c_bus[MAX_SCU_I2C];
728static int i2c_next_dev;
729
730static void __init intel_scu_device_register(struct platform_device *pdev)
731{
732 if(ipc_next_dev == MAX_IPCDEVS)
733 pr_err("too many SCU IPC devices");
734 else
735 ipc_devs[ipc_next_dev++] = pdev;
736}
737
738static void __init intel_scu_spi_device_register(struct spi_board_info *sdev)
739{
740 struct spi_board_info *new_dev;
741
742 if (spi_next_dev == MAX_SCU_SPI) {
743 pr_err("too many SCU SPI devices");
744 return;
745 }
746
747 new_dev = kzalloc(sizeof(*sdev), GFP_KERNEL);
748 if (!new_dev) {
749 pr_err("failed to alloc mem for delayed spi dev %s\n",
750 sdev->modalias);
751 return;
752 }
753 memcpy(new_dev, sdev, sizeof(*sdev));
754
755 spi_devs[spi_next_dev++] = new_dev;
756}
757
758static void __init intel_scu_i2c_device_register(int bus,
759 struct i2c_board_info *idev)
760{
761 struct i2c_board_info *new_dev;
762
763 if (i2c_next_dev == MAX_SCU_I2C) {
764 pr_err("too many SCU I2C devices");
765 return;
766 }
767
768 new_dev = kzalloc(sizeof(*idev), GFP_KERNEL);
769 if (!new_dev) {
770 pr_err("failed to alloc mem for delayed i2c dev %s\n",
771 idev->type);
772 return;
773 }
774 memcpy(new_dev, idev, sizeof(*idev));
775
776 i2c_bus[i2c_next_dev] = bus;
777 i2c_devs[i2c_next_dev++] = new_dev;
778}
779
780BLOCKING_NOTIFIER_HEAD(intel_scu_notifier);
781EXPORT_SYMBOL_GPL(intel_scu_notifier);
782
783/* Called by IPC driver */
784void intel_scu_devices_create(void)
785{
786 int i;
787
788 for (i = 0; i < ipc_next_dev; i++)
789 platform_device_add(ipc_devs[i]);
790
791 for (i = 0; i < spi_next_dev; i++)
792 spi_register_board_info(spi_devs[i], 1);
793
794 for (i = 0; i < i2c_next_dev; i++) {
795 struct i2c_adapter *adapter;
796 struct i2c_client *client;
797
798 adapter = i2c_get_adapter(i2c_bus[i]);
799 if (adapter) {
800 client = i2c_new_device(adapter, i2c_devs[i]);
801 if (!client)
802 pr_err("can't create i2c device %s\n",
803 i2c_devs[i]->type);
804 } else
805 i2c_register_board_info(i2c_bus[i], i2c_devs[i], 1);
806 }
807 intel_scu_notifier_post(SCU_AVAILABLE, NULL);
808}
809EXPORT_SYMBOL_GPL(intel_scu_devices_create);
810
811/* Called by IPC driver */
812void intel_scu_devices_destroy(void)
813{
814 int i;
815
816 intel_scu_notifier_post(SCU_DOWN, NULL);
817
818 for (i = 0; i < ipc_next_dev; i++)
819 platform_device_del(ipc_devs[i]);
820}
821EXPORT_SYMBOL_GPL(intel_scu_devices_destroy);
822
823static void __init install_irq_resource(struct platform_device *pdev, int irq)
824{
825 /* Single threaded */
826 static struct resource __initdata res = {
827 .name = "IRQ",
828 .flags = IORESOURCE_IRQ,
829 };
830 res.start = irq;
831 platform_device_add_resources(pdev, &res, 1);
832}
833
834static void __init sfi_handle_ipc_dev(struct sfi_device_table_entry *entry)
835{
836 const struct devs_id *dev = device_ids;
837 struct platform_device *pdev;
838 void *pdata = NULL;
839
840 while (dev->name[0]) {
841 if (dev->type == SFI_DEV_TYPE_IPC &&
842 !strncmp(dev->name, entry->name, SFI_NAME_LEN)) {
843 pdata = dev->get_platform_data(entry);
844 break;
845 }
846 dev++;
847 }
848
849 /*
850 * On Medfield the platform device creation is handled by the MSIC
851 * MFD driver so we don't need to do it here.
852 */
853 if (mrst_has_msic())
854 return;
855
856 pdev = platform_device_alloc(entry->name, 0);
857 if (pdev == NULL) {
858 pr_err("out of memory for SFI platform device '%s'.\n",
859 entry->name);
860 return;
861 }
862 install_irq_resource(pdev, entry->irq);
863
864 pdev->dev.platform_data = pdata;
865 intel_scu_device_register(pdev);
866}
867
868static void __init sfi_handle_spi_dev(struct spi_board_info *spi_info)
869{
870 const struct devs_id *dev = device_ids;
871 void *pdata = NULL;
872
873 while (dev->name[0]) {
874 if (dev->type == SFI_DEV_TYPE_SPI &&
875 !strncmp(dev->name, spi_info->modalias, SFI_NAME_LEN)) {
876 pdata = dev->get_platform_data(spi_info);
877 break;
878 }
879 dev++;
880 }
881 spi_info->platform_data = pdata;
882 if (dev->delay)
883 intel_scu_spi_device_register(spi_info);
884 else
885 spi_register_board_info(spi_info, 1);
886}
887
888static void __init sfi_handle_i2c_dev(int bus, struct i2c_board_info *i2c_info)
889{
890 const struct devs_id *dev = device_ids;
891 void *pdata = NULL;
892
893 while (dev->name[0]) {
894 if (dev->type == SFI_DEV_TYPE_I2C &&
895 !strncmp(dev->name, i2c_info->type, SFI_NAME_LEN)) {
896 pdata = dev->get_platform_data(i2c_info);
897 break;
898 }
899 dev++;
900 }
901 i2c_info->platform_data = pdata;
902
903 if (dev->delay)
904 intel_scu_i2c_device_register(bus, i2c_info);
905 else
906 i2c_register_board_info(bus, i2c_info, 1);
907 }
908
909
910static int __init sfi_parse_devs(struct sfi_table_header *table)
911{
912 struct sfi_table_simple *sb;
913 struct sfi_device_table_entry *pentry;
914 struct spi_board_info spi_info;
915 struct i2c_board_info i2c_info;
916 int num, i, bus;
917 int ioapic;
918 struct io_apic_irq_attr irq_attr;
919
920 sb = (struct sfi_table_simple *)table;
921 num = SFI_GET_NUM_ENTRIES(sb, struct sfi_device_table_entry);
922 pentry = (struct sfi_device_table_entry *)sb->pentry;
923
924 for (i = 0; i < num; i++, pentry++) {
925 int irq = pentry->irq;
926
927 if (irq != (u8)0xff) { /* native RTE case */
928 /* these SPI2 devices are not exposed to system as PCI
929 * devices, but they have separate RTE entry in IOAPIC
930 * so we have to enable them one by one here
931 */
932 ioapic = mp_find_ioapic(irq);
933 irq_attr.ioapic = ioapic;
934 irq_attr.ioapic_pin = irq;
935 irq_attr.trigger = 1;
936 irq_attr.polarity = 1;
937 io_apic_set_pci_routing(NULL, irq, &irq_attr);
938 } else
939 irq = 0; /* No irq */
940
941 switch (pentry->type) {
942 case SFI_DEV_TYPE_IPC:
943 pr_debug("info[%2d]: IPC bus, name = %16.16s, "
944 "irq = 0x%2x\n", i, pentry->name, pentry->irq);
945 sfi_handle_ipc_dev(pentry);
946 break;
947 case SFI_DEV_TYPE_SPI:
948 memset(&spi_info, 0, sizeof(spi_info));
949 strncpy(spi_info.modalias, pentry->name, SFI_NAME_LEN);
950 spi_info.irq = irq;
951 spi_info.bus_num = pentry->host_num;
952 spi_info.chip_select = pentry->addr;
953 spi_info.max_speed_hz = pentry->max_freq;
954 pr_debug("info[%2d]: SPI bus = %d, name = %16.16s, "
955 "irq = 0x%2x, max_freq = %d, cs = %d\n", i,
956 spi_info.bus_num,
957 spi_info.modalias,
958 spi_info.irq,
959 spi_info.max_speed_hz,
960 spi_info.chip_select);
961 sfi_handle_spi_dev(&spi_info);
962 break;
963 case SFI_DEV_TYPE_I2C:
964 memset(&i2c_info, 0, sizeof(i2c_info));
965 bus = pentry->host_num;
966 strncpy(i2c_info.type, pentry->name, SFI_NAME_LEN);
967 i2c_info.irq = irq;
968 i2c_info.addr = pentry->addr;
969 pr_debug("info[%2d]: I2C bus = %d, name = %16.16s, "
970 "irq = 0x%2x, addr = 0x%x\n", i, bus,
971 i2c_info.type,
972 i2c_info.irq,
973 i2c_info.addr);
974 sfi_handle_i2c_dev(bus, &i2c_info);
975 break;
976 case SFI_DEV_TYPE_UART:
977 case SFI_DEV_TYPE_HSI:
978 default:
979 ;
980 }
981 }
982 return 0;
983}
984
985static int __init mrst_platform_init(void)
986{
987 sfi_table_parse(SFI_SIG_GPIO, NULL, NULL, sfi_parse_gpio);
988 sfi_table_parse(SFI_SIG_DEVS, NULL, NULL, sfi_parse_devs);
989 return 0;
990}
991arch_initcall(mrst_platform_init);
992
993/*
994 * we will search these buttons in SFI GPIO table (by name)
995 * and register them dynamically. Please add all possible
996 * buttons here, we will shrink them if no GPIO found.
997 */
998static struct gpio_keys_button gpio_button[] = {
999 {KEY_POWER, -1, 1, "power_btn", EV_KEY, 0, 3000},
1000 {KEY_PROG1, -1, 1, "prog_btn1", EV_KEY, 0, 20},
1001 {KEY_PROG2, -1, 1, "prog_btn2", EV_KEY, 0, 20},
1002 {SW_LID, -1, 1, "lid_switch", EV_SW, 0, 20},
1003 {KEY_VOLUMEUP, -1, 1, "vol_up", EV_KEY, 0, 20},
1004 {KEY_VOLUMEDOWN, -1, 1, "vol_down", EV_KEY, 0, 20},
1005 {KEY_CAMERA, -1, 1, "camera_full", EV_KEY, 0, 20},
1006 {KEY_CAMERA_FOCUS, -1, 1, "camera_half", EV_KEY, 0, 20},
1007 {SW_KEYPAD_SLIDE, -1, 1, "MagSw1", EV_SW, 0, 20},
1008 {SW_KEYPAD_SLIDE, -1, 1, "MagSw2", EV_SW, 0, 20},
1009};
1010
1011static struct gpio_keys_platform_data mrst_gpio_keys = {
1012 .buttons = gpio_button,
1013 .rep = 1,
1014 .nbuttons = -1, /* will fill it after search */
1015};
1016
1017static struct platform_device pb_device = {
1018 .name = "gpio-keys",
1019 .id = -1,
1020 .dev = {
1021 .platform_data = &mrst_gpio_keys,
1022 },
1023};
1024
1025/*
1026 * Shrink the non-existent buttons, register the gpio button
1027 * device if there is some
1028 */
1029static int __init pb_keys_init(void)
1030{
1031 struct gpio_keys_button *gb = gpio_button;
1032 int i, num, good = 0;
1033
1034 num = sizeof(gpio_button) / sizeof(struct gpio_keys_button);
1035 for (i = 0; i < num; i++) {
1036 gb[i].gpio = get_gpio_by_name(gb[i].desc);
1037 pr_debug("info[%2d]: name = %s, gpio = %d\n", i, gb[i].desc, gb[i].gpio);
1038 if (gb[i].gpio == -1)
1039 continue;
1040
1041 if (i != good)
1042 gb[good] = gb[i];
1043 good++;
1044 }
1045
1046 if (good) {
1047 mrst_gpio_keys.nbuttons = good;
1048 return platform_device_register(&pb_device);
1049 }
1050 return 0;
1051}
1052late_initcall(pb_keys_init);
diff --git a/arch/x86/platform/uv/Makefile b/arch/x86/platform/uv/Makefile
index 6c40995fefb8..52079bebd014 100644
--- a/arch/x86/platform/uv/Makefile
+++ b/arch/x86/platform/uv/Makefile
@@ -1 +1 @@
obj-$(CONFIG_X86_UV) += tlb_uv.o bios_uv.o uv_irq.o uv_sysfs.o uv_time.o obj-$(CONFIG_X86_UV) += tlb_uv.o bios_uv.o uv_irq.o uv_sysfs.o uv_time.o uv_nmi.o
diff --git a/arch/x86/platform/uv/uv_nmi.c b/arch/x86/platform/uv/uv_nmi.c
new file mode 100644
index 000000000000..2e863ad4a772
--- /dev/null
+++ b/arch/x86/platform/uv/uv_nmi.c
@@ -0,0 +1,700 @@
1/*
2 * SGI NMI support routines
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
17 *
18 * Copyright (c) 2009-2013 Silicon Graphics, Inc. All Rights Reserved.
19 * Copyright (c) Mike Travis
20 */
21
22#include <linux/cpu.h>
23#include <linux/delay.h>
24#include <linux/kdb.h>
25#include <linux/kexec.h>
26#include <linux/kgdb.h>
27#include <linux/module.h>
28#include <linux/nmi.h>
29#include <linux/sched.h>
30#include <linux/slab.h>
31
32#include <asm/apic.h>
33#include <asm/current.h>
34#include <asm/kdebug.h>
35#include <asm/local64.h>
36#include <asm/nmi.h>
37#include <asm/traps.h>
38#include <asm/uv/uv.h>
39#include <asm/uv/uv_hub.h>
40#include <asm/uv/uv_mmrs.h>
41
42/*
43 * UV handler for NMI
44 *
45 * Handle system-wide NMI events generated by the global 'power nmi' command.
46 *
47 * Basic operation is to field the NMI interrupt on each cpu and wait
48 * until all cpus have arrived into the nmi handler. If some cpus do not
49 * make it into the handler, try and force them in with the IPI(NMI) signal.
50 *
51 * We also have to lessen UV Hub MMR accesses as much as possible as this
52 * disrupts the UV Hub's primary mission of directing NumaLink traffic and
53 * can cause system problems to occur.
54 *
55 * To do this we register our primary NMI notifier on the NMI_UNKNOWN
56 * chain. This reduces the number of false NMI calls when the perf
57 * tools are running which generate an enormous number of NMIs per
58 * second (~4M/s for 1024 cpu threads). Our secondary NMI handler is
59 * very short as it only checks that if it has been "pinged" with the
60 * IPI(NMI) signal as mentioned above, and does not read the UV Hub's MMR.
61 *
62 */
63
64static struct uv_hub_nmi_s **uv_hub_nmi_list;
65
66DEFINE_PER_CPU(struct uv_cpu_nmi_s, __uv_cpu_nmi);
67EXPORT_PER_CPU_SYMBOL_GPL(__uv_cpu_nmi);
68
69static unsigned long nmi_mmr;
70static unsigned long nmi_mmr_clear;
71static unsigned long nmi_mmr_pending;
72
73static atomic_t uv_in_nmi;
74static atomic_t uv_nmi_cpu = ATOMIC_INIT(-1);
75static atomic_t uv_nmi_cpus_in_nmi = ATOMIC_INIT(-1);
76static atomic_t uv_nmi_slave_continue;
77static atomic_t uv_nmi_kexec_failed;
78static cpumask_var_t uv_nmi_cpu_mask;
79
80/* Values for uv_nmi_slave_continue */
81#define SLAVE_CLEAR 0
82#define SLAVE_CONTINUE 1
83#define SLAVE_EXIT 2
84
85/*
86 * Default is all stack dumps go to the console and buffer.
87 * Lower level to send to log buffer only.
88 */
89static int uv_nmi_loglevel = 7;
90module_param_named(dump_loglevel, uv_nmi_loglevel, int, 0644);
91
92/*
93 * The following values show statistics on how perf events are affecting
94 * this system.
95 */
96static int param_get_local64(char *buffer, const struct kernel_param *kp)
97{
98 return sprintf(buffer, "%lu\n", local64_read((local64_t *)kp->arg));
99}
100
101static int param_set_local64(const char *val, const struct kernel_param *kp)
102{
103 /* clear on any write */
104 local64_set((local64_t *)kp->arg, 0);
105 return 0;
106}
107
108static struct kernel_param_ops param_ops_local64 = {
109 .get = param_get_local64,
110 .set = param_set_local64,
111};
112#define param_check_local64(name, p) __param_check(name, p, local64_t)
113
114static local64_t uv_nmi_count;
115module_param_named(nmi_count, uv_nmi_count, local64, 0644);
116
117static local64_t uv_nmi_misses;
118module_param_named(nmi_misses, uv_nmi_misses, local64, 0644);
119
120static local64_t uv_nmi_ping_count;
121module_param_named(ping_count, uv_nmi_ping_count, local64, 0644);
122
123static local64_t uv_nmi_ping_misses;
124module_param_named(ping_misses, uv_nmi_ping_misses, local64, 0644);
125
126/*
127 * Following values allow tuning for large systems under heavy loading
128 */
129static int uv_nmi_initial_delay = 100;
130module_param_named(initial_delay, uv_nmi_initial_delay, int, 0644);
131
132static int uv_nmi_slave_delay = 100;
133module_param_named(slave_delay, uv_nmi_slave_delay, int, 0644);
134
135static int uv_nmi_loop_delay = 100;
136module_param_named(loop_delay, uv_nmi_loop_delay, int, 0644);
137
138static int uv_nmi_trigger_delay = 10000;
139module_param_named(trigger_delay, uv_nmi_trigger_delay, int, 0644);
140
141static int uv_nmi_wait_count = 100;
142module_param_named(wait_count, uv_nmi_wait_count, int, 0644);
143
144static int uv_nmi_retry_count = 500;
145module_param_named(retry_count, uv_nmi_retry_count, int, 0644);
146
147/*
148 * Valid NMI Actions:
149 * "dump" - dump process stack for each cpu
150 * "ips" - dump IP info for each cpu
151 * "kdump" - do crash dump
152 * "kdb" - enter KDB/KGDB (default)
153 */
154static char uv_nmi_action[8] = "kdb";
155module_param_string(action, uv_nmi_action, sizeof(uv_nmi_action), 0644);
156
157static inline bool uv_nmi_action_is(const char *action)
158{
159 return (strncmp(uv_nmi_action, action, strlen(action)) == 0);
160}
161
162/* Setup which NMI support is present in system */
163static void uv_nmi_setup_mmrs(void)
164{
165 if (uv_read_local_mmr(UVH_NMI_MMRX_SUPPORTED)) {
166 uv_write_local_mmr(UVH_NMI_MMRX_REQ,
167 1UL << UVH_NMI_MMRX_REQ_SHIFT);
168 nmi_mmr = UVH_NMI_MMRX;
169 nmi_mmr_clear = UVH_NMI_MMRX_CLEAR;
170 nmi_mmr_pending = 1UL << UVH_NMI_MMRX_SHIFT;
171 pr_info("UV: SMI NMI support: %s\n", UVH_NMI_MMRX_TYPE);
172 } else {
173 nmi_mmr = UVH_NMI_MMR;
174 nmi_mmr_clear = UVH_NMI_MMR_CLEAR;
175 nmi_mmr_pending = 1UL << UVH_NMI_MMR_SHIFT;
176 pr_info("UV: SMI NMI support: %s\n", UVH_NMI_MMR_TYPE);
177 }
178}
179
180/* Read NMI MMR and check if NMI flag was set by BMC. */
181static inline int uv_nmi_test_mmr(struct uv_hub_nmi_s *hub_nmi)
182{
183 hub_nmi->nmi_value = uv_read_local_mmr(nmi_mmr);
184 atomic_inc(&hub_nmi->read_mmr_count);
185 return !!(hub_nmi->nmi_value & nmi_mmr_pending);
186}
187
188static inline void uv_local_mmr_clear_nmi(void)
189{
190 uv_write_local_mmr(nmi_mmr_clear, nmi_mmr_pending);
191}
192
193/*
194 * If first cpu in on this hub, set hub_nmi "in_nmi" and "owner" values and
195 * return true. If first cpu in on the system, set global "in_nmi" flag.
196 */
197static int uv_set_in_nmi(int cpu, struct uv_hub_nmi_s *hub_nmi)
198{
199 int first = atomic_add_unless(&hub_nmi->in_nmi, 1, 1);
200
201 if (first) {
202 atomic_set(&hub_nmi->cpu_owner, cpu);
203 if (atomic_add_unless(&uv_in_nmi, 1, 1))
204 atomic_set(&uv_nmi_cpu, cpu);
205
206 atomic_inc(&hub_nmi->nmi_count);
207 }
208 return first;
209}
210
211/* Check if this is a system NMI event */
212static int uv_check_nmi(struct uv_hub_nmi_s *hub_nmi)
213{
214 int cpu = smp_processor_id();
215 int nmi = 0;
216
217 local64_inc(&uv_nmi_count);
218 uv_cpu_nmi.queries++;
219
220 do {
221 nmi = atomic_read(&hub_nmi->in_nmi);
222 if (nmi)
223 break;
224
225 if (raw_spin_trylock(&hub_nmi->nmi_lock)) {
226
227 /* check hub MMR NMI flag */
228 if (uv_nmi_test_mmr(hub_nmi)) {
229 uv_set_in_nmi(cpu, hub_nmi);
230 nmi = 1;
231 break;
232 }
233
234 /* MMR NMI flag is clear */
235 raw_spin_unlock(&hub_nmi->nmi_lock);
236
237 } else {
238 /* wait a moment for the hub nmi locker to set flag */
239 cpu_relax();
240 udelay(uv_nmi_slave_delay);
241
242 /* re-check hub in_nmi flag */
243 nmi = atomic_read(&hub_nmi->in_nmi);
244 if (nmi)
245 break;
246 }
247
248 /* check if this BMC missed setting the MMR NMI flag */
249 if (!nmi) {
250 nmi = atomic_read(&uv_in_nmi);
251 if (nmi)
252 uv_set_in_nmi(cpu, hub_nmi);
253 }
254
255 } while (0);
256
257 if (!nmi)
258 local64_inc(&uv_nmi_misses);
259
260 return nmi;
261}
262
263/* Need to reset the NMI MMR register, but only once per hub. */
264static inline void uv_clear_nmi(int cpu)
265{
266 struct uv_hub_nmi_s *hub_nmi = uv_hub_nmi;
267
268 if (cpu == atomic_read(&hub_nmi->cpu_owner)) {
269 atomic_set(&hub_nmi->cpu_owner, -1);
270 atomic_set(&hub_nmi->in_nmi, 0);
271 uv_local_mmr_clear_nmi();
272 raw_spin_unlock(&hub_nmi->nmi_lock);
273 }
274}
275
276/* Print non-responding cpus */
277static void uv_nmi_nr_cpus_pr(char *fmt)
278{
279 static char cpu_list[1024];
280 int len = sizeof(cpu_list);
281 int c = cpumask_weight(uv_nmi_cpu_mask);
282 int n = cpulist_scnprintf(cpu_list, len, uv_nmi_cpu_mask);
283
284 if (n >= len-1)
285 strcpy(&cpu_list[len - 6], "...\n");
286
287 printk(fmt, c, cpu_list);
288}
289
290/* Ping non-responding cpus attemping to force them into the NMI handler */
291static void uv_nmi_nr_cpus_ping(void)
292{
293 int cpu;
294
295 for_each_cpu(cpu, uv_nmi_cpu_mask)
296 atomic_set(&uv_cpu_nmi_per(cpu).pinging, 1);
297
298 apic->send_IPI_mask(uv_nmi_cpu_mask, APIC_DM_NMI);
299}
300
301/* Clean up flags for cpus that ignored both NMI and ping */
302static void uv_nmi_cleanup_mask(void)
303{
304 int cpu;
305
306 for_each_cpu(cpu, uv_nmi_cpu_mask) {
307 atomic_set(&uv_cpu_nmi_per(cpu).pinging, 0);
308 atomic_set(&uv_cpu_nmi_per(cpu).state, UV_NMI_STATE_OUT);
309 cpumask_clear_cpu(cpu, uv_nmi_cpu_mask);
310 }
311}
312
313/* Loop waiting as cpus enter nmi handler */
314static int uv_nmi_wait_cpus(int first)
315{
316 int i, j, k, n = num_online_cpus();
317 int last_k = 0, waiting = 0;
318
319 if (first) {
320 cpumask_copy(uv_nmi_cpu_mask, cpu_online_mask);
321 k = 0;
322 } else {
323 k = n - cpumask_weight(uv_nmi_cpu_mask);
324 }
325
326 udelay(uv_nmi_initial_delay);
327 for (i = 0; i < uv_nmi_retry_count; i++) {
328 int loop_delay = uv_nmi_loop_delay;
329
330 for_each_cpu(j, uv_nmi_cpu_mask) {
331 if (atomic_read(&uv_cpu_nmi_per(j).state)) {
332 cpumask_clear_cpu(j, uv_nmi_cpu_mask);
333 if (++k >= n)
334 break;
335 }
336 }
337 if (k >= n) { /* all in? */
338 k = n;
339 break;
340 }
341 if (last_k != k) { /* abort if no new cpus coming in */
342 last_k = k;
343 waiting = 0;
344 } else if (++waiting > uv_nmi_wait_count)
345 break;
346
347 /* extend delay if waiting only for cpu 0 */
348 if (waiting && (n - k) == 1 &&
349 cpumask_test_cpu(0, uv_nmi_cpu_mask))
350 loop_delay *= 100;
351
352 udelay(loop_delay);
353 }
354 atomic_set(&uv_nmi_cpus_in_nmi, k);
355 return n - k;
356}
357
358/* Wait until all slave cpus have entered UV NMI handler */
359static void uv_nmi_wait(int master)
360{
361 /* indicate this cpu is in */
362 atomic_set(&uv_cpu_nmi.state, UV_NMI_STATE_IN);
363
364 /* if not the first cpu in (the master), then we are a slave cpu */
365 if (!master)
366 return;
367
368 do {
369 /* wait for all other cpus to gather here */
370 if (!uv_nmi_wait_cpus(1))
371 break;
372
373 /* if not all made it in, send IPI NMI to them */
374 uv_nmi_nr_cpus_pr(KERN_ALERT
375 "UV: Sending NMI IPI to %d non-responding CPUs: %s\n");
376 uv_nmi_nr_cpus_ping();
377
378 /* if all cpus are in, then done */
379 if (!uv_nmi_wait_cpus(0))
380 break;
381
382 uv_nmi_nr_cpus_pr(KERN_ALERT
383 "UV: %d CPUs not in NMI loop: %s\n");
384 } while (0);
385
386 pr_alert("UV: %d of %d CPUs in NMI\n",
387 atomic_read(&uv_nmi_cpus_in_nmi), num_online_cpus());
388}
389
390static void uv_nmi_dump_cpu_ip_hdr(void)
391{
392 printk(KERN_DEFAULT
393 "\nUV: %4s %6s %-32s %s (Note: PID 0 not listed)\n",
394 "CPU", "PID", "COMMAND", "IP");
395}
396
397static void uv_nmi_dump_cpu_ip(int cpu, struct pt_regs *regs)
398{
399 printk(KERN_DEFAULT "UV: %4d %6d %-32.32s ",
400 cpu, current->pid, current->comm);
401
402 printk_address(regs->ip, 1);
403}
404
405/* Dump this cpu's state */
406static void uv_nmi_dump_state_cpu(int cpu, struct pt_regs *regs)
407{
408 const char *dots = " ................................. ";
409
410 if (uv_nmi_action_is("ips")) {
411 if (cpu == 0)
412 uv_nmi_dump_cpu_ip_hdr();
413
414 if (current->pid != 0)
415 uv_nmi_dump_cpu_ip(cpu, regs);
416
417 } else if (uv_nmi_action_is("dump")) {
418 printk(KERN_DEFAULT
419 "UV:%sNMI process trace for CPU %d\n", dots, cpu);
420 show_regs(regs);
421 }
422 atomic_set(&uv_cpu_nmi.state, UV_NMI_STATE_DUMP_DONE);
423}
424
425/* Trigger a slave cpu to dump it's state */
426static void uv_nmi_trigger_dump(int cpu)
427{
428 int retry = uv_nmi_trigger_delay;
429
430 if (atomic_read(&uv_cpu_nmi_per(cpu).state) != UV_NMI_STATE_IN)
431 return;
432
433 atomic_set(&uv_cpu_nmi_per(cpu).state, UV_NMI_STATE_DUMP);
434 do {
435 cpu_relax();
436 udelay(10);
437 if (atomic_read(&uv_cpu_nmi_per(cpu).state)
438 != UV_NMI_STATE_DUMP)
439 return;
440 } while (--retry > 0);
441
442 pr_crit("UV: CPU %d stuck in process dump function\n", cpu);
443 atomic_set(&uv_cpu_nmi_per(cpu).state, UV_NMI_STATE_DUMP_DONE);
444}
445
446/* Wait until all cpus ready to exit */
447static void uv_nmi_sync_exit(int master)
448{
449 atomic_dec(&uv_nmi_cpus_in_nmi);
450 if (master) {
451 while (atomic_read(&uv_nmi_cpus_in_nmi) > 0)
452 cpu_relax();
453 atomic_set(&uv_nmi_slave_continue, SLAVE_CLEAR);
454 } else {
455 while (atomic_read(&uv_nmi_slave_continue))
456 cpu_relax();
457 }
458}
459
460/* Walk through cpu list and dump state of each */
461static void uv_nmi_dump_state(int cpu, struct pt_regs *regs, int master)
462{
463 if (master) {
464 int tcpu;
465 int ignored = 0;
466 int saved_console_loglevel = console_loglevel;
467
468 pr_alert("UV: tracing %s for %d CPUs from CPU %d\n",
469 uv_nmi_action_is("ips") ? "IPs" : "processes",
470 atomic_read(&uv_nmi_cpus_in_nmi), cpu);
471
472 console_loglevel = uv_nmi_loglevel;
473 atomic_set(&uv_nmi_slave_continue, SLAVE_EXIT);
474 for_each_online_cpu(tcpu) {
475 if (cpumask_test_cpu(tcpu, uv_nmi_cpu_mask))
476 ignored++;
477 else if (tcpu == cpu)
478 uv_nmi_dump_state_cpu(tcpu, regs);
479 else
480 uv_nmi_trigger_dump(tcpu);
481 }
482 if (ignored)
483 printk(KERN_DEFAULT "UV: %d CPUs ignored NMI\n",
484 ignored);
485
486 console_loglevel = saved_console_loglevel;
487 pr_alert("UV: process trace complete\n");
488 } else {
489 while (!atomic_read(&uv_nmi_slave_continue))
490 cpu_relax();
491 while (atomic_read(&uv_cpu_nmi.state) != UV_NMI_STATE_DUMP)
492 cpu_relax();
493 uv_nmi_dump_state_cpu(cpu, regs);
494 }
495 uv_nmi_sync_exit(master);
496}
497
498static void uv_nmi_touch_watchdogs(void)
499{
500 touch_softlockup_watchdog_sync();
501 clocksource_touch_watchdog();
502 rcu_cpu_stall_reset();
503 touch_nmi_watchdog();
504}
505
506#if defined(CONFIG_KEXEC)
507static void uv_nmi_kdump(int cpu, int master, struct pt_regs *regs)
508{
509 /* Call crash to dump system state */
510 if (master) {
511 pr_emerg("UV: NMI executing crash_kexec on CPU%d\n", cpu);
512 crash_kexec(regs);
513
514 pr_emerg("UV: crash_kexec unexpectedly returned, ");
515 if (!kexec_crash_image) {
516 pr_cont("crash kernel not loaded\n");
517 atomic_set(&uv_nmi_kexec_failed, 1);
518 uv_nmi_sync_exit(1);
519 return;
520 }
521 pr_cont("kexec busy, stalling cpus while waiting\n");
522 }
523
524 /* If crash exec fails the slaves should return, otherwise stall */
525 while (atomic_read(&uv_nmi_kexec_failed) == 0)
526 mdelay(10);
527
528 /* Crash kernel most likely not loaded, return in an orderly fashion */
529 uv_nmi_sync_exit(0);
530}
531
532#else /* !CONFIG_KEXEC */
533static inline void uv_nmi_kdump(int cpu, int master, struct pt_regs *regs)
534{
535 if (master)
536 pr_err("UV: NMI kdump: KEXEC not supported in this kernel\n");
537}
538#endif /* !CONFIG_KEXEC */
539
540#ifdef CONFIG_KGDB_KDB
541/* Call KDB from NMI handler */
542static void uv_call_kdb(int cpu, struct pt_regs *regs, int master)
543{
544 int ret;
545
546 if (master) {
547 /* call KGDB NMI handler as MASTER */
548 ret = kgdb_nmicallin(cpu, X86_TRAP_NMI, regs,
549 &uv_nmi_slave_continue);
550 if (ret) {
551 pr_alert("KDB returned error, is kgdboc set?\n");
552 atomic_set(&uv_nmi_slave_continue, SLAVE_EXIT);
553 }
554 } else {
555 /* wait for KGDB signal that it's ready for slaves to enter */
556 int sig;
557
558 do {
559 cpu_relax();
560 sig = atomic_read(&uv_nmi_slave_continue);
561 } while (!sig);
562
563 /* call KGDB as slave */
564 if (sig == SLAVE_CONTINUE)
565 kgdb_nmicallback(cpu, regs);
566 }
567 uv_nmi_sync_exit(master);
568}
569
570#else /* !CONFIG_KGDB_KDB */
571static inline void uv_call_kdb(int cpu, struct pt_regs *regs, int master)
572{
573 pr_err("UV: NMI error: KGDB/KDB is not enabled in this kernel\n");
574}
575#endif /* !CONFIG_KGDB_KDB */
576
577/*
578 * UV NMI handler
579 */
580int uv_handle_nmi(unsigned int reason, struct pt_regs *regs)
581{
582 struct uv_hub_nmi_s *hub_nmi = uv_hub_nmi;
583 int cpu = smp_processor_id();
584 int master = 0;
585 unsigned long flags;
586
587 local_irq_save(flags);
588
589 /* If not a UV System NMI, ignore */
590 if (!atomic_read(&uv_cpu_nmi.pinging) && !uv_check_nmi(hub_nmi)) {
591 local_irq_restore(flags);
592 return NMI_DONE;
593 }
594
595 /* Indicate we are the first CPU into the NMI handler */
596 master = (atomic_read(&uv_nmi_cpu) == cpu);
597
598 /* If NMI action is "kdump", then attempt to do it */
599 if (uv_nmi_action_is("kdump"))
600 uv_nmi_kdump(cpu, master, regs);
601
602 /* Pause as all cpus enter the NMI handler */
603 uv_nmi_wait(master);
604
605 /* Dump state of each cpu */
606 if (uv_nmi_action_is("ips") || uv_nmi_action_is("dump"))
607 uv_nmi_dump_state(cpu, regs, master);
608
609 /* Call KDB if enabled */
610 else if (uv_nmi_action_is("kdb"))
611 uv_call_kdb(cpu, regs, master);
612
613 /* Clear per_cpu "in nmi" flag */
614 atomic_set(&uv_cpu_nmi.state, UV_NMI_STATE_OUT);
615
616 /* Clear MMR NMI flag on each hub */
617 uv_clear_nmi(cpu);
618
619 /* Clear global flags */
620 if (master) {
621 if (cpumask_weight(uv_nmi_cpu_mask))
622 uv_nmi_cleanup_mask();
623 atomic_set(&uv_nmi_cpus_in_nmi, -1);
624 atomic_set(&uv_nmi_cpu, -1);
625 atomic_set(&uv_in_nmi, 0);
626 }
627
628 uv_nmi_touch_watchdogs();
629 local_irq_restore(flags);
630
631 return NMI_HANDLED;
632}
633
634/*
635 * NMI handler for pulling in CPUs when perf events are grabbing our NMI
636 */
637int uv_handle_nmi_ping(unsigned int reason, struct pt_regs *regs)
638{
639 int ret;
640
641 uv_cpu_nmi.queries++;
642 if (!atomic_read(&uv_cpu_nmi.pinging)) {
643 local64_inc(&uv_nmi_ping_misses);
644 return NMI_DONE;
645 }
646
647 uv_cpu_nmi.pings++;
648 local64_inc(&uv_nmi_ping_count);
649 ret = uv_handle_nmi(reason, regs);
650 atomic_set(&uv_cpu_nmi.pinging, 0);
651 return ret;
652}
653
654void uv_register_nmi_notifier(void)
655{
656 if (register_nmi_handler(NMI_UNKNOWN, uv_handle_nmi, 0, "uv"))
657 pr_warn("UV: NMI handler failed to register\n");
658
659 if (register_nmi_handler(NMI_LOCAL, uv_handle_nmi_ping, 0, "uvping"))
660 pr_warn("UV: PING NMI handler failed to register\n");
661}
662
663void uv_nmi_init(void)
664{
665 unsigned int value;
666
667 /*
668 * Unmask NMI on all cpus
669 */
670 value = apic_read(APIC_LVT1) | APIC_DM_NMI;
671 value &= ~APIC_LVT_MASKED;
672 apic_write(APIC_LVT1, value);
673}
674
675void uv_nmi_setup(void)
676{
677 int size = sizeof(void *) * (1 << NODES_SHIFT);
678 int cpu, nid;
679
680 /* Setup hub nmi info */
681 uv_nmi_setup_mmrs();
682 uv_hub_nmi_list = kzalloc(size, GFP_KERNEL);
683 pr_info("UV: NMI hub list @ 0x%p (%d)\n", uv_hub_nmi_list, size);
684 BUG_ON(!uv_hub_nmi_list);
685 size = sizeof(struct uv_hub_nmi_s);
686 for_each_present_cpu(cpu) {
687 nid = cpu_to_node(cpu);
688 if (uv_hub_nmi_list[nid] == NULL) {
689 uv_hub_nmi_list[nid] = kzalloc_node(size,
690 GFP_KERNEL, nid);
691 BUG_ON(!uv_hub_nmi_list[nid]);
692 raw_spin_lock_init(&(uv_hub_nmi_list[nid]->nmi_lock));
693 atomic_set(&uv_hub_nmi_list[nid]->cpu_owner, -1);
694 }
695 uv_hub_nmi_per(cpu) = uv_hub_nmi_list[nid];
696 }
697 BUG_ON(!alloc_cpumask_var(&uv_nmi_cpu_mask, GFP_KERNEL));
698}
699
700
diff --git a/arch/xtensa/include/asm/Kbuild b/arch/xtensa/include/asm/Kbuild
index 1b982641ec35..228d6aee3a16 100644
--- a/arch/xtensa/include/asm/Kbuild
+++ b/arch/xtensa/include/asm/Kbuild
@@ -28,3 +28,4 @@ generic-y += termios.h
28generic-y += topology.h 28generic-y += topology.h
29generic-y += trace_clock.h 29generic-y += trace_clock.h
30generic-y += xor.h 30generic-y += xor.h
31generic-y += preempt.h
diff --git a/arch/xtensa/include/asm/prom.h b/arch/xtensa/include/asm/prom.h
deleted file mode 100644
index f3d7cd2c0de7..000000000000
--- a/arch/xtensa/include/asm/prom.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef _XTENSA_ASM_PROM_H
2#define _XTENSA_ASM_PROM_H
3
4#define HAVE_ARCH_DEVTREE_FIXUPS
5
6#endif /* _XTENSA_ASM_PROM_H */
diff --git a/arch/xtensa/kernel/setup.c b/arch/xtensa/kernel/setup.c
index 946fb8d06c8b..6e2b6638122d 100644
--- a/arch/xtensa/kernel/setup.c
+++ b/arch/xtensa/kernel/setup.c
@@ -21,11 +21,8 @@
21#include <linux/screen_info.h> 21#include <linux/screen_info.h>
22#include <linux/bootmem.h> 22#include <linux/bootmem.h>
23#include <linux/kernel.h> 23#include <linux/kernel.h>
24
25#ifdef CONFIG_OF
26#include <linux/of_fdt.h> 24#include <linux/of_fdt.h>
27#include <linux/of_platform.h> 25#include <linux/of_platform.h>
28#endif
29 26
30#if defined(CONFIG_VGA_CONSOLE) || defined(CONFIG_DUMMY_CONSOLE) 27#if defined(CONFIG_VGA_CONSOLE) || defined(CONFIG_DUMMY_CONSOLE)
31# include <linux/console.h> 28# include <linux/console.h>
@@ -64,8 +61,8 @@ extern struct rtc_ops no_rtc_ops;
64struct rtc_ops *rtc_ops; 61struct rtc_ops *rtc_ops;
65 62
66#ifdef CONFIG_BLK_DEV_INITRD 63#ifdef CONFIG_BLK_DEV_INITRD
67extern void *initrd_start; 64extern unsigned long initrd_start;
68extern void *initrd_end; 65extern unsigned long initrd_end;
69int initrd_is_mapped = 0; 66int initrd_is_mapped = 0;
70extern int initrd_below_start_ok; 67extern int initrd_below_start_ok;
71#endif 68#endif
@@ -152,8 +149,8 @@ static int __init parse_tag_initrd(const bp_tag_t* tag)
152{ 149{
153 meminfo_t* mi; 150 meminfo_t* mi;
154 mi = (meminfo_t*)(tag->data); 151 mi = (meminfo_t*)(tag->data);
155 initrd_start = __va(mi->start); 152 initrd_start = (unsigned long)__va(mi->start);
156 initrd_end = __va(mi->end); 153 initrd_end = (unsigned long)__va(mi->end);
157 154
158 return 0; 155 return 0;
159} 156}
@@ -170,13 +167,6 @@ static int __init parse_tag_fdt(const bp_tag_t *tag)
170 167
171__tagtable(BP_TAG_FDT, parse_tag_fdt); 168__tagtable(BP_TAG_FDT, parse_tag_fdt);
172 169
173void __init early_init_dt_setup_initrd_arch(u64 start, u64 end)
174{
175 initrd_start = (void *)__va(start);
176 initrd_end = (void *)__va(end);
177 initrd_below_start_ok = 1;
178}
179
180#endif /* CONFIG_OF */ 170#endif /* CONFIG_OF */
181 171
182#endif /* CONFIG_BLK_DEV_INITRD */ 172#endif /* CONFIG_BLK_DEV_INITRD */
@@ -222,9 +212,13 @@ static int __init parse_bootparam(const bp_tag_t* tag)
222} 212}
223 213
224#ifdef CONFIG_OF 214#ifdef CONFIG_OF
215bool __initdata dt_memory_scan = false;
225 216
226void __init early_init_dt_add_memory_arch(u64 base, u64 size) 217void __init early_init_dt_add_memory_arch(u64 base, u64 size)
227{ 218{
219 if (!dt_memory_scan)
220 return;
221
228 size &= PAGE_MASK; 222 size &= PAGE_MASK;
229 add_sysmem_bank(MEMORY_TYPE_CONVENTIONAL, base, base + size); 223 add_sysmem_bank(MEMORY_TYPE_CONVENTIONAL, base, base + size);
230} 224}
@@ -236,31 +230,13 @@ void * __init early_init_dt_alloc_memory_arch(u64 size, u64 align)
236 230
237void __init early_init_devtree(void *params) 231void __init early_init_devtree(void *params)
238{ 232{
239 /* Setup flat device-tree pointer */
240 initial_boot_params = params;
241
242 /* Retrieve various informations from the /chosen node of the
243 * device-tree, including the platform type, initrd location and
244 * size, TCE reserve, and more ...
245 */
246 if (!command_line[0])
247 of_scan_flat_dt(early_init_dt_scan_chosen, command_line);
248
249 /* Scan memory nodes and rebuild MEMBLOCKs */
250 of_scan_flat_dt(early_init_dt_scan_root, NULL);
251 if (sysmem.nr_banks == 0) 233 if (sysmem.nr_banks == 0)
252 of_scan_flat_dt(early_init_dt_scan_memory, NULL); 234 dt_memory_scan = true;
253}
254 235
255static void __init copy_devtree(void) 236 early_init_dt_scan(params);
256{ 237
257 void *alloc = early_init_dt_alloc_memory_arch( 238 if (!command_line[0])
258 be32_to_cpu(initial_boot_params->totalsize), 8); 239 strlcpy(command_line, boot_command_line, COMMAND_LINE_SIZE);
259 if (alloc) {
260 memcpy(alloc, initial_boot_params,
261 be32_to_cpu(initial_boot_params->totalsize));
262 initial_boot_params = alloc;
263 }
264} 240}
265 241
266static int __init xtensa_device_probe(void) 242static int __init xtensa_device_probe(void)
@@ -525,10 +501,7 @@ void __init setup_arch(char **cmdline_p)
525 501
526 bootmem_init(); 502 bootmem_init();
527 503
528#ifdef CONFIG_OF 504 unflatten_and_copy_device_tree();
529 copy_devtree();
530 unflatten_device_tree();
531#endif
532 505
533 platform_setup(cmdline_p); 506 platform_setup(cmdline_p);
534 507