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authorBartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>2013-07-03 18:05:06 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2013-07-03 19:07:42 -0400
commit48a9db462d99494583dad829969616ac90a8df4e (patch)
treed908a6172274a9d4d5c14752aa648086bc4721cd /arch
parentdcf6d294830d46b0e6901477fb4bf455281d90c8 (diff)
drivers/dma: remove unused support for MEMSET operations
There have never been any real users of MEMSET operations since they have been introduced in January 2007 by commit 7405f74badf4 ("dmaengine: refactor dmaengine around dma_async_tx_descriptor"). Therefore remove support for them for now, it can be always brought back when needed. [sebastian.hesselbarth@gmail.com: fix drivers/dma/mv_xor] Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Cc: Vinod Koul <vinod.koul@intel.com> Acked-by: Dan Williams <djbw@fb.com> Cc: Tomasz Figa <t.figa@samsung.com> Cc: Herbert Xu <herbert@gondor.apana.org.au> Cc: Olof Johansson <olof@lixom.net> Cc: Kevin Hilman <khilman@linaro.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/mach-iop13xx/setup.c3
-rw-r--r--arch/arm/plat-iop/adma.c2
-rw-r--r--arch/arm/plat-orion/common.c10
3 files changed, 0 insertions, 15 deletions
diff --git a/arch/arm/mach-iop13xx/setup.c b/arch/arm/mach-iop13xx/setup.c
index 3181f61ea63e..1c5bd7637b05 100644
--- a/arch/arm/mach-iop13xx/setup.c
+++ b/arch/arm/mach-iop13xx/setup.c
@@ -469,7 +469,6 @@ void __init iop13xx_platform_init(void)
469 dma_cap_set(DMA_MEMCPY, plat_data->cap_mask); 469 dma_cap_set(DMA_MEMCPY, plat_data->cap_mask);
470 dma_cap_set(DMA_XOR, plat_data->cap_mask); 470 dma_cap_set(DMA_XOR, plat_data->cap_mask);
471 dma_cap_set(DMA_XOR_VAL, plat_data->cap_mask); 471 dma_cap_set(DMA_XOR_VAL, plat_data->cap_mask);
472 dma_cap_set(DMA_MEMSET, plat_data->cap_mask);
473 dma_cap_set(DMA_INTERRUPT, plat_data->cap_mask); 472 dma_cap_set(DMA_INTERRUPT, plat_data->cap_mask);
474 break; 473 break;
475 case IOP13XX_INIT_ADMA_1: 474 case IOP13XX_INIT_ADMA_1:
@@ -479,7 +478,6 @@ void __init iop13xx_platform_init(void)
479 dma_cap_set(DMA_MEMCPY, plat_data->cap_mask); 478 dma_cap_set(DMA_MEMCPY, plat_data->cap_mask);
480 dma_cap_set(DMA_XOR, plat_data->cap_mask); 479 dma_cap_set(DMA_XOR, plat_data->cap_mask);
481 dma_cap_set(DMA_XOR_VAL, plat_data->cap_mask); 480 dma_cap_set(DMA_XOR_VAL, plat_data->cap_mask);
482 dma_cap_set(DMA_MEMSET, plat_data->cap_mask);
483 dma_cap_set(DMA_INTERRUPT, plat_data->cap_mask); 481 dma_cap_set(DMA_INTERRUPT, plat_data->cap_mask);
484 break; 482 break;
485 case IOP13XX_INIT_ADMA_2: 483 case IOP13XX_INIT_ADMA_2:
@@ -489,7 +487,6 @@ void __init iop13xx_platform_init(void)
489 dma_cap_set(DMA_MEMCPY, plat_data->cap_mask); 487 dma_cap_set(DMA_MEMCPY, plat_data->cap_mask);
490 dma_cap_set(DMA_XOR, plat_data->cap_mask); 488 dma_cap_set(DMA_XOR, plat_data->cap_mask);
491 dma_cap_set(DMA_XOR_VAL, plat_data->cap_mask); 489 dma_cap_set(DMA_XOR_VAL, plat_data->cap_mask);
492 dma_cap_set(DMA_MEMSET, plat_data->cap_mask);
493 dma_cap_set(DMA_INTERRUPT, plat_data->cap_mask); 490 dma_cap_set(DMA_INTERRUPT, plat_data->cap_mask);
494 dma_cap_set(DMA_PQ, plat_data->cap_mask); 491 dma_cap_set(DMA_PQ, plat_data->cap_mask);
495 dma_cap_set(DMA_PQ_VAL, plat_data->cap_mask); 492 dma_cap_set(DMA_PQ_VAL, plat_data->cap_mask);
diff --git a/arch/arm/plat-iop/adma.c b/arch/arm/plat-iop/adma.c
index 1ff6a37e893c..a4d1f8de3b5b 100644
--- a/arch/arm/plat-iop/adma.c
+++ b/arch/arm/plat-iop/adma.c
@@ -192,12 +192,10 @@ static int __init iop3xx_adma_cap_init(void)
192 192
193 #ifdef CONFIG_ARCH_IOP32X /* the 32x AAU does not perform zero sum */ 193 #ifdef CONFIG_ARCH_IOP32X /* the 32x AAU does not perform zero sum */
194 dma_cap_set(DMA_XOR, iop3xx_aau_data.cap_mask); 194 dma_cap_set(DMA_XOR, iop3xx_aau_data.cap_mask);
195 dma_cap_set(DMA_MEMSET, iop3xx_aau_data.cap_mask);
196 dma_cap_set(DMA_INTERRUPT, iop3xx_aau_data.cap_mask); 195 dma_cap_set(DMA_INTERRUPT, iop3xx_aau_data.cap_mask);
197 #else 196 #else
198 dma_cap_set(DMA_XOR, iop3xx_aau_data.cap_mask); 197 dma_cap_set(DMA_XOR, iop3xx_aau_data.cap_mask);
199 dma_cap_set(DMA_XOR_VAL, iop3xx_aau_data.cap_mask); 198 dma_cap_set(DMA_XOR_VAL, iop3xx_aau_data.cap_mask);
200 dma_cap_set(DMA_MEMSET, iop3xx_aau_data.cap_mask);
201 dma_cap_set(DMA_INTERRUPT, iop3xx_aau_data.cap_mask); 199 dma_cap_set(DMA_INTERRUPT, iop3xx_aau_data.cap_mask);
202 #endif 200 #endif
203 201
diff --git a/arch/arm/plat-orion/common.c b/arch/arm/plat-orion/common.c
index c019b7aaf776..c66d163d7a2a 100644
--- a/arch/arm/plat-orion/common.c
+++ b/arch/arm/plat-orion/common.c
@@ -666,14 +666,9 @@ void __init orion_xor0_init(unsigned long mapbase_low,
666 orion_xor0_shared_resources[3].start = irq_1; 666 orion_xor0_shared_resources[3].start = irq_1;
667 orion_xor0_shared_resources[3].end = irq_1; 667 orion_xor0_shared_resources[3].end = irq_1;
668 668
669 /*
670 * two engines can't do memset simultaneously, this limitation
671 * satisfied by removing memset support from one of the engines.
672 */
673 dma_cap_set(DMA_MEMCPY, orion_xor0_channels_data[0].cap_mask); 669 dma_cap_set(DMA_MEMCPY, orion_xor0_channels_data[0].cap_mask);
674 dma_cap_set(DMA_XOR, orion_xor0_channels_data[0].cap_mask); 670 dma_cap_set(DMA_XOR, orion_xor0_channels_data[0].cap_mask);
675 671
676 dma_cap_set(DMA_MEMSET, orion_xor0_channels_data[1].cap_mask);
677 dma_cap_set(DMA_MEMCPY, orion_xor0_channels_data[1].cap_mask); 672 dma_cap_set(DMA_MEMCPY, orion_xor0_channels_data[1].cap_mask);
678 dma_cap_set(DMA_XOR, orion_xor0_channels_data[1].cap_mask); 673 dma_cap_set(DMA_XOR, orion_xor0_channels_data[1].cap_mask);
679 674
@@ -732,14 +727,9 @@ void __init orion_xor1_init(unsigned long mapbase_low,
732 orion_xor1_shared_resources[3].start = irq_1; 727 orion_xor1_shared_resources[3].start = irq_1;
733 orion_xor1_shared_resources[3].end = irq_1; 728 orion_xor1_shared_resources[3].end = irq_1;
734 729
735 /*
736 * two engines can't do memset simultaneously, this limitation
737 * satisfied by removing memset support from one of the engines.
738 */
739 dma_cap_set(DMA_MEMCPY, orion_xor1_channels_data[0].cap_mask); 730 dma_cap_set(DMA_MEMCPY, orion_xor1_channels_data[0].cap_mask);
740 dma_cap_set(DMA_XOR, orion_xor1_channels_data[0].cap_mask); 731 dma_cap_set(DMA_XOR, orion_xor1_channels_data[0].cap_mask);
741 732
742 dma_cap_set(DMA_MEMSET, orion_xor1_channels_data[1].cap_mask);
743 dma_cap_set(DMA_MEMCPY, orion_xor1_channels_data[1].cap_mask); 733 dma_cap_set(DMA_MEMCPY, orion_xor1_channels_data[1].cap_mask);
744 dma_cap_set(DMA_XOR, orion_xor1_channels_data[1].cap_mask); 734 dma_cap_set(DMA_XOR, orion_xor1_channels_data[1].cap_mask);
745 735