diff options
author | Dave Hansen <dave.hansen@linux.intel.com> | 2018-04-20 18:20:19 -0400 |
---|---|---|
committer | Thomas Gleixner <tglx@linutronix.de> | 2018-04-25 05:02:50 -0400 |
commit | d2479a30499d93377d3ab10b7822bc5f10ed7f22 (patch) | |
tree | dfbfcc1a0713c1b3ef3163efa959d398fefc80e7 /arch/x86/mm | |
parent | 6d08b06e67cd117f6992c46611dfb4ce267cd71e (diff) |
x86/pti: Fix boot problems from Global-bit setting
commit 16dce603adc9de4237b7bf2ff5c5290f34373e7b
Part of the global bit _setting_ patches also includes clearing the
Global bit when it should not be enabled. That is done with
set_memory_nonglobal(), which uses change_page_attr_clear() in
pageattr.c under the covers.
The TLB flushing code inside pageattr.c has has checks like
BUG_ON(irqs_disabled()), looking for interrupt disabling that might
cause deadlocks. But, these also trip in early boot on certain
preempt configurations. Just copy the existing BUG_ON() sequence from
cpa_flush_range() to the other two sites and check for early boot.
Fixes: 39114b7a7 (x86/pti: Never implicitly clear _PAGE_GLOBAL for kernel image)
Reported-by: Mariusz Ceier <mceier@gmail.com>
Reported-by: Aaro Koskinen <aaro.koskinen@nokia.com>
Signed-off-by: Dave Hansen <dave.hansen@linux.intel.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Tested-by: Aaro Koskinen <aaro.koskinen@nokia.com>
Acked-by: Ingo Molnar <mingo@kernel.org>
Cc: Andrea Arcangeli <aarcange@redhat.com>
Cc: Juergen Gross <jgross@suse.com>
Cc: Nadav Amit <namit@vmware.com>
Cc: Kees Cook <keescook@google.com>
Cc: Josh Poimboeuf <jpoimboe@redhat.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: David Woodhouse <dwmw2@infradead.org>
Cc: Hugh Dickins <hughd@google.com>
Cc: linux-mm@kvack.org
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Andy Lutomirski <luto@kernel.org>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Dan Williams <dan.j.williams@intel.com>
Cc: Arjan van de Ven <arjan@linux.intel.com>
Link: https://lkml.kernel.org/r/20180420222019.20C4A410@viggo.jf.intel.com
Diffstat (limited to 'arch/x86/mm')
-rw-r--r-- | arch/x86/mm/pageattr.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/x86/mm/pageattr.c b/arch/x86/mm/pageattr.c index 0f3d50f4c48c..4fadfd2b7017 100644 --- a/arch/x86/mm/pageattr.c +++ b/arch/x86/mm/pageattr.c | |||
@@ -172,7 +172,7 @@ static void __cpa_flush_all(void *arg) | |||
172 | 172 | ||
173 | static void cpa_flush_all(unsigned long cache) | 173 | static void cpa_flush_all(unsigned long cache) |
174 | { | 174 | { |
175 | BUG_ON(irqs_disabled()); | 175 | BUG_ON(irqs_disabled() && !early_boot_irqs_disabled); |
176 | 176 | ||
177 | on_each_cpu(__cpa_flush_all, (void *) cache, 1); | 177 | on_each_cpu(__cpa_flush_all, (void *) cache, 1); |
178 | } | 178 | } |
@@ -236,7 +236,7 @@ static void cpa_flush_array(unsigned long *start, int numpages, int cache, | |||
236 | unsigned long do_wbinvd = cache && numpages >= 1024; /* 4M threshold */ | 236 | unsigned long do_wbinvd = cache && numpages >= 1024; /* 4M threshold */ |
237 | #endif | 237 | #endif |
238 | 238 | ||
239 | BUG_ON(irqs_disabled()); | 239 | BUG_ON(irqs_disabled() && !early_boot_irqs_disabled); |
240 | 240 | ||
241 | on_each_cpu(__cpa_flush_all, (void *) do_wbinvd, 1); | 241 | on_each_cpu(__cpa_flush_all, (void *) do_wbinvd, 1); |
242 | 242 | ||