diff options
author | Len Brown <len.brown@intel.com> | 2015-05-11 17:27:09 -0400 |
---|---|---|
committer | Ingo Molnar <mingo@kernel.org> | 2015-05-12 02:54:32 -0400 |
commit | d68921f9bd148359e6d01c84aaa2e32bfbd82970 (patch) | |
tree | 63a26b919eea60a11495bedf34e069b672469e8d /arch/x86/kernel/smpboot.c | |
parent | 191a66353b22fad8ac89404ab4c929cbe7b0afb2 (diff) |
x86/smp/boot: Add cmdline "cpu_init_udelay=N" to specify cpu_up() delay
No change to default behavior.
Replace the hard-coded mdelay(10) in cpu_up() with a variable
udelay, that is set to a defined default -- rather than a magic
number.
Add a boot-time override, "cpu_init_udelay=N"
Signed-off-by: Len Brown <len.brown@intel.com>
Cc: Alan Cox <alan@linux.intel.com>
Cc: Arjan van de Ven <arjan@linux.intel.com>
Cc: Borislav Petkov <bp@alien8.de>
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: Jan H. Schönherr <jschoenh@amazon.de>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Link: http://lkml.kernel.org/r/2fe8e6c798e8def271122f62df9bbf58dc283e2a.1431379433.git.len.brown@intel.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Diffstat (limited to 'arch/x86/kernel/smpboot.c')
-rw-r--r-- | arch/x86/kernel/smpboot.c | 23 |
1 files changed, 22 insertions, 1 deletions
diff --git a/arch/x86/kernel/smpboot.c b/arch/x86/kernel/smpboot.c index 51203f60587f..0629a8e513af 100644 --- a/arch/x86/kernel/smpboot.c +++ b/arch/x86/kernel/smpboot.c | |||
@@ -514,6 +514,27 @@ void __inquire_remote_apic(int apicid) | |||
514 | } | 514 | } |
515 | 515 | ||
516 | /* | 516 | /* |
517 | * The Multiprocessor Specification 1.4 (1997) example code suggests | ||
518 | * that there should be a 10ms delay between the BSP asserting INIT | ||
519 | * and de-asserting INIT, when starting a remote processor. | ||
520 | * But that slows boot and resume on modern processors, which include | ||
521 | * many cores and don't require that delay. | ||
522 | * | ||
523 | * Cmdline "init_cpu_udelay=" is available to over-ride this delay. | ||
524 | */ | ||
525 | #define UDELAY_10MS_DEFAULT 10000 | ||
526 | |||
527 | static unsigned int init_udelay = UDELAY_10MS_DEFAULT; | ||
528 | |||
529 | static int __init cpu_init_udelay(char *str) | ||
530 | { | ||
531 | get_option(&str, &init_udelay); | ||
532 | |||
533 | return 0; | ||
534 | } | ||
535 | early_param("cpu_init_udelay", cpu_init_udelay); | ||
536 | |||
537 | /* | ||
517 | * Poke the other CPU in the eye via NMI to wake it up. Remember that the normal | 538 | * Poke the other CPU in the eye via NMI to wake it up. Remember that the normal |
518 | * INIT, INIT, STARTUP sequence will reset the chip hard for us, and this | 539 | * INIT, INIT, STARTUP sequence will reset the chip hard for us, and this |
519 | * won't ... remember to clear down the APIC, etc later. | 540 | * won't ... remember to clear down the APIC, etc later. |
@@ -584,7 +605,7 @@ wakeup_secondary_cpu_via_init(int phys_apicid, unsigned long start_eip) | |||
584 | pr_debug("Waiting for send to finish...\n"); | 605 | pr_debug("Waiting for send to finish...\n"); |
585 | send_status = safe_apic_wait_icr_idle(); | 606 | send_status = safe_apic_wait_icr_idle(); |
586 | 607 | ||
587 | mdelay(10); | 608 | mdelay(init_udelay); |
588 | 609 | ||
589 | pr_debug("Deasserting INIT\n"); | 610 | pr_debug("Deasserting INIT\n"); |
590 | 611 | ||