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authorDave Airlie <airlied@redhat.com>2015-08-17 00:13:53 -0400
committerDave Airlie <airlied@redhat.com>2015-08-17 00:13:53 -0400
commit4eebf60b7452fbd551fd7dece855ba7825a49cbc (patch)
tree490b4d194ba09c90e10201ab7fc084a0bda0ed27 /arch/x86/kernel/cpu
parent8f9cb50789e76f3e224e8861adf650e55c747af4 (diff)
parent2c6625cd545bdd66acff14f3394865d43920a5c7 (diff)
Merge tag 'v4.2-rc7' into drm-next
Linux 4.2-rc7 Backmerge master for i915 fixes
Diffstat (limited to 'arch/x86/kernel/cpu')
-rw-r--r--arch/x86/kernel/cpu/common.c4
-rw-r--r--arch/x86/kernel/cpu/perf_event.c12
-rw-r--r--arch/x86/kernel/cpu/perf_event_intel.c23
-rw-r--r--arch/x86/kernel/cpu/perf_event_intel_cqm.c16
4 files changed, 37 insertions, 18 deletions
diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
index 922c5e0cea4c..cb9e5df42dd2 100644
--- a/arch/x86/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu/common.c
@@ -1410,7 +1410,7 @@ void cpu_init(void)
1410 load_sp0(t, &current->thread); 1410 load_sp0(t, &current->thread);
1411 set_tss_desc(cpu, t); 1411 set_tss_desc(cpu, t);
1412 load_TR_desc(); 1412 load_TR_desc();
1413 load_LDT(&init_mm.context); 1413 load_mm_ldt(&init_mm);
1414 1414
1415 clear_all_debug_regs(); 1415 clear_all_debug_regs();
1416 dbg_restore_debug_regs(); 1416 dbg_restore_debug_regs();
@@ -1459,7 +1459,7 @@ void cpu_init(void)
1459 load_sp0(t, thread); 1459 load_sp0(t, thread);
1460 set_tss_desc(cpu, t); 1460 set_tss_desc(cpu, t);
1461 load_TR_desc(); 1461 load_TR_desc();
1462 load_LDT(&init_mm.context); 1462 load_mm_ldt(&init_mm);
1463 1463
1464 t->x86_tss.io_bitmap_base = offsetof(struct tss_struct, io_bitmap); 1464 t->x86_tss.io_bitmap_base = offsetof(struct tss_struct, io_bitmap);
1465 1465
diff --git a/arch/x86/kernel/cpu/perf_event.c b/arch/x86/kernel/cpu/perf_event.c
index 3658de47900f..9469dfa55607 100644
--- a/arch/x86/kernel/cpu/perf_event.c
+++ b/arch/x86/kernel/cpu/perf_event.c
@@ -2179,21 +2179,25 @@ static unsigned long get_segment_base(unsigned int segment)
2179 int idx = segment >> 3; 2179 int idx = segment >> 3;
2180 2180
2181 if ((segment & SEGMENT_TI_MASK) == SEGMENT_LDT) { 2181 if ((segment & SEGMENT_TI_MASK) == SEGMENT_LDT) {
2182 struct ldt_struct *ldt;
2183
2182 if (idx > LDT_ENTRIES) 2184 if (idx > LDT_ENTRIES)
2183 return 0; 2185 return 0;
2184 2186
2185 if (idx > current->active_mm->context.size) 2187 /* IRQs are off, so this synchronizes with smp_store_release */
2188 ldt = lockless_dereference(current->active_mm->context.ldt);
2189 if (!ldt || idx > ldt->size)
2186 return 0; 2190 return 0;
2187 2191
2188 desc = current->active_mm->context.ldt; 2192 desc = &ldt->entries[idx];
2189 } else { 2193 } else {
2190 if (idx > GDT_ENTRIES) 2194 if (idx > GDT_ENTRIES)
2191 return 0; 2195 return 0;
2192 2196
2193 desc = raw_cpu_ptr(gdt_page.gdt); 2197 desc = raw_cpu_ptr(gdt_page.gdt) + idx;
2194 } 2198 }
2195 2199
2196 return get_desc_base(desc + idx); 2200 return get_desc_base(desc);
2197} 2201}
2198 2202
2199#ifdef CONFIG_COMPAT 2203#ifdef CONFIG_COMPAT
diff --git a/arch/x86/kernel/cpu/perf_event_intel.c b/arch/x86/kernel/cpu/perf_event_intel.c
index b9826a981fb2..6326ae24e4d5 100644
--- a/arch/x86/kernel/cpu/perf_event_intel.c
+++ b/arch/x86/kernel/cpu/perf_event_intel.c
@@ -2534,7 +2534,7 @@ static int intel_pmu_cpu_prepare(int cpu)
2534 if (x86_pmu.extra_regs || x86_pmu.lbr_sel_map) { 2534 if (x86_pmu.extra_regs || x86_pmu.lbr_sel_map) {
2535 cpuc->shared_regs = allocate_shared_regs(cpu); 2535 cpuc->shared_regs = allocate_shared_regs(cpu);
2536 if (!cpuc->shared_regs) 2536 if (!cpuc->shared_regs)
2537 return NOTIFY_BAD; 2537 goto err;
2538 } 2538 }
2539 2539
2540 if (x86_pmu.flags & PMU_FL_EXCL_CNTRS) { 2540 if (x86_pmu.flags & PMU_FL_EXCL_CNTRS) {
@@ -2542,18 +2542,27 @@ static int intel_pmu_cpu_prepare(int cpu)
2542 2542
2543 cpuc->constraint_list = kzalloc(sz, GFP_KERNEL); 2543 cpuc->constraint_list = kzalloc(sz, GFP_KERNEL);
2544 if (!cpuc->constraint_list) 2544 if (!cpuc->constraint_list)
2545 return NOTIFY_BAD; 2545 goto err_shared_regs;
2546 2546
2547 cpuc->excl_cntrs = allocate_excl_cntrs(cpu); 2547 cpuc->excl_cntrs = allocate_excl_cntrs(cpu);
2548 if (!cpuc->excl_cntrs) { 2548 if (!cpuc->excl_cntrs)
2549 kfree(cpuc->constraint_list); 2549 goto err_constraint_list;
2550 kfree(cpuc->shared_regs); 2550
2551 return NOTIFY_BAD;
2552 }
2553 cpuc->excl_thread_id = 0; 2551 cpuc->excl_thread_id = 0;
2554 } 2552 }
2555 2553
2556 return NOTIFY_OK; 2554 return NOTIFY_OK;
2555
2556err_constraint_list:
2557 kfree(cpuc->constraint_list);
2558 cpuc->constraint_list = NULL;
2559
2560err_shared_regs:
2561 kfree(cpuc->shared_regs);
2562 cpuc->shared_regs = NULL;
2563
2564err:
2565 return NOTIFY_BAD;
2557} 2566}
2558 2567
2559static void intel_pmu_cpu_starting(int cpu) 2568static void intel_pmu_cpu_starting(int cpu)
diff --git a/arch/x86/kernel/cpu/perf_event_intel_cqm.c b/arch/x86/kernel/cpu/perf_event_intel_cqm.c
index 188076161c1b..377e8f8ed391 100644
--- a/arch/x86/kernel/cpu/perf_event_intel_cqm.c
+++ b/arch/x86/kernel/cpu/perf_event_intel_cqm.c
@@ -952,6 +952,14 @@ static u64 intel_cqm_event_count(struct perf_event *event)
952 return 0; 952 return 0;
953 953
954 /* 954 /*
955 * Getting up-to-date values requires an SMP IPI which is not
956 * possible if we're being called in interrupt context. Return
957 * the cached values instead.
958 */
959 if (unlikely(in_interrupt()))
960 goto out;
961
962 /*
955 * Notice that we don't perform the reading of an RMID 963 * Notice that we don't perform the reading of an RMID
956 * atomically, because we can't hold a spin lock across the 964 * atomically, because we can't hold a spin lock across the
957 * IPIs. 965 * IPIs.
@@ -1247,7 +1255,7 @@ static inline void cqm_pick_event_reader(int cpu)
1247 cpumask_set_cpu(cpu, &cqm_cpumask); 1255 cpumask_set_cpu(cpu, &cqm_cpumask);
1248} 1256}
1249 1257
1250static void intel_cqm_cpu_prepare(unsigned int cpu) 1258static void intel_cqm_cpu_starting(unsigned int cpu)
1251{ 1259{
1252 struct intel_pqr_state *state = &per_cpu(pqr_state, cpu); 1260 struct intel_pqr_state *state = &per_cpu(pqr_state, cpu);
1253 struct cpuinfo_x86 *c = &cpu_data(cpu); 1261 struct cpuinfo_x86 *c = &cpu_data(cpu);
@@ -1288,13 +1296,11 @@ static int intel_cqm_cpu_notifier(struct notifier_block *nb,
1288 unsigned int cpu = (unsigned long)hcpu; 1296 unsigned int cpu = (unsigned long)hcpu;
1289 1297
1290 switch (action & ~CPU_TASKS_FROZEN) { 1298 switch (action & ~CPU_TASKS_FROZEN) {
1291 case CPU_UP_PREPARE:
1292 intel_cqm_cpu_prepare(cpu);
1293 break;
1294 case CPU_DOWN_PREPARE: 1299 case CPU_DOWN_PREPARE:
1295 intel_cqm_cpu_exit(cpu); 1300 intel_cqm_cpu_exit(cpu);
1296 break; 1301 break;
1297 case CPU_STARTING: 1302 case CPU_STARTING:
1303 intel_cqm_cpu_starting(cpu);
1298 cqm_pick_event_reader(cpu); 1304 cqm_pick_event_reader(cpu);
1299 break; 1305 break;
1300 } 1306 }
@@ -1365,7 +1371,7 @@ static int __init intel_cqm_init(void)
1365 goto out; 1371 goto out;
1366 1372
1367 for_each_online_cpu(i) { 1373 for_each_online_cpu(i) {
1368 intel_cqm_cpu_prepare(i); 1374 intel_cqm_cpu_starting(i);
1369 cqm_pick_event_reader(i); 1375 cqm_pick_event_reader(i);
1370 } 1376 }
1371 1377