diff options
| author | Alexander Shishkin <alexander.shishkin@linux.intel.com> | 2015-01-30 05:40:35 -0500 |
|---|---|---|
| committer | Ingo Molnar <mingo@kernel.org> | 2015-04-02 11:14:21 -0400 |
| commit | 8062382c8dbe2dc11d37e7f0b139508cf10de9d4 (patch) | |
| tree | dec544a0c4018d46f17b73f0a696ccf1c9524aab /arch/x86/kernel/cpu/perf_event_intel_ds.c | |
| parent | 52ca9ced3f70779589e6ecc329baffe69d8f5f7a (diff) | |
perf/x86/intel/bts: Add BTS PMU driver
Add support for Branch Trace Store (BTS) via kernel perf event infrastructure.
The difference with the existing implementation of BTS support is that this
one is a separate PMU that exports events' trace buffers to userspace by means
of AUX area of the perf buffer, which is zero-copy mapped into userspace.
The immediate benefit is that the buffer size can be much bigger, resulting in
fewer interrupts and no kernel side copying is involved and little to no trace
data loss. Also, kernel code can be traced with this driver.
The old way of collecting BTS traces still works.
Signed-off-by: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Frederic Weisbecker <fweisbec@gmail.com>
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: Kaixu Xia <kaixu.xia@linaro.org>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Mike Galbraith <efault@gmx.de>
Cc: Paul Mackerras <paulus@samba.org>
Cc: Robert Richter <rric@kernel.org>
Cc: Stephane Eranian <eranian@google.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: acme@infradead.org
Cc: adrian.hunter@intel.com
Cc: kan.liang@intel.com
Cc: markus.t.metzger@intel.com
Cc: mathieu.poirier@linaro.org
Link: http://lkml.kernel.org/r/1422614435-114702-1-git-send-email-alexander.shishkin@linux.intel.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Diffstat (limited to 'arch/x86/kernel/cpu/perf_event_intel_ds.c')
| -rw-r--r-- | arch/x86/kernel/cpu/perf_event_intel_ds.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/arch/x86/kernel/cpu/perf_event_intel_ds.c b/arch/x86/kernel/cpu/perf_event_intel_ds.c index 073983398364..a5149c7abe73 100644 --- a/arch/x86/kernel/cpu/perf_event_intel_ds.c +++ b/arch/x86/kernel/cpu/perf_event_intel_ds.c | |||
| @@ -461,7 +461,8 @@ void intel_pmu_enable_bts(u64 config) | |||
| 461 | 461 | ||
| 462 | debugctlmsr |= DEBUGCTLMSR_TR; | 462 | debugctlmsr |= DEBUGCTLMSR_TR; |
| 463 | debugctlmsr |= DEBUGCTLMSR_BTS; | 463 | debugctlmsr |= DEBUGCTLMSR_BTS; |
| 464 | debugctlmsr |= DEBUGCTLMSR_BTINT; | 464 | if (config & ARCH_PERFMON_EVENTSEL_INT) |
| 465 | debugctlmsr |= DEBUGCTLMSR_BTINT; | ||
| 465 | 466 | ||
| 466 | if (!(config & ARCH_PERFMON_EVENTSEL_OS)) | 467 | if (!(config & ARCH_PERFMON_EVENTSEL_OS)) |
| 467 | debugctlmsr |= DEBUGCTLMSR_BTS_OFF_OS; | 468 | debugctlmsr |= DEBUGCTLMSR_BTS_OFF_OS; |