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authorAndi Kleen <ak@linux.intel.com>2015-05-28 00:13:14 -0400
committerIngo Molnar <mingo@kernel.org>2015-08-04 04:16:56 -0400
commita7b58d211ba18c9175b139e18b68c86a6bcc3c3f (patch)
treeb0f62b14b572d119b4e5633dfba9bc97308123f2 /arch/x86/kernel/cpu/perf_event_intel.c
parent2f7ebf2ec2a7b311318aae10b8373b0bd93001a7 (diff)
perf/x86/intel/lbr: Allow time stamp for free running PEBSv3
With PEBSv3 the PEBS record contains a time stamp. That means we can allow free-running PEBS without a PMI even if the user program requested a time stamp. This avoids the need to use -T to get free running PEBS, and also avoids any problems with mis-identifying MMAPs later. Move the free_running_flags state into a variable in x86_pmu and use it. This only works when no explicit clock_id is set. Signed-off-by: Andi Kleen <ak@linux.intel.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: acme@kernel.org Cc: eranian@google.com Cc: jolsa@redhat.com Cc: kan.liang@intel.com Link: http://lkml.kernel.org/r/1432786398-23861-2-git-send-email-andi@firstfloor.org Signed-off-by: Ingo Molnar <mingo@kernel.org>
Diffstat (limited to 'arch/x86/kernel/cpu/perf_event_intel.c')
-rw-r--r--arch/x86/kernel/cpu/perf_event_intel.c15
1 files changed, 14 insertions, 1 deletions
diff --git a/arch/x86/kernel/cpu/perf_event_intel.c b/arch/x86/kernel/cpu/perf_event_intel.c
index 71815cf3d2d3..cb112bffcf70 100644
--- a/arch/x86/kernel/cpu/perf_event_intel.c
+++ b/arch/x86/kernel/cpu/perf_event_intel.c
@@ -2257,6 +2257,15 @@ static void intel_pebs_aliases_snb(struct perf_event *event)
2257 } 2257 }
2258} 2258}
2259 2259
2260static unsigned long intel_pmu_free_running_flags(struct perf_event *event)
2261{
2262 unsigned long flags = x86_pmu.free_running_flags;
2263
2264 if (event->attr.use_clockid)
2265 flags &= ~PERF_SAMPLE_TIME;
2266 return flags;
2267}
2268
2260static int intel_pmu_hw_config(struct perf_event *event) 2269static int intel_pmu_hw_config(struct perf_event *event)
2261{ 2270{
2262 int ret = x86_pmu_hw_config(event); 2271 int ret = x86_pmu_hw_config(event);
@@ -2267,7 +2276,8 @@ static int intel_pmu_hw_config(struct perf_event *event)
2267 if (event->attr.precise_ip) { 2276 if (event->attr.precise_ip) {
2268 if (!event->attr.freq) { 2277 if (!event->attr.freq) {
2269 event->hw.flags |= PERF_X86_EVENT_AUTO_RELOAD; 2278 event->hw.flags |= PERF_X86_EVENT_AUTO_RELOAD;
2270 if (!(event->attr.sample_type & ~PEBS_FREERUNNING_FLAGS)) 2279 if (!(event->attr.sample_type &
2280 ~intel_pmu_free_running_flags(event)))
2271 event->hw.flags |= PERF_X86_EVENT_FREERUNNING; 2281 event->hw.flags |= PERF_X86_EVENT_FREERUNNING;
2272 } 2282 }
2273 if (x86_pmu.pebs_aliases) 2283 if (x86_pmu.pebs_aliases)
@@ -2689,6 +2699,8 @@ static __initconst const struct x86_pmu core_pmu = {
2689 .event_map = intel_pmu_event_map, 2699 .event_map = intel_pmu_event_map,
2690 .max_events = ARRAY_SIZE(intel_perfmon_event_map), 2700 .max_events = ARRAY_SIZE(intel_perfmon_event_map),
2691 .apic = 1, 2701 .apic = 1,
2702 .free_running_flags = PEBS_FREERUNNING_FLAGS,
2703
2692 /* 2704 /*
2693 * Intel PMCs cannot be accessed sanely above 32-bit width, 2705 * Intel PMCs cannot be accessed sanely above 32-bit width,
2694 * so we install an artificial 1<<31 period regardless of 2706 * so we install an artificial 1<<31 period regardless of
@@ -2727,6 +2739,7 @@ static __initconst const struct x86_pmu intel_pmu = {
2727 .event_map = intel_pmu_event_map, 2739 .event_map = intel_pmu_event_map,
2728 .max_events = ARRAY_SIZE(intel_perfmon_event_map), 2740 .max_events = ARRAY_SIZE(intel_perfmon_event_map),
2729 .apic = 1, 2741 .apic = 1,
2742 .free_running_flags = PEBS_FREERUNNING_FLAGS,
2730 /* 2743 /*
2731 * Intel PMCs cannot be accessed sanely above 32 bit width, 2744 * Intel PMCs cannot be accessed sanely above 32 bit width,
2732 * so we install an artificial 1<<31 period regardless of 2745 * so we install an artificial 1<<31 period regardless of