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authorBorislav Petkov <bp@suse.de>2015-10-20 05:54:45 -0400
committerIngo Molnar <mingo@kernel.org>2015-10-21 05:22:12 -0400
commitfe055896c040df571e4ff56fb196d6845130057b (patch)
treef45e0d1050476fab2b543e5f6208048217256f6d /arch/x86/kernel/cpu/microcode
parent9a2bc335f100a0f6ee6392b9f97ac4188d84db1d (diff)
x86/microcode: Merge the early microcode loader
Merge the early loader functionality into the driver proper. The diff is huge but logically, it is simply moving code from the _early.c files into the main driver. Signed-off-by: Borislav Petkov <bp@suse.de> Cc: Andy Lutomirski <luto@amacapital.net> Cc: Arjan van de Ven <arjan@linux.intel.com> Cc: Borislav Petkov <bp@alien8.de> Cc: Brian Gerst <brgerst@gmail.com> Cc: Dave Jones <davej@codemonkey.org.uk> Cc: Denys Vlasenko <dvlasenk@redhat.com> Cc: H. Peter Anvin <hpa@zytor.com> Cc: Len Brown <len.brown@intel.com> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Tony Luck <tony.luck@intel.com> Link: http://lkml.kernel.org/r/1445334889-300-3-git-send-email-bp@alien8.de Signed-off-by: Ingo Molnar <mingo@kernel.org>
Diffstat (limited to 'arch/x86/kernel/cpu/microcode')
-rw-r--r--arch/x86/kernel/cpu/microcode/Makefile3
-rw-r--r--arch/x86/kernel/cpu/microcode/amd.c446
-rw-r--r--arch/x86/kernel/cpu/microcode/amd_early.c444
-rw-r--r--arch/x86/kernel/cpu/microcode/core.c160
-rw-r--r--arch/x86/kernel/cpu/microcode/core_early.c170
-rw-r--r--arch/x86/kernel/cpu/microcode/intel.c788
-rw-r--r--arch/x86/kernel/cpu/microcode/intel_early.c808
7 files changed, 1385 insertions, 1434 deletions
diff --git a/arch/x86/kernel/cpu/microcode/Makefile b/arch/x86/kernel/cpu/microcode/Makefile
index 285c85427c32..220b1a508513 100644
--- a/arch/x86/kernel/cpu/microcode/Makefile
+++ b/arch/x86/kernel/cpu/microcode/Makefile
@@ -2,6 +2,3 @@ microcode-y := core.o
2obj-$(CONFIG_MICROCODE) += microcode.o 2obj-$(CONFIG_MICROCODE) += microcode.o
3microcode-$(CONFIG_MICROCODE_INTEL) += intel.o intel_lib.o 3microcode-$(CONFIG_MICROCODE_INTEL) += intel.o intel_lib.o
4microcode-$(CONFIG_MICROCODE_AMD) += amd.o 4microcode-$(CONFIG_MICROCODE_AMD) += amd.o
5obj-$(CONFIG_MICROCODE_EARLY) += core_early.o
6obj-$(CONFIG_MICROCODE_INTEL_EARLY) += intel_early.o
7obj-$(CONFIG_MICROCODE_AMD_EARLY) += amd_early.o
diff --git a/arch/x86/kernel/cpu/microcode/amd.c b/arch/x86/kernel/cpu/microcode/amd.c
index 5dcce5dc39b9..20297fbb7355 100644
--- a/arch/x86/kernel/cpu/microcode/amd.c
+++ b/arch/x86/kernel/cpu/microcode/amd.c
@@ -1,5 +1,9 @@
1/* 1/*
2 * AMD CPU Microcode Update Driver for Linux 2 * AMD CPU Microcode Update Driver for Linux
3 *
4 * This driver allows to upgrade microcode on F10h AMD
5 * CPUs and later.
6 *
3 * Copyright (C) 2008-2011 Advanced Micro Devices Inc. 7 * Copyright (C) 2008-2011 Advanced Micro Devices Inc.
4 * 8 *
5 * Author: Peter Oruba <peter.oruba@amd.com> 9 * Author: Peter Oruba <peter.oruba@amd.com>
@@ -11,26 +15,32 @@
11 * Andreas Herrmann <herrmann.der.user@googlemail.com> 15 * Andreas Herrmann <herrmann.der.user@googlemail.com>
12 * Borislav Petkov <bp@alien8.de> 16 * Borislav Petkov <bp@alien8.de>
13 * 17 *
14 * This driver allows to upgrade microcode on F10h AMD 18 * early loader:
15 * CPUs and later. 19 * Copyright (C) 2013 Advanced Micro Devices, Inc.
20 *
21 * Author: Jacob Shin <jacob.shin@amd.com>
22 * Fixes: Borislav Petkov <bp@suse.de>
16 * 23 *
17 * Licensed under the terms of the GNU General Public 24 * Licensed under the terms of the GNU General Public
18 * License version 2. See file COPYING for details. 25 * License version 2. See file COPYING for details.
19 */ 26 */
20
21#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 27#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
22 28
29#include <linux/earlycpio.h>
23#include <linux/firmware.h> 30#include <linux/firmware.h>
24#include <linux/uaccess.h> 31#include <linux/uaccess.h>
25#include <linux/vmalloc.h> 32#include <linux/vmalloc.h>
33#include <linux/initrd.h>
26#include <linux/kernel.h> 34#include <linux/kernel.h>
27#include <linux/module.h> 35#include <linux/module.h>
28#include <linux/pci.h> 36#include <linux/pci.h>
29 37
38#include <asm/microcode_amd.h>
30#include <asm/microcode.h> 39#include <asm/microcode.h>
31#include <asm/processor.h> 40#include <asm/processor.h>
41#include <asm/setup.h>
42#include <asm/cpu.h>
32#include <asm/msr.h> 43#include <asm/msr.h>
33#include <asm/microcode_amd.h>
34 44
35MODULE_DESCRIPTION("AMD Microcode Update Driver"); 45MODULE_DESCRIPTION("AMD Microcode Update Driver");
36MODULE_AUTHOR("Peter Oruba"); 46MODULE_AUTHOR("Peter Oruba");
@@ -47,6 +57,432 @@ struct ucode_patch {
47 57
48static LIST_HEAD(pcache); 58static LIST_HEAD(pcache);
49 59
60/*
61 * This points to the current valid container of microcode patches which we will
62 * save from the initrd before jettisoning its contents.
63 */
64static u8 *container;
65static size_t container_size;
66
67static u32 ucode_new_rev;
68u8 amd_ucode_patch[PATCH_MAX_SIZE];
69static u16 this_equiv_id;
70
71static struct cpio_data ucode_cpio;
72
73/*
74 * Microcode patch container file is prepended to the initrd in cpio format.
75 * See Documentation/x86/early-microcode.txt
76 */
77static __initdata char ucode_path[] = "kernel/x86/microcode/AuthenticAMD.bin";
78
79static struct cpio_data __init find_ucode_in_initrd(void)
80{
81 long offset = 0;
82 char *path;
83 void *start;
84 size_t size;
85
86#ifdef CONFIG_X86_32
87 struct boot_params *p;
88
89 /*
90 * On 32-bit, early load occurs before paging is turned on so we need
91 * to use physical addresses.
92 */
93 p = (struct boot_params *)__pa_nodebug(&boot_params);
94 path = (char *)__pa_nodebug(ucode_path);
95 start = (void *)p->hdr.ramdisk_image;
96 size = p->hdr.ramdisk_size;
97#else
98 path = ucode_path;
99 start = (void *)(boot_params.hdr.ramdisk_image + PAGE_OFFSET);
100 size = boot_params.hdr.ramdisk_size;
101#endif
102
103 return find_cpio_data(path, start, size, &offset);
104}
105
106static size_t compute_container_size(u8 *data, u32 total_size)
107{
108 size_t size = 0;
109 u32 *header = (u32 *)data;
110
111 if (header[0] != UCODE_MAGIC ||
112 header[1] != UCODE_EQUIV_CPU_TABLE_TYPE || /* type */
113 header[2] == 0) /* size */
114 return size;
115
116 size = header[2] + CONTAINER_HDR_SZ;
117 total_size -= size;
118 data += size;
119
120 while (total_size) {
121 u16 patch_size;
122
123 header = (u32 *)data;
124
125 if (header[0] != UCODE_UCODE_TYPE)
126 break;
127
128 /*
129 * Sanity-check patch size.
130 */
131 patch_size = header[1];
132 if (patch_size > PATCH_MAX_SIZE)
133 break;
134
135 size += patch_size + SECTION_HDR_SIZE;
136 data += patch_size + SECTION_HDR_SIZE;
137 total_size -= patch_size + SECTION_HDR_SIZE;
138 }
139
140 return size;
141}
142
143/*
144 * Early load occurs before we can vmalloc(). So we look for the microcode
145 * patch container file in initrd, traverse equivalent cpu table, look for a
146 * matching microcode patch, and update, all in initrd memory in place.
147 * When vmalloc() is available for use later -- on 64-bit during first AP load,
148 * and on 32-bit during save_microcode_in_initrd_amd() -- we can call
149 * load_microcode_amd() to save equivalent cpu table and microcode patches in
150 * kernel heap memory.
151 */
152static void apply_ucode_in_initrd(void *ucode, size_t size, bool save_patch)
153{
154 struct equiv_cpu_entry *eq;
155 size_t *cont_sz;
156 u32 *header;
157 u8 *data, **cont;
158 u8 (*patch)[PATCH_MAX_SIZE];
159 u16 eq_id = 0;
160 int offset, left;
161 u32 rev, eax, ebx, ecx, edx;
162 u32 *new_rev;
163
164#ifdef CONFIG_X86_32
165 new_rev = (u32 *)__pa_nodebug(&ucode_new_rev);
166 cont_sz = (size_t *)__pa_nodebug(&container_size);
167 cont = (u8 **)__pa_nodebug(&container);
168 patch = (u8 (*)[PATCH_MAX_SIZE])__pa_nodebug(&amd_ucode_patch);
169#else
170 new_rev = &ucode_new_rev;
171 cont_sz = &container_size;
172 cont = &container;
173 patch = &amd_ucode_patch;
174#endif
175
176 data = ucode;
177 left = size;
178 header = (u32 *)data;
179
180 /* find equiv cpu table */
181 if (header[0] != UCODE_MAGIC ||
182 header[1] != UCODE_EQUIV_CPU_TABLE_TYPE || /* type */
183 header[2] == 0) /* size */
184 return;
185
186 eax = 0x00000001;
187 ecx = 0;
188 native_cpuid(&eax, &ebx, &ecx, &edx);
189
190 while (left > 0) {
191 eq = (struct equiv_cpu_entry *)(data + CONTAINER_HDR_SZ);
192
193 *cont = data;
194
195 /* Advance past the container header */
196 offset = header[2] + CONTAINER_HDR_SZ;
197 data += offset;
198 left -= offset;
199
200 eq_id = find_equiv_id(eq, eax);
201 if (eq_id) {
202 this_equiv_id = eq_id;
203 *cont_sz = compute_container_size(*cont, left + offset);
204
205 /*
206 * truncate how much we need to iterate over in the
207 * ucode update loop below
208 */
209 left = *cont_sz - offset;
210 break;
211 }
212
213 /*
214 * support multiple container files appended together. if this
215 * one does not have a matching equivalent cpu entry, we fast
216 * forward to the next container file.
217 */
218 while (left > 0) {
219 header = (u32 *)data;
220 if (header[0] == UCODE_MAGIC &&
221 header[1] == UCODE_EQUIV_CPU_TABLE_TYPE)
222 break;
223
224 offset = header[1] + SECTION_HDR_SIZE;
225 data += offset;
226 left -= offset;
227 }
228
229 /* mark where the next microcode container file starts */
230 offset = data - (u8 *)ucode;
231 ucode = data;
232 }
233
234 if (!eq_id) {
235 *cont = NULL;
236 *cont_sz = 0;
237 return;
238 }
239
240 if (check_current_patch_level(&rev, true))
241 return;
242
243 while (left > 0) {
244 struct microcode_amd *mc;
245
246 header = (u32 *)data;
247 if (header[0] != UCODE_UCODE_TYPE || /* type */
248 header[1] == 0) /* size */
249 break;
250
251 mc = (struct microcode_amd *)(data + SECTION_HDR_SIZE);
252
253 if (eq_id == mc->hdr.processor_rev_id && rev < mc->hdr.patch_id) {
254
255 if (!__apply_microcode_amd(mc)) {
256 rev = mc->hdr.patch_id;
257 *new_rev = rev;
258
259 if (save_patch)
260 memcpy(patch, mc,
261 min_t(u32, header[1], PATCH_MAX_SIZE));
262 }
263 }
264
265 offset = header[1] + SECTION_HDR_SIZE;
266 data += offset;
267 left -= offset;
268 }
269}
270
271static bool __init load_builtin_amd_microcode(struct cpio_data *cp,
272 unsigned int family)
273{
274#ifdef CONFIG_X86_64
275 char fw_name[36] = "amd-ucode/microcode_amd.bin";
276
277 if (family >= 0x15)
278 snprintf(fw_name, sizeof(fw_name),
279 "amd-ucode/microcode_amd_fam%.2xh.bin", family);
280
281 return get_builtin_firmware(cp, fw_name);
282#else
283 return false;
284#endif
285}
286
287void __init load_ucode_amd_bsp(unsigned int family)
288{
289 struct cpio_data cp;
290 void **data;
291 size_t *size;
292
293#ifdef CONFIG_X86_32
294 data = (void **)__pa_nodebug(&ucode_cpio.data);
295 size = (size_t *)__pa_nodebug(&ucode_cpio.size);
296#else
297 data = &ucode_cpio.data;
298 size = &ucode_cpio.size;
299#endif
300
301 cp = find_ucode_in_initrd();
302 if (!cp.data) {
303 if (!load_builtin_amd_microcode(&cp, family))
304 return;
305 }
306
307 *data = cp.data;
308 *size = cp.size;
309
310 apply_ucode_in_initrd(cp.data, cp.size, true);
311}
312
313#ifdef CONFIG_X86_32
314/*
315 * On 32-bit, since AP's early load occurs before paging is turned on, we
316 * cannot traverse cpu_equiv_table and pcache in kernel heap memory. So during
317 * cold boot, AP will apply_ucode_in_initrd() just like the BSP. During
318 * save_microcode_in_initrd_amd() BSP's patch is copied to amd_ucode_patch,
319 * which is used upon resume from suspend.
320 */
321void load_ucode_amd_ap(void)
322{
323 struct microcode_amd *mc;
324 size_t *usize;
325 void **ucode;
326
327 mc = (struct microcode_amd *)__pa_nodebug(amd_ucode_patch);
328 if (mc->hdr.patch_id && mc->hdr.processor_rev_id) {
329 __apply_microcode_amd(mc);
330 return;
331 }
332
333 ucode = (void *)__pa_nodebug(&container);
334 usize = (size_t *)__pa_nodebug(&container_size);
335
336 if (!*ucode || !*usize)
337 return;
338
339 apply_ucode_in_initrd(*ucode, *usize, false);
340}
341
342static void __init collect_cpu_sig_on_bsp(void *arg)
343{
344 unsigned int cpu = smp_processor_id();
345 struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
346
347 uci->cpu_sig.sig = cpuid_eax(0x00000001);
348}
349
350static void __init get_bsp_sig(void)
351{
352 unsigned int bsp = boot_cpu_data.cpu_index;
353 struct ucode_cpu_info *uci = ucode_cpu_info + bsp;
354
355 if (!uci->cpu_sig.sig)
356 smp_call_function_single(bsp, collect_cpu_sig_on_bsp, NULL, 1);
357}
358#else
359void load_ucode_amd_ap(void)
360{
361 unsigned int cpu = smp_processor_id();
362 struct equiv_cpu_entry *eq;
363 struct microcode_amd *mc;
364 u32 rev, eax;
365 u16 eq_id;
366
367 /* Exit if called on the BSP. */
368 if (!cpu)
369 return;
370
371 if (!container)
372 return;
373
374 /*
375 * 64-bit runs with paging enabled, thus early==false.
376 */
377 if (check_current_patch_level(&rev, false))
378 return;
379
380 eax = cpuid_eax(0x00000001);
381 eq = (struct equiv_cpu_entry *)(container + CONTAINER_HDR_SZ);
382
383 eq_id = find_equiv_id(eq, eax);
384 if (!eq_id)
385 return;
386
387 if (eq_id == this_equiv_id) {
388 mc = (struct microcode_amd *)amd_ucode_patch;
389
390 if (mc && rev < mc->hdr.patch_id) {
391 if (!__apply_microcode_amd(mc))
392 ucode_new_rev = mc->hdr.patch_id;
393 }
394
395 } else {
396 if (!ucode_cpio.data)
397 return;
398
399 /*
400 * AP has a different equivalence ID than BSP, looks like
401 * mixed-steppings silicon so go through the ucode blob anew.
402 */
403 apply_ucode_in_initrd(ucode_cpio.data, ucode_cpio.size, false);
404 }
405}
406#endif
407
408int __init save_microcode_in_initrd_amd(void)
409{
410 unsigned long cont;
411 int retval = 0;
412 enum ucode_state ret;
413 u8 *cont_va;
414 u32 eax;
415
416 if (!container)
417 return -EINVAL;
418
419#ifdef CONFIG_X86_32
420 get_bsp_sig();
421 cont = (unsigned long)container;
422 cont_va = __va(container);
423#else
424 /*
425 * We need the physical address of the container for both bitness since
426 * boot_params.hdr.ramdisk_image is a physical address.
427 */
428 cont = __pa(container);
429 cont_va = container;
430#endif
431
432 /*
433 * Take into account the fact that the ramdisk might get relocated and
434 * therefore we need to recompute the container's position in virtual
435 * memory space.
436 */
437 if (relocated_ramdisk)
438 container = (u8 *)(__va(relocated_ramdisk) +
439 (cont - boot_params.hdr.ramdisk_image));
440 else
441 container = cont_va;
442
443 if (ucode_new_rev)
444 pr_info("microcode: updated early to new patch_level=0x%08x\n",
445 ucode_new_rev);
446
447 eax = cpuid_eax(0x00000001);
448 eax = ((eax >> 8) & 0xf) + ((eax >> 20) & 0xff);
449
450 ret = load_microcode_amd(smp_processor_id(), eax, container, container_size);
451 if (ret != UCODE_OK)
452 retval = -EINVAL;
453
454 /*
455 * This will be freed any msec now, stash patches for the current
456 * family and switch to patch cache for cpu hotplug, etc later.
457 */
458 container = NULL;
459 container_size = 0;
460
461 return retval;
462}
463
464void reload_ucode_amd(void)
465{
466 struct microcode_amd *mc;
467 u32 rev;
468
469 /*
470 * early==false because this is a syscore ->resume path and by
471 * that time paging is long enabled.
472 */
473 if (check_current_patch_level(&rev, false))
474 return;
475
476 mc = (struct microcode_amd *)amd_ucode_patch;
477
478 if (mc && rev < mc->hdr.patch_id) {
479 if (!__apply_microcode_amd(mc)) {
480 ucode_new_rev = mc->hdr.patch_id;
481 pr_info("microcode: reload patch_level=0x%08x\n",
482 ucode_new_rev);
483 }
484 }
485}
50static u16 __find_equiv_id(unsigned int cpu) 486static u16 __find_equiv_id(unsigned int cpu)
51{ 487{
52 struct ucode_cpu_info *uci = ucode_cpu_info + cpu; 488 struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
@@ -435,7 +871,7 @@ enum ucode_state load_microcode_amd(int cpu, u8 family, const u8 *data, size_t s
435 if (ret != UCODE_OK) 871 if (ret != UCODE_OK)
436 cleanup(); 872 cleanup();
437 873
438#if defined(CONFIG_MICROCODE_AMD_EARLY) && defined(CONFIG_X86_32) 874#ifdef CONFIG_X86_32
439 /* save BSP's matching patch for early load */ 875 /* save BSP's matching patch for early load */
440 if (cpu_data(cpu).cpu_index == boot_cpu_data.cpu_index) { 876 if (cpu_data(cpu).cpu_index == boot_cpu_data.cpu_index) {
441 struct ucode_patch *p = find_patch(cpu); 877 struct ucode_patch *p = find_patch(cpu);
diff --git a/arch/x86/kernel/cpu/microcode/amd_early.c b/arch/x86/kernel/cpu/microcode/amd_early.c
deleted file mode 100644
index a54a47b9d8ea..000000000000
--- a/arch/x86/kernel/cpu/microcode/amd_early.c
+++ /dev/null
@@ -1,444 +0,0 @@
1/*
2 * Copyright (C) 2013 Advanced Micro Devices, Inc.
3 *
4 * Author: Jacob Shin <jacob.shin@amd.com>
5 * Fixes: Borislav Petkov <bp@suse.de>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11
12#include <linux/earlycpio.h>
13#include <linux/initrd.h>
14
15#include <asm/cpu.h>
16#include <asm/setup.h>
17#include <asm/microcode_amd.h>
18
19/*
20 * This points to the current valid container of microcode patches which we will
21 * save from the initrd before jettisoning its contents.
22 */
23static u8 *container;
24static size_t container_size;
25
26static u32 ucode_new_rev;
27u8 amd_ucode_patch[PATCH_MAX_SIZE];
28static u16 this_equiv_id;
29
30static struct cpio_data ucode_cpio;
31
32/*
33 * Microcode patch container file is prepended to the initrd in cpio format.
34 * See Documentation/x86/early-microcode.txt
35 */
36static __initdata char ucode_path[] = "kernel/x86/microcode/AuthenticAMD.bin";
37
38static struct cpio_data __init find_ucode_in_initrd(void)
39{
40 long offset = 0;
41 char *path;
42 void *start;
43 size_t size;
44
45#ifdef CONFIG_X86_32
46 struct boot_params *p;
47
48 /*
49 * On 32-bit, early load occurs before paging is turned on so we need
50 * to use physical addresses.
51 */
52 p = (struct boot_params *)__pa_nodebug(&boot_params);
53 path = (char *)__pa_nodebug(ucode_path);
54 start = (void *)p->hdr.ramdisk_image;
55 size = p->hdr.ramdisk_size;
56#else
57 path = ucode_path;
58 start = (void *)(boot_params.hdr.ramdisk_image + PAGE_OFFSET);
59 size = boot_params.hdr.ramdisk_size;
60#endif
61
62 return find_cpio_data(path, start, size, &offset);
63}
64
65static size_t compute_container_size(u8 *data, u32 total_size)
66{
67 size_t size = 0;
68 u32 *header = (u32 *)data;
69
70 if (header[0] != UCODE_MAGIC ||
71 header[1] != UCODE_EQUIV_CPU_TABLE_TYPE || /* type */
72 header[2] == 0) /* size */
73 return size;
74
75 size = header[2] + CONTAINER_HDR_SZ;
76 total_size -= size;
77 data += size;
78
79 while (total_size) {
80 u16 patch_size;
81
82 header = (u32 *)data;
83
84 if (header[0] != UCODE_UCODE_TYPE)
85 break;
86
87 /*
88 * Sanity-check patch size.
89 */
90 patch_size = header[1];
91 if (patch_size > PATCH_MAX_SIZE)
92 break;
93
94 size += patch_size + SECTION_HDR_SIZE;
95 data += patch_size + SECTION_HDR_SIZE;
96 total_size -= patch_size + SECTION_HDR_SIZE;
97 }
98
99 return size;
100}
101
102/*
103 * Early load occurs before we can vmalloc(). So we look for the microcode
104 * patch container file in initrd, traverse equivalent cpu table, look for a
105 * matching microcode patch, and update, all in initrd memory in place.
106 * When vmalloc() is available for use later -- on 64-bit during first AP load,
107 * and on 32-bit during save_microcode_in_initrd_amd() -- we can call
108 * load_microcode_amd() to save equivalent cpu table and microcode patches in
109 * kernel heap memory.
110 */
111static void apply_ucode_in_initrd(void *ucode, size_t size, bool save_patch)
112{
113 struct equiv_cpu_entry *eq;
114 size_t *cont_sz;
115 u32 *header;
116 u8 *data, **cont;
117 u8 (*patch)[PATCH_MAX_SIZE];
118 u16 eq_id = 0;
119 int offset, left;
120 u32 rev, eax, ebx, ecx, edx;
121 u32 *new_rev;
122
123#ifdef CONFIG_X86_32
124 new_rev = (u32 *)__pa_nodebug(&ucode_new_rev);
125 cont_sz = (size_t *)__pa_nodebug(&container_size);
126 cont = (u8 **)__pa_nodebug(&container);
127 patch = (u8 (*)[PATCH_MAX_SIZE])__pa_nodebug(&amd_ucode_patch);
128#else
129 new_rev = &ucode_new_rev;
130 cont_sz = &container_size;
131 cont = &container;
132 patch = &amd_ucode_patch;
133#endif
134
135 data = ucode;
136 left = size;
137 header = (u32 *)data;
138
139 /* find equiv cpu table */
140 if (header[0] != UCODE_MAGIC ||
141 header[1] != UCODE_EQUIV_CPU_TABLE_TYPE || /* type */
142 header[2] == 0) /* size */
143 return;
144
145 eax = 0x00000001;
146 ecx = 0;
147 native_cpuid(&eax, &ebx, &ecx, &edx);
148
149 while (left > 0) {
150 eq = (struct equiv_cpu_entry *)(data + CONTAINER_HDR_SZ);
151
152 *cont = data;
153
154 /* Advance past the container header */
155 offset = header[2] + CONTAINER_HDR_SZ;
156 data += offset;
157 left -= offset;
158
159 eq_id = find_equiv_id(eq, eax);
160 if (eq_id) {
161 this_equiv_id = eq_id;
162 *cont_sz = compute_container_size(*cont, left + offset);
163
164 /*
165 * truncate how much we need to iterate over in the
166 * ucode update loop below
167 */
168 left = *cont_sz - offset;
169 break;
170 }
171
172 /*
173 * support multiple container files appended together. if this
174 * one does not have a matching equivalent cpu entry, we fast
175 * forward to the next container file.
176 */
177 while (left > 0) {
178 header = (u32 *)data;
179 if (header[0] == UCODE_MAGIC &&
180 header[1] == UCODE_EQUIV_CPU_TABLE_TYPE)
181 break;
182
183 offset = header[1] + SECTION_HDR_SIZE;
184 data += offset;
185 left -= offset;
186 }
187
188 /* mark where the next microcode container file starts */
189 offset = data - (u8 *)ucode;
190 ucode = data;
191 }
192
193 if (!eq_id) {
194 *cont = NULL;
195 *cont_sz = 0;
196 return;
197 }
198
199 if (check_current_patch_level(&rev, true))
200 return;
201
202 while (left > 0) {
203 struct microcode_amd *mc;
204
205 header = (u32 *)data;
206 if (header[0] != UCODE_UCODE_TYPE || /* type */
207 header[1] == 0) /* size */
208 break;
209
210 mc = (struct microcode_amd *)(data + SECTION_HDR_SIZE);
211
212 if (eq_id == mc->hdr.processor_rev_id && rev < mc->hdr.patch_id) {
213
214 if (!__apply_microcode_amd(mc)) {
215 rev = mc->hdr.patch_id;
216 *new_rev = rev;
217
218 if (save_patch)
219 memcpy(patch, mc,
220 min_t(u32, header[1], PATCH_MAX_SIZE));
221 }
222 }
223
224 offset = header[1] + SECTION_HDR_SIZE;
225 data += offset;
226 left -= offset;
227 }
228}
229
230static bool __init load_builtin_amd_microcode(struct cpio_data *cp,
231 unsigned int family)
232{
233#ifdef CONFIG_X86_64
234 char fw_name[36] = "amd-ucode/microcode_amd.bin";
235
236 if (family >= 0x15)
237 snprintf(fw_name, sizeof(fw_name),
238 "amd-ucode/microcode_amd_fam%.2xh.bin", family);
239
240 return get_builtin_firmware(cp, fw_name);
241#else
242 return false;
243#endif
244}
245
246void __init load_ucode_amd_bsp(unsigned int family)
247{
248 struct cpio_data cp;
249 void **data;
250 size_t *size;
251
252#ifdef CONFIG_X86_32
253 data = (void **)__pa_nodebug(&ucode_cpio.data);
254 size = (size_t *)__pa_nodebug(&ucode_cpio.size);
255#else
256 data = &ucode_cpio.data;
257 size = &ucode_cpio.size;
258#endif
259
260 cp = find_ucode_in_initrd();
261 if (!cp.data) {
262 if (!load_builtin_amd_microcode(&cp, family))
263 return;
264 }
265
266 *data = cp.data;
267 *size = cp.size;
268
269 apply_ucode_in_initrd(cp.data, cp.size, true);
270}
271
272#ifdef CONFIG_X86_32
273/*
274 * On 32-bit, since AP's early load occurs before paging is turned on, we
275 * cannot traverse cpu_equiv_table and pcache in kernel heap memory. So during
276 * cold boot, AP will apply_ucode_in_initrd() just like the BSP. During
277 * save_microcode_in_initrd_amd() BSP's patch is copied to amd_ucode_patch,
278 * which is used upon resume from suspend.
279 */
280void load_ucode_amd_ap(void)
281{
282 struct microcode_amd *mc;
283 size_t *usize;
284 void **ucode;
285
286 mc = (struct microcode_amd *)__pa_nodebug(amd_ucode_patch);
287 if (mc->hdr.patch_id && mc->hdr.processor_rev_id) {
288 __apply_microcode_amd(mc);
289 return;
290 }
291
292 ucode = (void *)__pa_nodebug(&container);
293 usize = (size_t *)__pa_nodebug(&container_size);
294
295 if (!*ucode || !*usize)
296 return;
297
298 apply_ucode_in_initrd(*ucode, *usize, false);
299}
300
301static void __init collect_cpu_sig_on_bsp(void *arg)
302{
303 unsigned int cpu = smp_processor_id();
304 struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
305
306 uci->cpu_sig.sig = cpuid_eax(0x00000001);
307}
308
309static void __init get_bsp_sig(void)
310{
311 unsigned int bsp = boot_cpu_data.cpu_index;
312 struct ucode_cpu_info *uci = ucode_cpu_info + bsp;
313
314 if (!uci->cpu_sig.sig)
315 smp_call_function_single(bsp, collect_cpu_sig_on_bsp, NULL, 1);
316}
317#else
318void load_ucode_amd_ap(void)
319{
320 unsigned int cpu = smp_processor_id();
321 struct equiv_cpu_entry *eq;
322 struct microcode_amd *mc;
323 u32 rev, eax;
324 u16 eq_id;
325
326 /* Exit if called on the BSP. */
327 if (!cpu)
328 return;
329
330 if (!container)
331 return;
332
333 /*
334 * 64-bit runs with paging enabled, thus early==false.
335 */
336 if (check_current_patch_level(&rev, false))
337 return;
338
339 eax = cpuid_eax(0x00000001);
340 eq = (struct equiv_cpu_entry *)(container + CONTAINER_HDR_SZ);
341
342 eq_id = find_equiv_id(eq, eax);
343 if (!eq_id)
344 return;
345
346 if (eq_id == this_equiv_id) {
347 mc = (struct microcode_amd *)amd_ucode_patch;
348
349 if (mc && rev < mc->hdr.patch_id) {
350 if (!__apply_microcode_amd(mc))
351 ucode_new_rev = mc->hdr.patch_id;
352 }
353
354 } else {
355 if (!ucode_cpio.data)
356 return;
357
358 /*
359 * AP has a different equivalence ID than BSP, looks like
360 * mixed-steppings silicon so go through the ucode blob anew.
361 */
362 apply_ucode_in_initrd(ucode_cpio.data, ucode_cpio.size, false);
363 }
364}
365#endif
366
367int __init save_microcode_in_initrd_amd(void)
368{
369 unsigned long cont;
370 int retval = 0;
371 enum ucode_state ret;
372 u8 *cont_va;
373 u32 eax;
374
375 if (!container)
376 return -EINVAL;
377
378#ifdef CONFIG_X86_32
379 get_bsp_sig();
380 cont = (unsigned long)container;
381 cont_va = __va(container);
382#else
383 /*
384 * We need the physical address of the container for both bitness since
385 * boot_params.hdr.ramdisk_image is a physical address.
386 */
387 cont = __pa(container);
388 cont_va = container;
389#endif
390
391 /*
392 * Take into account the fact that the ramdisk might get relocated and
393 * therefore we need to recompute the container's position in virtual
394 * memory space.
395 */
396 if (relocated_ramdisk)
397 container = (u8 *)(__va(relocated_ramdisk) +
398 (cont - boot_params.hdr.ramdisk_image));
399 else
400 container = cont_va;
401
402 if (ucode_new_rev)
403 pr_info("microcode: updated early to new patch_level=0x%08x\n",
404 ucode_new_rev);
405
406 eax = cpuid_eax(0x00000001);
407 eax = ((eax >> 8) & 0xf) + ((eax >> 20) & 0xff);
408
409 ret = load_microcode_amd(smp_processor_id(), eax, container, container_size);
410 if (ret != UCODE_OK)
411 retval = -EINVAL;
412
413 /*
414 * This will be freed any msec now, stash patches for the current
415 * family and switch to patch cache for cpu hotplug, etc later.
416 */
417 container = NULL;
418 container_size = 0;
419
420 return retval;
421}
422
423void reload_ucode_amd(void)
424{
425 struct microcode_amd *mc;
426 u32 rev;
427
428 /*
429 * early==false because this is a syscore ->resume path and by
430 * that time paging is long enabled.
431 */
432 if (check_current_patch_level(&rev, false))
433 return;
434
435 mc = (struct microcode_amd *)amd_ucode_patch;
436
437 if (mc && rev < mc->hdr.patch_id) {
438 if (!__apply_microcode_amd(mc)) {
439 ucode_new_rev = mc->hdr.patch_id;
440 pr_info("microcode: reload patch_level=0x%08x\n",
441 ucode_new_rev);
442 }
443 }
444}
diff --git a/arch/x86/kernel/cpu/microcode/core.c b/arch/x86/kernel/cpu/microcode/core.c
index 15491dd3131e..18848c7de058 100644
--- a/arch/x86/kernel/cpu/microcode/core.c
+++ b/arch/x86/kernel/cpu/microcode/core.c
@@ -5,6 +5,12 @@
5 * 2006 Shaohua Li <shaohua.li@intel.com> 5 * 2006 Shaohua Li <shaohua.li@intel.com>
6 * 2013-2015 Borislav Petkov <bp@alien8.de> 6 * 2013-2015 Borislav Petkov <bp@alien8.de>
7 * 7 *
8 * X86 CPU microcode early update for Linux:
9 *
10 * Copyright (C) 2012 Fenghua Yu <fenghua.yu@intel.com>
11 * H Peter Anvin" <hpa@zytor.com>
12 * (C) 2015 Borislav Petkov <bp@alien8.de>
13 *
8 * This driver allows to upgrade microcode on x86 processors. 14 * This driver allows to upgrade microcode on x86 processors.
9 * 15 *
10 * This program is free software; you can redistribute it and/or 16 * This program is free software; you can redistribute it and/or
@@ -16,20 +22,24 @@
16#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 22#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
17 23
18#include <linux/platform_device.h> 24#include <linux/platform_device.h>
25#include <linux/syscore_ops.h>
19#include <linux/miscdevice.h> 26#include <linux/miscdevice.h>
20#include <linux/capability.h> 27#include <linux/capability.h>
28#include <linux/firmware.h>
21#include <linux/kernel.h> 29#include <linux/kernel.h>
22#include <linux/module.h> 30#include <linux/module.h>
23#include <linux/mutex.h> 31#include <linux/mutex.h>
24#include <linux/cpu.h> 32#include <linux/cpu.h>
25#include <linux/fs.h> 33#include <linux/fs.h>
26#include <linux/mm.h> 34#include <linux/mm.h>
27#include <linux/syscore_ops.h>
28 35
29#include <asm/microcode.h> 36#include <asm/microcode_intel.h>
30#include <asm/processor.h>
31#include <asm/cpu_device_id.h> 37#include <asm/cpu_device_id.h>
38#include <asm/microcode_amd.h>
32#include <asm/perf_event.h> 39#include <asm/perf_event.h>
40#include <asm/microcode.h>
41#include <asm/processor.h>
42#include <asm/cmdline.h>
33 43
34MODULE_DESCRIPTION("Microcode Update Driver"); 44MODULE_DESCRIPTION("Microcode Update Driver");
35MODULE_AUTHOR("Tigran Aivazian <tigran@aivazian.fsnet.co.uk>"); 45MODULE_AUTHOR("Tigran Aivazian <tigran@aivazian.fsnet.co.uk>");
@@ -68,6 +78,150 @@ struct cpu_info_ctx {
68 int err; 78 int err;
69}; 79};
70 80
81static bool __init check_loader_disabled_bsp(void)
82{
83#ifdef CONFIG_X86_32
84 const char *cmdline = (const char *)__pa_nodebug(boot_command_line);
85 const char *opt = "dis_ucode_ldr";
86 const char *option = (const char *)__pa_nodebug(opt);
87 bool *res = (bool *)__pa_nodebug(&dis_ucode_ldr);
88
89#else /* CONFIG_X86_64 */
90 const char *cmdline = boot_command_line;
91 const char *option = "dis_ucode_ldr";
92 bool *res = &dis_ucode_ldr;
93#endif
94
95 if (cmdline_find_option_bool(cmdline, option))
96 *res = true;
97
98 return *res;
99}
100
101extern struct builtin_fw __start_builtin_fw[];
102extern struct builtin_fw __end_builtin_fw[];
103
104bool get_builtin_firmware(struct cpio_data *cd, const char *name)
105{
106#ifdef CONFIG_FW_LOADER
107 struct builtin_fw *b_fw;
108
109 for (b_fw = __start_builtin_fw; b_fw != __end_builtin_fw; b_fw++) {
110 if (!strcmp(name, b_fw->name)) {
111 cd->size = b_fw->size;
112 cd->data = b_fw->data;
113 return true;
114 }
115 }
116#endif
117 return false;
118}
119
120void __init load_ucode_bsp(void)
121{
122 int vendor;
123 unsigned int family;
124
125 if (check_loader_disabled_bsp())
126 return;
127
128 if (!have_cpuid_p())
129 return;
130
131 vendor = x86_vendor();
132 family = x86_family();
133
134 switch (vendor) {
135 case X86_VENDOR_INTEL:
136 if (family >= 6)
137 load_ucode_intel_bsp();
138 break;
139 case X86_VENDOR_AMD:
140 if (family >= 0x10)
141 load_ucode_amd_bsp(family);
142 break;
143 default:
144 break;
145 }
146}
147
148static bool check_loader_disabled_ap(void)
149{
150#ifdef CONFIG_X86_32
151 return *((bool *)__pa_nodebug(&dis_ucode_ldr));
152#else
153 return dis_ucode_ldr;
154#endif
155}
156
157void load_ucode_ap(void)
158{
159 int vendor, family;
160
161 if (check_loader_disabled_ap())
162 return;
163
164 if (!have_cpuid_p())
165 return;
166
167 vendor = x86_vendor();
168 family = x86_family();
169
170 switch (vendor) {
171 case X86_VENDOR_INTEL:
172 if (family >= 6)
173 load_ucode_intel_ap();
174 break;
175 case X86_VENDOR_AMD:
176 if (family >= 0x10)
177 load_ucode_amd_ap();
178 break;
179 default:
180 break;
181 }
182}
183
184int __init save_microcode_in_initrd(void)
185{
186 struct cpuinfo_x86 *c = &boot_cpu_data;
187
188 switch (c->x86_vendor) {
189 case X86_VENDOR_INTEL:
190 if (c->x86 >= 6)
191 save_microcode_in_initrd_intel();
192 break;
193 case X86_VENDOR_AMD:
194 if (c->x86 >= 0x10)
195 save_microcode_in_initrd_amd();
196 break;
197 default:
198 break;
199 }
200
201 return 0;
202}
203
204void reload_early_microcode(void)
205{
206 int vendor, family;
207
208 vendor = x86_vendor();
209 family = x86_family();
210
211 switch (vendor) {
212 case X86_VENDOR_INTEL:
213 if (family >= 6)
214 reload_ucode_intel();
215 break;
216 case X86_VENDOR_AMD:
217 if (family >= 0x10)
218 reload_ucode_amd();
219 break;
220 default:
221 break;
222 }
223}
224
71static void collect_cpu_info_local(void *arg) 225static void collect_cpu_info_local(void *arg)
72{ 226{
73 struct cpu_info_ctx *ctx = arg; 227 struct cpu_info_ctx *ctx = arg;
diff --git a/arch/x86/kernel/cpu/microcode/core_early.c b/arch/x86/kernel/cpu/microcode/core_early.c
deleted file mode 100644
index 8ebc421d6299..000000000000
--- a/arch/x86/kernel/cpu/microcode/core_early.c
+++ /dev/null
@@ -1,170 +0,0 @@
1/*
2 * X86 CPU microcode early update for Linux
3 *
4 * Copyright (C) 2012 Fenghua Yu <fenghua.yu@intel.com>
5 * H Peter Anvin" <hpa@zytor.com>
6 * (C) 2015 Borislav Petkov <bp@alien8.de>
7 *
8 * This driver allows to early upgrade microcode on Intel processors
9 * belonging to IA-32 family - PentiumPro, Pentium II,
10 * Pentium III, Xeon, Pentium 4, etc.
11 *
12 * Reference: Section 9.11 of Volume 3, IA-32 Intel Architecture
13 * Software Developer's Manual.
14 *
15 * This program is free software; you can redistribute it and/or
16 * modify it under the terms of the GNU General Public License
17 * as published by the Free Software Foundation; either version
18 * 2 of the License, or (at your option) any later version.
19 */
20#include <linux/module.h>
21#include <linux/firmware.h>
22#include <asm/microcode.h>
23#include <asm/microcode_intel.h>
24#include <asm/microcode_amd.h>
25#include <asm/processor.h>
26#include <asm/cmdline.h>
27
28static bool __init check_loader_disabled_bsp(void)
29{
30#ifdef CONFIG_X86_32
31 const char *cmdline = (const char *)__pa_nodebug(boot_command_line);
32 const char *opt = "dis_ucode_ldr";
33 const char *option = (const char *)__pa_nodebug(opt);
34 bool *res = (bool *)__pa_nodebug(&dis_ucode_ldr);
35
36#else /* CONFIG_X86_64 */
37 const char *cmdline = boot_command_line;
38 const char *option = "dis_ucode_ldr";
39 bool *res = &dis_ucode_ldr;
40#endif
41
42 if (cmdline_find_option_bool(cmdline, option))
43 *res = true;
44
45 return *res;
46}
47
48extern struct builtin_fw __start_builtin_fw[];
49extern struct builtin_fw __end_builtin_fw[];
50
51bool get_builtin_firmware(struct cpio_data *cd, const char *name)
52{
53#ifdef CONFIG_FW_LOADER
54 struct builtin_fw *b_fw;
55
56 for (b_fw = __start_builtin_fw; b_fw != __end_builtin_fw; b_fw++) {
57 if (!strcmp(name, b_fw->name)) {
58 cd->size = b_fw->size;
59 cd->data = b_fw->data;
60 return true;
61 }
62 }
63#endif
64 return false;
65}
66
67void __init load_ucode_bsp(void)
68{
69 int vendor;
70 unsigned int family;
71
72 if (check_loader_disabled_bsp())
73 return;
74
75 if (!have_cpuid_p())
76 return;
77
78 vendor = x86_vendor();
79 family = x86_family();
80
81 switch (vendor) {
82 case X86_VENDOR_INTEL:
83 if (family >= 6)
84 load_ucode_intel_bsp();
85 break;
86 case X86_VENDOR_AMD:
87 if (family >= 0x10)
88 load_ucode_amd_bsp(family);
89 break;
90 default:
91 break;
92 }
93}
94
95static bool check_loader_disabled_ap(void)
96{
97#ifdef CONFIG_X86_32
98 return *((bool *)__pa_nodebug(&dis_ucode_ldr));
99#else
100 return dis_ucode_ldr;
101#endif
102}
103
104void load_ucode_ap(void)
105{
106 int vendor, family;
107
108 if (check_loader_disabled_ap())
109 return;
110
111 if (!have_cpuid_p())
112 return;
113
114 vendor = x86_vendor();
115 family = x86_family();
116
117 switch (vendor) {
118 case X86_VENDOR_INTEL:
119 if (family >= 6)
120 load_ucode_intel_ap();
121 break;
122 case X86_VENDOR_AMD:
123 if (family >= 0x10)
124 load_ucode_amd_ap();
125 break;
126 default:
127 break;
128 }
129}
130
131int __init save_microcode_in_initrd(void)
132{
133 struct cpuinfo_x86 *c = &boot_cpu_data;
134
135 switch (c->x86_vendor) {
136 case X86_VENDOR_INTEL:
137 if (c->x86 >= 6)
138 save_microcode_in_initrd_intel();
139 break;
140 case X86_VENDOR_AMD:
141 if (c->x86 >= 0x10)
142 save_microcode_in_initrd_amd();
143 break;
144 default:
145 break;
146 }
147
148 return 0;
149}
150
151void reload_early_microcode(void)
152{
153 int vendor, family;
154
155 vendor = x86_vendor();
156 family = x86_family();
157
158 switch (vendor) {
159 case X86_VENDOR_INTEL:
160 if (family >= 6)
161 reload_ucode_intel();
162 break;
163 case X86_VENDOR_AMD:
164 if (family >= 0x10)
165 reload_ucode_amd();
166 break;
167 default:
168 break;
169 }
170}
diff --git a/arch/x86/kernel/cpu/microcode/intel.c b/arch/x86/kernel/cpu/microcode/intel.c
index bfd6fcd242ea..2e09171e5338 100644
--- a/arch/x86/kernel/cpu/microcode/intel.c
+++ b/arch/x86/kernel/cpu/microcode/intel.c
@@ -4,28 +4,814 @@
4 * Copyright (C) 2000-2006 Tigran Aivazian <tigran@aivazian.fsnet.co.uk> 4 * Copyright (C) 2000-2006 Tigran Aivazian <tigran@aivazian.fsnet.co.uk>
5 * 2006 Shaohua Li <shaohua.li@intel.com> 5 * 2006 Shaohua Li <shaohua.li@intel.com>
6 * 6 *
7 * Intel CPU microcode early update for Linux
8 *
9 * Copyright (C) 2012 Fenghua Yu <fenghua.yu@intel.com>
10 * H Peter Anvin" <hpa@zytor.com>
11 *
7 * This program is free software; you can redistribute it and/or 12 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License 13 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version 14 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version. 15 * 2 of the License, or (at your option) any later version.
11 */ 16 */
12 17
18/*
19 * This needs to be before all headers so that pr_debug in printk.h doesn't turn
20 * printk calls into no_printk().
21 *
22 *#define DEBUG
23 */
13#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 24#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
14 25
26#include <linux/earlycpio.h>
15#include <linux/firmware.h> 27#include <linux/firmware.h>
16#include <linux/uaccess.h> 28#include <linux/uaccess.h>
29#include <linux/vmalloc.h>
30#include <linux/initrd.h>
17#include <linux/kernel.h> 31#include <linux/kernel.h>
18#include <linux/module.h> 32#include <linux/module.h>
19#include <linux/vmalloc.h> 33#include <linux/slab.h>
34#include <linux/cpu.h>
35#include <linux/mm.h>
20 36
21#include <asm/microcode_intel.h> 37#include <asm/microcode_intel.h>
22#include <asm/processor.h> 38#include <asm/processor.h>
39#include <asm/tlbflush.h>
40#include <asm/setup.h>
23#include <asm/msr.h> 41#include <asm/msr.h>
24 42
25MODULE_DESCRIPTION("Microcode Update Driver"); 43MODULE_DESCRIPTION("Microcode Update Driver");
26MODULE_AUTHOR("Tigran Aivazian <tigran@aivazian.fsnet.co.uk>"); 44MODULE_AUTHOR("Tigran Aivazian <tigran@aivazian.fsnet.co.uk>");
27MODULE_LICENSE("GPL"); 45MODULE_LICENSE("GPL");
28 46
47static unsigned long mc_saved_in_initrd[MAX_UCODE_COUNT];
48static struct mc_saved_data {
49 unsigned int mc_saved_count;
50 struct microcode_intel **mc_saved;
51} mc_saved_data;
52
53static enum ucode_state
54load_microcode_early(struct microcode_intel **saved,
55 unsigned int num_saved, struct ucode_cpu_info *uci)
56{
57 struct microcode_intel *ucode_ptr, *new_mc = NULL;
58 struct microcode_header_intel *mc_hdr;
59 int new_rev, ret, i;
60
61 new_rev = uci->cpu_sig.rev;
62
63 for (i = 0; i < num_saved; i++) {
64 ucode_ptr = saved[i];
65 mc_hdr = (struct microcode_header_intel *)ucode_ptr;
66
67 ret = has_newer_microcode(ucode_ptr,
68 uci->cpu_sig.sig,
69 uci->cpu_sig.pf,
70 new_rev);
71 if (!ret)
72 continue;
73
74 new_rev = mc_hdr->rev;
75 new_mc = ucode_ptr;
76 }
77
78 if (!new_mc)
79 return UCODE_NFOUND;
80
81 uci->mc = (struct microcode_intel *)new_mc;
82 return UCODE_OK;
83}
84
85static inline void
86copy_initrd_ptrs(struct microcode_intel **mc_saved, unsigned long *initrd,
87 unsigned long off, int num_saved)
88{
89 int i;
90
91 for (i = 0; i < num_saved; i++)
92 mc_saved[i] = (struct microcode_intel *)(initrd[i] + off);
93}
94
95#ifdef CONFIG_X86_32
96static void
97microcode_phys(struct microcode_intel **mc_saved_tmp,
98 struct mc_saved_data *mc_saved_data)
99{
100 int i;
101 struct microcode_intel ***mc_saved;
102
103 mc_saved = (struct microcode_intel ***)
104 __pa_nodebug(&mc_saved_data->mc_saved);
105 for (i = 0; i < mc_saved_data->mc_saved_count; i++) {
106 struct microcode_intel *p;
107
108 p = *(struct microcode_intel **)
109 __pa_nodebug(mc_saved_data->mc_saved + i);
110 mc_saved_tmp[i] = (struct microcode_intel *)__pa_nodebug(p);
111 }
112}
113#endif
114
115static enum ucode_state
116load_microcode(struct mc_saved_data *mc_saved_data, unsigned long *initrd,
117 unsigned long initrd_start, struct ucode_cpu_info *uci)
118{
119 struct microcode_intel *mc_saved_tmp[MAX_UCODE_COUNT];
120 unsigned int count = mc_saved_data->mc_saved_count;
121
122 if (!mc_saved_data->mc_saved) {
123 copy_initrd_ptrs(mc_saved_tmp, initrd, initrd_start, count);
124
125 return load_microcode_early(mc_saved_tmp, count, uci);
126 } else {
127#ifdef CONFIG_X86_32
128 microcode_phys(mc_saved_tmp, mc_saved_data);
129 return load_microcode_early(mc_saved_tmp, count, uci);
130#else
131 return load_microcode_early(mc_saved_data->mc_saved,
132 count, uci);
133#endif
134 }
135}
136
137/*
138 * Given CPU signature and a microcode patch, this function finds if the
139 * microcode patch has matching family and model with the CPU.
140 */
141static enum ucode_state
142matching_model_microcode(struct microcode_header_intel *mc_header,
143 unsigned long sig)
144{
145 unsigned int fam, model;
146 unsigned int fam_ucode, model_ucode;
147 struct extended_sigtable *ext_header;
148 unsigned long total_size = get_totalsize(mc_header);
149 unsigned long data_size = get_datasize(mc_header);
150 int ext_sigcount, i;
151 struct extended_signature *ext_sig;
152
153 fam = __x86_family(sig);
154 model = x86_model(sig);
155
156 fam_ucode = __x86_family(mc_header->sig);
157 model_ucode = x86_model(mc_header->sig);
158
159 if (fam == fam_ucode && model == model_ucode)
160 return UCODE_OK;
161
162 /* Look for ext. headers: */
163 if (total_size <= data_size + MC_HEADER_SIZE)
164 return UCODE_NFOUND;
165
166 ext_header = (void *) mc_header + data_size + MC_HEADER_SIZE;
167 ext_sig = (void *)ext_header + EXT_HEADER_SIZE;
168 ext_sigcount = ext_header->count;
169
170 for (i = 0; i < ext_sigcount; i++) {
171 fam_ucode = __x86_family(ext_sig->sig);
172 model_ucode = x86_model(ext_sig->sig);
173
174 if (fam == fam_ucode && model == model_ucode)
175 return UCODE_OK;
176
177 ext_sig++;
178 }
179 return UCODE_NFOUND;
180}
181
182static int
183save_microcode(struct mc_saved_data *mc_saved_data,
184 struct microcode_intel **mc_saved_src,
185 unsigned int mc_saved_count)
186{
187 int i, j;
188 struct microcode_intel **saved_ptr;
189 int ret;
190
191 if (!mc_saved_count)
192 return -EINVAL;
193
194 /*
195 * Copy new microcode data.
196 */
197 saved_ptr = kcalloc(mc_saved_count, sizeof(struct microcode_intel *), GFP_KERNEL);
198 if (!saved_ptr)
199 return -ENOMEM;
200
201 for (i = 0; i < mc_saved_count; i++) {
202 struct microcode_header_intel *mc_hdr;
203 struct microcode_intel *mc;
204 unsigned long size;
205
206 if (!mc_saved_src[i]) {
207 ret = -EINVAL;
208 goto err;
209 }
210
211 mc = mc_saved_src[i];
212 mc_hdr = &mc->hdr;
213 size = get_totalsize(mc_hdr);
214
215 saved_ptr[i] = kmalloc(size, GFP_KERNEL);
216 if (!saved_ptr[i]) {
217 ret = -ENOMEM;
218 goto err;
219 }
220
221 memcpy(saved_ptr[i], mc, size);
222 }
223
224 /*
225 * Point to newly saved microcode.
226 */
227 mc_saved_data->mc_saved = saved_ptr;
228 mc_saved_data->mc_saved_count = mc_saved_count;
229
230 return 0;
231
232err:
233 for (j = 0; j <= i; j++)
234 kfree(saved_ptr[j]);
235 kfree(saved_ptr);
236
237 return ret;
238}
239
240/*
241 * A microcode patch in ucode_ptr is saved into mc_saved
242 * - if it has matching signature and newer revision compared to an existing
243 * patch mc_saved.
244 * - or if it is a newly discovered microcode patch.
245 *
246 * The microcode patch should have matching model with CPU.
247 *
248 * Returns: The updated number @num_saved of saved microcode patches.
249 */
250static unsigned int _save_mc(struct microcode_intel **mc_saved,
251 u8 *ucode_ptr, unsigned int num_saved)
252{
253 struct microcode_header_intel *mc_hdr, *mc_saved_hdr;
254 unsigned int sig, pf;
255 int found = 0, i;
256
257 mc_hdr = (struct microcode_header_intel *)ucode_ptr;
258
259 for (i = 0; i < num_saved; i++) {
260 mc_saved_hdr = (struct microcode_header_intel *)mc_saved[i];
261 sig = mc_saved_hdr->sig;
262 pf = mc_saved_hdr->pf;
263
264 if (!find_matching_signature(ucode_ptr, sig, pf))
265 continue;
266
267 found = 1;
268
269 if (mc_hdr->rev <= mc_saved_hdr->rev)
270 continue;
271
272 /*
273 * Found an older ucode saved earlier. Replace it with
274 * this newer one.
275 */
276 mc_saved[i] = (struct microcode_intel *)ucode_ptr;
277 break;
278 }
279
280 /* Newly detected microcode, save it to memory. */
281 if (i >= num_saved && !found)
282 mc_saved[num_saved++] = (struct microcode_intel *)ucode_ptr;
283
284 return num_saved;
285}
286
287/*
288 * Get microcode matching with BSP's model. Only CPUs with the same model as
289 * BSP can stay in the platform.
290 */
291static enum ucode_state __init
292get_matching_model_microcode(int cpu, unsigned long start,
293 void *data, size_t size,
294 struct mc_saved_data *mc_saved_data,
295 unsigned long *mc_saved_in_initrd,
296 struct ucode_cpu_info *uci)
297{
298 u8 *ucode_ptr = data;
299 unsigned int leftover = size;
300 enum ucode_state state = UCODE_OK;
301 unsigned int mc_size;
302 struct microcode_header_intel *mc_header;
303 struct microcode_intel *mc_saved_tmp[MAX_UCODE_COUNT];
304 unsigned int mc_saved_count = mc_saved_data->mc_saved_count;
305 int i;
306
307 while (leftover && mc_saved_count < ARRAY_SIZE(mc_saved_tmp)) {
308
309 if (leftover < sizeof(mc_header))
310 break;
311
312 mc_header = (struct microcode_header_intel *)ucode_ptr;
313
314 mc_size = get_totalsize(mc_header);
315 if (!mc_size || mc_size > leftover ||
316 microcode_sanity_check(ucode_ptr, 0) < 0)
317 break;
318
319 leftover -= mc_size;
320
321 /*
322 * Since APs with same family and model as the BSP may boot in
323 * the platform, we need to find and save microcode patches
324 * with the same family and model as the BSP.
325 */
326 if (matching_model_microcode(mc_header, uci->cpu_sig.sig) !=
327 UCODE_OK) {
328 ucode_ptr += mc_size;
329 continue;
330 }
331
332 mc_saved_count = _save_mc(mc_saved_tmp, ucode_ptr, mc_saved_count);
333
334 ucode_ptr += mc_size;
335 }
336
337 if (leftover) {
338 state = UCODE_ERROR;
339 goto out;
340 }
341
342 if (mc_saved_count == 0) {
343 state = UCODE_NFOUND;
344 goto out;
345 }
346
347 for (i = 0; i < mc_saved_count; i++)
348 mc_saved_in_initrd[i] = (unsigned long)mc_saved_tmp[i] - start;
349
350 mc_saved_data->mc_saved_count = mc_saved_count;
351out:
352 return state;
353}
354
355static int collect_cpu_info_early(struct ucode_cpu_info *uci)
356{
357 unsigned int val[2];
358 unsigned int family, model;
359 struct cpu_signature csig;
360 unsigned int eax, ebx, ecx, edx;
361
362 csig.sig = 0;
363 csig.pf = 0;
364 csig.rev = 0;
365
366 memset(uci, 0, sizeof(*uci));
367
368 eax = 0x00000001;
369 ecx = 0;
370 native_cpuid(&eax, &ebx, &ecx, &edx);
371 csig.sig = eax;
372
373 family = __x86_family(csig.sig);
374 model = x86_model(csig.sig);
375
376 if ((model >= 5) || (family > 6)) {
377 /* get processor flags from MSR 0x17 */
378 native_rdmsr(MSR_IA32_PLATFORM_ID, val[0], val[1]);
379 csig.pf = 1 << ((val[1] >> 18) & 7);
380 }
381 native_wrmsr(MSR_IA32_UCODE_REV, 0, 0);
382
383 /* As documented in the SDM: Do a CPUID 1 here */
384 sync_core();
385
386 /* get the current revision from MSR 0x8B */
387 native_rdmsr(MSR_IA32_UCODE_REV, val[0], val[1]);
388
389 csig.rev = val[1];
390
391 uci->cpu_sig = csig;
392 uci->valid = 1;
393
394 return 0;
395}
396
397#ifdef DEBUG
398static void show_saved_mc(void)
399{
400 int i, j;
401 unsigned int sig, pf, rev, total_size, data_size, date;
402 struct ucode_cpu_info uci;
403
404 if (mc_saved_data.mc_saved_count == 0) {
405 pr_debug("no microcode data saved.\n");
406 return;
407 }
408 pr_debug("Total microcode saved: %d\n", mc_saved_data.mc_saved_count);
409
410 collect_cpu_info_early(&uci);
411
412 sig = uci.cpu_sig.sig;
413 pf = uci.cpu_sig.pf;
414 rev = uci.cpu_sig.rev;
415 pr_debug("CPU: sig=0x%x, pf=0x%x, rev=0x%x\n", sig, pf, rev);
416
417 for (i = 0; i < mc_saved_data.mc_saved_count; i++) {
418 struct microcode_header_intel *mc_saved_header;
419 struct extended_sigtable *ext_header;
420 int ext_sigcount;
421 struct extended_signature *ext_sig;
422
423 mc_saved_header = (struct microcode_header_intel *)
424 mc_saved_data.mc_saved[i];
425 sig = mc_saved_header->sig;
426 pf = mc_saved_header->pf;
427 rev = mc_saved_header->rev;
428 total_size = get_totalsize(mc_saved_header);
429 data_size = get_datasize(mc_saved_header);
430 date = mc_saved_header->date;
431
432 pr_debug("mc_saved[%d]: sig=0x%x, pf=0x%x, rev=0x%x, toal size=0x%x, date = %04x-%02x-%02x\n",
433 i, sig, pf, rev, total_size,
434 date & 0xffff,
435 date >> 24,
436 (date >> 16) & 0xff);
437
438 /* Look for ext. headers: */
439 if (total_size <= data_size + MC_HEADER_SIZE)
440 continue;
441
442 ext_header = (void *) mc_saved_header + data_size + MC_HEADER_SIZE;
443 ext_sigcount = ext_header->count;
444 ext_sig = (void *)ext_header + EXT_HEADER_SIZE;
445
446 for (j = 0; j < ext_sigcount; j++) {
447 sig = ext_sig->sig;
448 pf = ext_sig->pf;
449
450 pr_debug("\tExtended[%d]: sig=0x%x, pf=0x%x\n",
451 j, sig, pf);
452
453 ext_sig++;
454 }
455
456 }
457}
458#else
459static inline void show_saved_mc(void)
460{
461}
462#endif
463
464#ifdef CONFIG_HOTPLUG_CPU
465static DEFINE_MUTEX(x86_cpu_microcode_mutex);
466/*
467 * Save this mc into mc_saved_data. So it will be loaded early when a CPU is
468 * hot added or resumes.
469 *
470 * Please make sure this mc should be a valid microcode patch before calling
471 * this function.
472 */
473int save_mc_for_early(u8 *mc)
474{
475 struct microcode_intel *mc_saved_tmp[MAX_UCODE_COUNT];
476 unsigned int mc_saved_count_init;
477 unsigned int mc_saved_count;
478 struct microcode_intel **mc_saved;
479 int ret = 0;
480 int i;
481
482 /*
483 * Hold hotplug lock so mc_saved_data is not accessed by a CPU in
484 * hotplug.
485 */
486 mutex_lock(&x86_cpu_microcode_mutex);
487
488 mc_saved_count_init = mc_saved_data.mc_saved_count;
489 mc_saved_count = mc_saved_data.mc_saved_count;
490 mc_saved = mc_saved_data.mc_saved;
491
492 if (mc_saved && mc_saved_count)
493 memcpy(mc_saved_tmp, mc_saved,
494 mc_saved_count * sizeof(struct microcode_intel *));
495 /*
496 * Save the microcode patch mc in mc_save_tmp structure if it's a newer
497 * version.
498 */
499 mc_saved_count = _save_mc(mc_saved_tmp, mc, mc_saved_count);
500
501 /*
502 * Save the mc_save_tmp in global mc_saved_data.
503 */
504 ret = save_microcode(&mc_saved_data, mc_saved_tmp, mc_saved_count);
505 if (ret) {
506 pr_err("Cannot save microcode patch.\n");
507 goto out;
508 }
509
510 show_saved_mc();
511
512 /*
513 * Free old saved microcode data.
514 */
515 if (mc_saved) {
516 for (i = 0; i < mc_saved_count_init; i++)
517 kfree(mc_saved[i]);
518 kfree(mc_saved);
519 }
520
521out:
522 mutex_unlock(&x86_cpu_microcode_mutex);
523
524 return ret;
525}
526EXPORT_SYMBOL_GPL(save_mc_for_early);
527#endif
528
529static bool __init load_builtin_intel_microcode(struct cpio_data *cp)
530{
531#ifdef CONFIG_X86_64
532 unsigned int eax = 0x00000001, ebx, ecx = 0, edx;
533 unsigned int family, model, stepping;
534 char name[30];
535
536 native_cpuid(&eax, &ebx, &ecx, &edx);
537
538 family = __x86_family(eax);
539 model = x86_model(eax);
540 stepping = eax & 0xf;
541
542 sprintf(name, "intel-ucode/%02x-%02x-%02x", family, model, stepping);
543
544 return get_builtin_firmware(cp, name);
545#else
546 return false;
547#endif
548}
549
550static __initdata char ucode_name[] = "kernel/x86/microcode/GenuineIntel.bin";
551static __init enum ucode_state
552scan_microcode(struct mc_saved_data *mc_saved_data, unsigned long *initrd,
553 unsigned long start, unsigned long size,
554 struct ucode_cpu_info *uci)
555{
556 struct cpio_data cd;
557 long offset = 0;
558#ifdef CONFIG_X86_32
559 char *p = (char *)__pa_nodebug(ucode_name);
560#else
561 char *p = ucode_name;
562#endif
563
564 cd.data = NULL;
565 cd.size = 0;
566
567 cd = find_cpio_data(p, (void *)start, size, &offset);
568 if (!cd.data) {
569 if (!load_builtin_intel_microcode(&cd))
570 return UCODE_ERROR;
571 }
572
573 return get_matching_model_microcode(0, start, cd.data, cd.size,
574 mc_saved_data, initrd, uci);
575}
576
577/*
578 * Print ucode update info.
579 */
580static void
581print_ucode_info(struct ucode_cpu_info *uci, unsigned int date)
582{
583 int cpu = smp_processor_id();
584
585 pr_info("CPU%d microcode updated early to revision 0x%x, date = %04x-%02x-%02x\n",
586 cpu,
587 uci->cpu_sig.rev,
588 date & 0xffff,
589 date >> 24,
590 (date >> 16) & 0xff);
591}
592
593#ifdef CONFIG_X86_32
594
595static int delay_ucode_info;
596static int current_mc_date;
597
598/*
599 * Print early updated ucode info after printk works. This is delayed info dump.
600 */
601void show_ucode_info_early(void)
602{
603 struct ucode_cpu_info uci;
604
605 if (delay_ucode_info) {
606 collect_cpu_info_early(&uci);
607 print_ucode_info(&uci, current_mc_date);
608 delay_ucode_info = 0;
609 }
610}
611
612/*
613 * At this point, we can not call printk() yet. Keep microcode patch number in
614 * mc_saved_data.mc_saved and delay printing microcode info in
615 * show_ucode_info_early() until printk() works.
616 */
617static void print_ucode(struct ucode_cpu_info *uci)
618{
619 struct microcode_intel *mc_intel;
620 int *delay_ucode_info_p;
621 int *current_mc_date_p;
622
623 mc_intel = uci->mc;
624 if (mc_intel == NULL)
625 return;
626
627 delay_ucode_info_p = (int *)__pa_nodebug(&delay_ucode_info);
628 current_mc_date_p = (int *)__pa_nodebug(&current_mc_date);
629
630 *delay_ucode_info_p = 1;
631 *current_mc_date_p = mc_intel->hdr.date;
632}
633#else
634
635/*
636 * Flush global tlb. We only do this in x86_64 where paging has been enabled
637 * already and PGE should be enabled as well.
638 */
639static inline void flush_tlb_early(void)
640{
641 __native_flush_tlb_global_irq_disabled();
642}
643
644static inline void print_ucode(struct ucode_cpu_info *uci)
645{
646 struct microcode_intel *mc_intel;
647
648 mc_intel = uci->mc;
649 if (mc_intel == NULL)
650 return;
651
652 print_ucode_info(uci, mc_intel->hdr.date);
653}
654#endif
655
656static int apply_microcode_early(struct ucode_cpu_info *uci, bool early)
657{
658 struct microcode_intel *mc_intel;
659 unsigned int val[2];
660
661 mc_intel = uci->mc;
662 if (mc_intel == NULL)
663 return 0;
664
665 /* write microcode via MSR 0x79 */
666 native_wrmsr(MSR_IA32_UCODE_WRITE,
667 (unsigned long) mc_intel->bits,
668 (unsigned long) mc_intel->bits >> 16 >> 16);
669 native_wrmsr(MSR_IA32_UCODE_REV, 0, 0);
670
671 /* As documented in the SDM: Do a CPUID 1 here */
672 sync_core();
673
674 /* get the current revision from MSR 0x8B */
675 native_rdmsr(MSR_IA32_UCODE_REV, val[0], val[1]);
676 if (val[1] != mc_intel->hdr.rev)
677 return -1;
678
679#ifdef CONFIG_X86_64
680 /* Flush global tlb. This is precaution. */
681 flush_tlb_early();
682#endif
683 uci->cpu_sig.rev = val[1];
684
685 if (early)
686 print_ucode(uci);
687 else
688 print_ucode_info(uci, mc_intel->hdr.date);
689
690 return 0;
691}
692
693/*
694 * This function converts microcode patch offsets previously stored in
695 * mc_saved_in_initrd to pointers and stores the pointers in mc_saved_data.
696 */
697int __init save_microcode_in_initrd_intel(void)
698{
699 unsigned int count = mc_saved_data.mc_saved_count;
700 struct microcode_intel *mc_saved[MAX_UCODE_COUNT];
701 int ret = 0;
702
703 if (count == 0)
704 return ret;
705
706 copy_initrd_ptrs(mc_saved, mc_saved_in_initrd, initrd_start, count);
707 ret = save_microcode(&mc_saved_data, mc_saved, count);
708 if (ret)
709 pr_err("Cannot save microcode patches from initrd.\n");
710
711 show_saved_mc();
712
713 return ret;
714}
715
716static void __init
717_load_ucode_intel_bsp(struct mc_saved_data *mc_saved_data,
718 unsigned long *initrd,
719 unsigned long start, unsigned long size)
720{
721 struct ucode_cpu_info uci;
722 enum ucode_state ret;
723
724 collect_cpu_info_early(&uci);
725
726 ret = scan_microcode(mc_saved_data, initrd, start, size, &uci);
727 if (ret != UCODE_OK)
728 return;
729
730 ret = load_microcode(mc_saved_data, initrd, start, &uci);
731 if (ret != UCODE_OK)
732 return;
733
734 apply_microcode_early(&uci, true);
735}
736
737void __init load_ucode_intel_bsp(void)
738{
739 u64 start, size;
740#ifdef CONFIG_X86_32
741 struct boot_params *p;
742
743 p = (struct boot_params *)__pa_nodebug(&boot_params);
744 start = p->hdr.ramdisk_image;
745 size = p->hdr.ramdisk_size;
746
747 _load_ucode_intel_bsp(
748 (struct mc_saved_data *)__pa_nodebug(&mc_saved_data),
749 (unsigned long *)__pa_nodebug(&mc_saved_in_initrd),
750 start, size);
751#else
752 start = boot_params.hdr.ramdisk_image + PAGE_OFFSET;
753 size = boot_params.hdr.ramdisk_size;
754
755 _load_ucode_intel_bsp(&mc_saved_data, mc_saved_in_initrd, start, size);
756#endif
757}
758
759void load_ucode_intel_ap(void)
760{
761 struct mc_saved_data *mc_saved_data_p;
762 struct ucode_cpu_info uci;
763 unsigned long *mc_saved_in_initrd_p;
764 unsigned long initrd_start_addr;
765 enum ucode_state ret;
766#ifdef CONFIG_X86_32
767 unsigned long *initrd_start_p;
768
769 mc_saved_in_initrd_p =
770 (unsigned long *)__pa_nodebug(mc_saved_in_initrd);
771 mc_saved_data_p = (struct mc_saved_data *)__pa_nodebug(&mc_saved_data);
772 initrd_start_p = (unsigned long *)__pa_nodebug(&initrd_start);
773 initrd_start_addr = (unsigned long)__pa_nodebug(*initrd_start_p);
774#else
775 mc_saved_data_p = &mc_saved_data;
776 mc_saved_in_initrd_p = mc_saved_in_initrd;
777 initrd_start_addr = initrd_start;
778#endif
779
780 /*
781 * If there is no valid ucode previously saved in memory, no need to
782 * update ucode on this AP.
783 */
784 if (mc_saved_data_p->mc_saved_count == 0)
785 return;
786
787 collect_cpu_info_early(&uci);
788 ret = load_microcode(mc_saved_data_p, mc_saved_in_initrd_p,
789 initrd_start_addr, &uci);
790
791 if (ret != UCODE_OK)
792 return;
793
794 apply_microcode_early(&uci, true);
795}
796
797void reload_ucode_intel(void)
798{
799 struct ucode_cpu_info uci;
800 enum ucode_state ret;
801
802 if (!mc_saved_data.mc_saved_count)
803 return;
804
805 collect_cpu_info_early(&uci);
806
807 ret = load_microcode_early(mc_saved_data.mc_saved,
808 mc_saved_data.mc_saved_count, &uci);
809 if (ret != UCODE_OK)
810 return;
811
812 apply_microcode_early(&uci, false);
813}
814
29static int collect_cpu_info(int cpu_num, struct cpu_signature *csig) 815static int collect_cpu_info(int cpu_num, struct cpu_signature *csig)
30{ 816{
31 struct cpuinfo_x86 *c = &cpu_data(cpu_num); 817 struct cpuinfo_x86 *c = &cpu_data(cpu_num);
diff --git a/arch/x86/kernel/cpu/microcode/intel_early.c b/arch/x86/kernel/cpu/microcode/intel_early.c
deleted file mode 100644
index 37ea89c11520..000000000000
--- a/arch/x86/kernel/cpu/microcode/intel_early.c
+++ /dev/null
@@ -1,808 +0,0 @@
1/*
2 * Intel CPU microcode early update for Linux
3 *
4 * Copyright (C) 2012 Fenghua Yu <fenghua.yu@intel.com>
5 * H Peter Anvin" <hpa@zytor.com>
6 *
7 * This allows to early upgrade microcode on Intel processors
8 * belonging to IA-32 family - PentiumPro, Pentium II,
9 * Pentium III, Xeon, Pentium 4, etc.
10 *
11 * Reference: Section 9.11 of Volume 3, IA-32 Intel Architecture
12 * Software Developer's Manual.
13 *
14 * This program is free software; you can redistribute it and/or
15 * modify it under the terms of the GNU General Public License
16 * as published by the Free Software Foundation; either version
17 * 2 of the License, or (at your option) any later version.
18 */
19
20/*
21 * This needs to be before all headers so that pr_debug in printk.h doesn't turn
22 * printk calls into no_printk().
23 *
24 *#define DEBUG
25 */
26
27#include <linux/module.h>
28#include <linux/mm.h>
29#include <linux/slab.h>
30#include <linux/earlycpio.h>
31#include <linux/initrd.h>
32#include <linux/cpu.h>
33#include <asm/msr.h>
34#include <asm/microcode_intel.h>
35#include <asm/processor.h>
36#include <asm/tlbflush.h>
37#include <asm/setup.h>
38
39#undef pr_fmt
40#define pr_fmt(fmt) "microcode: " fmt
41
42static unsigned long mc_saved_in_initrd[MAX_UCODE_COUNT];
43static struct mc_saved_data {
44 unsigned int mc_saved_count;
45 struct microcode_intel **mc_saved;
46} mc_saved_data;
47
48static enum ucode_state
49load_microcode_early(struct microcode_intel **saved,
50 unsigned int num_saved, struct ucode_cpu_info *uci)
51{
52 struct microcode_intel *ucode_ptr, *new_mc = NULL;
53 struct microcode_header_intel *mc_hdr;
54 int new_rev, ret, i;
55
56 new_rev = uci->cpu_sig.rev;
57
58 for (i = 0; i < num_saved; i++) {
59 ucode_ptr = saved[i];
60 mc_hdr = (struct microcode_header_intel *)ucode_ptr;
61
62 ret = has_newer_microcode(ucode_ptr,
63 uci->cpu_sig.sig,
64 uci->cpu_sig.pf,
65 new_rev);
66 if (!ret)
67 continue;
68
69 new_rev = mc_hdr->rev;
70 new_mc = ucode_ptr;
71 }
72
73 if (!new_mc)
74 return UCODE_NFOUND;
75
76 uci->mc = (struct microcode_intel *)new_mc;
77 return UCODE_OK;
78}
79
80static inline void
81copy_initrd_ptrs(struct microcode_intel **mc_saved, unsigned long *initrd,
82 unsigned long off, int num_saved)
83{
84 int i;
85
86 for (i = 0; i < num_saved; i++)
87 mc_saved[i] = (struct microcode_intel *)(initrd[i] + off);
88}
89
90#ifdef CONFIG_X86_32
91static void
92microcode_phys(struct microcode_intel **mc_saved_tmp,
93 struct mc_saved_data *mc_saved_data)
94{
95 int i;
96 struct microcode_intel ***mc_saved;
97
98 mc_saved = (struct microcode_intel ***)
99 __pa_nodebug(&mc_saved_data->mc_saved);
100 for (i = 0; i < mc_saved_data->mc_saved_count; i++) {
101 struct microcode_intel *p;
102
103 p = *(struct microcode_intel **)
104 __pa_nodebug(mc_saved_data->mc_saved + i);
105 mc_saved_tmp[i] = (struct microcode_intel *)__pa_nodebug(p);
106 }
107}
108#endif
109
110static enum ucode_state
111load_microcode(struct mc_saved_data *mc_saved_data, unsigned long *initrd,
112 unsigned long initrd_start, struct ucode_cpu_info *uci)
113{
114 struct microcode_intel *mc_saved_tmp[MAX_UCODE_COUNT];
115 unsigned int count = mc_saved_data->mc_saved_count;
116
117 if (!mc_saved_data->mc_saved) {
118 copy_initrd_ptrs(mc_saved_tmp, initrd, initrd_start, count);
119
120 return load_microcode_early(mc_saved_tmp, count, uci);
121 } else {
122#ifdef CONFIG_X86_32
123 microcode_phys(mc_saved_tmp, mc_saved_data);
124 return load_microcode_early(mc_saved_tmp, count, uci);
125#else
126 return load_microcode_early(mc_saved_data->mc_saved,
127 count, uci);
128#endif
129 }
130}
131
132/*
133 * Given CPU signature and a microcode patch, this function finds if the
134 * microcode patch has matching family and model with the CPU.
135 */
136static enum ucode_state
137matching_model_microcode(struct microcode_header_intel *mc_header,
138 unsigned long sig)
139{
140 unsigned int fam, model;
141 unsigned int fam_ucode, model_ucode;
142 struct extended_sigtable *ext_header;
143 unsigned long total_size = get_totalsize(mc_header);
144 unsigned long data_size = get_datasize(mc_header);
145 int ext_sigcount, i;
146 struct extended_signature *ext_sig;
147
148 fam = __x86_family(sig);
149 model = x86_model(sig);
150
151 fam_ucode = __x86_family(mc_header->sig);
152 model_ucode = x86_model(mc_header->sig);
153
154 if (fam == fam_ucode && model == model_ucode)
155 return UCODE_OK;
156
157 /* Look for ext. headers: */
158 if (total_size <= data_size + MC_HEADER_SIZE)
159 return UCODE_NFOUND;
160
161 ext_header = (void *) mc_header + data_size + MC_HEADER_SIZE;
162 ext_sig = (void *)ext_header + EXT_HEADER_SIZE;
163 ext_sigcount = ext_header->count;
164
165 for (i = 0; i < ext_sigcount; i++) {
166 fam_ucode = __x86_family(ext_sig->sig);
167 model_ucode = x86_model(ext_sig->sig);
168
169 if (fam == fam_ucode && model == model_ucode)
170 return UCODE_OK;
171
172 ext_sig++;
173 }
174 return UCODE_NFOUND;
175}
176
177static int
178save_microcode(struct mc_saved_data *mc_saved_data,
179 struct microcode_intel **mc_saved_src,
180 unsigned int mc_saved_count)
181{
182 int i, j;
183 struct microcode_intel **saved_ptr;
184 int ret;
185
186 if (!mc_saved_count)
187 return -EINVAL;
188
189 /*
190 * Copy new microcode data.
191 */
192 saved_ptr = kcalloc(mc_saved_count, sizeof(struct microcode_intel *), GFP_KERNEL);
193 if (!saved_ptr)
194 return -ENOMEM;
195
196 for (i = 0; i < mc_saved_count; i++) {
197 struct microcode_header_intel *mc_hdr;
198 struct microcode_intel *mc;
199 unsigned long size;
200
201 if (!mc_saved_src[i]) {
202 ret = -EINVAL;
203 goto err;
204 }
205
206 mc = mc_saved_src[i];
207 mc_hdr = &mc->hdr;
208 size = get_totalsize(mc_hdr);
209
210 saved_ptr[i] = kmalloc(size, GFP_KERNEL);
211 if (!saved_ptr[i]) {
212 ret = -ENOMEM;
213 goto err;
214 }
215
216 memcpy(saved_ptr[i], mc, size);
217 }
218
219 /*
220 * Point to newly saved microcode.
221 */
222 mc_saved_data->mc_saved = saved_ptr;
223 mc_saved_data->mc_saved_count = mc_saved_count;
224
225 return 0;
226
227err:
228 for (j = 0; j <= i; j++)
229 kfree(saved_ptr[j]);
230 kfree(saved_ptr);
231
232 return ret;
233}
234
235/*
236 * A microcode patch in ucode_ptr is saved into mc_saved
237 * - if it has matching signature and newer revision compared to an existing
238 * patch mc_saved.
239 * - or if it is a newly discovered microcode patch.
240 *
241 * The microcode patch should have matching model with CPU.
242 *
243 * Returns: The updated number @num_saved of saved microcode patches.
244 */
245static unsigned int _save_mc(struct microcode_intel **mc_saved,
246 u8 *ucode_ptr, unsigned int num_saved)
247{
248 struct microcode_header_intel *mc_hdr, *mc_saved_hdr;
249 unsigned int sig, pf;
250 int found = 0, i;
251
252 mc_hdr = (struct microcode_header_intel *)ucode_ptr;
253
254 for (i = 0; i < num_saved; i++) {
255 mc_saved_hdr = (struct microcode_header_intel *)mc_saved[i];
256 sig = mc_saved_hdr->sig;
257 pf = mc_saved_hdr->pf;
258
259 if (!find_matching_signature(ucode_ptr, sig, pf))
260 continue;
261
262 found = 1;
263
264 if (mc_hdr->rev <= mc_saved_hdr->rev)
265 continue;
266
267 /*
268 * Found an older ucode saved earlier. Replace it with
269 * this newer one.
270 */
271 mc_saved[i] = (struct microcode_intel *)ucode_ptr;
272 break;
273 }
274
275 /* Newly detected microcode, save it to memory. */
276 if (i >= num_saved && !found)
277 mc_saved[num_saved++] = (struct microcode_intel *)ucode_ptr;
278
279 return num_saved;
280}
281
282/*
283 * Get microcode matching with BSP's model. Only CPUs with the same model as
284 * BSP can stay in the platform.
285 */
286static enum ucode_state __init
287get_matching_model_microcode(int cpu, unsigned long start,
288 void *data, size_t size,
289 struct mc_saved_data *mc_saved_data,
290 unsigned long *mc_saved_in_initrd,
291 struct ucode_cpu_info *uci)
292{
293 u8 *ucode_ptr = data;
294 unsigned int leftover = size;
295 enum ucode_state state = UCODE_OK;
296 unsigned int mc_size;
297 struct microcode_header_intel *mc_header;
298 struct microcode_intel *mc_saved_tmp[MAX_UCODE_COUNT];
299 unsigned int mc_saved_count = mc_saved_data->mc_saved_count;
300 int i;
301
302 while (leftover && mc_saved_count < ARRAY_SIZE(mc_saved_tmp)) {
303
304 if (leftover < sizeof(mc_header))
305 break;
306
307 mc_header = (struct microcode_header_intel *)ucode_ptr;
308
309 mc_size = get_totalsize(mc_header);
310 if (!mc_size || mc_size > leftover ||
311 microcode_sanity_check(ucode_ptr, 0) < 0)
312 break;
313
314 leftover -= mc_size;
315
316 /*
317 * Since APs with same family and model as the BSP may boot in
318 * the platform, we need to find and save microcode patches
319 * with the same family and model as the BSP.
320 */
321 if (matching_model_microcode(mc_header, uci->cpu_sig.sig) !=
322 UCODE_OK) {
323 ucode_ptr += mc_size;
324 continue;
325 }
326
327 mc_saved_count = _save_mc(mc_saved_tmp, ucode_ptr, mc_saved_count);
328
329 ucode_ptr += mc_size;
330 }
331
332 if (leftover) {
333 state = UCODE_ERROR;
334 goto out;
335 }
336
337 if (mc_saved_count == 0) {
338 state = UCODE_NFOUND;
339 goto out;
340 }
341
342 for (i = 0; i < mc_saved_count; i++)
343 mc_saved_in_initrd[i] = (unsigned long)mc_saved_tmp[i] - start;
344
345 mc_saved_data->mc_saved_count = mc_saved_count;
346out:
347 return state;
348}
349
350static int collect_cpu_info_early(struct ucode_cpu_info *uci)
351{
352 unsigned int val[2];
353 unsigned int family, model;
354 struct cpu_signature csig;
355 unsigned int eax, ebx, ecx, edx;
356
357 csig.sig = 0;
358 csig.pf = 0;
359 csig.rev = 0;
360
361 memset(uci, 0, sizeof(*uci));
362
363 eax = 0x00000001;
364 ecx = 0;
365 native_cpuid(&eax, &ebx, &ecx, &edx);
366 csig.sig = eax;
367
368 family = __x86_family(csig.sig);
369 model = x86_model(csig.sig);
370
371 if ((model >= 5) || (family > 6)) {
372 /* get processor flags from MSR 0x17 */
373 native_rdmsr(MSR_IA32_PLATFORM_ID, val[0], val[1]);
374 csig.pf = 1 << ((val[1] >> 18) & 7);
375 }
376 native_wrmsr(MSR_IA32_UCODE_REV, 0, 0);
377
378 /* As documented in the SDM: Do a CPUID 1 here */
379 sync_core();
380
381 /* get the current revision from MSR 0x8B */
382 native_rdmsr(MSR_IA32_UCODE_REV, val[0], val[1]);
383
384 csig.rev = val[1];
385
386 uci->cpu_sig = csig;
387 uci->valid = 1;
388
389 return 0;
390}
391
392#ifdef DEBUG
393static void show_saved_mc(void)
394{
395 int i, j;
396 unsigned int sig, pf, rev, total_size, data_size, date;
397 struct ucode_cpu_info uci;
398
399 if (mc_saved_data.mc_saved_count == 0) {
400 pr_debug("no microcode data saved.\n");
401 return;
402 }
403 pr_debug("Total microcode saved: %d\n", mc_saved_data.mc_saved_count);
404
405 collect_cpu_info_early(&uci);
406
407 sig = uci.cpu_sig.sig;
408 pf = uci.cpu_sig.pf;
409 rev = uci.cpu_sig.rev;
410 pr_debug("CPU: sig=0x%x, pf=0x%x, rev=0x%x\n", sig, pf, rev);
411
412 for (i = 0; i < mc_saved_data.mc_saved_count; i++) {
413 struct microcode_header_intel *mc_saved_header;
414 struct extended_sigtable *ext_header;
415 int ext_sigcount;
416 struct extended_signature *ext_sig;
417
418 mc_saved_header = (struct microcode_header_intel *)
419 mc_saved_data.mc_saved[i];
420 sig = mc_saved_header->sig;
421 pf = mc_saved_header->pf;
422 rev = mc_saved_header->rev;
423 total_size = get_totalsize(mc_saved_header);
424 data_size = get_datasize(mc_saved_header);
425 date = mc_saved_header->date;
426
427 pr_debug("mc_saved[%d]: sig=0x%x, pf=0x%x, rev=0x%x, toal size=0x%x, date = %04x-%02x-%02x\n",
428 i, sig, pf, rev, total_size,
429 date & 0xffff,
430 date >> 24,
431 (date >> 16) & 0xff);
432
433 /* Look for ext. headers: */
434 if (total_size <= data_size + MC_HEADER_SIZE)
435 continue;
436
437 ext_header = (void *) mc_saved_header + data_size + MC_HEADER_SIZE;
438 ext_sigcount = ext_header->count;
439 ext_sig = (void *)ext_header + EXT_HEADER_SIZE;
440
441 for (j = 0; j < ext_sigcount; j++) {
442 sig = ext_sig->sig;
443 pf = ext_sig->pf;
444
445 pr_debug("\tExtended[%d]: sig=0x%x, pf=0x%x\n",
446 j, sig, pf);
447
448 ext_sig++;
449 }
450
451 }
452}
453#else
454static inline void show_saved_mc(void)
455{
456}
457#endif
458
459#if defined(CONFIG_MICROCODE_INTEL_EARLY) && defined(CONFIG_HOTPLUG_CPU)
460static DEFINE_MUTEX(x86_cpu_microcode_mutex);
461/*
462 * Save this mc into mc_saved_data. So it will be loaded early when a CPU is
463 * hot added or resumes.
464 *
465 * Please make sure this mc should be a valid microcode patch before calling
466 * this function.
467 */
468int save_mc_for_early(u8 *mc)
469{
470 struct microcode_intel *mc_saved_tmp[MAX_UCODE_COUNT];
471 unsigned int mc_saved_count_init;
472 unsigned int mc_saved_count;
473 struct microcode_intel **mc_saved;
474 int ret = 0;
475 int i;
476
477 /*
478 * Hold hotplug lock so mc_saved_data is not accessed by a CPU in
479 * hotplug.
480 */
481 mutex_lock(&x86_cpu_microcode_mutex);
482
483 mc_saved_count_init = mc_saved_data.mc_saved_count;
484 mc_saved_count = mc_saved_data.mc_saved_count;
485 mc_saved = mc_saved_data.mc_saved;
486
487 if (mc_saved && mc_saved_count)
488 memcpy(mc_saved_tmp, mc_saved,
489 mc_saved_count * sizeof(struct microcode_intel *));
490 /*
491 * Save the microcode patch mc in mc_save_tmp structure if it's a newer
492 * version.
493 */
494 mc_saved_count = _save_mc(mc_saved_tmp, mc, mc_saved_count);
495
496 /*
497 * Save the mc_save_tmp in global mc_saved_data.
498 */
499 ret = save_microcode(&mc_saved_data, mc_saved_tmp, mc_saved_count);
500 if (ret) {
501 pr_err("Cannot save microcode patch.\n");
502 goto out;
503 }
504
505 show_saved_mc();
506
507 /*
508 * Free old saved microcode data.
509 */
510 if (mc_saved) {
511 for (i = 0; i < mc_saved_count_init; i++)
512 kfree(mc_saved[i]);
513 kfree(mc_saved);
514 }
515
516out:
517 mutex_unlock(&x86_cpu_microcode_mutex);
518
519 return ret;
520}
521EXPORT_SYMBOL_GPL(save_mc_for_early);
522#endif
523
524static bool __init load_builtin_intel_microcode(struct cpio_data *cp)
525{
526#ifdef CONFIG_X86_64
527 unsigned int eax = 0x00000001, ebx, ecx = 0, edx;
528 unsigned int family, model, stepping;
529 char name[30];
530
531 native_cpuid(&eax, &ebx, &ecx, &edx);
532
533 family = __x86_family(eax);
534 model = x86_model(eax);
535 stepping = eax & 0xf;
536
537 sprintf(name, "intel-ucode/%02x-%02x-%02x", family, model, stepping);
538
539 return get_builtin_firmware(cp, name);
540#else
541 return false;
542#endif
543}
544
545static __initdata char ucode_name[] = "kernel/x86/microcode/GenuineIntel.bin";
546static __init enum ucode_state
547scan_microcode(struct mc_saved_data *mc_saved_data, unsigned long *initrd,
548 unsigned long start, unsigned long size,
549 struct ucode_cpu_info *uci)
550{
551 struct cpio_data cd;
552 long offset = 0;
553#ifdef CONFIG_X86_32
554 char *p = (char *)__pa_nodebug(ucode_name);
555#else
556 char *p = ucode_name;
557#endif
558
559 cd.data = NULL;
560 cd.size = 0;
561
562 cd = find_cpio_data(p, (void *)start, size, &offset);
563 if (!cd.data) {
564 if (!load_builtin_intel_microcode(&cd))
565 return UCODE_ERROR;
566 }
567
568 return get_matching_model_microcode(0, start, cd.data, cd.size,
569 mc_saved_data, initrd, uci);
570}
571
572/*
573 * Print ucode update info.
574 */
575static void
576print_ucode_info(struct ucode_cpu_info *uci, unsigned int date)
577{
578 int cpu = smp_processor_id();
579
580 pr_info("CPU%d microcode updated early to revision 0x%x, date = %04x-%02x-%02x\n",
581 cpu,
582 uci->cpu_sig.rev,
583 date & 0xffff,
584 date >> 24,
585 (date >> 16) & 0xff);
586}
587
588#ifdef CONFIG_X86_32
589
590static int delay_ucode_info;
591static int current_mc_date;
592
593/*
594 * Print early updated ucode info after printk works. This is delayed info dump.
595 */
596void show_ucode_info_early(void)
597{
598 struct ucode_cpu_info uci;
599
600 if (delay_ucode_info) {
601 collect_cpu_info_early(&uci);
602 print_ucode_info(&uci, current_mc_date);
603 delay_ucode_info = 0;
604 }
605}
606
607/*
608 * At this point, we can not call printk() yet. Keep microcode patch number in
609 * mc_saved_data.mc_saved and delay printing microcode info in
610 * show_ucode_info_early() until printk() works.
611 */
612static void print_ucode(struct ucode_cpu_info *uci)
613{
614 struct microcode_intel *mc_intel;
615 int *delay_ucode_info_p;
616 int *current_mc_date_p;
617
618 mc_intel = uci->mc;
619 if (mc_intel == NULL)
620 return;
621
622 delay_ucode_info_p = (int *)__pa_nodebug(&delay_ucode_info);
623 current_mc_date_p = (int *)__pa_nodebug(&current_mc_date);
624
625 *delay_ucode_info_p = 1;
626 *current_mc_date_p = mc_intel->hdr.date;
627}
628#else
629
630/*
631 * Flush global tlb. We only do this in x86_64 where paging has been enabled
632 * already and PGE should be enabled as well.
633 */
634static inline void flush_tlb_early(void)
635{
636 __native_flush_tlb_global_irq_disabled();
637}
638
639static inline void print_ucode(struct ucode_cpu_info *uci)
640{
641 struct microcode_intel *mc_intel;
642
643 mc_intel = uci->mc;
644 if (mc_intel == NULL)
645 return;
646
647 print_ucode_info(uci, mc_intel->hdr.date);
648}
649#endif
650
651static int apply_microcode_early(struct ucode_cpu_info *uci, bool early)
652{
653 struct microcode_intel *mc_intel;
654 unsigned int val[2];
655
656 mc_intel = uci->mc;
657 if (mc_intel == NULL)
658 return 0;
659
660 /* write microcode via MSR 0x79 */
661 native_wrmsr(MSR_IA32_UCODE_WRITE,
662 (unsigned long) mc_intel->bits,
663 (unsigned long) mc_intel->bits >> 16 >> 16);
664 native_wrmsr(MSR_IA32_UCODE_REV, 0, 0);
665
666 /* As documented in the SDM: Do a CPUID 1 here */
667 sync_core();
668
669 /* get the current revision from MSR 0x8B */
670 native_rdmsr(MSR_IA32_UCODE_REV, val[0], val[1]);
671 if (val[1] != mc_intel->hdr.rev)
672 return -1;
673
674#ifdef CONFIG_X86_64
675 /* Flush global tlb. This is precaution. */
676 flush_tlb_early();
677#endif
678 uci->cpu_sig.rev = val[1];
679
680 if (early)
681 print_ucode(uci);
682 else
683 print_ucode_info(uci, mc_intel->hdr.date);
684
685 return 0;
686}
687
688/*
689 * This function converts microcode patch offsets previously stored in
690 * mc_saved_in_initrd to pointers and stores the pointers in mc_saved_data.
691 */
692int __init save_microcode_in_initrd_intel(void)
693{
694 unsigned int count = mc_saved_data.mc_saved_count;
695 struct microcode_intel *mc_saved[MAX_UCODE_COUNT];
696 int ret = 0;
697
698 if (count == 0)
699 return ret;
700
701 copy_initrd_ptrs(mc_saved, mc_saved_in_initrd, initrd_start, count);
702 ret = save_microcode(&mc_saved_data, mc_saved, count);
703 if (ret)
704 pr_err("Cannot save microcode patches from initrd.\n");
705
706 show_saved_mc();
707
708 return ret;
709}
710
711static void __init
712_load_ucode_intel_bsp(struct mc_saved_data *mc_saved_data,
713 unsigned long *initrd,
714 unsigned long start, unsigned long size)
715{
716 struct ucode_cpu_info uci;
717 enum ucode_state ret;
718
719 collect_cpu_info_early(&uci);
720
721 ret = scan_microcode(mc_saved_data, initrd, start, size, &uci);
722 if (ret != UCODE_OK)
723 return;
724
725 ret = load_microcode(mc_saved_data, initrd, start, &uci);
726 if (ret != UCODE_OK)
727 return;
728
729 apply_microcode_early(&uci, true);
730}
731
732void __init load_ucode_intel_bsp(void)
733{
734 u64 start, size;
735#ifdef CONFIG_X86_32
736 struct boot_params *p;
737
738 p = (struct boot_params *)__pa_nodebug(&boot_params);
739 start = p->hdr.ramdisk_image;
740 size = p->hdr.ramdisk_size;
741
742 _load_ucode_intel_bsp(
743 (struct mc_saved_data *)__pa_nodebug(&mc_saved_data),
744 (unsigned long *)__pa_nodebug(&mc_saved_in_initrd),
745 start, size);
746#else
747 start = boot_params.hdr.ramdisk_image + PAGE_OFFSET;
748 size = boot_params.hdr.ramdisk_size;
749
750 _load_ucode_intel_bsp(&mc_saved_data, mc_saved_in_initrd, start, size);
751#endif
752}
753
754void load_ucode_intel_ap(void)
755{
756 struct mc_saved_data *mc_saved_data_p;
757 struct ucode_cpu_info uci;
758 unsigned long *mc_saved_in_initrd_p;
759 unsigned long initrd_start_addr;
760 enum ucode_state ret;
761#ifdef CONFIG_X86_32
762 unsigned long *initrd_start_p;
763
764 mc_saved_in_initrd_p =
765 (unsigned long *)__pa_nodebug(mc_saved_in_initrd);
766 mc_saved_data_p = (struct mc_saved_data *)__pa_nodebug(&mc_saved_data);
767 initrd_start_p = (unsigned long *)__pa_nodebug(&initrd_start);
768 initrd_start_addr = (unsigned long)__pa_nodebug(*initrd_start_p);
769#else
770 mc_saved_data_p = &mc_saved_data;
771 mc_saved_in_initrd_p = mc_saved_in_initrd;
772 initrd_start_addr = initrd_start;
773#endif
774
775 /*
776 * If there is no valid ucode previously saved in memory, no need to
777 * update ucode on this AP.
778 */
779 if (mc_saved_data_p->mc_saved_count == 0)
780 return;
781
782 collect_cpu_info_early(&uci);
783 ret = load_microcode(mc_saved_data_p, mc_saved_in_initrd_p,
784 initrd_start_addr, &uci);
785
786 if (ret != UCODE_OK)
787 return;
788
789 apply_microcode_early(&uci, true);
790}
791
792void reload_ucode_intel(void)
793{
794 struct ucode_cpu_info uci;
795 enum ucode_state ret;
796
797 if (!mc_saved_data.mc_saved_count)
798 return;
799
800 collect_cpu_info_early(&uci);
801
802 ret = load_microcode_early(mc_saved_data.mc_saved,
803 mc_saved_data.mc_saved_count, &uci);
804 if (ret != UCODE_OK)
805 return;
806
807 apply_microcode_early(&uci, false);
808}
generated by cgit v1.2.2 (git 2.25.0) at 2026-04-17 08:14:23 -0400