Merge branch 'linus' into smp/hotplug

Apply upstream changes to avoid conflicts with pending patches.

3 files changed, 58 insertions, 28 deletions

diff --git a/arch/x86/kernel/apic/apic.c b/arch/x86/kernel/apic/apic.c
index 20abd912f0e4..50c95af0f017 100644
--- a/arch/x86/kernel/apic/apic.c
+++ b/arch/x86/kernel/apic/apic.c
@@ -313,7 +313,7 @@ int lapic_get_maxlvt(void)
 
 /* Clock divisor */
 #define APIC_DIVISOR 16
-#define TSC_DIVISOR  32
+#define TSC_DIVISOR  8
 
 /*
  * This function sets up the local APIC timer, with a timeout of
@@ -565,13 +565,37 @@ static void setup_APIC_timer(void)
                                     CLOCK_EVT_FEAT_DUMMY);
                 levt->set_next_event = lapic_next_deadline;
                 clockevents_config_and_register(levt,
-                                                (tsc_khz / TSC_DIVISOR) * 1000,
+                                                tsc_khz * (1000 / TSC_DIVISOR),
                                                 0xF, ~0UL);
         } else
                 clockevents_register_device(levt);
 }
 
 /*
+ * Install the updated TSC frequency from recalibration at the TSC
+ * deadline clockevent devices.
+ */
+static void __lapic_update_tsc_freq(void *info)
+{
+        struct clock_event_device *levt = this_cpu_ptr(&lapic_events);
+
+        if (!this_cpu_has(X86_FEATURE_TSC_DEADLINE_TIMER))
+                return;
+
+        clockevents_update_freq(levt, tsc_khz * (1000 / TSC_DIVISOR));
+}
+
+void lapic_update_tsc_freq(void)
+{
+        /*
+         * The clockevent device's ->mult and ->shift can both be
+         * changed. In order to avoid races, schedule the frequency
+         * update code on each CPU.
+         */
+        on_each_cpu(__lapic_update_tsc_freq, NULL, 0);
+}
+
+/*
  * In this functions we calibrate APIC bus clocks to the external timer.
  *
  * We want to do the calibration only once since we want to have local timer
@@ -1599,6 +1623,9 @@ void __init enable_IR_x2apic(void)
         unsigned long flags;
         int ret, ir_stat;
 
+        if (skip_ioapic_setup)
+                return;
+
         ir_stat = irq_remapping_prepare();
         if (ir_stat < 0 && !x2apic_supported())
                 return;
diff --git a/arch/x86/kernel/apic/x2apic_cluster.c b/arch/x86/kernel/apic/x2apic_cluster.c
index 6368fa69d2af..54f35d988025 100644
--- a/arch/x86/kernel/apic/x2apic_cluster.c
+++ b/arch/x86/kernel/apic/x2apic_cluster.c
@@ -155,7 +155,7 @@ static void init_x2apic_ldr(void)
 /*
  * At CPU state changes, update the x2apic cluster sibling info.
  */
-int x2apic_prepare_cpu(unsigned int cpu)
+static int x2apic_prepare_cpu(unsigned int cpu)
 {
         if (!zalloc_cpumask_var(&per_cpu(cpus_in_cluster, cpu), GFP_KERNEL))
                 return -ENOMEM;
@@ -168,7 +168,7 @@ int x2apic_prepare_cpu(unsigned int cpu)
         return 0;
 }
 
-int x2apic_dead_cpu(unsigned int this_cpu)
+static int x2apic_dead_cpu(unsigned int this_cpu)
 {
         int cpu;
 
@@ -186,13 +186,18 @@ int x2apic_dead_cpu(unsigned int this_cpu)
 static int x2apic_cluster_probe(void)
 {
         int cpu = smp_processor_id();
+        int ret;
 
         if (!x2apic_mode)
                 return 0;
 
+        ret = cpuhp_setup_state(CPUHP_X2APIC_PREPARE, "X2APIC_PREPARE",
+                                x2apic_prepare_cpu, x2apic_dead_cpu);
+        if (ret < 0) {
+                pr_err("Failed to register X2APIC_PREPARE\n");
+                return 0;
+        }
         cpumask_set_cpu(cpu, per_cpu(cpus_in_cluster, cpu));
-        cpuhp_setup_state(CPUHP_X2APIC_PREPARE, "X2APIC_PREPARE",
-                          x2apic_prepare_cpu, x2apic_dead_cpu);
         return 1;
 }
 
diff --git a/arch/x86/kernel/apic/x2apic_uv_x.c b/arch/x86/kernel/apic/x2apic_uv_x.c
index 09b59adaea3f..cb0673c1e940 100644
--- a/arch/x86/kernel/apic/x2apic_uv_x.c
+++ b/arch/x86/kernel/apic/x2apic_uv_x.c
@@ -223,6 +223,11 @@ static int __init uv_acpi_madt_oem_check(char *oem_id, char *oem_table_id)
         if (strncmp(oem_id, "SGI", 3) != 0)
                 return 0;
 
+        if (numa_off) {
+                pr_err("UV: NUMA is off, disabling UV support\n");
+                return 0;
+        }
+
         /* Setup early hub type field in uv_hub_info for Node 0 */
         uv_cpu_info->p_uv_hub_info = &uv_hub_info_node0;
 
@@ -325,7 +330,7 @@ static __init void build_uv_gr_table(void)
         struct uv_gam_range_entry *gre = uv_gre_table;
         struct uv_gam_range_s *grt;
         unsigned long last_limit = 0, ram_limit = 0;
-        int bytes, i, sid, lsid = -1;
+        int bytes, i, sid, lsid = -1, indx = 0, lindx = -1;
 
         if (!gre)
                 return;
@@ -356,11 +361,12 @@ static __init void build_uv_gr_table(void)
                 }
                 sid = gre->sockid - _min_socket;
                 if (lsid < sid) {               /* new range */
-                        grt = &_gr_table[sid];
-                        grt->base = lsid;
+                        grt = &_gr_table[indx];
+                        grt->base = lindx;
                         grt->nasid = gre->nasid;
                         grt->limit = last_limit = gre->limit;
                         lsid = sid;
+                        lindx = indx++;
                         continue;
                 }
                 if (lsid == sid && !ram_limit) {        /* update range */
@@ -371,7 +377,7 @@ static __init void build_uv_gr_table(void)
                 }
                 if (!ram_limit) {               /* non-contiguous ram range */
                         grt++;
-                        grt->base = sid - 1;
+                        grt->base = lindx;
                         grt->nasid = gre->nasid;
                         grt->limit = last_limit = gre->limit;
                         continue;
@@ -1155,19 +1161,18 @@ static void __init decode_gam_rng_tbl(unsigned long ptr)
         for (; gre->type != UV_GAM_RANGE_TYPE_UNUSED; gre++) {
                 if (!index) {
                         pr_info("UV: GAM Range Table...\n");
-                        pr_info("UV:  # %20s %14s %5s %4s %5s %3s %2s %3s\n",
+                        pr_info("UV:  # %20s %14s %5s %4s %5s %3s %2s\n",
                                 "Range", "", "Size", "Type", "NASID",
-                                "SID", "PN", "PXM");
+                                "SID", "PN");
                 }
                 pr_info(
-                "UV: %2d: 0x%014lx-0x%014lx %5luG %3d   %04x  %02x %02x %3d\n",
+                "UV: %2d: 0x%014lx-0x%014lx %5luG %3d   %04x  %02x %02x\n",
                         index++,
                         (unsigned long)lgre << UV_GAM_RANGE_SHFT,
                         (unsigned long)gre->limit << UV_GAM_RANGE_SHFT,
                         ((unsigned long)(gre->limit - lgre)) >>
                                 (30 - UV_GAM_RANGE_SHFT), /* 64M -> 1G */
-                        gre->type, gre->nasid, gre->sockid,
-                        gre->pnode, gre->pxm);
+                        gre->type, gre->nasid, gre->sockid, gre->pnode);
 
                 lgre = gre->limit;
                 if (sock_min > gre->sockid)
@@ -1286,7 +1291,7 @@ static void __init build_socket_tables(void)
                 _pnode_to_socket[i] = SOCK_EMPTY;
 
         /* fill in pnode/node/addr conversion list values */
-        pr_info("UV: GAM Building socket/pnode/pxm conversion tables\n");
+        pr_info("UV: GAM Building socket/pnode conversion tables\n");
         for (; gre->type != UV_GAM_RANGE_TYPE_UNUSED; gre++) {
                 if (gre->type == UV_GAM_RANGE_TYPE_HOLE)
                         continue;
@@ -1294,20 +1299,18 @@ static void __init build_socket_tables(void)
                 if (_socket_to_pnode[i] != SOCK_EMPTY)
                         continue;       /* duplicate */
                 _socket_to_pnode[i] = gre->pnode;
-                _socket_to_node[i] = gre->pxm;
 
                 i = gre->pnode - minpnode;
                 _pnode_to_socket[i] = gre->sockid;
 
                 pr_info(
-                "UV: sid:%02x type:%d nasid:%04x pn:%02x pxm:%2d pn2s:%2x\n",
+                "UV: sid:%02x type:%d nasid:%04x pn:%02x pn2s:%2x\n",
                         gre->sockid, gre->type, gre->nasid,
                         _socket_to_pnode[gre->sockid - minsock],
-                        _socket_to_node[gre->sockid - minsock],
                         _pnode_to_socket[gre->pnode - minpnode]);
         }
 
-        /* check socket -> node values */
+        /* Set socket -> node values */
         lnid = -1;
         for_each_present_cpu(cpu) {
                 int nid = cpu_to_node(cpu);
@@ -1318,14 +1321,9 @@ static void __init build_socket_tables(void)
                 lnid = nid;
                 apicid = per_cpu(x86_cpu_to_apicid, cpu);
                 sockid = apicid >> uv_cpuid.socketid_shift;
-                i = sockid - minsock;
-
-                if (nid != _socket_to_node[i]) {
-                        pr_warn(
-                        "UV: %02x: type:%d socket:%02x PXM:%02x != node:%2d\n",
-                                i, sockid, gre->type, _socket_to_node[i], nid);
-                        _socket_to_node[i] = nid;
-                }
+                _socket_to_node[sockid - minsock] = nid;
+                pr_info("UV: sid:%02x: apicid:%04x node:%2d\n",
+                        sockid, apicid, nid);
         }
 
         /* Setup physical blade to pnode translation from GAM Range Table */