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authorJiang Liu <jiang.liu@linux.intel.com>2015-04-13 22:29:56 -0400
committerThomas Gleixner <tglx@linutronix.de>2015-04-24 09:36:54 -0400
commit154d9e50e413ee144d48ccd6c402633ffbecbfff (patch)
tree0dde6c23431a01467be6ff70ed28b90396cf43ac /arch/x86/kernel/apic/io_apic.c
parentca1b88622e9c16df7b1e0a57e9c6c2300321bed4 (diff)
x86/irq: Clean up io_apic.h
Clean up io_apic.h by: 1) moving definition of struct mp_ioapic_gsi into io_apic.c 2) changing mp_pin_to_gsi() and mp_ioapic_gsi_routing() as static 3) removing unused MP_MAX_IOAPIC_PIN 4) removing useless forward declaration 5) removing useless comments Signed-off-by: Jiang Liu <jiang.liu@linux.intel.com> Tested-by: Joerg Roedel <jroedel@suse.de> Cc: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> Cc: David Cohen <david.a.cohen@linux.intel.com> Cc: Sander Eikelenboom <linux@eikelenboom.it> Cc: David Vrabel <david.vrabel@citrix.com> Cc: Tony Luck <tony.luck@intel.com> Cc: Joerg Roedel <joro@8bytes.org> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: Bjorn Helgaas <bhelgaas@google.com> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Rafael J. Wysocki <rjw@rjwysocki.net> Cc: Randy Dunlap <rdunlap@infradead.org> Cc: Yinghai Lu <yinghai@kernel.org> Cc: Borislav Petkov <bp@alien8.de> Cc: Dimitri Sivanich <sivanich@sgi.com> Cc: Grant Likely <grant.likely@linaro.org> Link: http://lkml.kernel.org/r/1428978610-28986-20-git-send-email-jiang.liu@linux.intel.com Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'arch/x86/kernel/apic/io_apic.c')
-rw-r--r--arch/x86/kernel/apic/io_apic.c23
1 files changed, 8 insertions, 15 deletions
diff --git a/arch/x86/kernel/apic/io_apic.c b/arch/x86/kernel/apic/io_apic.c
index 3029502b0a50..4c7da8483398 100644
--- a/arch/x86/kernel/apic/io_apic.c
+++ b/arch/x86/kernel/apic/io_apic.c
@@ -63,7 +63,6 @@
63#define for_each_ioapic_pin(idx, pin) \ 63#define for_each_ioapic_pin(idx, pin) \
64 for_each_ioapic((idx)) \ 64 for_each_ioapic((idx)) \
65 for_each_pin((idx), (pin)) 65 for_each_pin((idx), (pin))
66
67#define for_each_irq_pin(entry, head) \ 66#define for_each_irq_pin(entry, head) \
68 list_for_each_entry(entry, &head, list) 67 list_for_each_entry(entry, &head, list)
69 68
@@ -92,6 +91,11 @@ struct mp_chip_data {
92 bool isa_irq; 91 bool isa_irq;
93}; 92};
94 93
94struct mp_ioapic_gsi {
95 u32 gsi_base;
96 u32 gsi_end;
97};
98
95static struct ioapic { 99static struct ioapic {
96 /* 100 /*
97 * # of IRQ routing registers 101 * # of IRQ routing registers
@@ -122,7 +126,7 @@ unsigned int mpc_ioapic_addr(int ioapic_idx)
122 return ioapics[ioapic_idx].mp_config.apicaddr; 126 return ioapics[ioapic_idx].mp_config.apicaddr;
123} 127}
124 128
125struct mp_ioapic_gsi *mp_ioapic_gsi_routing(int ioapic_idx) 129static inline struct mp_ioapic_gsi *mp_ioapic_gsi_routing(int ioapic_idx)
126{ 130{
127 return &ioapics[ioapic_idx].gsi_config; 131 return &ioapics[ioapic_idx].gsi_config;
128} 132}
@@ -134,7 +138,7 @@ static inline int mp_ioapic_pin_count(int ioapic)
134 return gsi_cfg->gsi_end - gsi_cfg->gsi_base + 1; 138 return gsi_cfg->gsi_end - gsi_cfg->gsi_base + 1;
135} 139}
136 140
137u32 mp_pin_to_gsi(int ioapic, int pin) 141static inline u32 mp_pin_to_gsi(int ioapic, int pin)
138{ 142{
139 return mp_ioapic_gsi_routing(ioapic)->gsi_base + pin; 143 return mp_ioapic_gsi_routing(ioapic)->gsi_base + pin;
140} 144}
@@ -1153,8 +1157,7 @@ static int pin_2_irq(int idx, int ioapic, int pin, unsigned int flags)
1153 return mp_map_pin_to_irq(gsi, idx, ioapic, pin, flags, NULL); 1157 return mp_map_pin_to_irq(gsi, idx, ioapic, pin, flags, NULL);
1154} 1158}
1155 1159
1156int mp_map_gsi_to_irq(u32 gsi, unsigned int flags, 1160int mp_map_gsi_to_irq(u32 gsi, unsigned int flags, struct irq_alloc_info *info)
1157 struct irq_alloc_info *info)
1158{ 1161{
1159 int ioapic, pin, idx; 1162 int ioapic, pin, idx;
1160 1163
@@ -1719,7 +1722,6 @@ static int __init timer_irq_works(void)
1719 * This is not complete - we should be able to fake 1722 * This is not complete - we should be able to fake
1720 * an edge even if it isn't on the 8259A... 1723 * an edge even if it isn't on the 8259A...
1721 */ 1724 */
1722
1723static unsigned int startup_ioapic_irq(struct irq_data *data) 1725static unsigned int startup_ioapic_irq(struct irq_data *data)
1724{ 1726{
1725 int was_pending = 0, irq = data->irq; 1727 int was_pending = 0, irq = data->irq;
@@ -1737,15 +1739,6 @@ static unsigned int startup_ioapic_irq(struct irq_data *data)
1737 return was_pending; 1739 return was_pending;
1738} 1740}
1739 1741
1740/*
1741 * Level and edge triggered IO-APIC interrupts need different handling,
1742 * so we use two separate IRQ descriptors. Edge triggered IRQs can be
1743 * handled with the level-triggered descriptor, but that one has slightly
1744 * more overhead. Level-triggered interrupts cannot be handled with the
1745 * edge-triggered handler, without risking IRQ storms and other ugly
1746 * races.
1747 */
1748
1749static void __target_IO_APIC_irq(unsigned int irq, struct irq_cfg *cfg, 1742static void __target_IO_APIC_irq(unsigned int irq, struct irq_cfg *cfg,
1750 struct mp_chip_data *data) 1743 struct mp_chip_data *data)
1751{ 1744{