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author | Paolo Bonzini <pbonzini@redhat.com> | 2015-11-24 13:34:40 -0500 |
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committer | Paolo Bonzini <pbonzini@redhat.com> | 2015-11-24 13:34:40 -0500 |
commit | 8bd142c01648cdb33e9bcafa0448ba2c20ed814c (patch) | |
tree | 9197c60d3f9d4036f38f281a183e94750ceea1d7 /arch/x86/include/asm/msr-index.h | |
parent | d792abacaf1a1a8dfea353fab699b97fa6251c2a (diff) | |
parent | fbb4574ce9a37e15a9872860bf202f2be5bdf6c4 (diff) |
Merge tag 'kvm-arm-for-v4.4-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/kvmarm/kvmarm into kvm-master
KVM/ARM Fixes for v4.4-rc3.
Includes some timer fixes, properly unmapping PTEs, an errata fix, and two
tweaks to the EL2 panic code.
Diffstat (limited to 'arch/x86/include/asm/msr-index.h')
-rw-r--r-- | arch/x86/include/asm/msr-index.h | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h index 9f3905697f12..690b4027e17c 100644 --- a/arch/x86/include/asm/msr-index.h +++ b/arch/x86/include/asm/msr-index.h | |||
@@ -35,7 +35,7 @@ | |||
35 | #define MSR_IA32_PERFCTR0 0x000000c1 | 35 | #define MSR_IA32_PERFCTR0 0x000000c1 |
36 | #define MSR_IA32_PERFCTR1 0x000000c2 | 36 | #define MSR_IA32_PERFCTR1 0x000000c2 |
37 | #define MSR_FSB_FREQ 0x000000cd | 37 | #define MSR_FSB_FREQ 0x000000cd |
38 | #define MSR_NHM_PLATFORM_INFO 0x000000ce | 38 | #define MSR_PLATFORM_INFO 0x000000ce |
39 | 39 | ||
40 | #define MSR_NHM_SNB_PKG_CST_CFG_CTL 0x000000e2 | 40 | #define MSR_NHM_SNB_PKG_CST_CFG_CTL 0x000000e2 |
41 | #define NHM_C3_AUTO_DEMOTE (1UL << 25) | 41 | #define NHM_C3_AUTO_DEMOTE (1UL << 25) |
@@ -44,7 +44,6 @@ | |||
44 | #define SNB_C1_AUTO_UNDEMOTE (1UL << 27) | 44 | #define SNB_C1_AUTO_UNDEMOTE (1UL << 27) |
45 | #define SNB_C3_AUTO_UNDEMOTE (1UL << 28) | 45 | #define SNB_C3_AUTO_UNDEMOTE (1UL << 28) |
46 | 46 | ||
47 | #define MSR_PLATFORM_INFO 0x000000ce | ||
48 | #define MSR_MTRRcap 0x000000fe | 47 | #define MSR_MTRRcap 0x000000fe |
49 | #define MSR_IA32_BBL_CR_CTL 0x00000119 | 48 | #define MSR_IA32_BBL_CR_CTL 0x00000119 |
50 | #define MSR_IA32_BBL_CR_CTL3 0x0000011e | 49 | #define MSR_IA32_BBL_CR_CTL3 0x0000011e |